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FP6326/A

Synchronous Buck PWM

DC-DC Controller

Description Features
The FP6326/A is designed to drive two N-channel ● Operates from +5V or +12V
MOSFETs in a synchronous rectified buck topology. ● High Output Current
It provides the output adjustment, internal soft-start, ● Drives Two Low Cost N-Channel MOSFETs
frequency compensation networks, monitoring and ● Fast Transient Response
protection functions into a single package. ● Simple Single-Loop Control Design
( Voltage-Mode PWM Control)
The IC operating at fixed 300kHz or 600kHz
● Internal Soft-Start
frequency provides simple, single feedback loop,
● Over-Current Fault Monitor
voltage mode control with fast transient response.
● Over-Voltage Protection
The resulting PWM duty ratio ranges from 0-100%.
● Under-Voltage Protection
The FP6326/A features over current protection. The ● SOP-8 Package
output current is monitored by sensing the voltage ● RoHS Compliant
drop across the RDS-ON of the low side MOSFET
which eliminates the need for a current sensing
resistor. Applications
This device is available in SOP-8 package. ● Motherboard
● Graphic Card
● Telecomm Equipments
● High Power DC-DC Regulators
● Servers

Pin Assignment Ordering Information

SO Package (SOP-8) FP6326□□□□
TR: Tape / Reel

G: Green

Package Type
SO: SOP-8
Switching Frequency
Blank: 300kHz
Figure 1. Pin Assignment of FP6326/A A: 600kHz

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Typical Application Circuit

Figure 2. Typical Application Circuit of FP6326/A

Functional Pin Description

Pin Name Pin Function

This pin provides bias voltage to the high side MOSFET Driver. A bootstrap circuit may be to create a BOOT
BOOT
voltage suitable to drive a standard N-Channel MOSFET.
Connect UGATE to the high side MOSFET gate. This pin is monitored by the adaptive shoot-through protection
UGATE
circuitry to determine when the high side MOSFET has turned off.
GND Ground.
Connect LGATE to the low side MOSFET gate. This pin is monitored by the adaptive shoot-through protection
LGATE
circuitry to determine when the high side MOSFET has turned off.
VCC Power Pin.

FB Feedback Pin. The typical reference voltage is 0.8V.

OCSET Shutdown Control and connect a resistance (ROCSET) for over current setting.

PHASE Connect the PHASE pin to the high side MOSFET source.

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Absolute Maximum Ratings

● VCC to GND ------------------------------------------------------------------------------------ -0.3V to +16V
● BOOT, VBOOT-VPHASE -------------------------------------------------------------------------- -0.3V to +16V
● PHASE ------------------------------------------------------------------------------------------- -5V to +16V
● UGATE ------------------------------------------------------------------------------------------- VPHASE - 0.3V to VBOOT + 0.3V
● LGATE ------------------------------------------------------------------------------------------- -0.3V to VCC+0.3V
● FB,OCSET to GND --------------------------------------------------------------------------- -0.3V to +6V
● Continuous Power Dissipation (TA=+25°C) -------------------------------------------- +630mW
● Package Thermal Resistance, SOP-8 (θJA) -------------------------------------------- +160°C/W
● Junction Temperature ------------------------------------------------------------------------ +150°C
● Storage Temperature Range---------------------------------------------------------------- -65°C to +150°C
● Lead Temperature (Soldering, 10sec.) -------------------------------------------------- +260°C
Note1：Stresses beyond those listed under “Absolute Maximum Ratings" may cause permanent damage to the device.

Recommended Operating Conditions

● Supply Voltage, VCC ------------------------------------------------------------------------- 5V ± 5%, 12V ± 10%
● Operating Temperature Range ------------------------------------------------------------ -40°C to +85°C

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Block Diagram

Figure 3. Block Diagram of FP6326/A

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Electrical Characteristics
(VCC=12V, TA=25°C, unless otherwise specified)
Parameter Symbol Conditions Min Typ Max Unit

INPUT

VCC Under Voltage Lockout VUVLO VCC rising 3.7 4.1 4.5 V

UVLO Hysteresis VCC falling 0.45 V

Quiescent Current ICC UGATE and LGATE open 6 15 mA

ERROR AMPLIFIER

Feedback Voltage VFB 0.784 0.8 0.816 V

FB Input Bias Current IFB VFB=1V 0.1 µA

Open Loop DC Gain
AO 85 dB
(Note2)
OSCILLATOR

Frequency FOSC VCC=12V FP6326 250 300 350 kHz

Frequency FOSC VCC=12V FP6326A 500 600 700 kHz

Ramp Amplitude △VOSC VCC=12V 1.5 Vp-p

GATE DRIVERS

Upper Gate Source IUGATE VBOOT-VPHASE=12V, VUGATE-VPHASE=6V 0.6 1 A

Upper Gate Sink RUGATE VBOOT-VPHASE=12V, VUGATE-VPHASE=1V 2 5 Ω

Lower Gate Source ILGATE VCC=12V, VLGATE =6V 0.6 1 A

Lower Gate Sink RLGATE VCC=12V, VLGATE =1V 2 5 Ω

Dead Time (Note2) TDT 100 ns

PROTECTION

FB Under-Voltage Trip FB Falling 70 75 80 %

FB Over-Voltage Trip 120 %

OCSET Current Source IOCSET VPHASE=0V 35 40 45 µA

Soft-Start Interval (Note2) Tss 2 3.5 ms

Note2: Guarantee by design.

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Typical Performance Curves

0.85 350

0.84 340

0.83 330
Reference Voltage (V)

0.82 320

Frequency (KHz)
0.81 310

0.80 300

0.79 290

0.78 280

0.77 270

0.76 260

0.75 250
-40 -20 0 20 40 60 80 -40 -20 0 20 40 60 80
o
Junction Temperature ( C)
o Junction Temperature ( C)

Figure 4. Reference Voltage vs. Junction Temperature Figure 5. Frequency vs. Junction Temperature

94
VCC=12V
44
92 VIN=5V
VOUT=1.8V
90
OC Current Source (uA)

42 FP6326
Efficiency (%)

88

40
86

FP6326A
84
38

82

36
80

-40 -20 0 20 40 60 80 0 2 4 6 8 10 12 14
Junction Temperature ( C)
o Output Current (A)

Figure 6. OC Current Source vs. Junction Temperature Figure 7. Efficiency vs. Output Current

FP6326A, VCC=12V, VIN=5V

FP6326A, VCC=12V, VIN=5V VCC
VCC

VOUT
VOUT

IL IL

VPHASE VPHASE

Figure 8. Power On at 15A Loading Figure 9. Power OFF at 15A Loading

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Typical Performance Curves (Continued)

FP6326A, VCC=12V, VIN=12V

VCC VCC FP6326A, VCC=12V, VIN=12V

VOUT VOUT

IL IL

VPHASE VPHASE

Figure 10. Power On at 15A Loading Figure 11. Power OFF at 15A Loading

FP6326A, VCC=12V, VIN=5V FP6326A, VCC=12V, VIN=5V

VUGATE
VUGATE

VPHASE VPHASE

VLGATE
VLGATE

Figure 12. Switching waveform (UGATE rising) IOUT=0A Figure 13. Switching waveform (UGATE rising) IOUT=15A

FP6326A, VCC=12V, VIN=5V FP626A, VCC=12V, VIN=5V

VUGATE
VUGATE

VPHASE VPHASE

VLGATE VLGATE

Figure 14. Switching waveform (UGATE Falling) IOUT=0A Figure 15. Switching waveform (UGATE Falling) IOUT=15A

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Typical Performance Curves (Continued)

FP6326, VCC=12V, VIN=12V FP6326, VCC=12V, VIN=12V VUGATE

VUGATE

VPHASE
VPHASE

VLGATE
VLGATE

Figure 16. Switching waveform (UGATE rising) IOUT=0A Figure 17. Switching waveform (UGATE rising) IOUT=15A

FP6326, VCC=12V, VIN=12V FP6326, VCC=12V, VIN=12V

VUGATE VUGATE

VPHASE VPHASE

VLGATE VLGATE

Figure 18. Switching waveform (UGATE Falling) IOUT=0A Figure 19. Switching waveform (UGATE Falling) IOUT=15A

FP6326A, VCC=12V, VIN=5V FP6326A, VCC=12V, VIN=12V

VOUT IL

VOUT
IL

Figure 20. Output Ripple at 15A Figure 21.Output Ripple at 15A

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Typical Performance Curves (Continued)

FP6326A, VCC=12V, VIN=5V, L=1uH FP6326A, VCC=12V, VIN=3.3V, L=1uH

VOUT VOUT

IL IL

Figure 22. Transient test:1kHz, Slew rate:2.5A/us Figure 23. Transient test:1kHz, Slew rate:2.5A/us

VCC=12V, VIN=5V
FP6326A VCC=12V, VIN=12V
VCC

VOUT

VOUT

IL
IL

VPHASE

Figure 24. Transient test :1kHz, Slew rate: 2.5A/us Figure 25. OCP Using DC Loading

VCC=12V, VIN=12V
VCC

VOUT

IL

VPHASE

Figure 26. OCP Using DC Loading

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Functional Description
Initialization Shutdown

The Power-On Reset (POR) function continually Connecting a small transistor to OCSET pin, and
monitors the input supply voltage and the enable pulling the OCSET voltage less than 0.15V can
function. The POR monitors the bias voltage at the shutdown the FP6326/A. At this condition, the
VCC pin FP6326/A is shutdown and high side and low side
MOSFETS are turned off. The output is floating.
When VCC power is ready, the FP6326/A starts to
ramp up the output voltage up to the target voltage. Under-Voltage Protection

Soft-Start The under-voltage function monitors the FB

voltage to protection the converter against the
The FP6326/A features soft-start to limit inrush output short-circuit condition. The under- voltage
current and control the output voltage rise at start-up. threshold is 0.75xVREF. The UV has 20us
The soft-start is accomplished by ramping the triggered delay. When UVP happens, the
internal reference input from 0V to 0.8V. The converter re-starts up without latching off.
soft-start interval is 3.5ms typical.
Over-Voltage Protection
Over-Current Protection
The over-voltage function monitors the FB voltage
The over-current function protects the converter a to protection the converter against the output from
shorted output by using the low side MOSFET over-voltage. When the output voltage rises to
on-resistance RDS-ON to monitor the current. This 1.2xVREF, the FP6326/A turns on the low side
method enhances the converter’s efficiency and MOSFET until the output voltage below the OVP
reduces cost by eliminating a current sensing threshold.
resistor.

The over-current function cycles the soft-start

function in a hiccup mode to provide fault protection.
After four times are counted, the high side and low
side MOSFET will turn off and the output is latched
off. A resistor (ROCSET), connected from OCSET pin to
the source of high side MOSFET and the drain of low
side MOSFET to set the over-current triple level. An
internal 40uA(typical) current source develops the
voltage across the ROCSET. The over-current
setting equation is shown as below:

40uA × R OCSET − 0.4 V

IOCSET =
R DS−ON

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Application Information
Introduction The ESR can be calculated from the following
formula.
The FP6326/A integrated circuit is a synchronous
PWM controller, it operates over a wide input voltage ⎛V ⎞
ESR = ⎜ RIPPLE ⎟
range. Being low cost, it is a very popular choice of ⎝ ΔIL ⎠
PWM controller. This section will describe the
FP6326/A application suggestion. The operation and An aluminum electrolytic capacitor's ESR value
the design of this application will also be discussed is related to the capacitance and its voltage
in detail. rating. In most case, higher voltage electrolytic
capacitors have lower ESR values. Most of the
Design Procedures time, capacitors with much higher voltage ratings
may be needed to provide the low ESR values
This section will describe the steps to design required for low output ripple voltage.
synchronous buck system, and explains how to
construct basic power conversion circuits including b. The capacitor voltage rating should be at least
the design of the control chip functions and the basic 1.5 times greater than the output voltage, and
loop. often much higher voltage ratings are needed to
satisfy the low ESR requirements needed for low
(1) Synchronous Buck Converter output ripple voltage.
Since this is a buck output system, the first quantity (3) Output N-channel MOSFET Selection
to be determined is the duty cycle value. The
formula calculated the PWM duty ratio, apply to the a. The current ability of the output N-channel
system which we propose to design: MOSFETs must be at least more than the peak
switching current IPK. The voltage rating VDS of
the N-channel MOSFETs should be at least 1.25
times the maximum input voltage. Choose the
low RDS-ON MOSFETs for reducing the
conduction power loss. Choose the low CISS
(2) Inductor Selection
MOSFETs for reducing the switching loss. But
To find the inductor value it is necessary to consider most of time, the two factors are trade-off.
the inductor ripple current. Choose an inductor Consider the system requirement and define the
which operated in continuous mode down to 10 MOSFETs rating.
percent of the rated output load:
b. The MOSFETs must be fast (switch time) and
ΔIL = 2 x 10% x IO must be located close to the FP6326/A using
short leads and short printed circuit traces. In
The inductor “L” value for this system is connected case of a large output current, we must layout a
to be: copper to reduce the temperature of these two
MOSFETs.
(VIN - VDS(sat) – VO) x DMIN
L ≧
ΔIL x fS (4) Input Capacitor Selection

a. The RMS current rating of the input capacitor can

If the core loss is a problem, increasing the
be calculated from the next page formula table.
inductance of L will be helpful.
b. This capacitor should be located close to the IC
(3) Output Capacitor Selection
using short leads and the volt age rating should
a. The output capacitor is required to filter the output be approximately 1.5 times the maximum input
noise and provide regulator loop stability. When voltage.
selecting an output capacitor, the important
capacitor parameters are; the 100kHz Equivalent
Series Resistance (ESR), the RMS ripples
current rating, the voltage rating, and capacitance
value. For the output capacitor, the ESR value is
the most important parameter.
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Application Information (Continued)

Calculating Formula (2) Feedback
VOUT=VFB x ((R3/R2) + 1) Try to put the feedback trace as far from the
inductor and noisy power traces as possible. You
[V
IN(min)
]
- VDS(SAT) - VOUT × TON(max) would also like the feedback trace to be as direct as
L ≥ possible and somewhat thick. These two
ΔIL
sometimes involve a trade-off, but keeping it away
IRIPPPLE = ILOAD(max) - ILOAD(min) from inductor EMI and other noise sources is the
more critical of the two. It is often a good idea to run
VRIPPLE the feedback trace on the side of the PCB opposite
COUT ESR = [ ] of the inductor with a ground plane separating the
ΔI L
two.
VDC -Rating ≥1.5 × V OUT
(3) Filter Capacitors

When using a low value ceramic input filter

CIN IIN(rms) = IOUT × D(1 D) capacitor, it should be located as close to the VIN
pin of the IC as possible. This will eliminate as
VDC-rating ≥1.5 × VIN(max) much trace inductance effects as possible and give
the internal IC rail a cleaner voltage supply.
Sometimes using a small resistor between VCC and
TON /(TON +TOFF )
IC VCC pin will more useful because the RC will be
D a low-pass filter. Some designs require the use of a
VOUT / VIN feed-forward capacitor connected from the output
to the feedback pin as well, usually for stability
reasons.
ΔIL 2 x 10% x IO
(4) Compensation
IIN(rms) I OUT × D (1 D )
If external compensation components are needed
for stability, they should also be placed closed to
Layout Notice the IC. Surface mount components are
recommended here as well for the same reasons
When designing a high frequency switching discussed for the filter capacitors.
regulated power supply, layout is very important.
Using a good layout can solve many problems (5) Traces and Ground Plane
associated with these types of supplies. The
problems due to a bad layout are often seen at high Make all of the power (high current) traces as short,
current levels and are usually more obvious at large direct, and thick as possible. It is a good practice on
input to output voltage differentials. Some of the a standard PCB board to make the traces an
main problems are loss of regulation at high output absolute minimum of 15mils (0.381mm) per
current and/or large input to output voltage Ampere. The inductor, output capacitors, and
differentials, excessive noise on the output and output diode (In synchronous case, means the low
switch waveforms, and instability. Using the simple side switch) should be as close to each other
guidelines that follow will help minimize these possible. This will reduce lead inductance and
problems. resistance as well which in turn reduces noise
spikes, ringing, and resistive losses which produce
(1) Inductor voltage errors. The grounds of the IC, input
Always try to use a low EMI inductor with a ferrite capacitors, output capacitors, and output diode (or
type closed core. Open core can be used if they switch, if applicable) should be connected close
have low EMI characteristics and are located a bit together directly to a ground plane. It would also be
more away from the low power traces and a good idea to have a ground plane on both sides
components. of the PCB. For multi-layer boards with more than
two layers, a ground plane can be used to separate
the power plane (where the power traces and
components are) and the signal plane (where the

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Application Information (Continued)

feedback and compensation and components are)
for improved performance. It is good practice to use
one standard via per 200mA of current if the trace
will need to conduct a significant amount of current
from one plane to the other. Due to the way
switching regulators operate, there are power on
and power off states. During each state there will be
a current loop made by the power components that
are currently conducting. Place the power
components so that during each of the two states
the current loop is conducting in the same direction.

Board Layout

Figure 27. Top Layer Figure 28. Bottom Layer

Figure 29. Inner Layer 2 Figure 30. Inner layer 3

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Outline Information
SOP- 8 Package (Unit: mm)

SYMBOLS DIMENSION IN MILLIMETER

UNIT MIN MAX
A 1.35 1.75
A1 0.05 0.25
A2 1.30 1.50
B 0.31 0.51
D 4.80 5.00
E 3.80 4.00
e 1.20 1.34
H 5.80 6.20
L 0.40 1.27
Note 1：Followed From JEDEC MO-012-E.

Life Support Policy

Fitipower’s products are not authorized for use as critical components in life support devices or other medical systems.

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