Class E-A New Single-Ended Class of High-Efficiency Tuned Switching Power Amplifiers

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168 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. SC-10, NO.

3, JUNE 1975

Class E-A New Class of High-Efficiency Tuned


Single-Ended Switching Power Amplifiers
NATHAN O. SOKAL, SENIOR MEMBER, IEEE, AND ALAN D. SOKAL

Abstract–The previous literature on tuned power amplifiers has not voltage across the device when current flows through it; 2) the
made clear the fundamental differences between amplifiers in which current through the device when voltage exists across it; and
the output device acts 1) as a current source, or 2) as a switch. Previous
3) the duration of any unavoidable condition in which appre-
circuits have often operated in contradiction to their design assump-
tions, resulting in the need for “cut-and-try” design. The new class of ciable current and voltage exist simultaneously. Clas8-C
amplifiers deseribed here is based on a load network synthesized to amplifiers [1] - [8] apply 1) and 2). Class-D amplifiers [2],
hWe a transient response which maximizes power efficiency even if the [15] -[21] apply 1), 2), and 3). Previous approaches to 3)
active device switching times are substantial fractions of the ac cycle. have been only to reduce the device switching times. Our new
The new class of amplifiers, named “Class E; 1 is defined and is iflus-
class of high-efficiency amplifiers is based on a load network
tnated by a detailed description and a set of design equations for one
simple member of the class. For that circuit the authors measured which is synthesized to give a transient response which
96 percent transistor efficiency at 3.9 MHr at 26-W output from a pair achieves 3) even if the device switching times are appreciable
of Motorola 2N3735 TO-5 transistors. Advantages of Class E are fractions of the ac cycle. For lack of space, we discuss here
unusually high efficiency, a priori designability, large reduction in
only briefly: 1) the largely-ignored fundamental differences
second-breakdown stress, low sensitivityy to activedevice characteristics,
between amplifiers using active devices a) as switches and b) as
and potential for high-efficiency operation at higher frequencies than
pI eviously published Class-D circuits. Harmonic output and power gain current sources, and the greatly different requirements placed
are comparable to those of conventional amplifiers. on load network design by those two different cases; 2) the
consequent invalidity of the assumptions upon which many
designs are based; 3). evaluation of previous published work in
I. INTRODUCTION
tuned power amplifiers; and 4) design of the optimum tran-
N a high-efficiency power amplifier, increases of efficiency

1[
sistor for use in this circuit. More details are available on
which at first might appear to be minor can be very impor- request from the authors.
tant, e.g., increasing collector efficiency from 80 to 90 per-
cent halves the collector power dissipation (reduction from
213 percentof the input power to 10 percent). That allows II. PREVIOUS WORK
dmtbling the power output, or halving the number of output A. Amplifiers Using Current-Source Active Devices
t~ansistors and reducing the heat sink volume and weight by a In designing a tuned Class-C power amplifier [1] - [8], the
factor of about 2.8, or halving the junction temperature rise output active device is assumed to be a high-impedance current
and thereby decreasing the transistor failure rate.2 The recent source, i.e., its output current is 1) determined primarily
large increases of energy cost provide further incentive for by the input drive and 2) substantially independent of the
reducing power losses in high-power fixed installations, and output voltage which results from the flow of that current in
conservation of battery or generator power can be important the load network. That network is designed so that its voltage
for portable or remote equipment. response to the periodic current pulses is a sinusoid at the
The major power loss is usually power dissipated in the out- output frequency, with these properties: 1) the minimum of
put active device(s), eg., transistors or vacuum tubes. To the voltage across the current source occurs at the time of the
minimize that dissipation, one attempts to minimize: 1) the current pulse; and 2) at this minimum, the voltage is not less
than a certain minimum permissible voltage, determined by
the characteristics of the active device and required for the
Manuscript received January 23, 1974; revised January 14, 1975. A device to function as a current source as assumed. This voltage
preliminary version of this paper was presented at the 1972 IEEE Inter- prevents “saturation” of a transistor or “bottoming” of a pen-
national Symposium on Circuit Theory, Los Angeles, Calif., April 1972.
N. O. Sokal is with Design Automation, Inc., Lexington, Mass. 02173.
tode or triode4 vacuum tube, for example. If the active device
A. D. Sokal is with the Department of Physics, Harvard University,
Cambridge, Mass. 02138.
I me new name CCClaSS~ is proposed because 1) the unique Prin- 3 The work reported here is the subject of patent applications by the
ciples of load network operation for achieving high efficiency, which authors. Licenses and further technical information are available to
are the basis of our circuit operation, are not embodied in any of the interested
parties.
4 Despite
thefact that the triode plate resistance (rp) maY be com-
previously defined Classes A through D and 2) although our amplifier
w,es switchhtg active devices, in common with Class D, the definition of parable with the tank parallel load resistance (RL), in most cases the
Class D by its inventor [15] does not involve our type of load network, triode acts essentially as a current source unless the tube is “bottomed”
and specifies operation of the switches at 50 percent duty ratio, which during the current pulse by incorrect circuit operation. Specifically, if
is not required in our circuit. the tank loaded Q is greater than 2rrDRL/rp, where D is the fraction of
‘For example, by a factor of =14 if the temperature rise is halved a cycle during which the current pulse flows, the current pulse magni-
from 130°C to 65°C above a 50”C ambient (i.e., T~ is reduced from tude will be 80 percent or more of the value it would have if the triode
180”C to 115”C). This factor is an average of values read from graphs were a pure current source with infinite rp. For example, for the tYpi-
for numerous VHF, UHF, and microwave RF power transistors in “RF cal case of D = 0.1 and RL/rp = 4, the triode can be considered to be a
and microwave power transistors–MTF projections,” Communications current source if the tank loaded Q is 2..5 or more, which is almost
Transistor Corp., San Carlos, Calif., Bull. 2. O.8.lB, Nov. 1972. always the case.
SOKAL AND SOKAL: NEW CLASS OF POWER AMPLIFIERS 169

TABLE I
USE OF CURRENT SOURCE VERSUS TWO. STATE SWITCH

Characteristic Amplifier Using Current Source Amplifier Using Two-State Switch

Active-device output-port ac imped- Always high. “on”: low


ance (a v/az). “off”: high.
Is the active device attowed to No. Often intentionally, when “on.”
saturate?
Desired voltage across the active Greater than a specified minimum As low as can be obtained.
device while conducting current. vrdue.
What determines the voltage across The voltage response of the load The voltage approaches zero
the active device while it is conduc- network input-port impedance to because of the low-impedance
ting current ? the current pukes delivered by the property of the “on” switch,
current source. independent of the properties
of the load network.
Does the voltage across the active Yes. No.
device output port during current
conduction depend on the load
network input-port impedance?
What determines the current which Only its input signal. The load network to which its
flows through the active device output port is connected.
when it is conducting current?
To what criteria should the load The input-port voltage wave- The input-port voltage waveform
network be designed? form produced in response to a produced by repetitive alterna-
specified repetitive current-pulse tively connected short-circuits
train injected into its input port. and open-circuits at its input port.
(The full use of thk criterion is
novel; detaits are in Section III
of this paper.)

saturates, the basic design assumptions become invalid. This is voltage. Table I shows the fundamental differences between
the reason why so much “cut and try” is needed in contem- the use of a current source to drive a load network and the use
porary RF power amplifier design. of a switch to drive a differently designed load network. These
Harmonic resonators can be added to the load network to important distinctions have been missed by many previous
improve the tradeoff between efficiency and conduction angle workers in this field; one exception is Rose [28] . Switching-
[9] -[14]; this provides approximately a flat-bottomed voltage mode and current-source active devices are sharply distin-
waveform when the network is driven by the pulsed current guished from each other by their output-port ac impedances:
source, extending the duration of the low-voltage condition in a switching-mode device, the “on” state ac impedance (i.e.,
and permitting a wider current pulse without severe loss of ~V/iY) is low compared to the ac impedances in the surround-
efficiency. This circuit, also, requires the minimum voltage ing circuit; in a current-source device, the ac impedance (exclu-
across the current-source device. sive of incidental reactance which are absorbed into the tuned
All current-source amplifiers dissipate substantial power in circuit) is high compared to the surrounding circuit ac imped-
the active device because the voltage across that device during ances, throughout the ac cycle.
the current pulse must be larger than the minimum permissible Push-pull Class-D current-switching and voltage-switching
value, typically of the order of 10 percent of the dc supply circuits [2], [15] - [17] use parallel-tuned or series-tuned reso-
voltage. Obtaining high efficiency requires that the current nant circuits, respectively, driven by two on-off switches (e.g.,
pulse amplitude and the load network be adjusted carefully to transistors). The inputs are so driven that one switch is “on”
obtain an ac output voltage amplitude which is: 1) large while the other is “off,” each switch being “on” for half of
enough to bring the active-device voltage as close to zero as the ac cycle. These amplifiers are efficient, but suffer from
allowable during the current pulse, but 2) not so large as to the possibility of both transistors conducting simultaneously
cause the device voltage to become less than the minimum or being off simultaneously during the switching transient,
permissible voltage, thereby causing the device to be no longer leading to loss of efficiency at high frequencies and to the
a high-impedance current source and thus to invalidate the possibility of transistor destruction by second breakdown
design assumptions. [16]. A further limitation on efficiency at high frequency
and a potential cause of second breakdown for the voltage-
B. Amplifiers Using Active-Device Switches switching amplifier is not mentioned by previous authors: the
Higher efficiency can be achieved by using the active device power dissipated and the simultaneous high voltage and high
as an on/off switch instead of a high-impedance current source; current imposed on the transistors in charging the output-to-
the increased efficiency results from reducing the voltage ground capacitance plus the Cob of both of the two switching
which exists across the device while current is flowing through transistors to almost the full supply voltage (Vcc), twice each
it. While a practical active-device current source requires at ac cycle, at the operating frequency (f), in a charging time of
least a certain minimum permissible voltage across itself, an a/f. The power dissipation is (2f)(~)(2C0~ + C’OUtpUt)(Vrx -
active-device switch may be operated at a much smaller “on” 2 VCE(wt))2; the second-breakdown stress is a current typically
170 IEEE JOURNAL OF SOLID-STATE CIRCUITS, JUNE 1975

!
rising linearly from zero to 2(2C’0~ + Coutput)( ~CC - 2 ~Cl!7(sat)) ACTIVE
DEVICE
~/a while the voltage falls parabolically from (VCC - VcE(Sat)) INPUT SWITCH

to vc~(sat) . —

Timing problems of a pair of switches are avoided by using a DC POWER SUPPLY s


~
single switch in a “single-ended” amplifier. References [18] -
Fig. 1. Block diagram of single-ended switching-mode amplifier.
[21 ] describe single-ended circuits operated at up to 80 MHz,
using load networks similar to those of current-source tuned
power amplifiers. They do not consider the possibility of
increasing the collector efficiency through unconventional de- the switch is cyclically operated at the desired ac output fre-
sign of the load network. quency, dc energy from the power supply is converted to ac
Single-ended amplifiers (e.g., [22] - [27] ) typically are de- energy at the swit thing frequency (and harmonics thereof).
signed as current-source amplifiers, but many allow the active To obtain maximum fundamental-frequency output, the switch
device to saturate during part of the time that it is conducting duty ratio is made approximately 50 percent, i.e., the switch is
current, invalidating the design assumptions. If this happens “on” for approximately half of the ac period and “off” for the
(e.g., because excessive input drive is applied), the device may remainder of the period. The load network may include a low-
then accidentally act as an “on” switch during the time that it pass or bandpass filter to suppress harmonics of the switching
is saturated, but there are the undesirable possibilities of: frequency at the load, and may transform the load impedance
1) potentially destructive inverted-mode operation, 2) a mode and/or accommodate load reactance.
of oscillation which has not heretofore been described in A power amplifier which uses the active device as a switch is
detail, or 3) a substantial increase in broad-band noise output.5 potentially highly efficient because the “on” and “off” states
Such an amplifier comprises: 1) an active device which is an of the switch fulfill Conditions 1) and 2) of Section I. But in
“on” switch for part of the “on” time and a current source for practical high-efficiency switching-mode amplifiers, even with
the remainder of the ac cycle, together with 2) a load network proper driver design and choice of switching active device, the
designed on the assumption of a current-source active device. switching time of the device may be a considerable fraction of
A load network designed to provide a specific response to a the ac cycle, and considerable power may be dissipated in the
train of current pulses from a high-impedance current source active device during switching, in violation of Condition 3).
cannot be expected, a pi-ion”, to yield optimum performance The novel principle of the tuned power amplifier described
when driven by a cyclically-operated switch which provides an here is to avoid by design the simultaneous imposition of sub-
excitation completely different from that for which the net- stantial voltage and substantial current on the switch, even
work was designed. The widely acknowledged need for “cut- during switching intervals of substantial duration, through the
and-try” in tuned power amplifier design, and the observed use of a load network synthesized to yield an optimal tran-
sensitivity of circuit performance to individual variations in sient response to the cyclic operation of the switch.
transistor characteristics, give experimental confirmation of Fig. 2(a) and (b) shows the desired waveforms of voltage
this hypothesis that designing according to invalid assumptions across the switch and current through the switch, in a circuit
may not yield optimum performance. The circuit described of the Fig. 1 class arranged for maximum power efficiency.
below operates as designed; it is not sensitive to variations in The following conditions are met by those waveforms.
transistor characteristics. 1), 2) Conditions 1) and 2) of Section I: Those conditions
are well known, and require only that the active device be
III. DESCRIPTION OF THE NEW CIRCUIT OPERATION chosen and the driver be designed so as to minimize the
switch “on” voltage and “off” leakage current, respectively.
A. General Principles
Those conditions are substantially independent of the design
Fig. 1 is a block diagram of a single-ended switching-mode
of the load network.
amplifier. The active device acts substantially as a switch 3) The switching time of the switch is minimized: This con-
when appropriately driven by the driver.G The active device
dition is also well known, and may also be fulfilled by proper
output is represented as a nonideal single-pole single-throw
choice of the active device and proper design of the driver.
switch: the “on” resistance (dc and/or ac) may be nonzero,
This condition is somewhat dependent on the design of the
the “off” resistance (dc and/or ac) may be noninfinite, and
load network, although previous work has not taken cogni-
the turn-on and turn-off switching times may be nonzero. As
zance of this dependence. To the extent that the load network
design does af~ect the switching time, it will be seen below
5fie potentially destructive operating conditions and the oscillation
that our load network causes the switching time to be de-
are subjects of planned future papers by the authors. The noise effect
has been observed in unpublished work on oscillators by M. Crandall of creased compared with that attained with prior-art load
Microwave Associates, Inc., and others. The reasons for it, and experi- networks.
mentaJ data, are subjects of a planned future paper by the authors.
The load network is arranged to have the input-port tran-
The mechanism believed to be responsible for this noise increase exists
sient response described in 4) through 8) below.
SJSOin volta~e-switchirw .
Class-D amplifiers, but does not exist in the
authors’ switching-mode amplifier. 4) Voltaze delay at switch turnoffi In the time interval
6 ‘J’he drive waveform can be optimized on the criteria of efficiency,
during whi~h the ‘switch makes its t~ansition from the “on”
power gain, and freedom from transistor second breakdown. The opti-
mum drive and resulting power gain for transistor switches and for state to the “off” state, the voltage across the switch remains
vacuum-tube switches are subjects of planned future papers. low for a time long enough that the current through the
SOKAL AND SOKAL: NEW CLASS OF POWER AMPLIFIERS 171

(a)

(b)

Fig. 2. Optimum waveforms in circuit of Fig. 1 arranged for maximum


power efficiency. (a) Voltage across switch. (b) Current through
switch.

switch has by then been reduced substantially to zero. Then current at the start of the “on” state will be zero, and that
the voltage increases. This assures that high voltage does not during the “on” state the switch current need increase from
exist across the switch while the current through it is nonzero, zero only gradually. In view of the limited di/dt capabilities
thereby avoiding the energy loss which would have existed if of actual active-device switches, this zero starting current is
the voltage had been allowed to start to increase before the desirable because it helps to minimize the active device switch
current decrease to zero had been substantially completed. turnon time, and hence further minimize dissipation during
5) Voltage return to zero at switch turnon: During the the turnon transient. Avoiding a substantial negative value of
switch “off” state, the load network input-port transient re- dv/dt at turnon time avoids imposing on the switch a require-
sponse carries the voltage across the switch first upwards, and ment to conduct substantial current then in the reverse of the
then downwards toward zero; this voltage reaches zero just usual direction.
prior to the start of the switch “on” state, i.e., just before 7), 8) The voltage and current transient response waveforms
current begins to flow in the switch. This avoids the energy each have a jlat top: It can be shown (available from the
dissipation which would have occurred if the switch current authors) that the optimum voltage and current waveforms are
had begun flowing while the voltage across the switch was still flat topped with short rise and fall times, the peak values being
high, and had thereafter discharged to ground, through the equal to or less than the maxima which the switch is able to
switch, the capacitance at the load network input port.7 withstand reliably, for the usual case in which the switch peak
6) Zero voltage slope at switch turnon: When the “off” voltage and current capabilities define the allowable limits of
state transient response reaches zero voltage across the switch, operation.
i.e., just before the beginning of the “on” state, it does so with The waveforms of Fig. 2, while superficially resembling the
approximately zero slope (i.e., du/dt x O). This permits acci- approximately square waves of a switching amplifier driving a
dental slight mistuning of the amplifier without severe loss of resistive load, differ from the latter in one absolutely crucial
efficiency, i.e., there is a time interval during which the respect: the delay of each waveform of Fig. 2 in increasing
switch turnon can occur while still substantially meeting the from zero until the other waveform has completed decreasing
condition of u = O. Moreover, moderately slow turnon of the to zero. This is accomplished oral’ by appropriate design of a
switch does not cause the switch to experience high power nonresistive load network, and results in a considerable in-
dissipation during turnon, because the voltage across the crease in efficiency if the transition time of the switch is an
switch is not increasing rapidly during the time that the switch appreciable fraction of a half-cycle of the ac waveform. Note
is turning on. Furthermore, the conditions v = O and dvldt = O that Conditions 4) through 8) above are entirely independertt,
at the end of the “off” state together imply that the switch except that Condition 6) presupposes Condition 5), and any or
All of them may be included in an amplifier incorporating
7~is capacitance includes intrinsic switch capacitance and circuit these general principles. The ideal network can be approxi-
stray capacitance, as well as any capacitor purposely designed to be part mated to any desired degree, using lumped and/or distributed
of the tuned circuit. Note that each time a capacitance C, initially elements. For example, the simple circuit described below
charged to a voltage V, is discharged by a switch, an energy CV2/2 will
used lumped elements and does not have flat-topped voitage
be dissipated,independent of the switch seriesresistance. This causesa
power loss of C@f/2, reducing efficiency. and current waveforms [Conditions 7) and 8)]; the effect of
172 IEEE JOURNAL OF SOLID-STATE CIRCUITS, JUNE 1975

or B VCER ratings as in some conventional amplifiers. This


allows using a higher value of Vcc, thereby obtaining higher
power output and higher efficiency.
Three possible kinds of transient response voltages are shown
in Fig. 4, for three different values of damping corresponding
to three different values of network loaded Q(QL). With too
much damping (QL too low) shown in Fig. 4(a)-(c), the volt-
age across Cl never returns to zero. Therefore the transistor
must discharge Cl from some positive voltage V to a near-zero
voltage when it is next turned on, requiring the power dissipa-
Fig. 3. Circuit diagram of simple member of the new class of high-
efficiency amplifiers. tion described in footnote 7. In addition, the transistor is
subjected to simultaneous substantial collector-emitter voltage
and substantial collector current (the “on” collector current
which flows at that VCE according to the input drive provided
the flat-topped waveforms on efficiency is often smaller than
by the driver). This transient condition can cause second
that of the delays.
breakdown, potentially destructive to the transistor. Previous
published circuits subjected the transistor to this power-
B. Description of a Simple Member of the New Class of
Amplifiers dissipating and potentially-destructive condition (e.g., [29] ;
see VCE waveform of Fig. 2 there). The circuit described here
The above principles will now be illustrated by a simple is specifically designed to avoid this undesirable condition,
member of this new class of amplifiers, shown in Fig. 3, and helping to assure reliability.
the modifications of it shown in Figs. 5,6, and 7. L 1 is a high- With too little damping (QL too high), shown in Fig. 4(d),
reactance Vcc shunt-feed choke. The sum of its shunt capaci- VCE swings below zero, placing the transistor in the inverted
tance, the transistor output capacitance, and wiring capaci- mode. If this voltage is below the base “off” voltage provided
tance is absorbed into Cl and is hereafter called COUt. At high by the driver, the transistor is placed in the active inverted
enough frequencies, all of Cl may be supplied by COUt.8 R mode with the base-collector junction forward-biased and the
may be the actual load, or may be the input-port resistance of base-emitter junction reverse-biased. The load will pull the
a low-pass or bandpass falter inserted between the C2-L2 base further negative by an amount which depends on the
branch and the load to suppress harmonics of the switching base signal source impedance and voltage, the load network
frequency. Reactance of the load or of the input port of such transient response, and the transistor inverted-mode gain and
a filter is absorbed into L2 and/or C2, as described in Section cutoff frequency. Several outcomes are possible: 1) the
III-C below. BVEBX rating may be exceeded and the transistor may be
In the circuit of Fig. 3, the collector voltage is at VcE(,atj damaged; 2) BVECX (never specified) may be exceeded and
while the transistor is on, meeting Condition, 1) of Section the transistor may be damaged; 3) appreciable inverted col-
III-A above. When the transistor is switched off, the load lector current may flow [observable in Fig. 4(d)] , dissipating
network transient response is the response of a damped power (hence reducing efficiency) and possibly damaging the
second-order system, the series connection of L2, R, and transistor; or. 4) no damage will result. This underswing can
Cl “ C2/(Cl + C2), starting with a set of given initial energies also occur in conventional Class-B and Class-C amplifiers.’
stored in Cl, C2, and L2. (L 1 is sufficiently large to act as a Both in conventional amplifiers and in amplifiers of the new
source of substantially constant current.) Some of the energy class described here, damage can be prevented by adding a
stored in Cl, C2, and L2 is delivered to R (the network damp- commutating diode between the collector and emitter as shown
ing, but also the, usefui load) during the ringing transient. in Fig. 5(a), or between the base and emitter as shown in Fig.
Cl insures that in the time interval during which the tran- 5(b), or by designing the base drive circuit properly.g
sistor is being turned off, VCE remains relatively low until With correct damping (QL correct), shown in Fig. 4(e), the
after the collector current has reduced to zero, approximating peak negative-going VCE just reaches VcE(Sat)(~O), avoiding
(with a parabolic section) the delay of voltage rise shown in the two above undesirable conditions. The correct damping
Fig, 2 and discussed above as Condition 4). High VCE does also gives zero slope to th-e VCE waveform as it reaches the
not occur until after lC has been cut off at low voltage and the
base has become reverse-biased. Thus the BVCEV rating
g A useful result of adding the diode at the base rather than at the
applies to the “off” condition, rather than the lower B VCEO
collector is that the resulting base current injects charge into the base
region, preparing the transistor to conduct collector current in the
normal direction when the subsequent “on” state begins. Depending
STo the extent that the susceptance of L 1 is not negligibly Small in on the design requirements and constraints of a particular application
the frequency range of interest, Cl may be increased to provide the (including the turn-on drive available from the driver), it maybe advan-
operating characteristics which are described here for the case of the tageous to choose QL slightly higher than optimum, to allow the load
L 1 susceptance being negligibly smatl. In some cases it may be current to aid in turning on the transistor. However, use of this possi-
desirable to choose a value for L 1 which yields appreciable susceptance, bility to an excessive extent can lead to a mode of oscillation which can
thereby increasing the required capacitance of Cl, as, for example, if occur in conventional amplifiers with or without the base diode, and
more than the value required for Cl with negligibly small L 1 suscep- which appears not to have been reported previously; that is the subject
tance is already supplied by Cout. of a planned future paper.
SOKAL AND SOKAL: NEW CLASS OF POWER AMPLIFIERS 173

.
>,
\.4 ,- (a) (b)

~~fd)

(e)
Fig. 4. VCE (lower trace) and lC (upper trace) for circuit of Fig. 3
operating at 10.5 MHz. Incorrect element values can cause positive
voltage at transistor turnon, with zero-slope condition occurring
(a) too early, (b) at correct time, or (c) too late; or they can cause
(d) negative voltage at turnon. Correct element values give (e) zero-
voltage, zero-slope condition at turnon. Vertical: 10 V or 0.5 A/div.;
horizontal: 10 ns/div. Ringing after turnon in (a)-(d) is due to induc-
tance of current-measuring instrumentation.

rl’-’--- second harmonic, of amplitude *0.50/QL relative to the fun-


damental, e.g., s5.0 percent (-26 dB) for QL = 10.) The
collector current waveform is approximately a section of a
sine wave, as shown in Fig. 4(e); D below gives numerical
details. Depending on the transistor storage time and the
technique used to accommodate it, the transistor is operated
in saturation or in the active region just outside of saturation. 10

C. Circuit Element Values


The element values for the circuit of Fig. 3 are obtained by
choosing the three variables Cl, C2, and L2 to meet simul-
taneously the three following mathematical conditions.
1) VCE = O at t= (1 - D)(l /-f) after switch turn-off time,
Fig. 5. Addition of commutating diode to transistor. (a) At collector. where f is the operating frequency and D is the switch duty
(b) At base. ratio, here taken as 50 percent.

10If it is in the active region, the transistor is made to have a low out-
zero value at the end of the “off” half-cycle. This zero value put impedance while remaining active (i.e., to act as a switch as defined
and zero slope realize Conditions 5) and 6) of Section III-A here) by use of a Baker clamp [30]. We recommend allowing the tran-
sistor to saturate (for higher efficiency) and coping with the storage
above.
time by proper circuit design. Storage time in RF power transistors
A nearly sinusoidal fundamental-frequency current flows iri appears not to have been discussed in the literature; that is the subject
the branch L2-C2-R, (The harmonic content is primarily of a planned future paper.
174 IEEE JOURNAL OF SOLID-STATE CIRCUITS, JUNE 1975

TABLE II
ELEMENT VALUES FOR NEW DESIGN AND CONVENTIONAL DESIGN

Circuit Conventional Ratio


Element New Design Design New/Conventional

L2 1.72 pH 0.0403 /,tH 42.7


(X 162 pF 6111 pF 0.033
C2 200 PF -l/-
R 18.0 ~ 0.0422 Q 42.7

2) dVcE/dt = O at t =(1 - D)(l/f) after switch turn-off made between efficiency and harmonic content of the power
time. delivered to the load. Then
3) QL is any chosen value, which may be chosen as dis-
L2 = QLR/2rrf, from the definition of QL. (2)
cussed immediately below. A specific C1/C2 ratio [see (4)]
makes that chosen QL provide the proper damping shown in To satisfy the conditions VCE = O and dVcE/dt = O at t= 0.5/f
the “QL correct” curve of Fig. 4(e), yielding the zero-slope after switch turnoff, given the chosen QL,
zero-value VC~ at turn-on time.
The choice of QL involves a tradeoff among 1) low harmonic
(3)
content of the power delivered to R (high QL), 2) high effi- “=1’2nfR(:+’)(:)= ’’2nfR5447
ciency (low QL ), and 3) complexity of the filter (if any) used
for addition~ harmonic suppression. An optimal design mini- and

mizes the total loss in the load network and the subsequent
filter (if any) while meeting a specified maximum limit for
harmonic output at the load. Equations will now be given for c2=((2~i2L2)t+Q:~08)
the element values of the Fig. 3 member of the new class; 5,447 1.42
equations for the resulting performance are in Section III-D
below. The derivationsare too long to give here; they are
z C1 ( )(

QL
1+
QL -2.08
.) “
(4)

available from the authors. 11 The equations here are for 50 Note that L2 is not resonant at f with C2 or with the series
percent duty ratio; modified ones hdd for other values of combination of Cl and C2. Load reactance (if any) is accom-
duty ratio, modated by absorbing it into C2 and L 2: the inductance of
The values of R and P’cc are constrained by the requirement L2 is decreased if the load series reactance is inductive, the
to deliver a specified power output to the load from the Vcc capacitance of C2 is increased if the load reactance is capaci-
power supply; specifying either one dictates the other. For tive, or both are done if the load is a combination of induc-
highest efficiency, the highest possible Vcc should be used, tance and capacitance (e g., a radio transmitting antenna or an
within the VCE limitation of the transistor, as will be seen in ultrasonic transmitting transducer). 13
(8) below. The maximum allowable Vcc can be found from Table II shows the circuit element values for amplifiers with
(7). The value ofl? is found as’z the topology of Fig. 3 as realized with a conventional design
= 0577 (Vcc - v@a*))2 (e.g., [22] or [26]) and with our design; the element values

()
R = (VCC - VC..@t))2 2
are seen to be greatly different. This example is for an ampli-
P ?r’ “ P“
7+1 fier to deliver 20 W at 10 MHz, using QL =6, Vcc = 27 V dc,
L 1 = RF choke, and VcE(Sat) = 2V.
(1)
D. Performance Equations and Experimental Results
Impedance transformation can be used if the load resistance is
not equal to this value of R; see E below. The desired QL may The dc collector current of the transistor Q, while delivering
be chosen freely, according to the design compromise to be ac power P, is

11Equations (1)-(8) agree, in the limit case of {QL = -, VCE(sat /=0 , 13The impedance of an actual load may be more complicated than
tf = O}, with the results of an independent theoretical analysis o that the series combination of a frequency-independent R and a frequency-
case by F. H. Raab (unpublished). Equations (3), (5), (7), and (8) use independent L and/or C. Hence the effect of the load reactance may
Raab’s derivation of” Cl. The quantities 1.42(+ 0.10), 2.08(* 0.05), not be precisely the same as an effective increase in L 2 and/or decrease
0.82(t 0.10), and 0.50(+ 0.09) in (4)-(8) are derived from experimental in C2. However, for reasonably well-behaved load impedances, the net
measurements by the authors and their colleague, M. Chessman. effect is only a small change in the voltage and current wave-shapes
lzHere R is the total resistive load presented to the transistor: the from those which would have existed if the output branch had con-
sum of the input resistance of the load (or the filter, if used) and the sisted solely of frequency-independent elements C2, L2, and R. This is
series ac resistances of L 2 and C2, plus an’ “equivalent” lumping of the because by far the principal component of the current entering the load
ac losses of L 1 and Cl. P is the total power delivered by the transistor from L2-C2 is of frequency I harmonic-frequency components are
to R as just defined. DC losses in L 1 are accounted for by using an small. Therefore the impedances at ~ are the most influential ones; the
effective value of Vcc which is lower than the dc power supply voltage impedances at harmonic frequencies have correspondingly less influence
by the value of the dc voltage drop in the dc resistance of L 1. on the voltage waveforms.
SOKAL AND SOKAL: NEW CLASS OF POWER AMPLIFIERS 175

[Dc . —
P
v~~

[
1- (2m4)2 /6 - ‘;~ 1
1- (2m4)2/12

(1 +A - (2nA)2/6)

(5)
C2 L2

where A ~ (1 + 0.82/QL ) ftf,and where ~ is the operating


frequency and tf is the collector current fall time (100 to O
percent of a linear ramp) during transistor turnoff. The collec- $
tor current waveshape is determined by the load network and
Fig. 6. Impedance transformation between load and switch by adding
is approximately a section of a sine wave (between -32.5° and
a winding to L 1.
+147.5° in angle) centered at 1 = lBC. Current builds up
gradually from zero at the beginning of the “on” half-cycle to
a peak value of

=I~C [1 + 1.862(1 - 0.50/QL)]. (6)


(a)
It then decays gradually to 21DC (1 + 0.82/QL), at which time
the transistor is suddenly turned off by the drive signal applied
to its base-emitter junction. The peak collector-emitter volt-
age is

Vc~P~ = ,Vcc + [ 27r arcsm


~ (e+,)’’’-,]
~

(b)
0 [Vcc - VCE(,,t)] = 3.562 VCC -2.562 V&(,,~).
CIA

These peak and dc values must be within


region of the transistor.
off of X21DC
bolically.
linearly
the safe operating
The most stressful condition is turn-
with time while VCE is rising para-
The collector efficiency is P/ VccI~c, from (5),
(7)

2rrriz!13
(c)

Fig. 7. Impedance transformation between load and switch by tapping


a capacitor. (a) and (b) Tapping C2. (c) Tapping Cl.
1- (2mi)2/6 - ‘;::t) (1 + A - (2m4)2/6)
T’c = (8)
1- (27rA)2/12
impedance transformation by effectively tapping Cl or C2; in
The authors measured 26-W output at 3.9 MHz from a paral- some cases C2A can be intinite. Neutralization of transistor
leled pair of Motorola 2N3735 TO-5 transistors in the circuit Cob (e.g., to reduce the current which must be supplied to
of Fig. 3, with only 4 percent of the dc input power dissipated Cob by the driver) can be accomplished by capacitively cou-
in the transistors. Inductor power losses were 3.5 percent in pling the transistor base to an inverting winding on T1.
L2 and 0.7 percent in L 1. All observations agreed with the Tuning: To operate across a frequency band, 1) provision
above equations to within instrument
Circuitaccuracies. may be made for varying Cl, C2, and/or L2, 2) fixed element
parameters were: L 1 = 63 turns AWG 24 on Indiana General values can be used with some sacrifice of performance, or
CF1l 1-Q2 ferrite toroid (x68 pH + 0.1$2 de), L2 = 3.45 pH + 3) more complex load networks can be used. The tradeoff
0.4 !i2 ac, Cl = 713 pF, C2= 600 pF, R = 10.3 fl, and Vcc = factors are the same as in conventional amplifiers, but the
23.1 V dc. design method is different; that is the subject of a planned
future paper. Using a load network slightly more complex
than that of Fig. 3, we achieved single-element tuning across a
E. Further Remarks
1.6:1 frequency band, maintaining the turnon conditions
Impedance Transformation and cob Neutralization: Fig. 6 V = O and dV/dt = O across the entire band.
shows how additional windings change L 1 to a transformer Optimum Transistor Design: This circuit uses the transistor
T1 which transforms the load impedance. Leakage inductance in a way quite different from that of conventional RF power
between the T1 windings can be absorbed into L2; this in- amplifiers. Both RF power transistors and switching transis-
creases the efficiency by eliminating the losses of the portion tors (e.g., Motorola 2N3735, National Semiconductor 2N6376,
of L2 replaced by the leakage inductance. Fig. 7(a)-(c) shows RCA 2N5262) work well in this circuit, but neither class is
176 IEEE JOURNAL OF SOLID-STATE CIRCUITS, JUNE 1975

optimized in design and construction for this application. [21] G. Oliva and D. R. Lohrmann, “High-efficiency vhf power ampli-
fier;’ U.S. Army Electronics Command, Fort Monmouth, N. J.,
Changes in transistor design and packaging could yield a tran-
Res. Devel. Tech. Rep. ECOM-3209, Dec. 1969.
sistor which gives even better results in this type of circuit [22] R. Hejhall, “Systemizing rf power amplifier design,” Motorola
than what we have obtained so far. Further information is Semiconductor Products, Inc., Phoenix, Ariz., Application Note
AN-282A, June 1972.
available from the authors.
[23] D. L. Wollesen, “UHF transmission-line power-amplifier designed
Circuit Protection: As with other kinds of high-efficiency with Smith chart techniques,” Motorola Semiconductor Products,
equipment, protection should be provided against accidental Inc., Phoenix, Ariz., Application Note AN-217, Jan. 1967.
[24] F. Davis, “Matching network designs with computer solutions,”
low-efficiency operation (i.e., accidental high power dissipa-
Motorola Semiconductor Products, Inc., Phoenix, Ariz., Applica-
tion) if advantage is being taken of the normal high efficiency tion Note AN-267, Mar. 1968.
by reducing the heat-dissipation capability. The higher the [25] C. Leuthauser and B. Maximow, “16- and 25-watt broadband
power amplifiers using RCA-2N59 18, 2N59 19, and TA7706 uhf/
operating efficiency, the more important this requirement
microwave power transistors,” RCA Solid State Division, Somer-
becomes. ville, N. J., Application Note AN-4421, Oct. 1970.
[26] R. Minton, “Semiconductor high-frequency power-amplifier de-
REFERENCES sign,” RCA Electronic Components and Devices, Somerville, N. J.,
PubL ST-3230, Aug. 1966.
[1] F. E. Terman, Radio Engineering, 3rd Ed. New York: McGraw- [27] T. M. Scott, “Tuned power amplifiers,” IEEE Trans. Circuit
Hill, 1947, pp. 374-393. Theory, vol. CT-11, pp. 385-389, Sept. 1964.
[2] M. R. Osborne, “Design of tuned transistor power amplifiers,” [28] B. E. Rose, “Notes on Class-D transistor amplifiers,” IEEE J.
Electron. Eng., pp. 436-443, Aug. 1968. Solid-State Circuits (Corresp.), vol. SC-4, pp. 178-179, June
[3] R. G. Harrison, “A nonlinear theory of Class C transistor amp- 1969.
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vol. SC-2, pp. 93-102, Sept. 1967. high-frequency junction transistor,” IEEE Trans. Electron De-
[4] J. A. G. Slatter, “Au approach to the design of transistor tuned vices, vol. ED-17, pp. 108-119, Feb. 1970.
power amplifiers,” IEEE TYans. Circuit Theory, vol. CT-12, pp. [30] R. H. Baker, “Boosting transistor switching speed,” Electronics,
206-211, June 1965. vol. 30, pp. 190-193, Mar. 1957.
[5] R. H. Johnston and A. R. Boothroyd, “High-frequency transistor
frequency multipliers and power amplifiers,” IEEE J. Solid-State
Circuits, vol. SC-7, pp. 81-89, Feb. 1972.
[6] R. D. Peden, “Charge-driven HF transistor-tuned power ampli-
fier,” IEEE J. Solid-State Circuits, VOL SC-5, pp. 55-63, Apr.
Nathan O. Sokal (S’50-A’51-M’56-SM’56) was
1970.
born in New York, N.Y., in 1929. He received
[7] M. A. H. El-Said, “Analysis of tuned junction-transistor circuits
the S.B. and S.M. degrees in electrical engineer-
under large sinusoidal voltages in the normal domain–Part 1: The
ing from the Massachusetts Institute of Tech-
effective hybrid-n equivalent circuit,” IEEE Trans. Circuit
nology, Cambridge, Mass., in 1950.
Theory, vol. CT-17, pp. 8-12, Feb. 1970.
— “Analysis From 1950 to 1965 he held engineering and
[8] of tuned junction-transistor circuits under large
engineering supervisory positions with Holmes
sinusoidal voltages in the normal domain–Part II: Tuned power
amplifiers and harmonic generators ,” IEEE Trans. Circuit Theory, and Narver, Inc., M.I.T. Lincoln Laboratory,
the Mack Electronics Division, Mack Trucks,
vol. CT-17, pp. 13-18, Feb. 1970.
Inc.. Di/An Controls, Inc., and Sylvania Elec-
[9] V. J. Tyler, “A new high efficiency high power amplifier,”
tronic Systems Division. He was involved with
Marconi Rev., vol. 21, pp. 96-109, 1958.
the design and, in some cases, field installation and operation of a wide
[10] N. S. Fuzik, “Biharmonic modes of a tuned RF power amplifier;’
variety of analog and digital equipment for instrumentation, control,
Radio Eng., vol. 25, no. 7, pp. 117-124, 1970.
communication, computation, and signal and data processing. In 1965
[11] N. S. Fuzik, E. A. Sadykov, and V. I. Serguchev, “Electrical
design of the oscillatory circuits of the final stage of a radio he founded Design Automation, Inc., Lexington, Mass. There he has
transmitter operating in the biharmonic mode~’ Radio Eng., been involved with the design and design review of a wide variety of
vol. 25, no. 1, pp. 141-145, 1970. electronic equipment, development of high-efficiency switching-mode
[12] J. W. Wood, “High efficiency Class C amplifier,” U.S. Patent amplifiers and power converters, and computer simulation of electronic
3430157, NoV. 10, 1966. systems and circuits. He is a co-inventor (with Alan D. Sokal) of a
recently patented high-efficiency highly linear RF power amplifler.
[13] D. M. Snider, “A theoretical analysis and experimental confirma-
tion of the optimally loaded and overdriven RF power amplifier,” Mr. Sokal is a member of Eta Kappa Nu, Sigma Xi, and the American
Radio Relay League.
IEEE Trans. Electron Devices, VOL ED-14, pp. 851-857, Dec.
1967.
[14] M. Kitazawa, F. Takahashi, M. Nagaoka, T. Arino, and K. Yama-
moto, “Highly efficient 500 kW AM radio transmitter,” Toshiba
Rev., no. 80, pp. 22-27, Apr. 1973.
[15] P. J. Baxandall, “Transistor sine-wave LC oscillators, some gen- Alan D. Sokal was born in Boston, Mass., in
eral considerations and new development,” Proc. Insr. Elec. Eng., 1955. He expects to receive the A.B. and A.M.
vol. 106, part B, pp. 748-758, 1959. degrees in physics from Harvard University,
[16] W. J. Chudobiak and D. F. Page, “Frequency and power limita- Cambridge, Mass., in 1976.
tions of Class-D transistor amplifiers,” IEEE J. Solid-State Cir- He has been a Computer Programmer and
cuits, vol. SC-4, pp. 25-37, Feb. 1969. Systems Analyst with LFE, Inc., Multi-Logic
[17] D. F. Page, W. D. Hindson, and W. J. Chudobiak, “On solid-state Corp., and Machine Control Company, and an
Class-D systems,” Proc. IEEE (Corresp.), vol. 53, pp. 423-424, Electronics Consultant to Design Automation,
Apr. 1965. Inc. He is presently a student and Teaching As-
[18] D. R. Lohrmann, “Amplifier has 85% efficiency while providing sistant in the Department of Physics, Harvard
up to 10 watts power over a wide frequency band,” Electron. University. His main interests are in mathemat-
Des., vol. 14, pp. 38-43, Mar. 1, 1966. ical physics, theory of elementary particles, and general relativity. He is
[19] —“High-efficiency transistor cw rf power amplifier,” U.S. Army a co-inventor (with Nathan O. Sokal) of a recently patented high-
Electronics Command, Fort Monmouth, N. J., Res. Devel. Tech. efficiency highly linear RF power amplifier.
Rep. ECOM-2836, May 1967. Mr. Sokal is a member of Phi Beta Kappa and the American Radio
[20] —“Boost Class-D rf amplifier efficiency,” Electron. Des., vol. 16, Relay League. He is a National Merit Scholar and holds a Harvard
pp. 96-99, Jan. 4, 1968. Honorary National Scholarship.

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