Topic 12 - ATMega32 Timer in C (ISMAIL - FKEUTM 2017)
Topic 12 - ATMega32 Timer in C (ISMAIL - FKEUTM 2017)
ISMAIL ARIFFIN
FKE UTM SKUDAI JOHOR
Introduction
• Timer’s objective
• Timer features
• Timer Registers
- Understand function of each bit
• Initialization
Introduction
o In micro-p, we use counter registers in order to count an event or
generate time delays.
o To count an event: connect the external event source to the clock pin of
the register. When an event occurs externally, the content of the counter
is incremented.
void Delay250msUsingTimer0(void)
{
// Refer Section A.3(k)
TCNT0 = 255-243; //start TCNT0 with (255-243) i.e. 12
TCCR0 = (1<<CS02) | (1<<CS00); //Set Prescaler =1024
volatile uint8_t TIFRdata;
do //Wait
{
TIFRdata=TIFR&(1<<TOV0); //Read status of TOV0 bit in TIFR
void delaymsUsingTimer0(void)
{
TCNT0 = 256-50; //start TCNT0 with (256-50) i.e. 200
TCCR0 = (1<<CS00); //No prescaler
volatile uint8_t TIFRdata;
do //Wait
{
TIFRdata=TIFR&(1<<TOV0); //Read status of TOV0 bit in TIFR
} while (TIFRdata==0); //until TOV0==1
TCCR0= 0x00; // Stop Timer0
TIFR=TIFR|TIFRdata; //Clear TOV0 bit;
}
Prescaler and Generating a Large Time Delay
o Previously, the size of time delays depends on two factors:
a) The crystal frequency
b) The timer’s 8-bit register
o In which, the largest time delay only achieved by making TCNT0 zero.
What if that is not enough?
o Answer: use the prescaler option in TCCR0 to increase the delay by
reducing the period.
o The prescaler option allows us to divide the instruction clock by factor of
8 to 1024. (see Figure 9-5)
Prescaler and Generating a Large Time Delay
o Previously, with no prescaler enabled, the crystal oscillator freqequency
is directly fed into Timer0.
o If prescaler bit is enable, we can divide the clock before it is fed into
Timer0.
o The lower 3 bits of TCCR0 give the options of the number we can divide
by. i.e. 8, 64, 256 and 1024.
Prescaler and Generating a Large Time Delay
Prescaler and Generating a Large Time Delay
Prescaler and Generating a Large Time Delay
Prescaler and Generating a Large Time Delay
#include <avr/io.h>
o As in the Normal mode, in the CTC mode, the timer is incremented with
a clock.
o But it counts up until the content of TNCT0 = OCR0 (compare match
occurs); then the timer will be cleared and OCF0 flag will be set.
o This OCF0 flag is located in the TIFR register.
Clear Timer0 on Compare Match (CTC) Mode
#include <avr/io.h>
void delay_t0 () { Int main() {
unsigned char TIFRdata; DDRB=DDRB | 1 << PB3 ;// PB3 as output
TCNT0 = 0x00 ; // PORTB= 0b0000000 ;// clear PORTB
OCR0 =0x09; // load OCR0 while (1) {
// TIMER0, CTC mode, int clk PORTB= PORTB ^ (1<<PC5) ;// toggle
//prescale 256,start delay_t0;
TCCR0 = 0x09 ; }
do ( return 1 ;
}
TIFRdata=TIFR;
} while (TIFRdata != 1<<OCF0) ;
TCCR0 = 0x0 ;// Stop TIMER0
// clear TOVO
TIFR = TIFR | TIFRdata;
}
Clear Timer0 on Compare Match (CTC) Mode
Clear Timer0 on Compare Match (CTC) Mode
Timer2 Programming
Timer2 Programming
o Timer2 is an 8-bit in ATmega32, therefore it works same way as Timer0.
o But there are two differences between Timer0 and Timer2:
o Timer2 can be used as a real time counter.
o In Timer2 more prescale option can be found.
Timer1 Programming
Timer1 Programming
o Timer1 is an 16-bit timer and has lots of capabilities.
o Since Timer1 is a 16-bit timer its could split into two bytes:
o TCNT1L – Timer1 Lower Byte.
o TCNT1H – Timer1 High byte
clk/8
clk/64
clk/256
clk/1024
1 0 0 clk / 256
1 0 1 clk / 1024 T1
1 1 0 External clock source on T0 pin. Clock on falling edge
1 1 1 External clock source on T00pin. Clock on rising edge
CS10 0 1 2 3 4 5 6 7
CS11
CS12
Timer/Counter1 clock
source
Timer1: Normal Mode
o Normal Mode (WGM13:10 = 0000).
o In Normal mode, the timer counts up until it reaches $FFFF (max) and
then it rolls over from $FFFF to $0000.
o When rollover, TOV1 flag will be set.
Timer1: CTC Mode
o CTC Mode (WGM13:10 = 0100).
o In CTC mode, the timer counts up until the content of the TCNT1 =
OCR1A (compare match occurs), then timer will be cleared when the
next clock occurs.
o OCF1A flag will be set.
Timer1: Example1
Timer1: Example1
Timer1: Example2
Timer1: Example2
Timer1: Generating Large Time Delay Using
Presacaler
o Again, The size of time delays depends on two factors:
a) The crystal frequency
b) The timer’s 16-bit register
o Use the prescaler option in TCCR1B to increase the delay by reducing
the period.
o The prescaler option allows us to divide the instruction clock by factor
of 8, 64, 256 and 1024.
Counter
Introduction
o The AVR timer can also be used to count, detect and measure the time
events happening outside the AVR.
o When the timer is used as a timer, the AVR’s crystal is used as the source
of the frequency.
o When the timer is used as a counter, the pulse outside the AVR that
increment the TCNTn.
o In Counter mode, registers such TCCR, OCR and TCNT are the same as for
timer discussed previously.
CS02:00 bits in TCCR0
o Recall back the CS02:00 in the TCCRn register decide the source of the
clock and prescale used.
o When CS02:00 is between 001 and 101, timer get pulse from the crystal
oscillator.
o When CS02:00 is between 110 and 111, timer is used as counter and get
pulses from source outside AVR chip.
o When CS02:00 is 110 or 111: TCNT0 counter counts up as pulses fed from
pin T0 (Timer/counter 0 External Clock Input).
CS02:00 bits in TCCR0
o In ATmega32, T0 is alternative function of PORTB.0
o When CS02:00 is 110 or 111: pin T0 provides the clock pulse and counter
counts up after each clock pulse coming from T0 pin.
o Similarly, for Timer1, when CS12:10 is 110 or 111: the clock pulse coming
in from pin T1 (PORTB.1) makes TCNT1 counter count up.
o when CS12:10 is 110: the counter count up on negative (falling) edge.
o when CS12:10 is 111: the counter count up on positive (rising) edge.
Counter: Example