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Laboratory Experiment For Digital Electronics

The document describes designing a simple processor using an FPGA that contains registers, a multiplexer, an adder/subtractor unit, and a control unit. The processor can load data into registers from a data input through the multiplexer, transfer data between registers, and perform arithmetic and logical operations by routing data through the adder/subtractor unit. The control unit determines the operations in each clock cycle by controlling the multiplexer and register loading. The processor supports instructions like move, load immediate, add, subtract, and, or, xor, and not.

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Piyush Raj
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141 views1 page

Laboratory Experiment For Digital Electronics

The document describes designing a simple processor using an FPGA that contains registers, a multiplexer, an adder/subtractor unit, and a control unit. The processor can load data into registers from a data input through the multiplexer, transfer data between registers, and perform arithmetic and logical operations by routing data through the adder/subtractor unit. The control unit determines the operations in each clock cycle by controlling the multiplexer and register loading. The processor supports instructions like move, load immediate, add, subtract, and, or, xor, and not.

Uploaded by

Piyush Raj
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Laboratory Experiment-6

Objectives:
1. Construction and debugging of digital hardware
2. Role and operation of state machines in digital design.
3. Use of the Xilinx FPGA hardware and design tools.
Problem: To design a simple processor
Description:
Consider a simple processor that contains a number of 16 bit registers, a multiplexer, an
adder/subtractor unit, and a control unit (finite state machine). Data is input to this system via the 16
bit DIN input. This data can be loaded through the 4 bit wide multiplexer into the various registers,
such as R0….R7 and A. The multiplexer also allows data to be transferred from one register to
another. The multiplexer’s output wires are called a bus in the figure because this term is often used
for wiring that allows data to be transferred from one location in a system to another. Addition or
subtraction is performed by using the multiplexer to first place one 16 bit number onto the bus wires
and loading this number into register A. Once this is done, a second 16 bit number is placed onto the
bus, the adder/subtractor unit performs the required operation, and the result is loaded into register G.
The data in G can then be transferred to one of the other registers as required.
The system can perform different operations in each clock cycle, as governed by the control unit. This
unit determines when particular data is placed onto the bus wires and it controls which of the registers
is to be loaded with this data. For example, if the control unit asserts the signals R0out and Ain, then
the multiplexer will place the contents of register R0 onto the bus and this data will be loaded by the
next active clock edge into register A. A system like this is often called a processor. It executes
operations specified in the form of instructions.
Table 1 lists the instructions that the processor has to support for this exercise. The left column shows
the name of an instruction and its operand. The meaning of the syntax RX [RY] is that the contents of
register RY are loaded into register RX. The mv (move) instruction allows data to be copied from one
register to another. For the mvi (move immediate) instruction the expression RX D indicates that the
16-bit constant D is loaded into register RX.
Table 1: Function
Instructions
performed in
the processor
Operation
mv Rx, Ry Rx [Ry]
mvi Rx, #D Rx D
add Rx, Ry Rx [Rx]+[Ry]
sub Rx, Ry Rx [Rx]-[Ry]
and Rx, Ry Rx [Rx]Λ[Ry]
or Rx, Ry Rx [Rx]V[Ry]
xor Rx, Ry Rx [Rx] [Ry]
not Rx Rx ¬[Rx]

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