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The document provides an overview of microprocessors and the Intel 8085 microprocessor. It discusses [1] the basic components and architecture of a microprocessor system including the CPU, memory, I/O devices, and bus; [2] the characteristics and applications of microprocessors; [3] the internal components of the CPU including the ALU, control unit, and register array; and [4] the hardware model and organization of the Intel 8085 including its registers, buses, and control signals.

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0% found this document useful (0 votes)
71 views98 pages

Quize 1,2

The document provides an overview of microprocessors and the Intel 8085 microprocessor. It discusses [1] the basic components and architecture of a microprocessor system including the CPU, memory, I/O devices, and bus; [2] the characteristics and applications of microprocessors; [3] the internal components of the CPU including the ALU, control unit, and register array; and [4] the hardware model and organization of the Intel 8085 including its registers, buses, and control signals.

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Ga
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© © All Rights Reserved
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SYLLABUS

Microprocessor and Assembly Language


Course Code: 343 CS

CHAPTER 1 Introduction to Microprocessors


‫ﺟﺎء ﻣﺻطﻠﺢ ﻓﻲ اﻻﺧﺗﺑﺎر‬
CHAPTER 1

Introduction to MICROPROCESSORS

Microprocessor is a multipurpose, programmable device that


accepts digital data as input, processes it according to instructions stored in its
memory, and provides results as output.

Microprocessors operate on binary number system.

It can be a general purpose processor of


a computer
Or
Part of embedded systems doing
specific purposes

4004 First general purpose commercial microprocessor


APPLICATIONS OF MICROPROCESSORS

• General purpose
• General purpose PCs
• Desktops
• LAPTOPS
• SUPERCOMPUTERS
• Embedded Applications
• Consumer Electronics
• Automobiles
• Process Control
• Instrumentation etc.
CHARACTERISTICS OF MICROPROCESSORS

• Smaller size
• Lower cost
• Higher reliability
• Higher flexibility and versatility
• Functionally more powerful
• Low power consumption
‫ ھو ﺳوا‬von neumann ‫ اول ﻧوع اﻟﻲ ھو ال‬architecture ‫ﻋﻧدي ﻧوﻋﯾن ﻣن ال‬
‫واﻟﻧوع اﻟﺛﺎﻧﻲ اﺳﻣﮫ‬ ‫ وﺗﻌﺎﻣﻠو ﻣﻊ ال‬Architecture based Microprocessor
Harvard
A GENERAL MICROPROCESSOR SYSTEM.

It’s a Von Neumann Architecture based on Stored Program Concept


bus

device
bus
store
as a block
bus

It is a general purpose, programmable, clock-driven register based electronic device


which reads binary instructions from the memory, accepts binary data as input
and processes data according to those instructions and provides the data as
outputs.
Microprocessor is the central processing unit of the system
Microprocessor system can also be illustrated as:

‫ﺷﻛل اﺧر ﻣن اﻟﺗوﺻﯾﻼت‬


‫ﺗﺗﻌﺎﻣل ﻣﻊ ال‬
I/O and memory
‫ﻋن طرﯾﻖ‬
system bus
‫واﺣد‬

Microprocessor system with Bus Architecture


Thus components of a Microprocessor system are:

•Microprocessors
•I/O devices
•Memory
•System bus
‫ﺟﺎء اذﻛري ﻣﻛوﻧﺎت اﻟﻣﺎﯾﻛرو ﺑروﺳﯾﺳر‬
Microprocessor has:

•ALU
•Control Unit
•Register Array

The Arithmetic and Logic Unit


•Performs all computations on input data
•Arithmetic operations performed by it are addition, subtraction etc.
•Logical operations performed by it AND,OR, NOT etc.

and 1‫ ﻻزم ﻛل ال ب‬input output 1 ‫ﯾطﻠﻊ‬

or
‫ وﺣده‬1 ‫ ﻻزم ﯾﻛون ﻋﻠﻰ اﻻﻗل ﻓﯾﮫ‬input output 1

not ‫ﺗﻌﻛس ال‬ input output


2 The Register Array of Microprocessor
‫ﻣﻛﺎن ﺻﻐﯾر ﯾزن ﻓﯾﮫ ﻣﺳﺎﺣﮫ ﺻﻐﯾره ﻣن اﻟذاﻛره‬
•Consists of Register Arrays identified by English Alphabets
8 bit - ‫ ارﻗﺎم‬8 ‫ﻣﻌﻧﺎه ان ﻛل واﺣد ﻣﻧﮭم ﯾﻘدر ﯾﺷﯾل‬
Intel 8085 has six eight bit registers namely B,C,D,E,H,L
‫اﻟﯾوزر ﯾﻘدر ﯾﺳﺗﺧدﻣﮭم ﻋﻠﺷﺎن ﯾﺳوي ﻋﻠﯾﮭم اواﻣر ﻣﻌﯾﻧﮫ‬
•They are accessible to the user through instructions
•They store data temporarily. ‫ﻟﯾﮫ اﺳﺗﺧدﻣﮭم اﺻﻼ ؟ ﻋﺷﺎن اﺧزن اﻟﺑﯾﺎﻧﺎت ﺣﻘﺗﻲ ﺑﺷﻛل ﻣؤﻗت‬

The Control Unit of Microprocessor

•Provides timing and control signals for all operations.


Memory
•Stores binary instruction and data. ‫واﻟﻧﺗﺎﺋﺞ ﺗﺧزن اﻟﻌﻣﻠﯾﺎت اﻟﺣﺳﺎﺑﯾﮫ‬
•ALU reads instructions and data from memory
•ALU stores data in the memory for future use.
•ROM stores data that cannot be altered. ‫ﯾﺧزن اﻟﺑﯾﺎﻧﺎت اﻟﻲ ﻣﺎﯾﻧﻔﻊ اﻣﺳﺣﮭﺎ اﺑدا‬
•R/W memory stores user programs that are modifiable. ‫اﻗدر اﺧزن ﻓﯾﮭﺎ اﻟﺑﯾﺎﻧﺎت اﻟﻲ اﺑﻲ اﻋدﻟﮭﺎ‬

I/O Devices or peripheral devices


•Microprocessors communicate with the outer world through the I/O
devices. 1 2

•Input devices: Keyboard,


1
Analog2to digital3Convertors
4
•Output devices: LED Display, Monitor, Printer, Digital to Analog
convertor.
System Bus ‫ اﺷﯾﺎء‬3 ‫ﺣﻠﻘﮫ وﺻل ﺑﯾن‬
•It is a communication path between the ALU and memory, I/O devices.
•They are group of wires that carry bits ‫ﺳﻠوك ﻣﺗوﺻﻠﯾن ﻣﻊ ﺑﻌض ارﺳل اﺷﺎرات ﻛﮭرﺑﺎﺋﯾﮫ‬
‫• ﻣﻌﻠوﻣﮫ ﻣﮭﻣﮫ‬Microprocessor communicates only with the I/O or memory at a time.
‫ﻣﻘدر اﺗﻌﺎﻣل ﻣﻊ ھذوﻻ اﻻﺛﻧﯾن ﻓﻲ ﻧﻔس اﻟوﻗت ؟‬
‫ﻻ ﻣﺎﯾﻧﻔﻊ اﺗﻌﺎﻣل ﻣﻊ واﺣد ﻣﻧﮭم ﻓﻘط‬
‫ﻟﮭﺎ ﻣﺳﺎﺣﮫ ﻣﻌﯾﻧﮫ‬
Classification of Microprocessors ‫ﺗﺻﻧﯾﻔﺎت ال‬
‫اﻧﺎ ﻋﺷﺎن اﺧزن ﺷﻲء ﻓﻲ اﻟذاﻛره اﺧزﻧﮫ ﻓﻲ‬
Micro-processors are classified according to their word-length.

The group of bits processed by the microprocessor in an unit time is


called the word length of a micro-processor. byte ‫ ﺗﻛون ﻟﻲ‬bit ‫ ﻣﻌﯾﻧﮫ ﺗﻛون ﻟﻲ ﻛﻠﻣﮫ او ﻣﺟﻣوﻋﮫ‬bit ‫ﻣﺟﻣوﻋﮫ‬
‫ ﺗﻛون ﻛﻠﻣﮫ‬byte ‫وﻣﺟﻣوﻋﮫ ال‬
•8 bit microprocessor-8 bit word length

•32 bit micro processor- 32 bit word length and so on.


‫واﻧواع اﺧرى اﯾﺿﺎ‬

microprocessor ‫ﻧوﻋﯾن ﻣن اﻧواع ال‬


‫ ﻧواﺣﻲ‬3 ‫ ﻻزم اﺗﻛﻠم ب‬Microprocessor ‫ﻋﺷﺎن اﺳوي‬
Microprocessor Architect should concentrate on three areas:

Hardware Design (Hardware model) ‫ﻣﻛوﻧﺎت اﻟﻣﺎﯾﻛرو ﻣن ﺟوا‬


Software Design (Programming model) ‫ﻛﯾف اﻋطﻲ اﻻواﻣر ﻟﻠﻣﺎﯾﻛرو‬
System Integration ‫ﻛﯾف اوﺻل اﻻﺛﻧﯾن ﺑﺑﻌض‬

ARCHITECTURE AND ORGANIZATION OF INTEL 8085

Intel 8085
•Is introduced in 1977
•It is an 8-bit processor
•Has 6200 transistors approx.
•It has 40 pins
3‫اﻧواع ﻣن‬
buses
A model is a conceptual representation of a real object.

8085 Hardware Model


REGISTERS
microprocessor

ALU ‫اﻟﺟزء اﻟﺧﺎص ب‬

BUS ‫ﯾﺗواﺻﻠون ھذوﻻ اﻟﺟزﺋﯾن ﻋن طرﯾﻖ‬

bus ‫ﻛل ھذي اﻻﺟزاء ﺗﺗﻌﺎﻣل ﻋن طرﯾﻖ‬


•Hardware model has two segments: ALU segment and the Register segment
‫ اﺟزاء‬4 ‫ﯾﺗﻛون ﻣن‬
•ALU segment includes ALU, 8-bit Accumulator, Instruction decoder and flags
•ALU performs arithmetic and logic operations.
•Results are stored in the accumulator. ‫اﻟﻧﺗﯾﺟﮫ اﻟﻲ ﺗطﻠﻊ ﻣن اﻟﻌﻣﻠﯾﮫ اﻟﺣﺳﺎﺑﯾﮫ ﺗﺗﺧزن ﻓﻲ اﻟﻛﻣﯾوﻟﯾﺗر‬
•Flags are set or reset to show the status of the results.

•Register segment has 8-bit registers and 16 bit memory pointer registers to
store data and address information temporarily.

•There are three buses:


•16-bit unidirectional address bus to address 64K memory or to address a
peripheral device.
•8-bit bidirectional data bus to transfer data between microprocessor and
memory and peripheral devices.(largest no. sent is 11111111)
•Control bus for sending control signals.
•A control signal is a pulse to indicate a microprocessor operation.

‫ﻛل ﻣﺎﺳوﯾت ﻛذا ﯾﻌﻧﻲ اﻧﺎ ﺳوﯾت‬


OPERATION ‫ﻣﻌﯾن‬
CLK |

CLOCK CYCIL ‫ﯾﺣدد ﻟﻲ اﻟوﻗت اﻟﻣﻧﻔذ‬ ‫ ھذا ﯾﺗم ﻋن طرﯾﻖ ال‬CONTROL SIGNALS plus
‫ﻋﺷﺎن اﻗراء‬
data in memory https://lastmomenttuitions.com/microprocessor-mcqs/
https://www.scribd.com/document/380050646/Microprocessors-Mid-Exam

Control signals for Memory Read Operation

•MPU sends 16-bit address on the address bus.


•A pulse called Memory Read is sent as a control signal.
•The pulse activates the control signals and places the 8-bit data on the data
bus.
‫‪•Accumulator‬‬
‫‪8085 Programming Model‬‬

‫ھذي ال ‪ 6‬رﯾﺟﯾﺳﺗر‬

‫رﯾﺟﯾﺳﺗر اﺳﻣﮫ ال ‪stack pointer‬‬


‫اﺳﺗﺧدﻣﮫ ﻋﺷﺎن ااﺷر ﻋﻠﻰ ﻣﻛﺎن ﻣﻌﯾن ﻓﻲ اﻟذاﻛره‬ ‫رﯾﺟﯾﺳﺗر ‪program counter‬‬
‫اﺷﯾل ﻓﯾﮫ اﻻدرس ﺑﺗﺎع اﻻوﺑرﯾﺷن اﻟﻲ ھﺷﺗﻐل ﻋﻠﯾﮭﺎ ﺑﻌد‬
‫ﻣﺎاﺧﻠص اﻻﻧﺳﺗرﻛﺷن اﻟﻲ ﺷﻐﺎﻟﮫ ﻋﻠﯾﮭﺎ اﻟﺣﯾن‬

‫‪BC‬‬ ‫ﻣﻣﻛن ﯾﺟﻲ ﺳؤال اﺧﺗﯾﺎري ھل ﯾﻣﻛن اﻧﻲ اﺣط ال رﯾﺟﯾﺳﺗر وﺗﻠﺧﯾطﮭﺎ ﻟﻲ ﺧطﺎ ﻻزم اﺣط ﻛل واﺣدد ﻣﻊ‬
‫‪DE‬‬ ‫اﺧوه‬
‫‪HL‬‬
A= 25H 00100101
+
B= 37H 00110111
01011100

•Programming model has some segments of ALU and Registers.

•The model is important in writing assembly language programming.


•The model includes six 8- bit registers, accumulator, flag register, 16-bit
stack pointer and program counter.

•Registers
•six 8-bit registers.
•They are identified as B,C,D,E, H and L.
•They can be combined as register pairs, BC,DE and HL for 16-bit operations.

•Accumulator
•8-bit register to store 8-bit data
•It is identified as A
•It is used to perform arithmetic and logic operations.
•The results of various operations are stored in Accumulator. ‫اﻟﻧﺎﺗﺋﺞ اﻟﻲ ﺗطﻠﻊ ﻣن ال‬
ALU
Example:
ADD B
If (A) = 25H and (B)=37H then the instruction ADD B, adds 25H and 37H
and stores the result 5CH in the accumulator.
https://nptel.ac.in/content/storage2/courses/downloads_new/108105113/noc19_ee51_a
ssessment_id_Week_11.pdf

•Flags
•There are five flags which are set or reset according to the results in
accumulator or other registers. They are:

•Z-Zero: The Zero flag is set to 1 when the result is Zero. Otherwise
it is reset. ‫ اطرح‬B
Example: ‫ ﻣن ال‬A
SUB B
If (A) = 05H and (B)=05H then the instruction SUB B, subtracts 05H
from 05H and since the result in the accumulator is 00 H the zero flag is
set.
•CY-Carry: If an arithmetic operation results in a carry, Carry flag is set,
otherwise reset.
Example:
ADD B
If (A) = FEH and (B)=01H then the instruction ADD B, adds
FEH and 01H and stores the result FFH in the accumulator. Since result does
not exceed FFH , the carry flag is reset else if the result is more then FFH , the
carry flag is set.
• S-Sign: The Sign flag is set if the last bit position of the data is 1, otherwise reset.
Example:
If D7 bit is 0, then the number is taken as a positive number and if D7 bit is 1,
the number is taken as negative number.

• P-Parity: If the result has an even number of 1s then parity flag is set. Otherwise it
is reset.
Example:
If the number of 1’s in the Accumulator is 3, which is odd, the parity flag is reset.
If the number of 1’s is 4, which is even, the parity flag is set

• AC-Auxillary Carry: In an arithmetic operation when a carry is generated by a digit


D3 and passed to D4, AC is set,, otherwise it is reset.
‫ اﻟﻲ ھو اﻟﻌﻣﻠﯾﮫ اﻟﻲ ﺑﻌدھﺎ‬1 ‫ ﯾﻛون ﻓﯾﮫ اﻟرﻗم ﺣﻖ‬0 ‫ﯾﻌﻧﻲ ﻧﺑدا ﻣن‬

‫ﯾﻛون ﻓﯾﮫ اﻟرﻗم ﺣﻖ اﻟﻌﻣﻠﯾﮫ اﻟﻲ ﺑﻌدھﺎ‬


Program Counter (PC) Instruction ‫ﯾﺑدا ﻣن‬
0

• This 16-bit register deals with sequencing the execution of instructions.


This register is a memory pointer.
• Memory locations have 16-bit addresses, and that is why this is a 16-bit
register.
• The microprocessor uses this register to sequence the execution of the
instructions.
• The function of the program counter is to point to the memory address from
which the next instruction is to be fetched.
• When a byte (machine code) is being fetched, the program counter is
incremented by one to point to the next memory location.

byte - 8 bit
‫اﺳﺗﺧدﻣﮫ ﻛﻣؤﺷر ﻟﻼدرس‬

Stack Pointer(SP)

• The stack pointer is also a 16-bit register used


as a memory pointer.
• It points to a memory location in R/W memory,
called the stack.
• The beginning of the stack is defined by loading
16-bit address in the stack pointer.
‫ﺧﻣس اﺟزاء‬
Pin diagram of 8085

Serial I/O
Timing and
Control signals
Interrupts

Address Data bus


pins Address bus
pins
‫ ﺗﺻﻧﯾﻔﺎت‬6 ‫ﺻﻧﻔﺗﮫ ل‬

Intel 8085 pins are categorized as


•Address bus pins. size-16 bits
•Data bus pins. Size-8 bits
•Control Signal pins.
•Power Supply and Frequency Signals.
•Interrupt pins.
•Serial I/O pins.
1. Address Bus
• 8085 has 16 signal lines as address bus.
• These lines are divided into two segments:
• AD0 to AD7 is used for lower order address and these lines are also used for 8
bit data.
• A8 to A15 are unidirectional and used for higher order address of a 16 bit
address.
Example:
For the address 2050H,
20H  0010 0000 Higher order address
50H  0101 0000 Lower order address
2. Data bus

•The signal lines AD7 – AD0 are bidirectional. as I/O


•They are used as lower order address bus as well as data bus.
3. Control and status signals

a. Address Latch Enable(ALE) ‫ﻋﺷﺎن اﺑدا اﺣط داﺗﺎ‬

•This is a positive going pulse generated every time the microprocessor


begins an operation.
•It indicates the bits on AD7-AD0 are address bits.
It is a control signal.
b. RD – Read
•A logic 0 on this pin indicates that the processor is performing either a
memory read or an I/O read operation.
•In other words, a read cycle is in progress.

c. WR – Write

•A logic 0 on this pin indicates that the processor is performing either a


memory write or an I/O write operation.
•In other words, a write cycle is in progress.

d.IO/M
•This is a status signal used to differentiate between I/O and memory operations.
•This signal is combined with RD and WR signals to generate I/O and memory
‫ﺟﺎء ﻋﻠﻰ ﺷﻛل ﻓراﻏﺎت‬

Machine
IO/M RD WR Cycle
0 0 1 Memory
Read
0 1 0 Memory
Write
1 0 1 I/O Read

1 1 0 I/O Write
e.S1, S0
•These are status signals sent by microprocessor and can be use to know
the type of current operations the microprocessor is performing.
•Combining IO/M with S1 and S0, more specific information about the
machine cycle status can be obtained.

S1 S0 Status
0 0 Halt
0 1 Write
1 0 Read
1 1 Opcode fetch
https://www.tutorialspoint.com/microprocessor/microprocessor_8085_pin_configurati
on.htm

4. Power Supply and Clock Frequency

a. Power supply +
• Vcc : +5V power supply
• Vss : Ground Reference Voltage Common Collector
_

b. Frequency signals
• X1, X2 : A crystal is connected at these two pins. The frequency is internally
divided by two; therefore to operate a system at 3MHz the crystal should
have frequency of 6MHz.
• CLK(OUT) : Clock output. This signal can be used as the system clock for
other devices.
‫ﻓﯾﮫ ﻋﻣﻠﯾﮫ ﻣﻌﯾﻧﮫ اﺳوﯾﮭﺎ اﻟﺣﯾن وﻓﯾﮫ اﻧﺗرﺑرت ﺻﺎر اﻟﺣﯾن ﺑوﻗف اﻟﻌﻣﻠﯾﮫ ﻟﯾن ﯾﻧﺗﮭﻲ اﻻﻧﺗرﺑت وارﺟﻊ اﺷﺗﻐل‬

5. Externally Initiated Signals including Interrupts

a. RESET IN:
• When the signal on this pin goes low, the program counter is set to
zero and the MPU is Reset.
b. RESET OUT
• This signal indicates that the MPU is being Reset. The signal can be
used to Reset other devices.
c. INTR (Input) Interrupt Request: This is used as a general purpose
interrupt;
d. INTA (Output) Interrupt Acknowledge: This is used to Acknowledge the
interrupt.

INTERRUPTS ‫ﯾﻌﻧﻲ ھﻲ ﻣﺛل ﺷﻲء ﻣﮭم طﺎرئ ﺣﺻل‬


‫ﻻزم اﻧﻔذه اول ﺛم ارﺟﻊ اﻧﻔذ ﺑرﻧﺎﻣﺟﻲ‬
Interrupt Description
e. RST 7.5 (Inputs)
RST 6.5
RST 5.5 : Restart Interrupts: These are vectored interrupts that transfer the program
control to specific memory locations. They have higher priorities than INTR interrupt.
Among these three priority order is 7.5, 6.5 and 5.5

f. TRAP (Input) This is non-maskable interrupt and has highest priority.

g. HOLD (Input) : This signal indicates the peripherals such as DMA (Direct Memory
Access) controller are requesting the use of the address and data buses.

h. HLDA (Output) : Hold Acknowledge: This signal acknowledges the HOLD request.

i. READY (Input) : This signal is used to delay the microprocessor Read or Write cycles
until a slow-responding peripheral is ready to send or accept data. When this signal
goes low, the microprocessor waits for an integral number of clock cycles until it goes
high.
https://nptel.ac.in/content/storage2/courses/106108100/pdf/MCQs/MCQMOD1.pdf

https://www.sanfoundry.com/microprocessors-mcqs-non-maskable-interrupt-maskabl
e-interrupt-intr/
6. Serial I/O Ports:
• The 8085 has two signals to implement the serial transmission: SID (Serial Input
Data) and SOD (Serial Output Data).
• In serial transmission, data bits are sent over a single line, one bit at a time, such as a
transmission over telephone Lines.
Microprocessor communication and bus timing:

To fetch the byte (4FH) , the microprocessor needs to identify the memory location 2005H and
enable the data flow from the memory. This is called fetch cycle.
•Step 1: The microprocessor places the 16 bit memory address (2005H) from the PC to the
address bus.
Step 2: The control unit sends control signal RD to enable the memory chip.
•Step 3: The byte (4FH) from the selected memory location (2005H) is placed on the data bus.
•Step 4: The fetched byte is placed in the instruction decoder of the microprocessor.
Microprocessor and Assembly Language
Course Code: 343 ALL

CHAPTER 2
Instruction Set of 8085
Lecture Notes

Dr. Harish Kumar


CHAPTER 2

Instruction Set of MICROPROCESSOR 8085

The microprocessor instructions are classified


a.. based on word size/ format of instructions as.
1. one byte instructions-8-bit length. 1 byte
‫ﺗﺻﻧف اﻟﻰ‬
2. two byte instructions-16-bit length. 2 byte
3. three byte instructions-24-bit length. 3 byte

b.. based on type of operation performed by the instruction as.


1. Data transfer instructions.
2. Arithmetic instructions.
3. Logic instructions.
4. Branching instructions.
5. Machine control instructions.

.
‫ﺟﺎء ﻣﺻطﻠﺢ ﻋﻠﯾﮫ ﻓﻲ اﻻﺧﺗﺑﺎر‬

1. DATA TRANSFER INSTRUCTIONS.

Data transfer instructions copy data from a source into a destination


without modifying the content of the source.

The source and destinations can be registers, memory locations or accumulator

Eg: a. Move between Register and Register-MOV Rd, Rs

b. Move Immediate Instruction- MVI Rd, 8 bit data

c. Move between Register and Memory- MOV M , r and MOV r, M


6
d. Load Immediate Register Pair- LXI Rp,16 bit data

e. Store Accumulator Direct- STA addr

f. Load Accumulator Direct- LDA addr


a. Move between Register and Register

MOV Rd, Rs
Rd  destination register
Rs  source register
This is a one byte instruction.

The source and destination registers can be A,B, C,D,E, H or L.

Example: MOV B , A
Before instruction execution, the contents of registers B and A are
Rd = B= XAH
Rs = A = 0FH
After the execution of instruction.
Rd = B = 0FH
Rs = A = 0FH
b. Move Immediate Instruction.

MVI Rdr 8 bit data

Rdr  destination register

This is a two bytes instruction.

It loads the specified 8 bit data into the destination register.

Example:
MVI B , F1H
Before the execution of instruction.
Rdr = B = XAH
After the execution of instruction, the 8 bit data F1H is loaded into the register
B.
Rdr = B = F1H
c. Move between Register and Memory.

MOV M , R and MOV R, M


M  memory location
R  register or accumulator
The memory address is first loaded in HL register before any instruction makes
a memory reference.
Example:
MOV M , A
Before execution
A=56H H=20H L=50H
Memory Address Data

2050H 99H

After execution
The content of the accumulator 56H is loaded into the memory location 2050H.
Memory Data
Address
2050H 56H
Problem

Write a sequence of instructions that will load FFH in C register and transfer
the byte to a memory location whose address is 2051H.
MVI H,20H
MVI L,51H
MVI C,0FFH
MOV M,C
HLT

Solution: MVI H, 20H


‫ﻣﻛﺎن اﻟﻣﯾﻣوري ادرس‬
MVI L, 51H
MVI C, FFH ‫اﻟﻘﯾﻣﮫ اﻟﻲ طﻠﺑﮭﺎ ﻣﻧﻲ ﻓﻲ اﻟﺳؤال اﻧﻲ اﺧزﻧﮭﺎ ﻓﻲ ﺳﻲ‬
MOV M,C
HLT

memory address data


d. Load Immediate Register Pair. ‫اﻟﻣؤﺷر ﻋﻠﻰ اﻟﻣﯾﻣوري ادرس‬
‫ ﻣﺳﺟﻼت ﺳوا‬2 ‫ادﻣﺞ‬
LXI Rp,16 bit data

Rp  register pair, BC, DE, HL or stack pointer SP

This is a three byte instruction. A 16-bit data is loaded into register pair.

LXI H , 2050H
Before execution

H L

After execution
the 16 bit data or memory address ,2050H, is loaded into the HL pair.

H L

20H 50H
accumulator to data in address memory

e. Store Accumulator Direct.

STA addr
addr
 memory address

Stores the contents of the accumulator in the memory whose address is


specified in the instruction itself.

STA 2550H
Before execution
A Mem.address Data
47H 2550H

After execution
The contents of the accumulator which is 47H is copied to the memory address,2550H.

A Mem.address Data
47H 2550H 47H
data in memory address to a accumulator

f. Load Accumulator Direct.

LDA addr
addr
 memory address

Loads the accumulator with a byte from the memory location whose address
is specified in the instruction itself.

LDA 2450H
Before execution
Mem.address Data
A
2450H 67H
After execution
The contents of the memory location whose address is 2450H is copied to the
accumulator.
Mem.address Data
A
67H 2450H 67H
Problem:
Without using LXI command how you will transfer
one byte from memory location whose address is
2450H to another memory location whose address
is 2550H.
‫‪Solution:‬‬

‫‪LDA 2450H‬‬ ‫اﺣﻣل اﻟﺑﯾﺎﻧﺎت ﻣن اﻟرﯾﺟﺳﺗر اﻟﻰ اﻻﻛﻣﯾوﻟﯾﺗر‬


‫‪STA 2550H‬‬ ‫ﺧذاھﺎ ﻣن اﻻﻛﻣﯾوﻟﯾﺗر وﺣطﮭﺎ ﻓﻲ ھذا اﻟﻣوﻗﻊ‬
‫‪HLT‬‬
2. ARITHMETIC INSTRUCTIONS.

Arithmetic operations like addition/ subtraction are done by arithmetic


instructions between any 8-bit number, or the contents of register, or the contents of
memory location and the contents of accumulator.

The results are stored in accumulator.


The contents of two registers cannot be added or subtracted directly.
Eg:
a. ADD with register/memory h. Increment Register or Memory INR r or INR M

b. ADD immediate. ADI i.Decrement Register or Memory. DCR r or DCR M

c. ADD with carry ADC r [or] ADC M j.Decrement Register Pair


DCX r
d. SUB with register/memory SUB r [or] SUB M p

e. SUB immediate. SUI 8 bit data 10 INX r


p
f. SUB immediate with borrow. SBI 8 bit data

g. Double Register Add. DAD register pair


‫اﺧذ اي ﻗﯾﻣﮫ ﻣوﺟوده ﻓﻲ اﻟرﯾﺟﺳﺗر واﺟﻣﻌﮭﺎ ﻋﻠﻰ اﻟﻘﯾﻣﮫ اﻟﻣوﺟوده ﻓﻲ اﻻﻛﻣﯾوﻟﯾﺗر واﺧزﻧﮭﺎ ﻓﻲ اﻻﻛﻣﯾوﻟﯾﺗر‬

https://electricalvoice.com/8085-microprocessor-mcqs/4/

a. ADD with register/memory

ADD r [or] ADD M


r  register name M  memory location

It is used to add the contents of a specified register or memory to the contents of the
accumulator. (A)  (A) + r.

The result is stored in the accumulator.

Example: 1 ‫ﯾﺣﻣﻊ اﻟﺑﻲ ﻋﻠﻰ اﻟﻘﯾﻣﮫ اﻟﻲ ﻓﯾﺎﻻﻛﻣﯾوﻟﯾﺗر وﯾﺧزن ﻗﯾﻣﺗﮭﺎ ﻓﻲ اﻻﻛﻣﯾﻠوﯾﺗر‬
ADD B
If A= E2H and B= 03H then after the execution of the above instruction the content of A
will be E5H.
Example: 2
ADD M ‫ﯾﺟﻣﻊ اﻟﻘﯾﻣﮫ اﻟﻲ ﻓﻲ اﻟﻣﯾﻣوري ﻋﻠﻰ اﻟﻘﯾﻣﮫ اﻟﻲ ﻓﻲ اﻻﻛﻣﯾوﻟﯾﺗر وﯾﺧزن اﻟﻧﺎﺗﺞ ﻓﻲ اﻻﻛﻣﯾوﻟﯾﺗر‬

Before execution

A H L Mem.address Data
05H 20H 50H
2050H 07H

After execution
The data in the memory location 2050H i.e 07H is added to value in accumulator A
and result is stored in A.

A H L Mem.address Data
0CH 20H 50H
2050H 07H
‫ﺟﺎت ﻣﺳﺎﻟﮫ ﻋﻠﯾﮫ‬

b. ADD immediate.

ADI 8 bit data ‫اﺿﯾف ﻗﯾﻣﮫ وﻟﯾﺳت ﻣﺳﺟل اﺟﻣﻊ اﻟﻘﯾﻣﮫ ﻣﻊ اﻟﻘﯾﻣﮫ اﻟﺗﻲ ﻓﻲ اﻻﻛﻣﯾوﻟﯾﺗر واﺧزن ﻓﻲ اﻻﻛﻣﯾوﻟﯾﺗر‬

It is used to add 8 bit data to the contents of the accumulator. (A)  (A) + 8-bit data.

The result is stored in the accumulator.

Example: 1
ADI 37H

If the value of A = 05H then after the execution of the above instruction the 8 bit data 37H
is added with the content of accumulator and the result 3CH is stored in the accumulator.
. 37h+05h=3ch
c. ADD with carry

ADC r [or] ADC M

It is used to add the contents of a specified register or memory along with the carry
flag to the contents of the accumulator.

(A)  (A) + r + Carry


B=03H
The result is stored in the accumulator. A=E2H
CARRY FLAG = 1
Example 1: ADC B 03+E2+1=E6H

If A= E2H and B= 03H and Carry flag = 1, then after the execution of the above
instruction the content of A will be E6H.
Example 2:

ADC M
Before the execution of instruction , if Carry flag = 1

A H L Memory Data
Address
05H 20H 50H 2050H 07H

After the execution of instruction, the data in the memory location 2050H i.e 07H
is added to value in accumulator A and carry 1 and result is stored in A.
05H + 07H + 1

A H L Memory Data
Address
0DH 20H 50H 2050H 07H
‫ﻋﻣﻠﯾﮫ اﻟطرح‬

d. SUB with register/memory

SUB r [or] SUB M


r  register name M  memory location

It is used to subtract the contents of a specified register or memory from the contents of
the accumulator. (A)  (A) - r.
A - REGISTER OR MEMORY
The result is stored in the accumulator.

Example: 1
SUB B
If A= 0CH and B= 03H , then after the execution of the above instruction the content of A
will be 09H.
Example: 2
SUB M

Before execution ,

A H L Mem.address Data
07H 20H 50H
2050H 03H

After execution
The data in the memory location 2050H i.e 07H and carry are subtracted from value
in accumulator A and result is stored in A.

A H L Mem.address Data
04H 20H 50H
2050H 03H
e. SUB immediate.

SUI 8 bit data

It is used to subtract 8 bit data from the contents of the accumulator. (A)  (A) - 8-bit
data.

The result is stored in the accumulator.

Example: 1
SUI 03H

If the value of A = 05H then after the execution of the above instruction the 8 bit data 03H
is subtracted from the content of accumulator and the result 02H is stored in the
accumulator.
.
‫اطرح واﺣد زﯾﺎده ﻣن اﻟﻘﯾم اﻟﻲ اﺑﻲ اطرﺣﮭﺎ‬

f. SUB immediate with borrow.

‫اﺧﺗﯾﺎري اﻛﻣﻠﻲ ﺻﺢ وﺧطﺎ ﻣﺳﺎﻟﮫ‬


SBI 8 bit data

It is used to subtract 8 bit data from the contents of the accumulator. (A)  (A) - 8-bit
data - carry.

The result is stored in the accumulator.


05 - 03 - 01 = 01
Example: 1
SBI 03H

If the value of A = 05H and carry =1, then after the execution of the above instruction the
8 bit data 03H is subtracted from the content of accumulator and the carry flag and the
result 01H is stored in the accumulator.
.
‫اﺟﻣﻊ ﻗﯾﻣﮫ ﻣوﺟوده ﺟوا رﺟﺳﺗرﯾن ﻣﻊ ﺑﻌض‬

g. Double Register Add

DAD register pair

It is used to add the contents of HL pair with the contents of register pair mentioned in
the instruction. (HL)  (HL) + (register pair).

The result is stored in the accumulator. HL + BC =

‫ اﻟﺗﺧزﯾن ﻓﻲ ال‬HL
Example: 1
DAD B
Adds the content of the HL register with the content of the BC register pair stores the
result in the HL register pair

HL  HL+BC
Before execution After execution

H L B C H L B C
41H 01H 06H 02H 47H 03H 06H 02H
INCREMENT/ DECREMENT INSTRUCTIONS
h. Increment Register or Memory

INR r or INR M 1 ‫ﯾﻌﻧﻲ ﻟو ﺳوﯾت اﻧﻛرﯾﻣﯾﻧت ﻋﻠﻰ اﻟرﯾﺟﺳﺗر راح ازﯾد ﻋﻠﯾﮫ‬
1 ‫وﻟو ﺳوﯾت اﻧﻛرﯾﻣﯾﻧت ﻋﻠﻰ اﻟﻣﯾﻣوري راح ازﯾد ﻋﻠﯾﮫ‬

This instruction increments the contents of the specified register or memory location, M
by 1.
‫اﺧزن اﻟﻘﯾﻣﮫ ﻋﻠﻰ ﻧﻔس اﻟرﯾﺟﺳﺗر اﻟﻲ اﻧﺎ ﺳوﯾت ﻋﻠﯾﮫ اﻟﻌﻣﻠﯾﮫ‬
The result is stored in the specified register itself.

Example: 1
INR C ‫اﻧﺎ ھﻧﺎ ﺳوﯾت اﻧﻛرﯾﻣﻧت ﻋﻠﻰ اﻟرﯾﺟﺳﺗر ﺳﻲ ﻋﺷﺎن ﻛذا زدت ﻋﻠﯾﮫ واﺣد وﺧزﻧت اﻟﻧﺗﯾﺟﮫ ﻓﻲ ﺳﻲ‬
Increments the content of C register by 1 and the new value is stored in C register.

Example: 2
INR M ‫اﻧﺎ ھﻧﺎ ﺳوﯾت اﻧﻛرﯾﻣﻧت ﻟﻠﻣﯾﻣوري ﻋﺷﺎن ﻛذا اﻧﺎ زودت واﺣد ﻋﻠﻰ اﻟﻣﯾﻣوري واﻟﻘﯾﻣﮫ ﺧزﻧﺗﮭﺎ ﻓﻲ اﻟﻣﯾﻣوري‬
Increments the content of memory location specified by HL register by 1 and the value is
stored in that memory location itself.
‫اﻧﺎ ھﻧﺎ اطرح ﻣن اﻟرﯾﺟﺳﺗر او اﻟﻣﯾﻣوري واﺧزن اﻟﻘﯾﻣﮫ ﻓﻲ ﻧﻔس اﻟﺷﻲ اﻟﻲ اﻧﺎ ﺳوﯾت ﻋﻠﯾﮫ اﻟﻌﻣﻠﯾﮫ‬
‫ﻧﻔس اﻻﻧﻛرﯾﻣﻧت ﺑس اﻟﻔرق ﺑﯾﻧﮭم ان ھذا طرح وھذاك ﺟﻣﻊ‬

i. Decrement Register or Memory

DCR r or DCR M

This instruction decrements the contents of the specified register or memory location, M
by 1.

The result is stored in the specified register or memory location itself.

Example: 1
DCR C
Decrements the content of C register by 1 and the new value is stored in C register.

Example: 2
DCR M
Decrements the content of memory location specified by HL register by 1 and the value is
stored in that memory location itself.
‫ازﯾد واﺣد ﻋﻠﻰ اﻟﻣﺳﺟﻼت اﻟزوﺟﯾﮫ واﺧزن اﻟﻘﯾﻣﮫ ﻓﻲ ﻧﻔس اﻟﻣﺳﺟﻼت‬

j. Increment Register pair

INX rp

This instruction increments the contents of the specified register pair by 1.


(rp)  (rp) +1

The register pair used are BC, DE, HL and the 16-bit Stack Pointer.

The result is stored in the specified register pair itself.

Example: 1
INX H
If the initial value in HL register pair is 14FFH, then the instruction INX H increments the
16 bit value in HL register pair by 1 and the new value 1500H is stored in HL.

HL = 14FFH + 1 = 1500H
HL= 1500H
K. Decrement Register pair

DCX rp

This instruction decrements the contents of the specified register pair by 1.


(rp)  (rp) -1

The register pair used are BC, DE, HL and the 16-bit Stack Pointer.

The result is stored in the specified register pair itself.

Example: 1
DCX D
If the initial value in DE register pair is 1500H, then the instruction DCX D decrements 16
bit value in DE register pair by 1 and the new value is stored in DE.

‫ ﻣن اﻟﻣﺳﺟﻼت‬1 ‫اطرح‬
3. LOGIC INSTRUCTIONS.

Logic Instructions perform logical operations on data stored in registers,


memory and status flags.

The results are stored in accumulator.

The various logic operations supported by 8085 are:

ANI 8-bit data


a. AND ‫ رﯾﺟﺳﺗﺎر واذا ھم ھﺎي او ﻻ‬2 ‫ﯾﺣول ﻣن ھﯾﻛﺳﺎدﯾﺳﻣﺎل ﻟﺑﺎﯾﻧﺎري وﯾﻘﺎرن ﺑﯾن‬
ANA r
ORA r
XRA r b. OR.
ORI 8 bit data
XRI 8 bit data c. XOR
CMA
d. Complement CMC noneCMC noneCMC none
STC none
CMP register
CPI register e. Compare.
RA L
f. Rotate. RAR
RRC
RLC
a. AND instruction

ANA r

This instruction performs logical AND operation between the specified register, r and the
accumulator.

The result is stored in the accumulator. ‫ﯾﺷوف اﻟﻘﯾﻣﮫ اﻟﻲ ﻓﻲ اﻻﻛﻣﯾوﻟﯾﺗر وﯾﺳوي ﻟﮭﺎ اﻧدﯾﻧﻖ ﻣﻊ اﻟﺑﻲ‬

‫اﺣول ﻣن دﯾﺳﻣﺎل ﻟﺑﺎﯾﻧﺎري‬


Example: 1
ANA B

If A = 97H = 1001 0111


And if B = C5H = 1100 0101

Then ANA B results in A = 1000 0101= 85H


a. AND immediate

ANI 8-bit data

This instruction performs logical AND operation between the accumulator and the 8 bit
data given in the instruction itself.

The result is stored in the accumulator.

Example: 1
ANI 0FH

If A = 97H = 1001 0111


And if 8 bit data = 0FH = 0000 1111

Then ANI 0FH results in A = 0000 0111= 07H in the A register.


b. OR instruction

ORA r

This instruction performs logical OR operation between the accumulator and the register
content given in the instruction itself .

The result is stored in the accumulator.

Example: 1
ORA B
‫ﻋﺳل او ﺳم‬
If A = 97H = 1001 0111
And if B = C5H = 1100 0101

Then ORA B results in A = 1101 0111= D7H


.
b. OR immediate

ORI 8 bit data

This instruction performs logical OR operation between the accumulator and the 8-bit
data given in the instruction itself .

The result is stored in the accumulator.

Example: 1
ORI 0FH
If A = 97H = 1001 0111
And if 8 bit data = 0FH = 0000 1111

Then ORI 0FH results in A = 1001 1111= 9FH in the A register.

.
0 ,, ‫ﻟو اﻻﺛﻧﯾن ﻣﺗﺷﺎﺑﮭﯾن ﯾﻛون‬
c. EX-OR Instruction 1,, ‫ﻟوو اﻻﺛﻧﯾن ﻣﺧﺗﻠﻔﯾن ﯾطﻠﻊ‬

XRA r

This instruction performs EX-OR operation between the contents of the accumulator and
the specified register on a bit by bit basis.

The result is stored in the accumulator.

The XRA clears the accumulator. With this single instruction, we can clear accumulator,
Carry flag and Auxiliary Carry flag.

Example: 1
XRA B
If A = 97H = 1001 0111 and if B = C5H = 1100 0101

The XRA B results in A = 0101 0010 = 52H in the A register.

Example 2:
XRA A
If A = 97H = 1001 0111 and again A = 97H = 1001 0111

The XRA B results in A = 0000 0000 = 0 in the A register.


c. EX-OR
EX OR immediate

XRI 8 bit data

This instruction performs logical EX-OR operation between the accumulator and the 8-bit
data given in the instruction itself .

The result is stored in the accumulator.

Example: 1
XRI 0FH
If A = 97H = 1001 0111
and if 8 bit data = 0FH = 0000 1111

Then XRI 0FH results in A = 1001 1000= 98H in the A register

.
‫ﺟﺎت ﻣﺳﺎﻟﮫ ﻋﻠﯾﮫ ﻓﻲ اﻻﺧﺗﺑﺎر‬
‫ﻣﻛﻣل‬
d. Complement Instruction
‫ واﻟﻌﻛس‬0 ‫ ﯾﺧﻠﯾﮭﺎ‬1 ‫ﺗﺑدﯾل ﻟو اﻟﻘﯾﻣﮫ ب‬
CMA

This instruction complements each bit in the accumulator.

The result is stored in the accumulator.

Example: 1
CMA ‫ﺣول ﻛل واﺣد ﻟﺿده‬
If A = 97H = 1001 0111

The CMA results in A= 0110 1000 in the A register.

CMC none ‫اﻧﺎ اﺑﻲ اﺳوي ﻋﻣﻠﯾﮫ اﻟﺗﺣوﯾل ﻟﻠﻛﺎري اﻟﻲ ﺟوا اﻟﻔﻼق‬
‫ ﻣﺛﺎل ال‬CARRY=1
This instruction complements the content of carry flag. ‫اﻟﺣل‬
CARRY = 0
STC none
This instruction sets carry flag to 1.

‫ﺟﺎء ﻣﺻطﻠﺢ‬
‫ﻓﻲ اﻻﺧﺗﺑﺎر‬
‫ﻣﻘﺎراﻧﮫ‬
e. Compare Instruction

Compare Accumulator contents with register

CMP register
This instruction compares the content of the accumulator with the value in register given in
instruction.
Example
CMP B
SET 1
If (B) > (A) , then Carry flag is set ‫اذا ﻛﺎن اﻟﺑﻲ اﻛﺑر ﻣن ال اﻻي اذا اﻟﻛﺎري ﻓﻼق ﺑواﺣد‬
If (B) = (A) , then Zero flag is set 0 = ‫اذا اﻟﺑﻲ واﻻي ﻣﺗﺳﺎوﯾن اذا اﻟﻛﺎري ﻓﻼق‬ RESET 0
If (A) > (B) , then No flag is set ‫اذا ﻛﺎن اﻻي اﻛﺑر ﻣن اﻟﺑﻲ اذا اﻟﻛﺎري ﻓﻼق ﻣﺎراح ﯾﺻﯾر ﻟﮫ اي ﺷﻲ‬

Compare Accumulator contents with immediate data


‫اذا ﺟﯾت اﺑﻲ اﺳوي ھذي ف اﻧﺎ اﺣط ﻗﯾﻣﮫ واﻗﺎرﻧﮭﺎ ﻣن اﻻﻛﺎﻣﯾوﻟﯾﺗر‬

CPI 8-bit data ‫زﯾﮫ‬


The 8-bit data is compared with the contents of the accumulator.
Example CPI 89H
if (A) < data: carry flag is set ‫اذا ﻛﺎن اﻻﻛﻣﯾوﻟﯾﺗر ااﺻﻐر ﻣن اﻟداﺗﺎ ﯾﻌﻧﻲ اﻟﻛﺎري ﻓﻼق = ﺳﯾت‬
if (A) = data: zero flag is set
if (A) > data: carry and zero flags are reset
‫ﺟﺎء ﻓﻲ اﻻﺧﺗﯾﺎري ﻣن اﻟﺻوره اﻟﻲ ﻧزﻟﺗﮭﺎ ﻟﻧﺎ ﻓﻲ اﻟﺑﻼك‬

f. Rotate Instruction

Rotate accumulator right

RRC ‫اﻟﻘﯾﻣﮫ‬

Each binary bit of the accumulator is rotated right by one position. Bit D0 is placed in the
position of D7 as well as in the Carry flag. CY is modified according to bit D0. S, Z, P,
AC are not affected.

Rotate accumulator left

RLC

Each binary bit of the accumulator is rotated left by one position. Bit D7 is placed in the
position of D0 as well as in the Carry flag. CY is modified according to bit D7. S, Z, P,
AC are not affected.
f. Rotate Instruction

Rotate accumulator left through carry

RAL
Each binary bit of the accumulator is rotated left by one position through the Carry
flag. Bit D7 is placed in the Carry flag, and the Carry flag is placed in the least
significant position D0. CY is modified according to bit D7. S, Z, P, AC are not
affected.

Rotate accumulator right through carry

RAR

Each binary bit of the accumulator is rotated right by one position through the
Carry flag. Bit D0 is placed in the Carry flag, and the Carry flag is placed in the
most significant position D7. CY is modified according to bit D0. S, Z, P, AC
are not affected.
‫اﺑﻲ اروح ﻣن ﻣﻛﺎن ﻣﻌﯾن ﻓﻲ اﻟذاﻛره ﻟﻣﻛﺎن ﺛﺎﻧﻲ‬

3. BRANCH INSTRUCTIONS.

Branch Instructions are used to transfer the sequence of instructions from one
memory location to another.

a. Jump unconditionally

b. Jump conditionally
BRANCH INSTRUCTIONS
Jump unconditionally
JMP 16-bit address

The program sequence is transferred to the memory location specified by the 16-bit
address given in the operand.
Example: JMP 2034H.
NB: In 8085 JMP unconditionally ins. is used to do the function of GOTO

Jump conditionally Operand: 16-bit address

The program sequence is transferred to the memory location specified by the 16-bit
address given in the operand based on the specified flag of the PSW as described below.
Opcode Description Flag Status
JC ‫ﺟس‬ Jump on Carry CY = 1
JNC ‫اﻟﺟﻧس‬ Jump on no Carry CY = 0
JP ‫ﺟب‬ Jump on positive S=0
JM ‫اﻟﺟم‬ Jump on minus S=1
JZ ‫ﺟز‬ Jump on zero Z=1
JNZ ‫اﻟﺟﻧز‬ Jump on no zero Z=0
JPE ‫ﺟﯾﺑﻲ‬ Jump on parity even P=1
JPO ‫ﺟﯾﺑو‬ Jump on parity odd P=0
Example 1: Write a program to add two bytes and store the result in memory
location 2050H. Also store the carry as 1 if there is a carry, in the next memory
location. If there is no carry, store a 0 in the next location.
Answer
• MVI C,00
• MVI A,05
• MVI B,04
• ADD B
• JNC AHEAD
• INR C
• AHEAD: STA 2050
• MOV A,C
• STA 2051
• HLT
Machine control instructions

• HLT
• Stop executing the program.

• NOP
• No operation
• Exactly as it says, do nothing.
• Usually used for delay or to replace instructions during debugging
‫ﺟﺎء ﻓﺎﻻﺧﺗﺑﺎر ﻋﻠﻰ ﺷﻛل اذﻛري ﻧوع ھذي اﻻﻧﺳﺗرﻛﺷن وﻋطﺗﻧﺎ اﻧﺳﺗرﻛﺷن وﻗﺎﻟت اذﻛري ﻧوﻋﮭﺎ‬
Addressing Modes

Immediate Addressing
Direct Addressing
Register Addressing
Register Indirect Addressing
Implied Addressing

Immediate Addressing:
In immediate addressing mode, the data is specified in the instruction itself. The data
will be a part of the program instruction.

EXAMPLE:
MVI B, 3EH - Move the data 3EH given in the instruction to B register;

Direct Addressing:
In direct addressing mode, the address of the data is specified in the instruction. The
data will be in memory. In this addressing mode, the program instructions and data
can be stored in different memory.

EXAMPLE.
LDA 1050H - Load the data available in memory location 1050H in to accumulator;
Register Addressing:
In register addressing mode, the instruction specifies the name of the register in which
the data is available.

EXAMPLE.
MOV A, B - Move the content of B register to A register;

Register Indirect Addressing:


In register indirect addressing mode, the instruction specifies the name of the register in
which the address of the data is available. Here the data will be in memory and the
address will be in the register pair.

EXAMPLE.
MOV A, M - The memory data addressed by H L pair is moved to A register.

Implied Addressing:
In implied addressing mode, the instruction itself specifies the data to be operated.

EXAMPLE.
CMA - Complement the content of accumulator
Microprocessor and Assembly Language
Course Code: 343 ALL

CHAPTER 3
Hardware Scheme for Data Transfer and Interrupts
Lecture Notes
memory

address thousands

CHAPTER 3
Memory

•Memory is the storage device which can be used to store monitor program, users program
or users data.
cells ‫ وﻛل ﻋﻧوان ﯾﺗﻘﺳم اﯾﺿﺎ‬thousands ‫ﻣﻛﺎن ﻣﻘﺳم‬
• The memory consists of the thousands of memory cells arranged to store data.

•Each memory cell is capable of storing 1 bit of the data. 0 or 1


‫ﻋﺷﺎن ﺗﺷﺗﻐل اﻟذاﻛره ﻻزم اوﺻﻠﮭﺎ ب اﻟﻣﺎﯾﻛرو ﺑروﺳﯾﺳر‬
•Hence, to use memory to store programs or data of user or system, memory must be
interfaced with microprocessor properly, so that it can be accessed while reading or writing
data or program from/to it .

• In the same way, input and output devices are also required to read or write data out from
the microprocessor using input device such as keyboard or output device.
‫ﻻزم اوﺻل اﺟﮭزه اﻻدﺧﺎل واﻻﺧراج ﺑﺎﻟﻣﺎﯾﻛرو ﺑروﺳﯾﺳر‬
So, these devices must be interfaced properly with the microprocessor so that user can read
data from input device and write data to the output device.
‫ﻋﻧده ﻧوﻋﯾن‬
Hardware Scheme for Data Transfer
The two methods of interfacing memory or I/O devices with the microprocessor are
as follows:
a) I/O mapped I/O ‫اﺟﮭزه اﻻدﺧﺎل واﻻﺧراج ﺗﺗﺣﻛم ﻓﻲ اﺟﮭزه اﻻدﺧﺎل واﻻﺧراج‬
b) Memory mapped I/O ‫اﻟذاﻛره ﺗﺗﺣﻛم ﻓﻲ اﺟﮭزه اﻻدﺧﺎل واﻻﺧراج‬
a) I/O mapped I/O
In this technique, I/O device is treated as a I/O device and memory as memory.
MEMORY
eight address lines
• Each I/O device uses eight address lines. eight address lines
8BIT ‫ طرﯾﻘﮫ‬256 ‫ﺗﺳﻣﺢ ﻟﻲ اﺗﻌﺎﻣل ﻣﻊ‬

• If eight address lines are used to interface to generate the address of the I/O port, then
256 input and 256 output devices can be interfaced with the microprocessor.

• The address bus of the 8085 microprocessor is 16 bit, so we can either use lower order
address lines i.e. A0 – A7 or higher order address lines i.e. A8 – A15 to address I/O devices
where the address available on A0 – A7 will be copied on the address lines A8 – A15 .

•In I/O mapped I/O, the complete 64 Kbytes of memory can be interfaced as all address
lines can be used to address memory locations as the address space is not shared among
I/O devices and memory and 256 input and /or output devices.

‫ ﺑت اﻟﻰ ﻗﺳﻣﯾن‬16 ‫ﻧﻘﺳم ال‬


A0-A7 AND A8 -A15
‫اﻗدر اﺗﻌﺎﻣل ﻣﻊ ﻛل ﺟزء ﻟﺣﺎل‬
‫اﻟﻌﯾوب‬

a) I/O mapped I/O


Contd…
‫ﻣﺎﺗﻘدر ﺗﻧﻘل اي داﺗﺎ اﻻ ﺑﯾن ﺷﯾﺋﯾن اﻻﻧﺑوت اوت ﺑوت واﻻﻛﻣﯾوﻟﯾﺗر‬
‫ اﻟﺗﻌﺎﻣل ﻓﻘط ﻣﻊ ال‬Accumulator register
• In this type, the data transfer is possible between accumulator A register and I/O
devices only.

• Address decoding is simple, as less hardware is required.

•The separate control signals are used to access I/O devices and memory such as IOR,
IOW for I/O port and MEMR, MEMW for memory hence memory location are protected
from the I/O access.

•But in this type, arithmetic and logical operation are not possible directly.

•Also we cannot use other register for data transfer between I/O device and
microprocessor accepts A register.
I/O mapped I/O

The figure below shows interfacing I/O devices in I/O mapped I/O.
b)Memory mapped I/O

In this technique, I/O devices are treated as memory and memory as memory, hence the address of the
I/O devices are as same as that of memory i.e. 16 bit for 8085 microprocessor.

• So, the address space of the memory i.e. 64 Kbytes will be shared by the I/O devices as well as by
memory.

• All 16 address lines i.e. A0-A15 is used to address memory locations as well as I/O devices.

• The control signals MEMR and MEMW are used to access memory devices as well as I/O devices.

• The data transfer is possible between any register of the microprocessor and I/O device or memory
device.

• Hence, all memory related instructions can be used to access devices as they are treated as memory
devices.

• Address decoding of the I/O devices and memory devices are complicated and expensive as more
hardware is required.

• The 8085 microprocessor can access either 64 K I/O ports or memory locations, hence the total
numbers of the I/O ports and memory locations should not be greater than 64 K.

• I/O devices and memory locations are distinguished by the addresses only.
b) Memory mapped I/O
Contd…

• Arithmetic and logical operation can be performed directly on the I/O devices.

• Most of the memory instructions are long; hence it reduces the speed of I/O.

• Normally, the speed of the I/O devices are very slow, hence the common interface used in
memory mapped I/O will reduce the speed of memory access unnecessarily.
Memory mapped I/O

The figure below shows interfacing I/O devices inMemory mapped


I/O.
Exercise

• Write 8 differences between IO mapped IO and memory mapped IO.

https://www.geeksforgeeks.org/difference-between-memory-mapped-io-and-io-
mapped-io-with-reference-to-8085-microprocessor/
Interrupts

When the microprocessor executes a program, the instructions are executed one by one,
usually without any interruption. The normal sequence of operation can be interrupted in 8085 by
some external signal applied to one of its interrupt pins or by one of the ‘restart’ instructions.

• Interrupt requests are classified into following two categories.


• Maskable interrupt requests.
• Unmaskable interrupt requests.

Maskable interrupt requests:


• The microprocessor can ignore or delay a maskable interrupt request if it is
performing some critical task.

Unmaskable interrupt requests.


• The microprocessor has to respond to a non maskable interrupt request without
any delay.
The 8085 microprocessor interrupts are,

• INTR
• RST 5.5
• RST 6.5
• RST 7.5
• TRAP

The interrupt process is enabled by writing the instruction EI in main


program.
The instruction EI sets the interrupt enable flip flop. The instruction
DI resets the flip flop and disables the interrupt process.
EI – Enable Interrupt
DI- Disable Interrupt
Generation of RST codes:

The 8085 instruction set includes eight RST(Restart) instructions. These are one byte
CALL instructions and transfer the program execution to a specific memory location.

The RST instructions, the opcodes and the branch addresses are given below.

Instruction Branch Address


RST 0 0000
RST 1 0008
RST 2 0010
RST 3 0018
RST 4 0020
RST 5 0028
RST 6 0030
RST 7 0038
Main Program

2500
2501 0028 H
.
. .
. .
2505 RST 5
2506


250A HLT
Vectored Interrupts
• Vectored interrupts are automatically vectored(transferred) to specific memory
location, without any external hardware.
• These interrupts do not require INTA signal at an input port.
• Interrupt and their call location are as follows.

TRAP 0024H

RST 7.5 003CH

RST 6.5 0034H

RST 5.5 002CH

TRAP has highest priority followed by RST 7.5, RST 6.5, RST 5.5
Non Vectored Interrupt

• INTR is a maskable interrupt having least priority. It is a non vectored interrupt.

• If INTR is high and interrupt enable flip flop is set, microprocessor completes the
execution of current instruction, disables the interrupt enable flip flop and sends a
signal called INTA (Interrupt Acknowledge).

• The microprocessor cannot accept any interrupt request until interrupt enable flip
flop is set again.

• The signal INTA is used to insert a RST (Restart) instruction or call instruction through
external hardware.

• RST instruction transfers the program execution control to corresponding memory


location.

• When microprocessor receives an RST instruction it saves the address of next


instruction in the main program in the stack for future reference.
SIM instruction

• SIM stands for set interrupt mask.


• This is a 1 byte instruction.
• SIM reads the content of the accumulator and enables or disables the interrupts
according to the contents of accumulator.
• Bit D3 is the control bit and should be equal to 1 for bits D0, D1, D2 to be effective.
• Logic 0 in D0, D1 and D2 will enable the corresponding interrupt and logic 1 will
disable the interrupts.
0 ‫ ﯾﻌﻧﻲ‬enable
• Bit D4 is for controlling RST 7.5. If D4= 1 RST 7.5 is reset. 1 ‫ ﯾﻌﻧﻲ‬disenalbe
TRAP interrupt:
• TRAP is a non maskable interrupt (NMI).

• It has highest priority among all interrupt signals.

• When this interrupt is triggered the program control is transferred to location 0024H
without any external hardware or the interrupt enable instruction EI.

• TRAP is generally used for such critical events as power failure and emergency shut off.

RST 5.5, RST 6.5, RST 7.5:


To activate one of these interrupts, three conditions must be satisfied.

•The voltage on the pin should rise from 0 to 1 state.

•The interrupt enable flip flop must be set using EI instruction.

•These interrupts must be available (i.e) not masked in SIM instruction.


Example 1:
Write a program to enable interrupts RST 7.5, RST 6.5 and RST 5.5.
EI ; Enable interrupt
MVI A,08 ; Load bit pattern to enable RST 7.5, 6.5 and 5.5
SIM ; Enable RST 7.5, 6.5 and 5.5

Bit D3 = 1 in the accumulator makes the instruction SIM functional. The bits D2, D1
and D0 are all equal to zero and this enables the interrupts 7.5, 6.5 and 5.5.

Example 2:
Write a program to enable interrupts RST 7.5, RST 6.5 and disable RST 5.5.
EI ; Enable interrupt
MVI A,09 ; Load bit pattern to enable RST 7.5, 6.5 and disable 5.5
SIM ; Enable RST 7.5, 6.5 and disable 5.5

Bit D3 = 1 in the accumulator makes the instruction SIM functional. The bits D2, D1 are
all equal to zero and this enables the interrupts 7.5, 6.5. Bit D0 =1 therefore 5.5 is
disabled.

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