Analysis of VFD
Analysis of VFD
The sensor used was a proximity switch. It had an indicator light that lights up when a metallic
object is within 10mm of it. Hence, it is able to sense the head of a bolt. The voltage range for
the sensor is between 7V and about 30V. When connected to the tachometer, the sensor failed to
work. This is because the tachometer couldn’t provide the necessary voltage to run the sensor.
An external voltage source was used (power from relay switch) to power the sensor. The sensor
was placed in a hole within a u-shape frame. The sensor was adjusted to ensure that the bolt head
was as close to the sensor as possible. The indicator light was however constantly on. This was
because the sensor was picking up other metallic components and thus was always sensing a
metallic object. The distance between the sensor and the bolt had to be increased in order for the
sensor to only pick up the bolt. After increasing the distance slightly, the sensor only picked up
the bolt head. The distance between the bolt and sensor was measured to be 10mm.
Since the proximity switch senses three bolts before completing one revolution, the frequency
mode of the tachometer could not be used. Instead, the scale mode was used in order to scale
down the frequency. The following calculation was used to determine the scaling factor.
2
Frequency of VFD=2 Hz Frequency mode=2.98 Hz Scale Factor = ¿ 0.667
2.98
A scale factor of 0.6677 was used. A test was performed to ensure accurate frequency readings.
The max and min values were measured and the average was taken.
Table
Freq. VFD / Min. measured freq / Max. measured freq / Average freq / Error /
Hz Hz Hz Hz %
2 1.975 1.998 1.986 0.007
3 2.995 2.997 2.996 0.001
10 9.996 10.007 10.002 0.000
20 19.890 20.130 20.010 0.000
40 39.992 40.001 39.997 0.000
60 59.890 59.960 59.925 0.001
The scale factor produced favorable results since the error produced were negligible.
TB2 and TB25 were connected to the current output and COM terminal of the ATC respectively.
This allows the output data to be sent to the VFD via current of the range 4-20mA. The
following parameters of the VFD were also set: P200 = 1; P201 = 0 ; P207 = 1; P209 = 0.5;
P121 = 6. When the PID mode was correctly configured and the VFD properly wired, an
indicator light on the VFD lights up to tell the user that the VFD is properly configured for PID
mode.
P200 determines if the VFD is set for PID mode or not. Entering ‘1’ enables the PID mode and
makes it run in the forward mode. Forward mode means as feedback increases, motor speed
decreases. P201 sets the feedback source. Since current output was used from the tachometer, ‘0’
was selected to set the appropriate source feed. P207 and P209 represent the proportional gain
and derivative gain respectively. The values were obtained experimentally as shown in table .
P121 is the input function and the keypad was selected as the auto reference. The integral gain
was not used because the frequency overshot by more than 10 times the initial value and hence
always remained unstable. The auto reference and the feedback source cannot be the same
otherwise an error will occur.
Table
The above results were obtained from a test to ensure that the PID mode was working correctly.
A frequency of 60Hz was referenced using the keypad of the VFD and the generator was under
no load. The experiment showed that a frequency of 61.449Hz was always attained when the
system was stable. This means that there is an error of about 1.4Hz in every case. Hence, in order
for the generator to spin at exactly 60Hz, the VFD must be set to about 58.6Hz. The measured
frequency was 59.97Hz.
The initial frequency was set to be 60Hz with a base load of 2kW. The measured frequency is
obtained from the tachometer. When the relay switch turns on an external load, a red indicator
light comes on. This light was used to determine how many loads were turned on. The PLC was
used in place of the electronic load controller for this test. The program waits a few seconds to
check if the frequency is above 60.5Hz before turning on a load.
Table
From the table, it shows that the frequency was always brought close to 60Hz in every case. The
loads were activated one at a time in order to prevent the frequency from fluctuating a lot. The
electronic load controller would have a greater advantage over the PLC in that it would precisely
increase or decrease the load according to the frequency. Thus, the frequency would be better
controlled. Also, fewer relay switches would be needed since only one or two larger size loads
would be used rather than four to five smaller loads as in the case of the PLC.
The first step in programming the PIC was to configure the I/O ports, enable the D/A converter,
set the clock speed and set the analog or digital input pins. Only GPIO 0 was used as an input
port, the rest of the ports were set as outputs. GPIO 0 allowed the synchronous sine wave to be
used within the PIC. Hence, TRISIO was set as 0b00000001, where 1 sets the port to input and 0
as output. The ADCON0 register is responsible for setting up the D/A conversion and everything
associated with it. Bit 7 determines whether most significant bits (0) or least significant bits (1)
are read. I chose MSB since the error would only be a small fraction. Therefore, the digital data
would be 8 bit long. To simplify the circuit, I also chose Vdd (5V) as the reference voltage. The
reference voltage is Bit 6. Bits 5 and 4 have no functions and are assigned don’t care bits. Bits 3
to 2 basically turn on the port to be used as the analog input. I used AN0 as the input and
therefore set Bits 3 and 2 as ‘0’ and ‘0’. Bit 1 enables the D/A process to begin and Bit 0 turns on
the D/A converter. The ANSEL register was used to set the clock speed and to select the type of
input (analog or digital). Bit 7 had no function and was assigned a zero bit. Bit 6:4 determined
how fast the input wave was being sampled. Bits 3:0 set which pin was connected to the analog
input. This was set as ‘0001’ since AN0 was used as the input.
Tests:
A simple LED was used to test if the A/D converter was actually working. A simple program
was written that turned on an LED when the sample was positive and turned it off when it was
negative and vice versa. This was a simple yet effective test since the LED remained on for the
period when the sine wave was positive and remained off for the period when the sine wave was
negative. By slowing down the frequency, I could actually time how long the LED remained
on/off. The time came out to be exactly the same. This showed that the A/D converter was
working well.
The sine wave is first sampled by setting bit ‘1’ of ADCON0 to 1. Two variables are used to
store the previous sample and the new sample. The variable count is used to actually create the
sawtooth waveform. The value of count is either reset to zero when there is a zero crossing or
incremented by one when there is no zero crossing. The zero crossing is determined by checking
two consecutive samples. One sample has to be above zero and the other sample has to be below
zero. However, the program failed to work well when I used zero. By changing zero to one, the
program was able to process the information better.
Tests
Similar to the test above, an LED was used to check for the zero crossing. Basically, the LED
lights up when there is a zero crossing and turns off when there is no zero crossing. A slight
delay was used to enable me to actually detect when the light comes on. Also, the frequency was
slowed down significantly (about 1-0.5 Hz) to allow enough samples to detect the zero crossing.
This test proved to be vital since comparing the samples to zero failed turn on the LED.
However, comparing the samples to one allowed the LED to turn on.
Pulses are used to send the digital data to the D/A chip. Before data is latched into the DAC’s
input register, the chip select pin must be set low in order to write data. After all bits have been
sent, the chip select must be raised in order to latch the data into the input register. Also, the
LDAC was tied to ground. This enabled the LDAC to always be set to low. LDAC is used to
transfer the input latch register to the output of the DAC (Vout).
The data is stored in the chip by the rising edge of the clock. A slight delay is forced to allow
some time to go by before clocking the data to enable the rising edge to not miss the data. This
was done as a precaution to prevent the rising edge of the clock from missing the data. MCP
4801 uses a total of 16bits. Bits 15:12 set the configuration of the D/A converter. Bit 15 when set
to ‘1’ allows data to be written to the D/A converter. Bit 14 has no function and therefore set as
don’t care bit. Bit 13 is set to 0 to have a gain of 2 and bit 12 was set as 0 to allow the chip to
make the output available. The next 12 bits are data bits. However, since the MCP 4801 only
uses 8 bits, bits 3:0 have no functions and therefore assigned zero.
Tests:
The transfer of data was captured on the oscilloscope to ensure that the correct data is being
clocked at the right time and that chip select is set to the correct bit. An 8 bit binary number was
used as the data that needed to be converted into an analog number. The waveform shown in
figure showed that the binary number was being written in the correct order. The graph also
shows that data was always clocked on the rising edge of the clock pulse. Figure shows that the
chip select pin is low throughout the 16 clock pulses. This evidently showed that data was being
latched onto the input register of the DAC. The output from the DAC was the last test. An output
was read, which meant data was being sent out of the DAC.
Figure Top half showing clock pulses, bottom half showing data being sent
Figure Top half showing clock pulses, bottom half showing chip select
A frequency of 117.6Hz suggests an error of about 2.4Hz. this error is mainly due to the number
of times the sine wave is being sampled during one period. From the fig, the number of steps
suggest that there are 4 samples every half a period. Also, from fig, it takes about 1.87ms to
sample the input once and to transmit the data. Half a period of a 60Hz sine wave is 8.33ms.
therefore, there are about 4.5 samples during every half a period of the sine wave.
Increasing the number of samples would significantly reduce the error. A much faster chip would
enable the program to run at a faster rate and therefore be able to sample much more.
A scaling factor of 50 was used in order to magnify the output voltage of the DAC. The reason is
that since the voltage is being compared to 5V (Vref), a 3 bit number would only be a few mV.