LDC0851 Differential Inductive Switch: 1 Features 3 Description
LDC0851 Differential Inductive Switch: 1 Features 3 Description
LDC0851 Differential Inductive Switch: 1 Features 3 Description
LDC0851
SNOSCZ7A – DECEMBER 2015 – REVISED JANUARY 2016
4 Simplified Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LDC0851
SNOSCZ7A – DECEMBER 2015 – REVISED JANUARY 2016 www.ti.com
Table of Contents
1 Features .................................................................. 1 8.2 Functional Block Diagram ....................................... 10
2 Applications ........................................................... 1 8.3 Feature Description................................................. 11
3 Description ............................................................. 1 8.4 Device Functional Modes........................................ 18
4 Simplified Schematic............................................. 1 9 Application and Implementation ........................ 19
9.1 Application Information............................................ 19
5 Revision History..................................................... 2
9.2 Typical Application ................................................. 21
6 Pin Configuration and Functions ......................... 3
10 Power Supply Recommendations ..................... 28
7 Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4 11 Layout................................................................... 29
11.1 Layout Guidelines ................................................. 29
7.2 ESD Ratings ............................................................ 4
11.2 Layout Example .................................................... 29
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information .................................................. 4 12 Device and Documentation Support ................. 31
7.5 Electrical Characteristics........................................... 5 12.1 Device Support...................................................... 31
7.6 Interface Voltage Levels ........................................... 5 12.2 Community Resources.......................................... 31
7.7 Timing Requirements ................................................ 6 12.3 Trademarks ........................................................... 31
7.8 Typical Characteristics .............................................. 7 12.4 Electrostatic Discharge Caution ............................ 31
12.5 Glossary ................................................................ 31
8 Detailed Description ............................................ 10
8.1 Overview ................................................................. 10 13 Mechanical, Packaging, and Orderable
Information ........................................................... 31
5 Revision History
Changes from Original (December 2015) to Revision A Page
DSG Package
8-Pin WSON with DAP
Top View
LCOM 1 8 VDD
LSENSE 2 7 GND
DAP
LREF 3 6 EN
ADJ 4 5 OUT
Pin Functions
PIN (1)
TYPE DESCRIPTION
NAME NO.
LCOM 1 A Common coil input
LSENSE 2 A Sense coil input
LREF 3 A Reference coil input
ADJ 4 A Threshold adjust pin
OUT 5 O Switch output
EN 6 I Enable input
GND 7 G Ground
VDD 8 P Power Supply
DAP DAP G Connect to Ground for improved thermal performance (2)
7 Specifications
7.1 Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VDD Supply Voltage Range 3.6 V
Voltage on LSENSE, LREF, and EN -0.3 3.6 V
Vi
Voltage on ADJ and LCOM -0.3 2 V
IA Current LSENSE, LREF, and VOUT 5 mA
TJ Junction Temperature -55 150 °C
Tstg Storage Temperature -65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report (SPRA953).
(1) Electrical Characteristics Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions
result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical
tables under conditions of internal self-heating where TJ > TA. Absolute Maximum Ratings indicate junction temperature limits beyond
which the device may be permanently degraded, either mechanically or electrically.
(2) Limits are ensured by testing, design, or statistical analysis at 25°C. Limits over the operating temperature range are ensured through
correlations using statistical quality control (SQC) method.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
(4) Refer to section Active Mode for a description and calculation of the various supply currents.
(5) See Sensor Design for sensor guidance.
(6) Two matched 10 mm diameter sensors were used with a switching distance of 3 mm. See Hysteresis for more information.
VDD
tD
EN
tD
LREF
tD
OUT Power-on Start State 1st Sample Output 2nd Sample Output
ttDELAYt
Refer to Power-Up Conditions for more information on the Power-On Start State.
VDD
t
LCOM
EN
Metal
1st Sample Output
OUT
Detected
Power Down State (HIGH) 1st sample in progress
Metal Detected (LOW)
(LOW) (HIGH)
t
tCONVERSION
ttAMTt
t(1st Sample)t
ttSMTt
12 4
Switch ON Switch ON
Switch OFF 3.5 Switch OFF
10
Switching Distance (mm)
6 2
1.5
4
1
2
0.5
0 0
1 2 3 4 5 6 7 8 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
Target Distance to LREF Coil (mm) D001
ADJ Code D002
Basic Operation Mode ADJ Code = 0 Threshold Adjust Mode No reference target
Coil diameter = 10 mm Coil diameter = 10 mm
Figure 3. Switching Distance vs. LREF Target Distance Figure 4. Switching Distance vs. ADJ code
120 80
Switch ON (dcoil = 6 mm) Switch ON (dcoil = 6 mm)
Switching Distance (% of coil diameter)
60 40
30
40
20
20
10
0 0
0 20 40 60 80 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
Target Distance to LREF Coil (% of coil diameter) D003
ADJ Code D004
Basic Operation Mode ADJ Code = 0 Threshold Adjust Mode No reference target
Coil diameter = 6 mm, 15 mm, 29 mm Coil diameter = 6 mm, 15 mm, 29 mm
Figure 5. Normalized Switching Distance vs. LREF Target Figure 6. Normalized Switching Distance vs. ADJ Code
Distance
240 100
dcoil = 29 mm
dcoil = 15 mm 90
220
dcoil = 6 mm
Sensor Inductance (Ls / Lr%)
80
Sensor Frequency (fs / fr%)
200 70
60
180
50
160
40
140 30
20 dcoil = 29 mm
120 dcoil = 15 mm
10
dcoil = 6 mm
100 0
0 20 40 60 80 100 0 20 40 60 80 100
Target Distance to LSENSE Coil (% of coil diameter) D005
Target Distance to LSENSE Coil (% of coil diameter) D006
LSENSE frequency (fs) varied LREF frequency (fr) fixed LSENSE inductance (Ls) varied LREF inductance (Lr) fixed
Inductance (µH)
Inductance (µH)
12 12
10 Valid Region 10 Valid Region
8 8
6 6
4 4
2 2
ISENSOR > 4.35 mA ISENSOR > 6 mA
0 0
0 5 10 15 20 0 5 10 15 20
Sensor Frequency (MHz) D007
Sensor Frequency (MHz) D008
Figure 9. Sensor Design Space for VDD = 1.8 V Figure 10. Sensor Design Space for VDD = 3.3 V
10 1.5
2 µH
20 µH
Dynamic Supply Current (mA)
200 µH 1.4
Sensor Current (mA)
1.3
1
1.2
-40°C 50°C
1.1 -25°C 75°C
0°C 100°C
25°C 125°C
0.1 1
1.7 2.2 2.7 3.2 3.7 1.7 2.2 2.7 3.2 3.7
VDD (V) D009
VDD (V) D010
CTOTAL = 100 pF CBOARD = 12 pF
ƒSENSOR = 30 MHz
Figure 11. ISENSOR vs. VDD
Figure 12. IDYN vs. VDD
0.7 10
-40°C 50°C d 25°C 75 - 100°C
-25°C 75°C 25 - 50°C 100 - 125°C
0.65 0°C 100°C 50 - 75°C
Static Supply Current (mA)
25°C 125°C 1
Shutdown Current (µA)
0.6
0.55 0.1
0.5
0.01
0.45
0.4 0.001
1.7 2.2 2.7 3.2 3.7 1.7 2.1 2.5 2.9 3.3 3.7
VDD (V) D011
VDD (V) D012
Figure 13. ISTATIC vs. VDD Figure 14. ISD vs. VDD
10
-4
-6
1
Figure 15. ISENSOR vs. ƒSENSOR Figure 16. ƒSENSOR Shift vs. VDD
8 Detailed Description
8.1 Overview
The LDC0851 is an inductance comparator with push/pull output. It utilizes a sensing coil and a reference coil to
determine the relative inductance in a system. The push/pull output (OUT) switches low when the sense
inductance drops below the reference and returns high when the reference inductance is higher than the sense
inductance. Matching the sense and reference coils is important to maintain a consistent switching distance over
temperature and to compensate for other environmental factors. The LDC0851 features internal hysteresis to
prevent false switching due to noise or mechanical vibration at the switching threshold. The switching threshold is
set by the sensor characteristics and proximity to conductive objects, which is considered Basic Operation Mode
described further in section Basic Operation Mode. The LDC0851 also features a Threshold Adjust Mode where
an offset is subtracted from the reference inductance to change the effective switching point as described in
section Threshold Adjust Mode.
The sensing coil is connected across the LSENSE and LCOM pins and the reference coil is connected across
the LREF and LCOM pins. A sensor capacitor is connected from LCOM to GND to set the sensor oscillation
frequency. The sensor capacitor is common to both LSENSE and LREF making the inductance measurement
differential.
LDC0851
Differential
LDC Core
Sense Output High
Coil LSENSE (LS > Adjusted LR)
Inductance
LS
Converter
+
LCOM OUT
Sensor
Cap
+ Adjusted LR
±
Inductance
LREF Output Low
Converter ± (LS < Adjusted LR)
Reference
Coil
Switch
Mode Select
LR (Inductance)
Output Low
(LS < LR)
Target Distance
’ 0
dswitch = d
Differential LDC0851
Sense
LDC Core
Movable
Coil LSENSE
Metal Target
Inductance
LS
Converter
+
LCOM OUTPUT
Sensor
Fixed Cap + LR
±
Reference LREF Inductance
Converter ±
Reference
Coil
ADJ Offset
4-bit ADC Power EN
Management
CBYP
GND
Figure 17. Basic Operation Mode Diagram for Distance Sensing With Reference Target
LR (Inductance)
LS (Inductance)
Output Low
(LS < LR)
Target Distance
’ 0
dswitch § 0.8 x dcoil
Differential LDC0851
Sense
LDC Core
Movable
Metal Target Coil LSENSE
Inductance
LS
Converter
+
LCOM OUTPUT
Sensor
Cap + LR
±
LREF Inductance
Converter ±
Reference
Coil
ADJ Offset
4-bit ADC Power EN
Management
CBYP
GND
Figure 18. Basic Operation Mode Diagram for Distance Sensing With Mismatched Coils
Adjusted LR
(ADJ = 15) Output Low
(LS < Adjusted LR)
Target Distance
’ 0
dswitch § 0.4x(dcoil) dswitch
(ADJ = 1) (ADJ = 15)
... Differential
LDC Core
LDC0851
Movable Sense
Metal Target Coil LSENSE
Inductance LS
Converter
+
LCOM OUTPUT
Switching distance set
by ADJ Value Sensor
Cap Adjusted LR
+ ±
LREF Inductance
No Target on
Converter ±
Reference Reference
Coil
Mode Select
VDD 0: Basic Operation VDD
1 ± 15: Threshold Adjust VDD
R1
ADJ Offset
4-bit ADC Power EN
Management
R2 CBYP
GND
Figure 19. Threshold Adjust Mode for Distance Sensing Using Side by Side Coils
Adjusted LR
(ADJ = 15) Output Low
(LS < Adjusted LR)
Target Distance
’ 0
dswitch § 0.3x(dcoil) dswitch
(ADJ = 1) (ADJ = 15)
LDC0851
... Differential
LDC Core
LSENSE
Inductance LS
Converter
Movable +
LCOM OUTPUT
Metal Target
Sensor
Adjusted LR
Sense Ref Cap + ±
Coil Coil LREF Inductance
Converter ±
Switching distance set by ADJ
Value and separation between
Mode Select
Sense and Ref coils
VDD 0: Basic Operation VDD
1 ± 15: Threshold Adjust
VDD
R1
ADJ Offset EN
4-bit ADC Power
Management
R2 CBYP
GND
Figure 20. Threshold Adjust Mode for Distance Sensing Using Stacked Coils
To get the most sensing range with stacked coils the spacing between the sensing coil and reference coil (height
= h) should be maximized as shown in Figure 21. See section Stacked Coils for more information on the layout
of stacked coils.
Layers 1, 2
Sense Coil
Layers 3, 4
Reference Coil
The switching distance for each ADJ code can be approximated with the following formula:
§ ADJCode ·
dswitch dcoil u 0.4 u ¨ 1 ¸
© 16 ¹
where:
• dswitch is the approximated switching distance threshold
• dcoil is the coil diameter, in the same units as dswitch
• ADJCode is the desired value from Table 1 (1)
For example, consider a coil with a diameter of 10 mm: An ADJ code of 1 will yield a switching distance of 3.75
mm and for a code of 15 a switching distance of 0.25 mm. This method helps reduce the effort needed to design
the coil ratio precisely for a specific switching distance. It should be noted that the maximum sensing distance is
determined almost entirely by the diameter of the coil for circular coils or by the minimum outer dimension for
rectangular coils.
8.3.4 Hysteresis
The LDC0851 includes hysteresis for the switching threshold. The switch point is determined by the inductance
ratio between LSENSE and LREF. When the ratio of LSENSE to LREF drops below 99.6%, the device switches
ON (output low). When LSENSE/LREF becomes greater than 100.4% it switches OFF (output high). The
hysteresis window is therefore specified 0.8% from the switch ON point.
Output
State
VOH
VOL
LSENSE / LREF
tLHYSTt
For proximity sensing, hysteresis may also be approximated in terms of distance as shown in Figure 23.
Output
State tdTOLt
VOH
VOL
Target
Distance
tdHYSTt
Switch ON Switch OFF
(dswitch) (drelease)
No No Metal/
Metal
Metal Sensor Fault
HIGH
LOW
tstart + tconversion t
where:
• Idyn is the dynamic current drawn by the device and board parasitics
• ƒSENSOR is the sensor frequency calculated from Equation 6
• CBOARD is the parasitic capacitance of the board, see Figure 25 (3)
Sensor current is the AC current required to drive an external LC sensor. Sensor current varies with both the
frequency and inductance of the sensor and is given by the following equation:
1
Isensor
u /SENSOR u ¦SENSOR
where:
• ISENSOR is current required to drive the sensor
• LSENSOR is the measured inductance of the sensor
• ƒSENSOR is the sensor frequency calculated from Equation 6 (4)
The total active supply current is given by the following equation:
I DD Idyn Istatic Isensor
where:
• IDD is the total active supply current
• Idyn is the dynamic current drawn by the device as given by Equation 3
• Istatic is the static current as given in the electrical table
• ISENSOR is current required to drive the sensor as given by Equation 4 (5)
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
Board Pin
Sensor Components
Parasitic Parasitic
LSENSE LDC0851
LREF
LREF
CBOARD CIN_REF
Figure 25. Sensor Components, Board Parasitics, and Package Parasitics Diagram
where:
• ƒSENSOR is the calculated oscillation frequency with no target present
• LSENSOR is the inductance of the sense coil or reference coil
• CTOTAL is sum of external sensor, board parasitic, and pin parasitic capacitances connected to LCOM, refer to
Figure 25 (6)
where:
• LSENSOR is the inductance of the LSENSE coil or LREF coil
• ISENSOR_MAX is given in the electrical table (7)
4. Calculate the externally placed sensor capacitor:
1
CSENSOR CBOARD CIN_COM
( S u ¦SENSOR 2 2 u LSENSOR )
where:
• CBOARD is the parasitic capacitance introduced by the board layout (~4 pF for good layout)
• CIN_COM is the parasitic pin capacitance of LCOM specified as 12 pF in the electrical table (8)
Rotation (,)
LS LR
LC
where:
• Gear Speed (rpm) is the calculated speed of the gear
• ƒ SENSOR is the sensor frequency given by Equation 6
• # gear teeth is the total number of events per rotation (9)
A gear with 8 teeth and sensor frequency of 15MHz could reliably measure a gear rotational speed of 6500 rpm.
Equal Inductance
(Metal Coverage = 50%)
LR LS
Min inductance
(Metal Coverage = 100%)
Figure 29. Threshold Adjust Design Space for 10mm Coil Example
3-V Battery
Wake up LDC
VDD EN
Sense
Coil
LSENSE R1
ADJ
LDC0851 R2
µC
LCOM
Sensor
Cap
High/Low Output
LREF OUT
Reference GND
Coil
IDD
IDD
2
ISD ISD
Figure 31. LDC0851 Supply Current vs. Time During Duty Cycle Operation
VDD
LDC0851
Fast 0.1 µF
Supply
(> 4.2 mV / µs)
EN Power
Management
GND DAP
For supply ramp rates slower than 4.2 mV/µs, an RC low pass filter must be added to the enable input (EN) as
shown in Figure 33. Alternatively, the EN pin may be tied to a nanotimer or microcontroller to wake up the
LDC0851 after VDD has ramped to its nominal value.
VDD
LDC0851
Slow 0.1 µF
Supply
(< 4.2 mV / µs)
R EN Power
Management
C
GND DAP
For applications that require low power, the EN pin may toggled with a GPIO or nanotimer to duty cycle the
device and achieve ultra-low power consumption. Although the device may be power cycled to achieve a similar
effect, some systems may not have a clean GPIO to supply the LDC0851 or the filtering on the supply may add a
time constant delay which can make the use of the EN pin much more efficient and desirable for duty cycled
applications. Refer to Low Power Operation for a detailed design example.
11 Layout
LSENSE Counter-Clockwise
Out Spiral on Layer 1
LCOM
Clockwise Out
Spiral on Layer 2
Sensor
Capacitor Via from Layer 2 to
Layer 3
Clockwise Out
Spiral on Layer 3
Via from Layer 3 to
Layer 4
LREF
Counter-Clockwise
Out Spiral on Layer 4
12.3 Trademarks
E2E is a trademark of Texas Instruments.
Webench is a registered trademark of Texas Instruments.
Excel is a registered trademark of Microsoft Corporation.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
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PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
LDC0851HDSGR ACTIVE WSON DSG 8 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 0851
& no Sb/Br)
LDC0851HDSGT ACTIVE WSON DSG 8 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 0851
& no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 22-Jan-2016
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 22-Jan-2016
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 22-Jan-2016
Pack Materials-Page 2
PACKAGE OUTLINE
DSG0008A SCALE 5.500
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
2.1 B
A
1.9
0.3
0.2
0.4
0.2
OPTIONAL TERMINAL
TYPICAL
0.8 MAX C
SEATING PLANE
0.05
0.08 C
0.00
EXPOSED
THERMAL PAD 0.9 0.1 (0.2) TYP
4 5
6X 0.5
2X
9
1.5 1.6 0.1
8
1
SEE OPTIONAL
TERMINAL 0.3
8X
PIN 1 ID 0.4 0.2
8X
0.2 0.1 C A B
0.05 C
4218900/B 09/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
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EXAMPLE BOARD LAYOUT
DSG0008A WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
8X (0.25)
(0.55)
SYMM 9
(1.6)
6X (0.5)
5
4
(1.9)
4218900/B 09/2017
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
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EXAMPLE STENCIL DESIGN
DSG0008A WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
8X (0.25)
(0.45)
SYMM
9
6X (0.5) (0.7)
5
4
(1.9)
EXPOSED PAD 9:
87% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:25X
4218900/B 09/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
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