TC1321

10-Bit Digital-to-Analog Converter with Two-Wire Interface

Features General Description
• 10-Bit Digital-to-Analog Converter The TC1321 is a serially accessible, 10-bit voltage
• 2.7-5.5V Single Supply Operation output, digital-to-analog converter (DAC). The DAC
• Simple SMBus/I2CTM Serial Interface produces an output voltage that ranges from ground to
an externally supplied reference voltage. It operates
• Low Power Operation
from a single power supply that can range from 2.7V to
- Normal Mode: 350 µA 5.5V, making it ideal for a wide range of applications.
- Shutdown Mode: 0.5 µA Built into the part is a Power-on Reset (POR) function
• Temperature Range: 40°C to +85°C that ensures that the device starts at a known condition.
• 8-Pin SOIC and 8-Pin MSOP Packages Communication with the TC1321 is accomplished via a
simple 2-wire SMBus/I2C compatible serial port, with
Applications the TC1321 acting as a slave only device. The host can
enable the SHDN bit in the CONFIG register to activate
• Programmable Voltage Sources the Low Power Standby mode.
• Digital Controlled Amplifiers/Attenuators
• Process Monitoring and Control Package Type

8-Pin MSOP and

8-Pin SOIC (Narrow)
V V
REF 1 8 DD
SDA 2 7 DAC-OUT
TC1321
SCL 3 6 NC
VSS 4 5 V
OUT

Typical Application

VIN
VDD
8

TC1321
–
VREF VOUT VADJUST
VREF 1 DAC 5 +

Serial Port

3
SCL 2
SDA

Microcontroller

 2010 Microchip Technology Inc. DS21387C-page 1

TC1321
Functional Block Diagram

VDD Configuration Register TC1321

SDA
Serial Port Control
Interface Circuit DAC-OUT
SCL

Data Register DAC V

OUT

VREF VSS

DS21387C-page 2  2010 Microchip Technology Inc.

 TC1321
1.0 ELECTRICAL *Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. These
CHARACTERISTICS are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
Absolute Maximum Ratings* operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
Supply Voltage (VDD) ........................................................+6V extended periods may affect device reliability.
Voltage on any Pin ....................(VSS – 0.3V) to (VDD + 0.3V)
Current on any Pin ......................................................±50 mA
Package Thermal Resistance (JA)....................... 330°C C/W
Operating Temperature (TA)................................... See Below
Storage Temperature (TSTG) .........................-65°C to +150°C

ELECTRICAL SPECIFICATIONS
Electrical Characteristics: VDD = 2.7V to 5.5V, -40°C  TA  +85°C, VREF = 1.2 V unless otherwise noted.

Symbol Parameter Min Typ Max Unit Test Conditions

Power Supply
VDD Supply Voltage 2.7 — 5.5 V
IDD Operating Current — 350 500 µA VDD = 5.5V, VREF = 1.2V
Serial Port Inactive (Note 1)
IDD- Standby Supply Current — 0.1 1 µA VDD = 3.3V
STANDBY Serial Port Inactive (Note 1)

Static Performance - Analog Section

Resolution — — 10 Bits
INL Integral Non-Linearity at FS, TA = +25°C — — ±4.0 LSB (Note 2)
FSE Full Scale Error — — ±3 %FS
DNL Differential Non-Linearity, TA = +25°C -1 — +2 LSB All Codes (Note 2)
VOS Offset Error at VOUT — ±0.3 ±8 mV (Note 2)
TCVOS Offset Error Tempco at VOUT — 10 — µv/°C
PSRR Power Supply Rejection Ratio — 80 — dB VDD at DC
VREF Voltage Reference Range 0 — VDD – 1.2 V
IREF Reference Input Leakage Current — — ±1.0 µA
VSW Voltage Swing 0 — VREF V VREF  (VDD – 1.2V)
ROUT Output Resistance @ VOUT — 5.0 —  ROUT ()
IOUT Output Current (Source or Sink) — 2 — mA
ISC Output Short-Circuit Current — 30 50 mA Source
VDD = 5.5V — 20 50 mA Sink
Dynamic Performance
SR Voltage Output Slew Rate — 0.8 — V/µs
tSETTLE Output Voltage Full Scale Settling Time — 10 — µs
tWU Wake-up Time — 20 — µs
Digital Feed Through and Crosstalk — 5 — nV-s SDA = VDD, SCL = 100 kHz
Serial Port Interface
VIH Logic Input High 2.4 — VDD V
VIL Logic Input Low — — 0.6 —
VOL SDA Output Low — — 0.4 V IOL = 3 mA (Sinking Current)
— — 0.6 V IOL = 6 mA
Note 1: SDA and SCL must be connected to VDD or VSS.
2: Measured at VOUT 50 mV referred to VSS to avoid output buffer clipping.

 2010 Microchip Technology Inc. DS21387C-page 3

TC1321
ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: VDD = 2.7V to 5.5V, -40°C  TA  +85°C, VREF = 1.2 V unless otherwise noted.

Symbol Parameter Min Typ Max Unit Test Conditions

CIN Input Capacitance (SDA and SCL pins) — 5 0.4 pF
ILEAK I/O Leakage — — ±1.0 µA
Serial Port AC Timing
fSMB SMBus Clock Frequency 10 — 100 kHz
tIDLE Bus Free Time Prior to New Transition 4.7 — — µs
tH(START) START Condition Hold Time 4.0 — — µs
tSU(START) START Condition Setup Time 4.7 — — µs 90% SCL to 10% SDA
(for Repeated START
Condition)
tSU(STOP) STOP Condition Setup Time 4.0 — — µs
tH-DATA Data In Hold Time 100 — — ns
tSU-DATA Data In Setup Time 100 — — ns
tLOW Low Clock Period 4.7 — — µs 10% to 10%
tHIGH High Clock Period 4 — — µs 90% to 90%
tF SMBus Fall Time — — 300 ns 90% to 10%
tR SMBus Rise Time — — 1000 ns 10% to 90%
tPOR Power-on Reset Delay — 500 — µs VDD VPOR (Rising Edge)
Note 1: SDA and SCL must be connected to VDD or VSS.
2: Measured at VOUT 50 mV referred to VSS to avoid output buffer clipping.

TEMPERATURE CHARACTERISTICS
Electrical Specifications: VDD = 2.7V to 5.5V, -40°C  TA  +85°C, VREF = 1.2V unless otherwise noted.

Parameters Symbol Min Typ Max Units Conditions

Temperature Ranges
Operating Temperature Range TA -40 — +85 °C
Storage Temperature Range TA -65 — 150 °C

Thermal Package Resistances

Thermal Resistance, 8L SOIC JA — 149.5 — °C/W
Thermal Resistance, 8L MSOP JA — 211 — °C/W

DS21387C-page 4  2010 Microchip Technology Inc.

 TC1321
2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.

TABLE 2-1: PIN FUNCTION TABLE

Pin Number Pin Name Type Description

1 VREF Input Voltage Reference Input Pin

2 SDA Bi-Directional Serial Data Input/Output Pin
3 SCL Input Serial Clock Input Pin
4 VSS Power Ground Reference Pin
5 VOUT Output Buffered Analog Voltage Output Pin
6 NC None No connection
7 DAC-OUT Output Unbuffered Analog Voltage Output Pin
8 VDD Power Positive Power Supply Input Pin

2.1 External Voltage Reference Input 2.6 No Connection (NC)

(VREF) There is not a connection at this pin.
Voltage Reference Input can range from 0V to 1.2V
below VDD. 2.7 Output (DAC-OUT)
Unbuffered DAC output voltage. This voltage is a
2.2 Bi-Directional Serial Data Input function of the reference voltage and the contents of
and Output (SDA) the DATA register. This output is unbuffered and care
Serial data is transferred on the SMBus in both must be taken that the pin is connected only to a
directions using this pin. high-impedance node.

2.3 Serial Clock Input (SCL) 2.8 Positive Power Supply Input (VDD)
SMBus/I2C serial clock. Clocks data into and out of the See the Electrical Specifications table.
TC1321.

2.4 Supply Power Ground (VSS)

The ground reference pin.

2.5 Output (VOUT)

Buffered DAC output voltage. This voltage is a function
of the reference voltage and the contents of the DATA
register.

 2010 Microchip Technology Inc. DS21387C-page 5

TC1321
NOTES:

DS21387C-page 6  2010 Microchip Technology Inc.

 TC1321
3.0 DETAILED DESCRIPTION 3.2 Output Amplifier
The TC1321 is a monolithic 10-bit digital-to-analog The TC1321 DAC output is buffered with an internal
converter that is designed to operate from a single unity gain rail-to-rail input/output amplifier with a typical
supply that can range from 2.7V to 5.5V. The DAC slew rate of 0.8V/µs. Maximum full scale transition
consists of a data register (DATA), a configuration settling time is 10 µsec to within ±1/2LSB when loaded
register (CONF), and a current output amplifier. The with 1 k in parallel with 100 pF.
TC1321 uses an external reference which also
determines the maximum output voltage. 3.3 Standby Mode
The TC1321 uses a current steering DAC based on an The TC1321 allows the host to put it into a Low Power
array of matched current sources. This current, along (IDD = 0.5 µA, typically) Standby mode.
with a precision resistor, converts the contents of the
DATA Register and VREF into an output voltage, VOUT, In this mode, the D/A conversion is halted. The SMBus
that is given by: port operates normally. Standby mode is enabled by
setting the SHDN bit in the CONFIG register. Table 3-1
DATA summarizes this operation.
V OUT = VREF  ----------------
1024
TABLE 3-1: STANDBY MODE OPERATION
SHDN Bit Operating Mode
3.1 Reference Input
0 Normal
The reference pin, VREF, is a buffered high-impedance
input. Because of this, the load regulation of the 1 Standby
reference source needs only to be able to tolerate
leakage levels of current (less than 1 µA). VREF 3.4 SMBus Slave Address
accepts a voltage range from 0 to (VDD – 1.2V). Input
The TC1321 is internally programmed to have a default
capacitance is typically 10 pF.
SMBus address value of 1001 000b. Seven other
addresses are available by custom order (contact
Microchip Worldwide Sales and Service). See
Figure 3-1 for the location of address bits in SMBus
protocol.

 2010 Microchip Technology Inc. DS21387C-page 7

TC1321

Write 1-Byte Format

S Address R/W ACK Command ACK Data ACK P
7-Bits 0 8-Bits 8-Bits
Slave Address Command Byte: selects Data Byte: data goes
which register you are into the register set
writing to. by the command byte.
Write 2-Byte Format
S Address R/W ACK Command ACK Data ACK Data ACK P
7-Bits 0 8-Bits 8-Bits 8-Bits
Slave Address Command Byte: selects Data Byte: data goes
which register you are into the register set
writing to. by the command byte.

Read 1-Byte Format

S Address R/W ACK Command ACK S Address R/W ACK Data NACK P
7-Bits 0 8-Bits 7-Bits 1 8-Bits
Slave Address Command Byte: selects Slave Address: repeated Data Byte: reads from
which register you are due to change in data the register set by the
reading from. flow direction. command byte.
Read 2-Byte Format
S Address R/W ACK Command ACK S Address R/W ACK Data ACK Data NACK P
7-Bits 0 8-Bits 7-Bits 1 8-Bits 8-Bits
Slave Address Command Byte: selects Slave Address: repeated Data Byte: reads from
which register you are due to change in data the register set by the
reading from. flow direction. command byte.

Receive 1-Byte Format

S Address R/W ACK Data NACK P
7-Bits 1 8-Bits
S = START Condition Data Byte: reads data from
P = STOP Condition the register commanded by
Shaded = Slave Transmission the last read-byte or write-
byte transmission.

Receive 1-Byte Format

S Address R/W ACK Data ACK Data NACK P
7-Bits 1 8-Bits 8-Bits
S = START Condition Data Byte: reads data from
P = STOP Condition the register commanded by
Shaded = Slave Transmission the last read-byte or write-
byte transmission.

FIGURE 3-1: SMBus/I2C Protocols.

DS21387C-page 8  2010 Microchip Technology Inc.

 TC1321
4.0 SERIAL PORT OPERATION 4.1 START Condition (START)
The Serial Clock input (SCL) and bi-directional data The TC1321 continuously monitors the SDA and SCL
port (SDA) form a 2-wire bi-directional serial port for lines for a START condition (a HIGH to LOW transition
programming and interrogating the TC1321. The of SDA while SCL is HIGH), and will not respond until
following conventions are used in this bus architecture. this condition is met.

TABLE 4-1: TC1321 SERIAL BUS 4.2 Address Byte

CONVENTIONS
Immediately following the START condition, the host
Term Explanation must transmit the address byte to the TC1321. The
Transmitter The device sending data to the bus. 7-bit SMBus address for the TC1321 is 1001000. The
7-bit address transmitted in the serial bit stream must
Receiver The device receiving data from the bus.
match for the TC1321 to respond with an Acknowledge
Master The device that controls the bus: initiating (indicating the TC1321 is on the bus and ready to
transfers (START), generating the clock, and accept data). The eighth bit in the Address Byte is a
terminating transfers (STOP) Read-Write bit. This bit is a 1 for a read operation or 0
Slave The device addressed by the master. for a write operation. During the first phase of any
START A unique condition signaling the beginning of transfer, this bit will be set = 0 to indicate that the
a transfer, indicated by SDA falling (High - command byte is being written.
Low) while SCL is high.
STOP A unique condition signaling the end of a 4.3 Acknowledge (ACK)
transfer, indicated by SDA rising (Low - High)
while SCL is high. Acknowledge (ACK) provides a positive handshake
between the host and the TC1321. The host releases
ACK A receiver acknowledges the receipt of each
SDA after transmitting eight bits, then generates a ninth
byte with this unique condition. The receiver
clock cycle to allow the TC1321 to pull the SDA line
drives SDA low during SCL, high of the ACK
clock pulse.The master provides the clock LOW to Acknowledge that it successfully received the
pulse for the ACK cycle. previous eight bits of data or address.
Busy Communication is not possible because the
bus is in use. 4.4 Data Byte
Not Busy When the bus is IDLE, both SDA and SCL will After a successful ACK of the address byte, the host
remain high. must transmit the data byte to be written or clock out
Data Valid The state of SDA must remain stable during the data to be read. (See the appropriate timing
the High period of SCL in order for a data bit diagrams.) ACK will be generated after a successful
to be considered valid. SDA only changes write of a data byte into the TC1321.
state while SCL is low during normal data
transfers. See START and STOP conditions.
4.5 Stop Condition (STOP)
All transfers take place under control of a host, usually
a CPU or microcontroller, acting as the master, which Communications must be terminated by a STOP
provides the clock signal for all transfers. The TC1321 condition (a LOW to HIGH transition of SDA while SCL
always operates as a slave. The serial protocol is is HIGH). The STOP condition must be communicated
illustrated in Figure 4-1. All data transfers have two by the transmitter to the TC1321. Refer to Figure 4-1,
phases; all bytes are transferred MSB first. Accesses for serial bus timing.
are initiated by a START condition (START), followed
by a device-address byte and one or more data bytes.
The device-address byte includes a Read/Write
selection bit. Each access must be terminated by a
STOP Condition (STOP). A convention called
Acknowledge (ACK) confirms receipt of each byte.
Note that SDA can change only during periods when
SCL is LOW (SDA changes while SCL is HIGH are
reserved for START and STOP conditions).

 2010 Microchip Technology Inc. DS21387C-page 9

TC1321

Write Timing Diagram

A B C D E F G H I J K
ILOW I
HIGH

SCL
SDA

tSU(START) tH(START) tSU-DATA tSU(STOP) tIDLE

A = START Condition E = Slave Pulls SDA Line Low I = Acknowledge Clock Pulse
B = MSB of Address Clocked into Slave F = Acknowledge Bit Clocked into Master J = STOP Condition
C = LSB of Address Clocked into Slave G = MSB of Data Clocked into Master K = New START Condition
D = R/W Bit Clocked into Slave H = LSB of Data Clocked into Master

Read Timing Diagram

A B C D E F G H I J K L M
ILOW IHIGH

SCL

SDA

tSU(START) tH(START) tSU-DATA tH-DATA tSU(STOP) tIDLE

A = START Condition F = Acknowledge Bit Clocked into Master J = Acknowledge Clocked into Master
B = MSB of Address Clocked into Slave G = MSB of Data Clocked into Slave K = Acknowledge Clock Pulse
C = LSB of Address Clocked into Slave H = LSB of Data Clocked into Slave L = STOP Condition, Data Executed by Slave
D = R/W Bit Clocked into Slave I = Slave Pulls SDA Line Low M = New START Condition
E = Slave Pulls SDA Line Low

FIGURE 4-1: SMBus/I2CTiming Diagrams.

DS21387C-page 10  2010 Microchip Technology Inc.

 TC1321
4.6 Register Set and Programmer’s Model

TABLE 4-2: TC1321 COMMAND SET (READ_BYTE AND WRITE_BYTE)

Command Byte Description

Command Code Function

RWD 00h Read/Write Data (DATA)
RWCR 01h Read/Write Configuration (CONFIG)

TABLE 4-3: CONFIGURATION REGISTER (CONFIG), 8-BIT, READ/WRITE

Configuration Register (CONFIG)

Bit
D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]
Name

Bit Reserved SHDN

Function (Note 1) (Note 2)
Note 1: Always returns ‘0’ when reading
2: 1 = Standby (Shut down) mode
0 = Normal mode

TABLE 4-4: DATA REGISTER (DATA), 10-BIT, READ/WRITE

Data Register (DATA) for 1st Byte Data Register (DATA) for 2nd Byte

D[9] D[8] D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0] X X X X X X
MSB X X X X X X X X LSB X X X X X X

The DAC output voltage is a function of reference

voltage and the binary value of the contents of the
register DATA. The transfer function is given by the
expression:
EQUATION 4-1:
DATA
V OUT = VREF  ----------------
1024

4.7 Register Set Summary

The register set for the TC1321 is summarized in
Table 4-5.

TABLE 4-5: TC1321 REGISTER SET SUMMARY

Name Description POR State Read Write
Data DATA Register 0000000000b X X
(2-Byte Format)
Config CONFIG Register 0000 0000b X X

 2010 Microchip Technology Inc. DS21387C-page 11

TC1321
NOTES:

DS21387C-page 12  2010 Microchip Technology Inc.

 TC1321
5.0 PACKAGING INFORMATION
5.1 Package Marking Information

8-Lead SOIC (150 mil) Example

XXXXXXXX TC1321E
XXXXYYWW OA^^1029
e3

NNN 256

8-Lead MSOP Example

XXXXXX 1321E
YWWNNN 029256

Legend: XX...X Customer-specific information

Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
e3 Pb-free JEDEC designator for Matte Tin (Sn)
* This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.

 2010 Microchip Technology Inc. DS21387C-page 13

TC1321

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

DS21387C-page 14  2010 Microchip Technology Inc.

 TC1321

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

 2010 Microchip Technology Inc. DS21387C-page 15

TC1321


 


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DS21387C-page 16  2010 Microchip Technology Inc.

 TC1321


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 2010 Microchip Technology Inc. DS21387C-page 17

TC1321

8-Lead Plastic Micro Small Outline Package (UA) [MSOP]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

DS21387C-page 18  2010 Microchip Technology Inc.

 TC1321
APPENDIX A: REVISION HISTORY

Revision C (November 2010)

The following is the list of modifications:
1. Updated the Electrical Specifications table.
2. Updated Section 5.0 “Packaging Informa-
tion”. Replaced the older package drawings
with current drawings from the Microchip Pack-
aging Specification (DS00049BF).
3. Added the Revision History section.
4. Updated the Product Identification System
section.

Revision B (May 2008)

• Undocumented changes.

Revision A (November 2007)

• Original Release of this Document.

 2010 Microchip Technology Inc. DS21387C-page 19

TC1321
NOTES:

DS21387C-page 20  2010 Microchip Technology Inc.

 TC1321
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO. X /XX XXX
Examples:
Device Temperature Package Pattern a) TC1321VUA: 8LD MSOP package.
Range b) TC1321VUATR: Tape and Reel
8LD MSOP package.
c) TC1321EUA: 8LD MSOP package.
d) TC1321EUATR: Tape and Reel,
Device TC1321: 10-Bit Digital-to-Analog Converter with Two-Wire
Interface 8LD MSOP package.
e) TC1321EOA: 8LD SOIC package.
f) TC1321EOATR: Tape and Reel
Tape and Reel TR = Tape and Reel 8LD SOIC package.
g) TC1321VOA: 8LD SOIC package.
h) TC1321VOATR: Tape and Reel
Temperature Range I = -40C to +85C (Industrial) 8LD SOIC package.

Package OA = Small Outline Package (SOIC), (3,90 mm) 8-lead

UA = Micro Small Outline Package (MSOP), 8-lead

 2010 Microchip Technology Inc. DS21387C-page 21

TC1321
NOTES:

DS21387C-page 22  2010 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device Trademarks

applications and the like is provided only for your convenience
The Microchip name and logo, the Microchip logo, dsPIC,
and may be superseded by updates. It is your responsibility to
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
ensure that your application meets with your specifications.
PIC32 logo, rfPIC and UNI/O are registered trademarks of
MICROCHIP MAKES NO REPRESENTATIONS OR
Microchip Technology Incorporated in the U.S.A. and other
WARRANTIES OF ANY KIND WHETHER EXPRESS OR countries.
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION, FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
INCLUDING BUT NOT LIMITED TO ITS CONDITION, MXDEV, MXLAB, SEEVAL and The Embedded Control
QUALITY, PERFORMANCE, MERCHANTABILITY OR Solutions Company are registered trademarks of Microchip
FITNESS FOR PURPOSE. Microchip disclaims all liability Technology Incorporated in the U.S.A.
arising from this information and its use. Use of Microchip Analog-for-the-Digital Age, Application Maestro, CodeGuard,
devices in life support and/or safety applications is entirely at dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
the buyer’s risk, and the buyer agrees to defend, indemnify and ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
hold harmless Microchip from any and all damages, claims, Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified
suits, or expenses resulting from such use. No licenses are logo, MPLIB, MPLINK, mTouch, Omniscient Code
conveyed, implicitly or otherwise, under any Microchip Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
intellectual property rights. PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance,
TSHARC, UniWinDriver, WiperLock and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2010, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.

ISBN: 978-1-60932-567-1

Microchip received ISO/TS-16949:2002 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.

 2010 Microchip Technology Inc. DS21387C-page 23

 Worldwide Sales and Service
AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE
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Cleveland
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Tel: 765-864-8360
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Santa Clara
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Tel: 408-961-6444 Tel: 86-29-8833-7252 Tel: 66-2-694-1351
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Toronto China - Xiamen

Mississauga, Ontario, Tel: 86-592-2388138
Canada Fax: 86-592-2388130
Tel: 905-673-0699 China - Zhuhai
Fax: 905-673-6509 Tel: 86-756-3210040
Fax: 86-756-3210049

08/04/10

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