REG.

NO:20MIS0445 NAME: DASARI SIVARAM

DLM(LAB)-DA-1

1. Verification of Logic gates

a) Verify the working of OR gate with its truth table

TRUTH TABLE:

A B F
0 0 0
0 1 1
1 0 1
1 1 1

EXPRESSION:

Multi Sim Circuit Diagram:

REG.NO:20MIS0445 NAME: DASARI SIVARAM
DLM(LAB)-DA-1

b) Verify the working of AND gate with its truth table

TRUTH TABLE:

A B F
0 0 0
0 1 0
1 0 0
1 1 1

Multi Sim Circuit Diagram:

REG.NO:20MIS0445 NAME: DASARI SIVARAM
DLM(LAB)-DA-1

c) Verify the working of NOT gate with its truth table

TRUTH TABLE:

A F

0 1

1 0

Multi Sim Circuit Diagram:

REG.NO:20MIS0445 NAME: DASARI SIVARAM
DLM(LAB)-DA-1

d) Verify the working of NOR gate with its truth table

TRUTH TABLE:

A B F
0 0 1
0 1 0
1 0 0
1 1 0

Multi Sim Circuit Diagram:

REG.NO:20MIS0445 NAME: DASARI SIVARAM
DLM(LAB)-DA-1

e) Verify the working of NAND gate with its truth table

TRUTH TABLE:

A B F
0 0 1
0 1 1
1 0 1
1 1 0

Multi Sim Circuit Diagram:

REG.NO:20MIS0445 NAME: DASARI SIVARAM
DLM(LAB)-DA-1

f) Verify the working of X- OR gate with its truth table

TRUTH TABLE:

A B AB’ A’B Y
0 0 0 0 0
0 1 0 1 1
1 0 1 0 1
1 1 0 0 0

Multi Sim Circuit Diagram:

REG.NO:20MIS0445 NAME: DASARI SIVARAM
DLM(LAB)-DA-1

g) Verify the working of X-NOR gate with its truth table

TRUTH TABLE

A B C F
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 0

Multi Sim Circuit Diagram:

REG.NO:20MIS0445 NAME: DASARI SIVARAM
DLM(LAB)-DA-1

2. Verification of Boolean Expressions

a) X+X’Y=X+Y

TRUTH TABLE:

X Y X’ X’Y X+Y X+X’Y

0 0 1 0 0 0
0 1 1 1 1 1
1 0 0 0 1 1
1 1 0 0 1 1

Multi Sim Circuit Diagram:

REG.NO:20MIS0445 NAME: DASARI SIVARAM
DLM(LAB)-DA-1

b) X’+XY=X’+Y

TRUTH TABLE:

X Y X’ XY X’+XY X’+Y
0 0 1 0 1 1
0 1 1 0 1 1
1 0 0 0 0 0
1 1 0 1 1 1

Multi Sim Circuit Diagram:

REG.NO:20MIS0445 NAME: DASARI SIVARAM
DLM(LAB)-DA-1

c) AB+A’C+BC=AB+A’C

TRUTHTABLE:

A B C AB BC A’ A’C LHS RHS

0 0 0 0 0 1 0 0 0
0 0 1 0 0 1 1 1 1
0 1 0 0 0 1 0 0 0
0 1 1 0 1 1 1 1 1
1 0 0 0 0 0 0 0 0
1 0 1 0 0 0 0 0 0
1 1 0 1 0 0 0 1 1
1 1 1 1 1 0 0 1 1

Multi Sim Circuit Diagram:

REG.NO:20MIS0445 NAME: DASARI SIVARAM
DLM(LAB)-DA-1

d) PQ+Q’R+WPRQ=PQ+Q’R

TRUTH TABLE:

W P Q R PQ+Q’R+WPRQ PQ+Q’R
0 0 0 0 0 0
0 0 0 1 1 1
0 0 1 0 0 0
0 0 1 1 0 0
0 1 0 0 0 0
0 1 0 1 1 1
0 1 1 0 1 1
0 1 1 1 1 1
1 0 0 0 0 0
1 0 0 1 1 1
1 0 1 0 0 0
1 0 1 1 0 0
1 1 0 0 0 0
1 1 0 1 1 1
1 1 1 0 1 1
1 1 1 1 1 1

Multi Sim Circuit Diagram:

REG.NO:20MIS0445 NAME: DASARI SIVARAM
DLM(LAB)-DA-1

3. Simplify the following functions, and implement them using NAND and NOR gates only:
F(A, B, C, D) = AC’D’ + A’C + ABC + AB’C + A’C’D’
REG.NO:20MIS0445 NAME: DASARI SIVARAM
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4. Design a Half adder, Full adder, Half Subtractor and Full Subtractor.
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5. Find the sum and the difference of the following two binary numbers.

A=1101 B=1010
REG.NO:20MIS0445 NAME: DASARI SIVARAM
DLM(LAB)-DA-1

Multisim Circuit Diagram:

SUM:

DIFFERENCE:
REG.NO:20MIS0445 NAME: DASARI SIVARAM
DLM(LAB)-DA-1

6. Implement the following function using 8x1 Multiplexer

F(A,B,C,D)=Σ (0,1,3,4,8,9,15)
REG.NO:20MIS0445 NAME: DASARI SIVARAM
DLM(LAB)-DA-1

7. Design a combinational logic circuit that receives a BCD number as a four bit binary

variables whose output is input binary number minus 3 using decoder. (Use Don't Care

wherever necessary)
REG.NO:20MIS0445 NAME: DASARI SIVARAM
DLM(LAB)-DA-1
REG.NO:20MIS0445 NAME: DASARI SIVARAM
DLM(LAB)-DA-1

8. You are asked to design the following circuit for your car. The warning signal W should
be set to high voltage (logical 1) if:
a) the engine is running and door is open; or
b) With the engine running, somebody is sitting in the driver‟s seat and the belt is not
fastened.
Otherwise output of the circuit is „0‟. The circuit should rely on the following sensors:
sensors from engine(C=„1‟ if engine is running, otherwise it is „0‟)
Seat sensor (S=1 if somebody is sitting on the seat, otherwise „0‟)
Door sensor (D=1 if the door is closed, otherwise „0‟)
Belt sensor (B=1 if the belt is fastened, otherwise „0‟)
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