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TECH 158 - Digital Electronics (Winter 2020) Lab #2: Ripple Counters Objectives

This lab document provides instructions for students to construct and test various 4-bit counters using flip-flops and integrated circuits. Students will build a ripple down counter, ripple up counter, and MOD-12 asynchronous counter. They will observe the output of each counter using LEDs and record the output values at different clock counts. The objectives are to construct and test 4-bit ripple counters and a MOD-12 counter using common digital logic chips.

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493 views1 page

TECH 158 - Digital Electronics (Winter 2020) Lab #2: Ripple Counters Objectives

This lab document provides instructions for students to construct and test various 4-bit counters using flip-flops and integrated circuits. Students will build a ripple down counter, ripple up counter, and MOD-12 asynchronous counter. They will observe the output of each counter using LEDs and record the output values at different clock counts. The objectives are to construct and test 4-bit ripple counters and a MOD-12 counter using common digital logic chips.

Uploaded by

LoveWorldCanada
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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TECH 158 - Digital Electronics (Winter 2020)

Lab #2: Ripple Counters

OBJECTIVES:
 Construct a 4-bit ripple up counter with J-K flip-flops
 Construct a 4-bit ripple down counter with J-K flip-flops
 Construct a MOD-12 counter using a 4-bit asynchronous counter IC

MATERIALS:
[1] Logic Experimenter [1] Breadboard
[1] DC Power Supply [2]74LS73 Dual J-K Flip-Flops
[1] 74LS93 4-bit Asynchronous Counter [1]74LS00 Quad NAND Gates

PROCEDURE:

1. Construct the ripple down-counter (pre-lab assignment step 2) using 2 74LS73 IC’s on your breadboard.
2. Use the 1 HZ signal of the Logic Experimenter as a clock source and LEDs on the Logic Experimenter to observe
the counter output. Record the LED readouts in the following table. Demonstrate to your instructor.

# of clock count QD(msb)QCQBQA(lsb) # of clock count QD(msb)QCQBQA(lsb)


after POR is deactivated after POR is deactivated
0 0 0 0 0 8
1 9
2 10
3 11
4 12
5 13
6 14
7 15

3. Now construct an up-counter by making necessary changes identified in the pre-lab assignment step 3 and
demonstrate the functionality of the down-counter to your instructor.

4. Construct a MOD-12 asynchronous counter using one 74LS93 and one 74LS00 as shown in pre-lab assignment
step 5. Use the 1 HZ signal of the Logic Experimenter as a clock source and LEDs on the Logic Experimenter to
observe the counter output. Demonstrate to your instructor.
Lab Group No.:
Group Member #1: Name: Student No.:
Group Member #2: Name: Student No.:

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