EN Number: - 92000103027 Experiment No: 4 Pre Lab Exercise
EN Number: - 92000103027 Experiment No: 4 Pre Lab Exercise
EN number: -92000103027
NRZ (L)
NRZ (M)
RZ
BIPHASE
(MANCHESTER)
BIPHASE ( MARK )
Experiment 4: Perform various line coding formats for given digital data
streams compare performance parameters.
Apparatus: Scientech ST2153, ST2154, ST2156, ST2157 Trainer Kits, CRO/DSO, CRO
probes, Connecting Probes.
Theory:
Theory of Data Formatting
The symbols ‘0’ and ‘1’ in digital systems can be represented in various formats with
different levels & waveforms. The selection of particular format for communication depends
on the system bandwidth, system’s ability to pass DC level information, error checking facility,
ease of clock regeneration & synchronizations at receiver, system complexity & cost etc. The
most widely used formats of data representation are given below. These are also available on
ST2156 trainer. Every data format has specific advantages & disadvantages associated with
them. We will study one by one see figure 1.
It is the simplest form of data representation. The NRZ (L) waveform simply goes low
for one bit time to represent a data '0' & high for one bit time to represent a data '1'. Thus the
signal alternates only when there is a data change. See figure 2
Clock Regeneration:
Since the level transition takes place at a predetermined moment (e.g. at rising/falling
edge of the data clock), it is possible to extract clock information at the receiver. However the
synchronization & clock information is sparse & sometimes even lost when a long stream of
zero or ones are encountered. The clock regeneration is very difficult in such cases. This makes
the clock regeneration design more complex.
Bandwidth:
The maximum rate at which NRZ (L) waveform can change is half the data clock. This
happens when the data stream consists of an alternate 0's and 1's. As it is known, it is the
maximum signal frequency which determines the bandwidth occupied by the NRZ (L) code.
As you will study other data formats you will appreciate that the NRZ (L) waveform requires
comparatively narrow bandwidth.
DC Levels:
Another problem with NRZ (L) code is that it contains DC Level hence cannot be used
for communication systems which cannot pass DC. e.g. transmission paths involving
transformers AC coupled amplifiers or series capacitors filters etc. This happens particularly in
telephone systems.
Let us see now an NRZ (L) code is rendered useless in such systems. Assume a sequence
of repetitive data sent is 0110001 with data 1 level at + 5V & data '0' at 0V. If the DC Level is
lost, the waveform balances at the mean level.
= (0+5+5+0+0+0+5) ÷ 7 = 15 ÷ 7 = 2.14V
Thus if the DC Level information is lost, the whole signal balances about 2.14V. Thus
the peak value of + 5V will shift to 5 - 2.14 = 2.86V
It may slip down to a level where the receiver cannot recognize as level '1' & thus the
data could be misread. In extreme case where the input is constant series of logic 0's then the
NRZ (L) output would be a constant level. Now if the input changed to a stream of logic 0's,
the output would still be a constant level. The only difference is the DC Level. Therefore if the
DC Level information is lost, we have no way of knowing whether the original input will have
all 0's or all 1's.
Procedure:
1 The experiment makes use of four trainers namely ST2153, ST2154, ST2156 & ST2157.
ST2153 TDM pulse code modulation transmitter trainer serves as a data source while
ST2154 TDM pulse code modulation receiver trainer serves as analog signal recover.
ST2156 serves as data formatting (conditioning) device while ST2157 reformats
(recondition) the data.
ST2153 & ST2156 Trainers serves as transmitter for our system & ST2157 & ST2154
trainer serves as receiver.
2 Ensure that all trainers are switched off, until the complete connections are made.
3 Check ST2154 Trainer's clock regeneration circuit Set up for correct operation as given
at the end of ST2153 / 4 work book
4 Set up the following conditions on ST2153 trainer
a. Mode switch set in FAST position.
b. Pseudo - random sync code generator switched on.
c. Error check code selector switches A & B in A=0 & B=0 positions.
d. All switched faults ‘Off’
5 Set ST2156 trainer's mode switch in position 1
6 Set up following conditions on ST2154 trainers:
a. Mode switch set in FAST position
b. Pseudo - random sync code detector in ‘On’ position.
c. Error check code selector switch A & B in A = 0 & B = 0 position.
d. All switched faults to be kept ‘Off’
7 Make the following connections between ST2153, ST2156 trainers. ST2153 trainer
ST2156 trainer
a. TX clock output (TP3) to TX clock input
b. PCM output (TP44) to TX data input
8 Connect the TX to output (TP4) on ST2153 trainer to external trigger input of the
oscilloscope. Set to negative edge triggered mode in oscilloscope. It may be necessary to
adjust the trigger level manually to obtain a stable waveform.
Figure 3
9 in ST2153 trainer make following connections
a. DC 1 to CH 0 input
b. CH 0 input to CH 1 input
This is done to supply the same voltage level to each of the two time division multiplexed
channels. Thus we are able to get the same data stream for any time frame.
10 Make the rest of the connections as shown in configuration figure 3.
11 Switch ‘on’ the power
12 On ST2153 trainer adjust the DC1 potentiometer until the 7 bit code displayed at A/D
converter LEDs is D6 D5 D4 D3 D2 D1 D0 ( 0 1 0 0 0 1 1 )
13 Observe the data clock output at TP4 on ST2156 trainer's data format block with
Oscilloscope. Adjust the oscilloscopes time base & position control until each rising edge
of data clock coincides with one of scope's vertical graticule line as shown in figure 4.
Each main division on scope's horizontal axis now represents one data bit time. Adjust
the trigger level (manually, if necessary, to obtain a stable trace.) This sets convenient
reference against which to observe the other wave forms.
Figure 4
14 Examine the NRZ (L) TP5 in data format block of ST2156 trainer on other channel of the
oscilloscope. The NRZ (L) waveform must be identical to as shown in figure 1.
15 You may recall from your work on ST2153 trainer that the least significant bit D0 is
transmitted first and then D6. Thus D6 will be available at the right hand side of the
oscilloscope trace.
Also note that the since the pseudo random sync generator is ‘Off’, a logic '0' is transmitted
as first bit. So from left to right on oscilloscope, the logic level read 0, then
1 1 0 0 0 1 0.
Also, you may recall, that ST2153 trainer has two input channels. Channel 0 and Channel
1, which are time division multiplexed, these two channels are sent as a group of 15 bits
or timeslots. The sync bit comes first, followed by 7 bits of channel 0 and finally 7 bits of
channel 1. The whole group of 15 timeslots is called a 'Timing Frame'.
16 To view a timing frame, adjust the oscilloscope's time base & X-controls until remove the
lead of input to channel 1. Switch off the power connect channel1 input to DC 2 supply.
You have exactly two clock pulses within each graticule lines.
17 Switch on the power. Observe the effect on timing frame as you vary DC1 and DC2
controls.
18 Note that the signals in the two cases are identical to that of ST2153 trainer's PCM data
output but delayed by half data clock. The recovery & interpretation of NRZ (L)
waveform at the receiver is in ST2154 work book.
(Note: in same way of procedure, by changing some required connection we can check
for the other line coding schemes.)
Conclusion:
Q-1. Identify the correct line coding scheme and write in the given block.
1.NRZ
2.NRZ(I)
3.RZ
4.AMI
5.BIPHASE
Q-2 Match the following line coding scheme with correct parameter
Line Coding Scheme Parameter
1 8B6T A. DC present
1-E,2-C,3-A,4-B,5-d