Module 4

sequential logic circuits

A Sequential logic circuits is a form of the binary circuit; its design employs one or more
inputs and one or more outputs, whose states are related to some definite rules that depend on
previous states. ... Examples of such circuits include clocks, flip-flops, bi-stables, counters,
memories, and registers.

Types of Sequential circuits:

The sequential circuits can be event driven, clock driven and pulse driven.
There are two main types of sequential circuits: (a) Synchronous and (b)
Asynchronous.

 a). Asynchronous Sequential circuits –

Asynchronous circuits do not synchronize with positive edge or negative
edge of the clock signal, that means, the outputs of asynchronous sequential
circuits do not change or affect at the same time and change their state
immediately when there is a change in the input signal. So, these circuits are
faster and independent of the internal clock pulses. But these circuits have
uncertainty in the outputs and are difficult to design.
 (b). Synchronous Sequential circuits –
Synchronous circuits synchronize with either positive edge or negative edge
of the clock signal, that means, the outputs of synchronous sequential
circuits change or affect at the same time. These circuits use clock signal
and level input (or pulsed with restrictions on pulse width and circuit
propagation). Since they wait for the next clock pulse to arrive to perform the
next operation, so these circuits are a bit slower compared to asynchronous.
Level output changes state at the start of an input pulse and remains in that
until the next input or clock pulse. The synchronous sequential circuit can be
locked or unlocked (or pulsed).

Counters, Flip-Flops, and design of Mealy-Moore machines are examples of

Synchronous sequential circuits.
Synchronous Circuit Asynchronous Circuit

The State Variables are not

synchronized to change
simulteneously and may change
All the State Variable changes are at anytime irrespective of each
synchronized with a universal other to achieve the next Steady
clock signal. Internal State

Since all the Internal State Since there is no such universal

changes are in the strict control of clock source, the internal state
a master clock source they are changes as soon as any of the
less prone to failure or to a race inputs change and hence are
 Synchronous Circuit Asynchronous Circuit

condition and hence are more

reliable. more prone to a race condition.

The changes in the internal state

Timings of the internal state of an asynchronous circuit are
changes are in our control. not in our control.

Flip flop v/s Latch

The basic difference between a latch and a flip-flop is a gating or clocking mechanism.
Flip Flop is edge-triggered and a latch is level triggered.

For example, let us talk about SR latch and SR flip-flops. In this circuit when
you Set S as active the output Q would be high and Q’ will be Low. This is
irrespective of anything else. (This is an active-low circuit so active here
means low, but for an active high circuit active would mean high)

SR Latch
A flip-flop, on the other hand, is synchronous and is also known as a gated or
clocked SR latch.
 SR Flip-Flop
In this circuit diagram, the output is changed (i.e. the stored data is changed)
only when you give an active clock signal. Otherwise, even if the S or R is
active the data will not change. Let’s look at the types of flip-flops to
understand better.

SR Flip Flop
There are majorly 4 types of flip-flops, with the most common one being SR
flip-flop. This simple flip-flop circuit has a set input (S) and a reset input (R). In
this system, when you Set “S” as active the output “Q” would be high and “Q‘”
will be low. Once the outputs are established, the wiring of the circuit is
maintained until “S” or “R” go high, or power is turned off. As shown above, it
is the simplest and easiest to understand. The two outputs, as shown above,
are the inverse of each other. The truth table of SR Flip-Flop is highlighted
below.

S R Q Q’

0 0 0 1

0 1 0 1

1 0 1 0
1 1 ∞ ∞

JK Flip-flop
Due to the undefined state in the SR flip-flop, another flip-flop is required in
electronics. The JK flip-flop is an improvement on the SR flip-flop where
S=R=1 is not a problem.

JK Flip-Flop
The input condition of J=K=1, gives an output inverting the output state.
However, the outputs are the same when one tests the circuit practically.

In simple words, If J and K data input are different (i.e. high and low) then the
output Q takes the value of J at the next clock edge. If J and K are both low
then no change occurs. If J and K are both high at the clock edge then the
output will toggle from one state to the other. JK Flip-Flops can function as
Set or Reset Flip-flops
J K Q Q’

0 0 0 0

0 1 0 0

1 0 0 1

1 1 0 1

0 0 1 1

0 1 1 0

1 0 1 1

1 1 1 0

D Flip Flop
D flip-flop is a better alternative that is very popular with digital electronics.
They are commonly used for counters and shift-registers and input
synchronisation.

D Flip-Flop
In this, the output can be only changed at the clock edge, and if the input
changes at other times, the output will be unaffected.
 Clock D Q Q’

↓»0 0 0 1

↑»1 0 0 1

↓»0 1 0 1

↑»1 1 1 0

The change of state of the output is dependent on the rising edge of the
clock. The output (Q) is same as the input and can only change at the rising
edge of the clock.

T Flip Flop
A T flip-flop is like a JK flip-flop. These are basically a single input version of JK
flip-flops. This modified form of JK flip-flop is obtained by connecting both
inputs J and K together. It has only one input along with the clock input.
These flip-flops are called T flip-flops because of their ability to complement
its state (i.e.) Toggle, hence the name Toggle flip-flop.

T Q Q (t+1)

0 0 0

1 0 1

0 1 1

1 1 0

Applications of Flip-Flops
These are the various types of flip-flops being used in digital electronic
circuits and the applications of Flip-flops are as specified below.

 Counters

 Frequency Dividers

 Shift Registers

 Storage Register