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UNIT 4 PCB Layout and Stackup

The document discusses key considerations for printed circuit board (PCB) layout and stackup that impact electromagnetic compatibility (EMC) performance. It covers partitioning components into logical blocks, defining keep out zones around edges and oscillators, routing critical signals like clocks carefully, connecting PCB ground to chassis ground at multiple low-impedance points near input/output, and using proper grounding techniques. The layout, stackup, and grounding of a PCB can significantly affect its emissions and susceptibility from an EMC perspective.

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116 views16 pages

UNIT 4 PCB Layout and Stackup

The document discusses key considerations for printed circuit board (PCB) layout and stackup that impact electromagnetic compatibility (EMC) performance. It covers partitioning components into logical blocks, defining keep out zones around edges and oscillators, routing critical signals like clocks carefully, connecting PCB ground to chassis ground at multiple low-impedance points near input/output, and using proper grounding techniques. The layout, stackup, and grounding of a PCB can significantly affect its emissions and susceptibility from an EMC perspective.

Uploaded by

AjayPanicker
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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PCB Layout and Stackup

(Unit 4)

Presented By
Mehaboob Mujawar
Assistant Professor
Goa College of Engineering
PCB Layout and Stackup
Introduction:
� The PCB(Printed Circuit Board) represents the physical
implementation of the schematic.
� The proper design and layout of a PCB can mean the difference
between the product passing or failing EMC requirements.
� Such things as component placement, keep out zones, trace routing,
number of layers, layer stackup (order of layers and layer spacing), and
return path discontinuities all are critical to the EMC performance of
the board.
� GENERAL PCB LAYOUT CONSIDERATIONS
◦ Partitioning
◦ Keep Out Zones
◦ Critical Signals
◦ System Clocks
◦ PCB-to-chassis ground connection
GENERAL PCB LAYOUT CONSIDERATIONS
Partitioning:
� Component placement is an important, but often overlooked, aspect of
PCB layout that can have a significant impact on the board’s EMC
performance.
� Components should be grouped into logical functional blocks.

� Some of these blocks


might be:
� (1) high-speed logic,
clocks, and clock drivers;
(2) memory; (3) medium-
and low-speed logic; (4)
video; (5) audio and other
low-frequency analog
circuits; (6) input/output
(I/O) drivers; and (7) I/O
connectors and common-
mode filters, as shown:
GENERAL PCB LAYOUT CONSIDERATIONS
Partitioning:
� On a properly partitioned board, the high-speed logic as well as memory
should not be located near the I/O area.
� The crystal or high-frequency oscillator should be located near the
integrated circuits (ICs) that use them, and away from the I/O area of the
board.
� The I/O drivers should be located close to the connectors, and the video and
low-frequency analog circuits should have access to the I/O area without
having to pass through the high-frequency digital sections of the board.
�
� Proper partitioning will
minimize trace lengths, improve
signal quality, minimize
parasitic coupling, and reduce
both PCB emissions and
susceptibility.
GENERAL PCB LP CONSIDERATIONS
Keep Out Zones
� Be particularly careful to keep the oscillators and/or crystals, as well as any
other high-frequency circuitry, away from the I/O area.
� These circuits generate high-frequency fields (both electric and magnetic)
that can easily couple directly to the I/O cables, connectors, and circuitry,
see Fig. 6-42.
� Experience has shown, that if board size permits, keeping these circuits at
least 0.5 in. (13mm) from the I/O area will minimize the parasitic coupling.
GENERAL PCB LP CONSIDERATIONS
Keep Out Zones
� Route all critical signal traces away from the edges of the board to allow
the return current to spread out under the trace.
� A good rule is to define a keep out zone, that is 20 times the signal-layer to
return-plane spacing, around the periphery of the board. No critical signals
should be routed in the keep out zone.
GENERAL PCB LP CONSIDERATIONS
Critical Signals
� It is seen that 90% of PCB problems are caused by 10% of the circuitry.
� This 10%, therefore, should be given the most consideration in the layout of
the board.
� For emissions, the greatest problems are high-frequency digital circuits with
repetitive wave shapes, such as clocks, buses, and some control signals.
� These signals contain a multiplicity of large-amplitude, high-frequency
harmonics.
� Clocks are usually the worst offenders, followed in order by buses and then
repetitive control signals.
� The high-frequency spectral content or signal speed is proportional to:
◦ The fundamental frequency F0 of the signal
◦ The reciprocal of the rise/fall time tr
◦ The magnitude of the transient drive current I0 when the gate switches
� Therefore, signal speed is Signal Speed = (F0 I0)/ tr
� Repetitive, high-frequency signals with large currents and fast rise/fall times
will have large spectra content. Hence, signal speed should be considered
for all critical signals.
GENERAL PCB LP CONSIDERATIONS
System Clocks
� Keep the clock traces as short as possible and provide for optimum
placement by routing them first.
� Locate crystals, oscillators, or resonators as close to the circuits that use
them as possible.
� Add a ground plane on the component side of the board under the crystal,
oscillator, and/or clock driver.
� Connect this plane to the main ground plane with multiple vias. This
provides a termination for any stray capacitance (electric fields) from the
crystal or oscillator, and it prevents the routing of other signals, on the top
layer, under the crystal.

� If the crystal or oscillator has a metal


case, ground it to this component-
side ground plane, and provide a
provision for a board level shield
over this area in case it should be
needed.
GENERAL PCB LP CONSIDERATIONS
System Clocks
� Small series damping resistors (or ferrite beads) should be added to all clock
output traces with a frequency of 20 MHz or more.
� This will help reduce ringing and control reflections.

� This is recommended even on short clock traces, unless adding the resistor
would increase the length of an already very short trace. A typical value
resistor would be 33 Ω.
� Clock oscillators and drivers should also have ferrite beads in series with the
Vcc line to isolate the circuit from the main power distribution system.
GENERAL PCB LP CONSIDERATIONS
Types of ground connection
� What is Ground?

� In electronics and electrical engineering, it is by convention we define a


point in a circuit as a reference point.
� This reference point is known as ground (or GND) and carries a voltage of
0V. Voltage measurements are relative measurements. That is, a voltage
measurement must be compared to another point in the circuit. If it is not,
the measurement is meaningless.
� However, not all voltage measurements are taken from this reference point.
For instance, if you were to measure the voltage across the upper resistor in
a resistive voltage divider, your reference point would not be ground.
� So the three types of grounds are Signal
ground, Chassis ground and Earth Ground
GENERAL PCB LP CONSIDERATIONS
Types of ground connection
Earth Ground: Earth ground is exactly as it sounds, it is ground physically (and
electrically) connected to earth via a conductive material such as copper or
aluminum, through a conductive pipe, or rod, physically driven into the earth
to a minimum depth of 8 feet.
GENERAL PCB LP CONSIDERATIONS
Types of ground connection
GENERAL PCB LP CONSIDERATIONS
PCB-to-chassis ground connection
� A major source of radiation from electronic products is due to common-
mode currents on the external cables.
� From an antenna theory perspective, a cable can be considered as a
monopole antenna, with the enclosure being the associated reference plane.
� The voltage driving the antenna is the common-mode voltage between the
cable and the chassis.
GENERAL PCB LP CONSIDERATIONS
PCB-to-chassis ground connection
� The reference for the cable radiation is therefore the chassis and not some
external ground such as the earth.
� Because the potential difference between the cable and chassis should be
minimized, the connection between the PCB ground and the chassis
becomes important.
� The internal circuit ground should be connected to the chassis at a point as
close to the location that the cables terminate on the PCB as possible.
� This is necessary to minimize the voltage difference between the two.

� This connection must be a low-impedance connection at radio frequencies.

� Any impedance between the circuit ground and the chassis will produce a
voltage drop, and will excite the cables with a common-mode voltage,
which causes them to radiate.
GENERAL PCB LP CONSIDERATIONS
PCB-to-chassis ground connection
� The circuit-ground-to-chassis connection is often made with poorly placed
metal stand offs, and it can have considerable high-frequency impedance.
� Seldom is this connection optimized for EMC purposes. The design of this
connection is critical to the EMC performance of the product.
� The connection should be short, and there should be multiple connections to
parallel the inductance of the connections, and, hence, decrease the radio
frequency (rf) impedance.
� Figure 16-1 shows an example of multiple circuit-ground-to-chassis
connections located in the I/O area of the PCB.
� This points out the advantage of having all the I/O located in one area of the
board.
GENERAL PCB LP CONSIDERATIONS
PCB-to-chassis ground connection
� If metallic backshell connectors are used, the backshell should make a 360 o
direct electrical connection (via an EMC gasket or other means) to the
enclosure.
� The connector backshell then can become part of the low-impedance
connection between the PCB ground reference plane and the enclosure. This
is shown in Fig. 16-3.

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