Lab 02 – Basic Logic Gates

Name: Hamna Mansoor Rafi ID: hr06876 Section: T4

Objectives
To verify the behavior of logic gates using the Truth Table (AND, OR, NOT and NOR gates)
on TinkerCAD and familiarization with digital integrated circuits by reading its datasheet and
the internal IC gate level structure.
This lab consists of five different sections. The description of each section is given below:

Section
Background
The aim of this section is to discuss:
i. The logic gate 10
ii. The basic gates

a) Reading Datasheet
In this section, we will get familiarized with Digital Integrated Circuits by
reading the datasheet of the following gate IC and their internal gate level
structure. 15
1. AND gate IC 7408
2. NOT gate IC 7404
3. NOR gate IC 7402
b) AND Gate
In this part, we will practically verify the behavior of AND logic gate using the 30
truth table.
c) NOT Logic Gate
In this part, we will practically verify the behavior of NOT logic gate using the 30
truth table.

d) NOR Logic Gate

In this part, we will practically verify the behavior of NOR logic gate using 30
the truth table.
Exercise 45
Theoretical questions and exercise related to logic building.
Lab 02 – Basic Logic Gates
Background

Background
1. What is a logic gate?

A logic gate is a small digital electronic device of computation that is based on a

Boolean function, which can be described as a logical operation that produces a
single binary output from one (NOT) or more (AND, OR, NOR, NAND, XOR) binary
inputs.

2. What are the AND, NAND, OR, NOR and NOT gates. Briefly discuss their functionality.

• An AND gate is a logic gate having two or more inputs that operates on logical
conjunction from mathematical logic. Only if all of the AND gate's inputs are HIGH,
will the output be HIGH. If none of the AND gate's inputs are HIGH, the output is
LOW.

• The OR gate implements logical disjunction from mathematical logic by finding

the maximum between two binary digits. If one or both of the OR gate's inputs are
HIGH, the output is HIGH.

• The NOT gate is a gate with one input and one output, implementing one of the
three basic logical functions, that is logical negation. It has a HIGH output signal
only when it's input signal is LOW, and a LOW output when the input is HIGH.

• The NAND gate is a combination of two fundamental logic gates, the AND gate
and the NOT gate connected in series. It produces a LOW output only if all of its
inputs are HIGH, and vice versa. Thus, its output is complement to that of the AND
gate.

• Similarly, the NOR gate is a combination of the OR gate and the NOT gate
connected in series. It produces a HIGH output only if both the inputs to it are
LOW; if one or both input is HIGH, a LOW output results. The output of the OR
gate is complement to that of the AND gate.

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Lab 02 – Basic Logic Gates
Reading Datasheet

a. Reading Datasheet
In this task you are required to read the datasheet and get familiarized with internal gate level
structure of following ICs
1. AND gate IC 7408
2. OR gate IC 7432
3. NOT gate IC 7404
4. NOR gate IC 7402

TinkerCAD automatically save all your simulations. Make sure you create a
separate circuit for each IC. It will help you in post lab exercise.

b. AND Logic Gate

The AND logic gate is a basic digital logic gate that implements logical conjunction; it behaves
according to the truth table given in Table 2.1. A HIGH output (logic 1) results only if both the
inputs to the AND gate are HIGH. If neither or only one input to the AND gate is HIGH, a
LOW (logic 0) output results. In other words, the AND function effectively finds the minimum
between two binary digits. Therefore, the output is always logic 0 except when all the inputs
are HIGH. The logic symbol or Boolean expression for an AND gate is the multiply sign ( · ).
It describes the AND operation on two inputs. In the expression below, A and B are the inputs
and Y is the output.

𝑌 =𝐴 · 𝐵

Three input AND operation can be performed with the sample expression shown below; where
A, B and C are inputs, and Y is the output which is always a logic 0 except when all the inputs
are HIGH.
𝑌 = 𝐴 · 𝐵 · 𝐶

i. Equipment
1. Adjustable Direct Current (DC) Power supply.
2. Digital Multi Meter (DMM).
3. IC type 7408 AND gate.
4. Light Emitting Diode (LED), resistors (330 Ohm) and slide switches.

ii. Design Schematic

1. Figure 2.2 shows the schematic diagram for this experiment.
2. The truth table for an AND gate with two inputs is given in Table 2.1.

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Lab 02 – Basic Logic Gates
AND Logic Gate

Figure 2.1 - 7408 AND logic gate IC Figure 2.2 - Design schematic of a two-input AND gate.

Table 2.1 - Truth table for the AND gate.

Input (A) Input (B) Output (Y)

0 0 0
0 1 0
1 0 0
1 1 1

Figure 2.3 - 2 Input AND gate circuit implementation on TinkerCAD

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Lab 02 – Basic Logic Gates
AND Logic Gate

Refer Figure 2.3 for connections of 2 Input AND gate Circuit

iii. Procedure and observations

1. Place the breadboard on the activity area of TinkerCAD.
2. Drag and fix the IC which is under observation on the half separator line of
breadboard, so there are no short connections.
3. Connect a wire to the voltage source power supply (Vcc = 5 V) whose other end is
connected to last pin of the IC (14th pin from the notch).
4. Connect the ground pin of the IC (7th pin from the notch) to the negative terminal
provided by DC power supply.
5. Provide the input at any one gate of the IC i.e. 1st, 2nd, 3rd or 4th gate by using
connecting wires and slide switch. (In accordance to the IC provided), such that 5V
correspond to logic high and 0V correspond to logic low.
6. Connect output pins to an LED through a resistor.
7. Connect Voltmeters at inputs and output pins of the IC.
8. Switch on the power supply.
9. If LED glows then output is true, if it does not glow, the output is false, which is
numerically denoted as logic 1 (high) and logic 0 (low) respectively. Test the truth
table provided in Table 2.1
10. Complete Table 2.2 with two inputs.
11. From the given IC, use two 2-input AND gates to complete Table 2.3 with three
inputs.
12. Attach snippets and tinkerCAD link of simulation circuits (both 2-input and 3-input
cases) in the provided space.

Make sure that you that power supply is set to 5V and turn it on only when the
connections are verified.

When working on physical circuit, use DMM to verify the connections and
troubleshooting.

Table 2.2 - Data Table for 2-Input AND Gate

Input Output
A B A B Y Y
(Logic) (Logic) (Volts) (Volts) (Logic) (Volts)

0 0 0 0 0 0
0 1 0 5 0 0
1 0 5 0 0 0
1 1 5 5 1 4.64

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Lab 02 – Basic Logic Gates
AND Logic Gate

Table 2.3 - Data Table for 3-Input AND Gate

Input Output
A B C A B C Y Y
(Logic) (Logic) (Logic) (Volts) (Volts) (Volts) (Logic) (Volts)

0 0 0 0 0 0 0 0
0 0 1 0 0 5 0 0
0 1 0 0 5 0 0 0
0 1 1 0 5 5 0 0
1 0 0 5 0 0 0 0
1 0 1 5 0 5 0 0
1 1 0 5 5 0 0 0
1 1 1 5 5 5 1 4.64

2-Input AND gate circuit (Link)

https://www.tinkercad.com/things/dLFUO4Ame5D-exquisite-turing-jaagub/editel?sharecode=CAOS

2-Input AND gate circuit (Snippet)

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Lab 02 – Basic Logic Gates
NOT Logic Gate

3-Input AND gate circuit (Link)

https://www.tinkercad.com/things/jHgAJp9SmtL-3-input-and-circuit/editel?sharecode=PhF9

3-Input AND gate circuit (Snippet)

c. NOT Logic Gate

A NOT gate (also called Inverter) is another type of logic gate. It takes one input signal and
produces an inverted output signal. In logic, there are usually two states, logic 0 and logic 1.
The NOT gate sends logic 1 as output, if it receives logic 0 as input. Alternatively, if it receives
logic 1 as input, it sends logic 0 as output. Generally, below 0.5 V is logic 0, and 4 V to 5 V is
logic 1. Several inverters are packaged in an integrated circuit. The mathematical expression
is:

𝑌 = 𝐴̅
i. Equipment
1. Adjustable Direct Current (DC) Power supply.
2. Digital Multi Meter (DMM).
3. IC type 7404 NOT gate.
4. Light Emitting Diode (LED), resistors (330 Ohm) and slide switches.

ii. Design Schematic

1. The truth table for an NOT gate with two inputs is given in Table 2.4.
2. Figure 2.5 shows the schematic diagram for this experiment.

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 Lab 02 – Basic Logic Gates
NOT Logic Gate

Table 2.4 - Truth table for the NOT gate.

Input (A) Output (Y)

0 1
1 0

Figure 2.4 - 7404 NOT logic gate IC. Figure 2.5 - Schematic of NOT gate

iii. Procedure and observations

1. Place the breadboard on the activity area of TinkerCAD.

2. Drag and fix the IC which is under observation on the half separator line of
breadboard, so there are no short connections.
3. Connect a wire to the voltage source power supply (Vcc = 5 V) whose other end is
connected to last pin of the IC (14th pin from the notch).
4. Connect the ground pin of the IC (7th pin from the notch) to the negative terminal
provided by DC power supply.
5. Provide the input at any one gate of the IC i.e. 1st, 2nd, 3rd, 4th , 5th or 6th gate by using
connecting wires and slide switch. (In accordance to the IC provided), such that 5V
correspond to logic high and 0V correspond to logic low.
6. Connect output pins to an LED through a resistor.
7. Connect Voltmeters at inputs and output pins of the IC.
8. Switch on the power supply.
9. If LED glows then output is true, if it does not glow, the output is false, which is
numerically denoted as logic 1 (high) and logic 0 (low) respectively. Test the truth
table provided in Table 2.4.
10. Complete Table 2.5.
11. Attach snippet of simulation circuit in the provided space.

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Lab 02 – Basic Logic Gates
NOR Logic Gate

Table 2.5 - Data Table for NOT Gate.

Input Output

A A Y Y
(Logic) (Volts) (Logic) (Volts)

0 0 1 4.64
1 5 0 0
NOT gate circuit (Link)
https://www.tinkercad.com/things/kUCyqCq2jkc-copy-of-2-input-and-circuit/editel?sharecode=p4M

NOT gate circuit (Snippet)

d. NOR Logic Gate

The logic NOR gate or Inclusive-NOR gate is a combination of the digital logic OR gate with
that of an inverter or NOT gate connected together in series. The NOR (Not OR) gate has an
output that is normally at logic 0 and only goes logic 0 to logic 1, when all of its inputs are at
logic 0. The Logic NOR Gate is the reverse or “Complementary” form of the OR gate.
The Boolean expression for a logic NOR gate is that for logical multiplication. It performs on
the complements of the inputs. The Boolean expression for a logic NOR gate is denoted by a
plus sign, (+) with an over line on the expression to signify the NOT or logical negation of the
NOR gate. Combining the two operations results in:

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Lab 02 – Basic Logic Gates
NOR Logic Gate

̅̅̅̅̅̅̅̅̅
𝑌 = 𝐴 + 𝐵

For three inputs NOR gate, the expression would be as below,

𝑌 = ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐴 + 𝐵 + 𝐶

i. Equipment
1. Adjustable DC Power supply.
2. DMM.
3. IC type 7402 NOR gate.
4. Light Emitting Diode (LED), resistors (330 Ohm) and slide switches.

ii. Design Schematic

1. The truth table for an NOR gate with two inputs is given in Table 2.6.
2. Figure 2.7 shows the schematic diagrams for this experiment.
Table 2.6 - Truth table for NOR Gate.

Input (A) Input (B) Output (Y)

0 0 1
0 1 0
1 0 0
1 1 0

Figure 2.6 - 7402 NOR logic gate IC. Figure 2.7 - Schematic of NOR gate

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 Lab 02 – Basic Logic Gates
NOR Logic Gate

iii. Procedure and observations

1. Place the breadboard on the activity area of TinkerCAD.
2. Drag and fix the IC which is under observation on the half separator line of breadboard,
so there are no short connections.
3. Connect a wire to the voltage source power supply (Vcc = 5 V) whose other end is
connected to last pin of the IC (14th pin from the notch).
4. Connect the ground pin of the IC (7th pin from the notch) to the negative terminal
provided by DC power supply.
5. Provide the input at any one gate of the IC i.e. 1st, 2nd, 3rd or 4th gate by using connecting
wires and slide switch. (In accordance to the IC provided), such that 5V correspond to
logic high and 0V correspond to logic low.
6. Connect output pins to an LED through a resistor.
7. Connect Voltmeters at inputs and output pins of the IC.
8. Switch on the power supply.
9. If LED glows then output is true, if it does not glow, the output is false, which is
numerically denoted as logic 1 (high) and logic 0 (low) respectively. Test the truth table
provided in Table 2.6.
10. Complete Table 2.7 with two inputs.
11. From the given IC, use two 2-input NOR gates to complete Table 2.8 with three inputs.
12. Attach snippets of simulation circuits (both 2-input and 3-input cases) in the provided
space.

Table 2.7 - Data Table for 2-Input NOR Gate

Input Output
A B A B Y Y
(Logic) (Logic) (Volts) (Volts) (Logic) (Volts)

0 0 0 0 1 4.64
0 1 0 5 0 0
1 0 5 0 0 0
1 1 5 5 0 0

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Lab 02 – Basic Logic Gates
NOR Logic Gate

Table 2.8 - Data Table for 3-Input NOR Gate

Input Output
A B C A B C Y Y
(Logic) (Logic) (Logic) (Volts) (Volts) (Volts) (Logic) (Volts)

0 0 0 0 0 0 1 4.64
0 0 1 0 0 5 0 0
0 1 0 0 5 0 0 0
0 1 1 0 5 5 0 0
1 0 0 5 0 0 0 0
1 0 1 5 0 5 0 0
1 1 0 5 5 0 0 0
1 1 1 5 5 5 0 0

2-Input NOR gate circuit (Link)

https://www.tinkercad.com/things/ctxTPT5h998-copy-of-2-input-and-circuit/editel?sharecode=2zAK

2-Input NOR gate circuit (Snippet)

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Lab 02 – Basic Logic Gates
NOR Logic Gate

3-Input NOR gate circuit (Link)

https://www.tinkercad.com/things/9ubH2xEVC2f-copy-of-3-input-and-circuit/editel?sharecode=Z1R

3-Input NOR gate circuit (Snippet)

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Lab 02 – Basic Logic Gates
Exercise

Exercise
1. Reduce the Power Supply voltage to 4V in 2-input NOR gate circuit. Comment on the
effect of reduced supply voltage on your observed output logic and output voltage. Did
it effect the logic level? Briefly explain why. Attach snippet of simulation circuit.

2. Search the Datasheet of IC 74HC00. Provide its pin configuration and Voltage levels
for High and Low Logic.

3. If we were to build a truth table for a 16-input AND gate, how many different
combinations of inputs would we have? Explain.

4. An electronic system will only operate if three switches R, S and T are correctly set.
An output signal (X = 1) will occur if R and S are both in the ON position or if R is in
the OFF position, and S and T are both in the ON position. Design a logic circuit to
represent the above situation, and draw the truth table

5. Develop a truth table for the circuit and determine the Logic Gate got realized.

Circuit 1 Circuit 2

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Lab 02 – Basic Logic Gates
Assessment Rubric

Assessment Rubric

Name: ID: Section:

Lab # 02 Marks Distribution:

LR1 LR4 LR7

LR9
Circuit Data Viva
Report
layout Collection
Background --- --- 5
Task a --- 5
Task b 10 10
In – Lab 10 ---
Task c 5 5
Task d 15 15
Exercise --- -- 20
Total 100

Lab # 02 Marks Obtained:

LR1 LR4 LR7

LR9
Circuit Data Viva
Report
layout Collection
Background --- ---
Task a ---
Task b
In – Lab ---
Task c
Task d
Exercise --- ---
Total

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 Lab 02 – Basic Logic Gates
Lab Evaluation Rubric

Lab Evaluation Assessment Rubric

# Assessment Elements (0<Level 1<=4) (4< Level 2<=6) (6< Level 3<=8) (8< Level 4<=10)

Components are wired and Components are wired Few but not all Complete components are
Neat and Clean Circuit didn’t show neat and clean with untidy connection Components are wired wired with neat and clean
LR1
layout connections and minimal and didn’t show neat and with neat and clean tight connections and task
efforts shown clean connections connections completed in due time

Measurements are
Measurements are both
Measurements are incomplete, somewhat inaccurate and Measurements are mostly
accurate and precise.
inaccurate and imprecise. very imprecise. accurate.
Observations are very
Observations are incomplete Observations are Observations are generally
LR4 Data Collection thorough. Includes
or not included. Symbols, incomplete or recorded in a complete. Minor errors
appropriate symbols, units
units and significant figures confusing way. Major using symbols, units and
and significant digits and
are not included errors using symbols, units significant digits
task completed in due time
and significant digits

Couldn’t provide good Good summary of In-lab

Outstanding Summary of
summary of in-lab tasks. tasks. All major tasks
No summary provided. The In-Lab tasks. All task
Some major tasks were completed except few
number/amount of tasks completed and explained
completed but not minor ones. The work is
LR9 Report completed below the level of well, submitted on time,
explained well. supported by some decent
satisfaction and/or submitted good presentation of plots
Submission on time. Some explanations, Submission
late and figure with proper
major plots and figures on time, all necessary
label, titles and captions
provided plots, and figures provided

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