2010 5th International Conference on Industrial and Information Systems, ICIIS 2010, Jul 29 - Aug 01, 2010, India

Design of Output 𝑑𝑣/𝑑𝑡 Filter for Motor Drives

Anirudh Acharya.B Vinod John
Dept. of Electrical Engineering Dept. of Electrical Engineering
Indian Institute of Science Indian Institute of Science
Bengaluru, India 560012 Bengaluru, India 560012
Email: anirudh [email protected] Email: [email protected]

Abstract—Modern PWM inverter output voltage has high ∙ Output filters, such as 𝑑𝑣/𝑑𝑡-filter, sinusoidal filter, com-
𝑑𝑣/𝑑𝑡, which causes problems such as voltage doubling that mon mode choke
can lead to insulation failure, ground currents that results ∙ Reduction of common mode voltage using PWM tech-
in electromagnetic interference concerns. The IGBT switching
device used in such inverter are becoming faster, exacerbating niques
these problems. This paper proposes a new procedure for ∙ Resonant switching inverter
designing the LC clamp filter. The filter increases the rise time
of the output voltage of inverter, resulting in smaller 𝑑𝑣/𝑑𝑡. In
addition suitable selection of resonance frequency gives LCL filter Algorithm for control of soft-switching resonant converters
configuration with improved attenuation. By adding this filter add constraints to PWM modulation method and needs addi-
at output terminal of inverter which uses long cable, voltage tional switching devices therefore the cost involved is high.
doubling effect is reduced at the motor terminal. The design
procedure is carried out in terms of the power converter based
On the other hand, LC filter is the most commonly used low
per unit scheme. This generalizes the design procedure to a pass filter for reducing 𝑑𝑣/𝑑𝑡 at motor terminal. The induction
wide range of power level and to study optimum designs. The motor are operated using sinusoidal voltage, to obtain such
effectiveness of the design is verified by computer simulation and output through the filter the resonance frequency should be
experimental measurements. less than the switching frequency.The resonance frequency
Index Terms—𝑑𝑣/𝑑𝑡-filter, common mode voltage, IGBT motor
drives
is selected such that it is at a factor 10 from fundamental
and switching frequency. However, there is the possibility of
I. I NTRODUCTION exciting the resonance due to variable speed operation. Present
day induction motors are fed through inverters whose output
Present day induction motor is commonly operated using is non-sinusoidal on a line to ground basis. The 𝑑𝑣/𝑑𝑡 issue
two level inverters. The inverter output voltage risetime is of the motor drive such as ground currents and EMI need to
order of few nano seconds. Generally, the switching device be on a line to ground basis. In addition the size of the filter
used is IGBT owing to their very small turn ON/turn OFF can become large at low switching frequency in high power
time and power handling capability. The advantage of smaller drives.
switching time is lower switching energy loss, but introduces
very high 𝑑𝑣/𝑑𝑡. The value of 𝑑𝑣/𝑑𝑡 can be as high as 10 to If the filter required is only to address the 𝑑𝑣/𝑑𝑡 of the
20kV/𝜇s [1]. The issues in the inverter fed motor drives due inverter output then the resonant frequency can be above the
to high dv/dt at inverter output are: switching frequency. With such as filter the size of the circuit
∙ Voltage reflections in the cable, resulting in doubling of components reduces. Damping of such filter is quite difficult,
motor terminal voltage. instead the output is clamped to the desired DC bus voltage.
∙ Increased ground currents and bearing current. Clamping filters are proposed in literature [3], [4]. The filter
∙ Electromagnetic emission from the drive. topology presented in [3] does not address the common mode
NEMA MG 1 part 31 [2] standard specifies the limit for component, this shortcoming was overcome in subsequent
peak voltage of the output that is acceptable for rated line to design proposed in [4] by connecting the neutral of the filter
line voltage and specifies a limit for 𝑑𝑣/𝑑𝑡. To suppress 𝑑𝑣/𝑑𝑡 to dc bus mid-point (O).
and hence the common mode current many techniques have The proposed filter is as shown in Fig. 1, apart from address-
been proposed, both at inverter end and motor end. Some of ing both common mode and differential mode components,
the mitigation techniques proposed at motor end are: the resonant frequency is selected so that the induction motor
∙ Insulated bearing and electrostatic shields between stator at high frequency behaves as inductive load and hence gives
and rotor. the higher order filter LCL effect. For the frequencies under
∙ Increasing the grade of the insulation. consideration the motor back-emf is effectively a short circuit.
∙ Termination to match the impedance of the motor and the In this paper design criteria and proposed procedure for design
cables. is discussed. The effectiveness of the above design is verified
Similarly the methods proposed at inverter end are: using PSPICE simulation and validated experimentally.

978-1-4244-6653-5/10/$26.00 ©2010 IEEE 562

 2010 5th International Conference on Industrial and Information Systems, ICIIS 2010, Jul 29 - Aug 01, 2010, India

Fig. 1. Proposed resonant LC clamp filter connected to an active front-end drive.

II. R EFLECTIONS IN C ABLE reflection occurs the voltage at the motor terminal is less than
The phenomenon of travelling wave is predominant in long the applied voltage hence the voltage at the motor terminal
cable due to the fast rise time of switching devices like IGBT. would be less that 2𝑉𝑖𝑛𝑣 . Based on the length of the cable
The parasitic of the cable are distributed resistance, inductance and the type of insulation used for cable the propagation
and capacitance. The current through the cable charges the time can be approximately calculated. Hence, this leads to the
parasitic capacitor as it propagates through the cable. If the maximum length of the cable that can be used along with the
impedance at the termination is large, then the excess energy inverter for a given 𝑑𝑣/𝑑𝑡 without having the voltage doubling
gets stored in the last capacitor due to which the voltage rises effect. This length of the cable is termed as critical length, 𝑙𝑐 .
and goes as high as two times the applied voltage [5]. Keeping 𝑡𝑟 >𝑡𝑝 avoids voltage doubling effect.
Let 𝑍𝑐 be the characteristic impedance of the cable, 𝑍𝑙 be 𝑙 𝑐 = 𝑣 𝑝 × 𝑡𝑝 (4)
the load impedance, and 𝑍𝑠 be the source impedance. The time
taken by the applied voltage to reach 90% of desired voltage Taking this in to consideration the filters have been designed
magnitude is rise time 𝑡𝑟 and the time taken by the voltage in literature, which proved to be effective for known length of
to reach the other end of the cable is propagation time 𝑡𝑝 . the cable [6]. Present day IGBT has rise times of order 10−9 (s)
For a bare conductor, the velocity of propagation is 𝑐, where and if PVC insulated cable is used the propagation velocity
𝑐 = 3×108 (m/s). If the cable is coated with insulating medium will be roughly 1.6×108 (m/s) and hence the propagation time
such as PVC etc with permittivity 𝜖 , the propagation velocity for a cable length of 10m would be of the order 10−9 (s). Hence
can be expressed as 1. even for a cable length of 10m voltage doubling effect can be
𝑐 seen. As the rise time of IGBT gets smaller the problems
𝑣𝑝 = √ (1) related to voltage doubling and ground current gets worse.
𝜖
Once the applied voltage reaches the motor terminal after time III. BASIC F ILTER T OPOLOGY
𝑡𝑝 , it sees very large impedance, and hence the entire voltage The filter topology can either be passive or active filtering.
will get reflected back. The reflection coefficient at load side Active filter requires additional switches and complex control
is given by, algorithms to control them, therefore are expensive. Passive
𝑍 𝑙 − 𝑍𝑐
𝜌𝐿 = (2) filters are effective and robust, but designing it is a challenge
𝑍 𝑙 + 𝑍𝑐 also it is bulkier based on type of filter adopted to address the
As load impedance is very high, 𝜌𝐿 ≈ 1. Therefore the problem.
voltage at the motor terminal would become, The traditional filter design focuses on producing a voltage
which closely reassembles the sinusoidal voltage from the
𝑉𝑚 = 𝑉𝑖𝑛𝑣 (1 + 𝜌𝐿 ) = 2𝑉𝑖𝑛𝑣 (3)
PWM pulses applied at the inverter output. Since the 𝑑𝑣/𝑑𝑡 is
The reflected wave will reach the inverter terminal after one reduced significantly by the filter, circulating ground current
propagation time 𝑡𝑝 . The reflection co-efficient at the inverter and bearing current reduces. However, to meet such design
terminal is equal to −1. The voltage will now reflects back specification the filter dimension increases and could cause
to motor terminal and gets subtracted with the voltage that sluggish response of speed of motor as a result of phase delay
would be building at motor terminal end. Now, if 𝑡𝑟 <𝑡𝑝 after of filtered output. To reduce circulating current and bearing
first reflection the voltage at the motor terminal would be current various filter topology are presented in literature [7].
two times the applied voltage. But, if 𝑡𝑟 >𝑡𝑝 when the first The principle of the output filter is briefly reviewed.

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parasitic capacitors becomes critical for estimating the ground

currents. Fig. 3(a) shows the differential mode impedance
plot and Fig. 3(b) shows the common mode impedance plot
obtained using a network analyzer. Impedance plot for various
differential configurations were obtained and the parasitic
capacitor value was calculated. From the plot it can be seen
that the motor behaves as inductive load up to 48kHz in
differential mode configuration, beyond which it behaves as
capacitive load. The motor behaves as capacitive load between
Fig. 2. Basic filter topologies (a) 𝑑𝑣/𝑑𝑡 reactor, (b) sinewave filter. the frequency 100Hz-50kHz as seen from common mode plot.

Fig. 2(a) shows a simple 𝑑𝑣/𝑑𝑡–reactor, which is choke

connected between the inverter output terminals to motor
input terminals. The basic function of which is to increase
the rise time which thereby reduces the 𝑑𝑣/𝑑𝑡. Fig. 2(b)
shows the conventional LC sine filter at inverter terminal with
damping arrangement. The resonance frequency (𝑓𝑟𝑒𝑠 ) of such
filter is less than switching frequency (𝑓𝑠𝑤 ) but greater than
fundamental frequency (𝑓𝑠 ) at maximum motor speed. If the
neutral point 𝑛𝑓 is left floating, it would address differential
mode voltage alone. In addition a damping technique has
to be used to decrease the Q-factor at the resonance of the
LC circuit.The value of the resistor controls the amount of
damping. The introduction of damping resistor increases the
losses in the system. The only way to achieve loss less
damping is by active damping using inverter control.
If 𝑓𝑟𝑒𝑠 <𝑓𝑠𝑤 and advanced modulation methods are used for
switching PWM-VSI drives then large surge currents will flow,
if the connections are made to positive, negative or mid-point
of the dc bus [8]. Hence for proceeding analysis we are looking
only at filters where 𝑓𝑟𝑒𝑠 >𝑓𝑠𝑤 . The neutral point of filter when
connected to either positive, negative or to both of them by
properly splitting the filter capacitors, or mid-point of dc bus,
will now address both the common mode and differential mode
components of the output voltage.
Fig. 3. High frequency impedance plot of the motor (a) in differential
Fig. 1 shows the LC clamp filter connected at the output configuration and, (b) in common mode configuration.
terminal of the inverter. Compared to the traditional LC filter
the dimension of clamp filter is small. In addition the filter The differential and common mode per phase equivalent
output is clamped to DC bus, therefore does not need a circuit at high frequency can be modelled as shown in Fig. 4.
damping resistor as in RLC filter. The losses in the clamping For designing the filter the first requirement is to meet the
circuit is small compared to the losses in damping resistors in 𝑑𝑣/𝑑𝑡 criteria. The design procedure taking 𝑑𝑣/𝑑𝑡 as input for
Fig. 2(b). design is discussed in [4]. If the filter resonance frequency is
IV. H IGH FREQUENCY BEHAVIOUR OF MOTOR placed below the frequency where the motor differential mode
behaviour changes from inductive to capacitive load, then
At high frequency the slip of induction motor 𝑠 ≈ 1.
motor can still be considered to be inductive and overall filter
Therefore the induction machine can be modelled as leakage
can then be studied as an equivalent LCL filter configuration.
inductance at high frequencies. Also, due to repetitive voltage
at very high frequency the turn to turn capacitance and V. T HEORY AND DESIGN OF RESONANT CLAMP FILTER
conductor to ground capacitance plays significant role. Due to
high 𝑑𝑣/𝑑𝑡 there is a possibility for current to flow between A. Circuit Operation
turn to turn, thereby damaging the insulation that separates Consider the R-phase of the inverter shown in Fig. 1, at
them. In random wound machine, if the last and first turns are any instant either the top (𝑆𝑅 ) or bottom (𝑆¯𝑅 ) switch is
adjacent to each other in the worst case cenario the insulation conducting. When the top switch conducts, the voltage across
between them may not withstand the full coil voltage, when the capacitor would rise as indicated by (9). When the voltage
doubling at the motor terminal occurs. Hence, modelling these 𝑉𝐶𝑓 rises above the sum of pole voltage (𝑉𝑅𝑂 ) and voltage

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Where,
( )
1 𝐿 𝑓 𝐿𝑙
𝜔𝑟𝑒𝑠 =√ 𝑎𝑛𝑑 𝐿𝑝 =
𝐿𝑝 𝐶𝑓 𝐿 𝑓 + 𝐿𝑙
Expressing (9), (10) in terms of per-unit,
( )
Fig. 4. Shows the per-phase equivalent circuit of induction motor including 𝑑𝑣
= 2𝜋𝑉𝑖𝑛𝑣(𝑝𝑢) 𝜔𝑟𝑒𝑠(𝑝𝑢) (11)
the parasitics (a) differential mode configuration, (b) common mode configu- 𝑑𝑡 𝑚𝑎𝑥(𝑝𝑢)
ration. ⎛ ⎞
2
2𝜋𝑉𝑖𝑛𝑣
𝐿𝑓(𝑝𝑢) = ⎝ ( )(𝑝𝑢) ⎠ (12)
across the snubber (connected to positive dc bus) 𝑉𝑠𝑝 , the 𝑖𝐶𝑓(𝑝𝑢) 𝑑𝑣
𝑑𝑡 𝑚𝑎𝑥 (𝑝𝑢)
clamping diode 𝐷1 would start conducting. Hence the voltage 1
across the capacitor will be held constant close to 𝑉𝐷𝐶
2 . The
𝐶𝑓(𝑝𝑢) = 2
(13)
𝜔𝑟𝑒𝑠 𝐿𝑓(𝑝𝑢)
snubber is designed to keep the total voltage seen close to dc (𝑝𝑢)
√
bus voltage (𝑉𝑠 is held to 10% of 𝑉𝑑𝑐 ). The small excess ( ) 𝐶𝑓𝑝𝑢
snubber voltage causes the inductor current to decrease at 𝑖𝑟𝑒𝑠𝑝𝑢 𝑚𝑎𝑥
= 𝑉𝑖𝑛𝑣 (14)
𝐿𝑓𝑝𝑢
faster rate and eventually the current in the clamp diode go
to zero, at this instant 𝐷1 stops conducting.When the bottom The base quantities are selected based on inverter ratings as
switch is conducting, the voltage 𝑉𝐶𝑓 would start decreasing. shown in Table 1. Filter inductance is kept far less compared
When filter capacitor voltage is less than the sum of 𝑉𝑅𝑂 and to motor leakage inductance, therefore 𝐿𝑝 ≈ 𝐿𝑓 .
𝑉𝑠𝑛 the diode
( 𝐷2)would conduct, the voltage is held constant The design procedure for the clamped LC filter is as follows:
close to − 𝑉2𝐷𝐶 . The same process occurs in the other two 1) Select the resonant frequency 𝜔𝑟𝑒𝑠 as in (11), such that
phases. 𝑑𝑣
∙ 𝑑𝑡 is within specified limits this makes sure that

B. Design of LC filter rise time is higher than propagation time.

∙ Induction motor at this resonant frequency should
As slip 𝑠 = 1, the per-phase model of filter along with
be inductive.
induction motor is as shown in Fig. 5. Let the current through
∙ Resonant current should be within the required
limit, so that stress on IGBT is minimal.
2) Limit on resonant current is assumed 0.1 ∼ 0.5𝑝.𝑢, and
𝐿𝑓 is calculated as in (12).
3) 𝐶𝑓 is obtained from (13).
4) Design is iterated until the constrains are met.
Lower the filter inductance higher the magnitude of resonant
Fig. 5. Equivalent circuit at high frequency of inverter and filter. current and hence the peak thermal stress on IGBT switches
and inductor increases. The value of resonant current has to be
the filter inductor (𝐿𝑓 ) be 𝑖𝐿𝑓 and the current through the such that the thermal stress does not increase significantly. To
motor leakage inductance 𝐿𝑙 be 𝑖𝐿𝑙 then the resonant current achieve this snubber circuit is introduced between clamping
through the capacitor 𝐶𝑓 is, filter and DC busbar. The snubber circuit helps to reduce the
rms value of the current and hence higher value of resonant
𝑖𝐶𝑓 = 𝑖𝐿𝑓 − 𝑖𝐿𝑙 (5)
currents can be selected based on rating of IGBT. Selecting
Voltage across the filter capacitor be 𝑉𝐶𝑓 . Input voltage be higher value of resonant current would increase the losses in
𝑉𝑖𝑛𝑣 . Applying KVL and KCL, the snubber.
𝑑𝑖𝐿𝑓
𝑉𝑖𝑛𝑣 = 𝐿𝑓 + 𝑉𝐶𝑓 (6) C. Common mode voltage and current
𝑑𝑡
𝑑𝑖𝐿𝑙 The common mode voltage and current at the motor end is
𝑉𝐶𝑓 = 𝐿𝑙 (7) give by (15), (16) respectively
𝑑𝑡
𝑑𝑉𝐶𝑓 𝑉𝑅𝑔 + 𝑉𝑌𝑔 + 𝑉𝐵𝑔
𝑖𝐿𝑓 − 𝑖𝐿𝑙 = 𝐶𝑓 (8) 𝑉𝑐𝑜𝑚 = (15)
𝑑𝑡 3
Solving the (6),(7),(8) equations for 𝑉𝐶𝑓 and 𝑖𝐶𝑓 assuming 𝐼𝑐𝑜𝑚 = (𝐼𝑅 + 𝐼𝑌 + 𝐼𝐵 ) (16)
zero initial conditions,
{ } If the front-end converter used is diode bridge rectifier then
𝐿𝑙 the common mode voltage can be expressed in terms of pole
𝑉𝐶𝑓 = 𝑉𝑖𝑛𝑣 (1 − cos (𝜔𝑟𝑒𝑠 𝑡)) (9)
𝐿 𝑙 + 𝐿𝑓 voltage as,
{ }
𝑉𝑖𝑛𝑣 𝑉𝑅𝑂 + 𝑉𝑌 𝑂 + 𝑉𝐵𝑂
𝑖𝐶𝑓 = sin (𝜔𝑟𝑒𝑠 𝑡) (10) 𝑉𝑐𝑜𝑚 = (17)
𝜔𝑟𝑒𝑠 𝐿𝑓 3

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Fig. 7. Current through filter inductor.

The total charge 𝑄𝑡 that is discharged into the snubber per

Fig. 6. Common mode voltage using sine triangle PWM with 𝑉𝐷𝐶 = 800𝑉 , switching period can be expressed as,
3{ }
𝑓𝑠𝑤 = 1𝑘𝐻𝑧.
𝑄𝑡𝑝𝑢 = (𝐼𝑝 )𝑝𝑢 × 𝑡1𝑝𝑢 (20)
2
Fig. 6 shows the common mode voltage that appears at the Total average current is expressed as,
motor neutral when sine triangle PWM is used. The magnitude 𝐼𝑎𝑣𝑔𝑝𝑢 = 𝑄𝑡𝑝𝑢 𝑓𝑠𝑤𝑝𝑢 (21)
of 𝑉𝑐𝑜𝑚 varies in steps of 𝑉𝐷𝐶3 . On a common mode basis
the parasitic capacitance 𝐶𝑔 from neutral of induction motor Hence the snubber resistance can obtained to be,
to ground dominates as seen in Fig. 3(b), if the rise time of 𝑉𝑠𝑝𝑢
𝑅𝑠𝑝𝑢 = (22)
inverter output voltage is very small, then the current flows 𝐼𝑎𝑣𝑔𝑝𝑢
into ground via 𝐶𝑔 as displacement current due to high 𝑑𝑣/𝑑𝑡 When the diode conducts for 𝑡1 duration load current has
of 𝑉𝑐𝑜𝑚 . a path to flow through clamp diode. Which may result in
increase 𝑉𝑠 . To handle this situation, worst case energy stored
D. Design of snubber circuit in capacitor (i.e. when the three top or bottom diodes carry
1) Need for snubber circuit: When the pole voltage is load current) is calculated in terms of 𝑝.𝑢. as,
above 𝑉𝐷𝐶 2 the top diodes conducts clamping the voltage 1 ( 2
)
across filter capacitor, this maintains the pole voltage at desired 𝐸𝑤𝑐𝑝𝑢 = 𝐿𝑓𝑝𝑢 𝐼𝑚 (23)
8𝜋 𝑝𝑢

value. The current through inductor will now follow through Limiting the maximum variation of voltage in snubber capac-
clamping diode. The stored energy will be dissipated in ESR itor to Δ𝑉𝑠 . The value of capacitor can be obtained to be,
along the path of circulation, if snubber circuit is not used.
12𝜋𝐸𝑤𝑐𝑝𝑢
Therefore the inductor current would eventually fall to zero, 𝐶𝑠𝑝𝑢 = ( ) (24)
let this duration be 𝑡1 . If 𝑡1 >𝑇𝑠𝑤 , the load current will flow Δ𝑉𝑠𝑝𝑢 2𝑉𝑠𝑝𝑢 + Δ𝑉𝑠𝑝𝑢
through the top clamp diodes during negative half cycle and The current would flow through the diodes for a very short
bottom clamp diodes during positive half cycle.The current duration, and also the average and rms values are less. There-
rating of the clamp diodes have to be increased, therefore fore diode with average current rating greater that 𝐼𝑎𝑣𝑔 and
higher rating diodes have to be selected. Also, the losses in peak repetitive forward current rating above load current can
diode will increase.To avoid this the duration 𝑡1 is decreased be selected. This results in selection of very small fast recovery
by introducing the snubber circuit as shown in Fig. 1. The diodes.
snubber steepens the rate of fall of filter inductor current
VI. E XPERIMENTAL RESULTS
(𝑖𝐿𝑓 ) when the diode(s) conduct. The resonant current must
be quenched as fast as possible to decrease the stress on the The resonant LC diode clamp filter was built and tested
clamping diodes and IGBT. Fig.7 shows the inductor current using a 10kVA inverter with 100m cable. The load is discon-
waveshape with 𝑖𝑙𝑜𝑎𝑑 = 0. nected and line to line voltage and line current near inverter
{ without filter is measured as shown in Fig. 8. The dc bus
𝑖𝐶𝑓 + 𝑖𝑙𝑜𝑎𝑑 𝐷𝑖𝑜𝑑𝑒 𝑂𝐹 𝐹 voltage is maintained at 600V. It is seen that the terminal
𝑖𝐿𝑓 = − 𝑉𝐿𝑓 (18)
𝑖𝐿𝑓 (0 ) + 𝐿𝑓 𝑡1 + 𝑖𝑙𝑜𝑎𝑑 𝐷𝑖𝑜𝑑𝑒 𝑂𝑁 voltage is twice the applied voltage and line current has a peak
of approximately 7A. Also due to high 𝑑𝑖/𝑑𝑡 the converter
2) Design of snubber: If very low value of 𝑡1 is desired control shuts( down
) due to false trip signals. The resonant
then it would result in a very large value of snubber capacitor current 𝑖𝑟𝑒𝑠 𝑖𝐶𝑓 , diode ( voltage
) (𝑉𝐷1 ), pole voltage (𝑉𝑅𝑂 ),
voltage (𝑉𝑠 ), which would not(be practical.
) Hence, a suitable filter capacitor voltage 𝑉𝐶𝑓 is as shown in Fig. 9. The diode
value of (𝑉𝑠 ) is selected. As, 𝑖𝑟𝑒𝑠𝑝𝑢 𝑚𝑎𝑥 = 𝐼𝑝 , which used turns OFF when 𝑖𝑟𝑒𝑠 = 0. Fig. 10 shows pole voltage, filter
for design of filter. The value of 𝑡1 as obtained as, capacitor voltage, line to ground voltage at motor terminal and
{ } resonant current measured with the proposed filter connected.
1 𝐿𝑓𝑝𝑢 × (𝐼𝑝 )𝑝𝑢
𝑡1𝑝𝑢 = (19) It is seen that the 𝑑𝑣/𝑑𝑡 is reduced and hence the voltage
2𝜋 𝑉𝑠𝑝𝑢 doubling is eliminated. Also, the rise time is as desired.

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 2010 5th International Conference on Industrial and Information Systems, ICIIS 2010, Jul 29 - Aug 01, 2010, India

Fig. 8. Voltage doubling at motor terminals (Voltage: 500V/div, Current: Fig. 10. Elimination of voltage doubling effect at motor terminals(Current:
5A/div), Time: 5𝜇s. 1A/div, Voltage: 500V/div), Time: 10𝜇s.

per unit scheme. This generalizes the design procedure to a

wide range of power level and to study optimum designs.
Experimental implementation of the filter using diode bridge
rectifier as front-end is carried out. The active front-end
operation with line side filter is currently under progress.
R EFERENCES
[1] J. Steinke, C. Stulz, and P. Pohjalainen, Use of a LC filter to achieve
a motor friendly performance of the PWM voltage source inverter, in
Proc. 1997 Int. Electric Mach. Drives Conf., 2001.
[2] NEMA MG 1, NEMA Motors and Generators Standards, Available at
http://www.nema.org/stds/mg1.cfm, 2007.
[3] S.J. Kim and S.K. Sul, A novel filter design for suppression of high
Fig. 9. Shows resonant current and diode clamping(ch1:5A/div , ch2: voltage gradient in voltage-fed PWM inverter, in Proc. IEEE Appl.
200V/div, ch3: 250V/div, ch4: 500V/div), Time: 25𝜇s. Power Electron. Conf., 1997, pp. 122-127.
[4] Thomas G. Habetler, Rajendra Naik and Thomas A. Nondahl, Design
TABLE I and Implementation of an Inverter Output LC Filter Used for DV/DT
D EISGINED FILTER VALUES AND SIMULATION PARAMETERS Reduction, in IEEE Transactions on Power Electronics, Vol. 17, No.
3, May 2002.
Sl.No. Filter parameter per unit actual [5] E.Person, Transient Effects in application of PWM Inverters to Induction
1 Resonant frequency 𝑓𝑟𝑒𝑠 800 40kHz Motors, IEEE Trans on Industry Applications, vol 28, no 5 pp 1095-1
101, 1992.
2 Resonant current 𝑖𝑟𝑒𝑠 0.5 7A
[6] A. von Jouanne, D. Rendusara, P. Enjeti, and W. Gray, Filtering
3 Filter inductance 𝐿𝑓 0.0083 0.5mH
techniques to minimize the effect of long motor leads on PWM inverter-
4 Filter Capacitance 𝐶𝑓 0.0002 33nF
fed AC motor drives, in Proc. IEEE/IAS Ann. Meeting Conf., 1995,
5 Snubber capacitance 𝐶𝑠 0.54 100𝜇F pp.37-44.
6 Snubber Resistor 𝑅𝑠 2.31 40Ω [7] Choochuan.C, A survey of output filter topologies to minimize the impact
7 Switching frequency 𝑓𝑠𝑤 40 2kHz of PWM inverter waveforms on three-phase AC induction motors, in
Base Value (𝑋𝑎𝑐𝑡𝑢𝑎𝑙 = 𝑋𝑏𝑎𝑠𝑒 ∗ 𝑋𝑝𝑢 ) — IPEC 2005, pp544.
1 Power 𝑃𝑏𝑎𝑠𝑒 10KVA — [8] E.U n and A.M.Hava, Performance Analysis of Reduced Common-Mode
2 Voltage 𝑉𝑏𝑎𝑠𝑒 240V — Voltage PWM Methods and Comparison With Standard PWM Methods
3 Frequency 𝑓𝑏𝑎𝑠𝑒 50Hz — for Three-Phase Voltage-Source Inverters, in IEEE Transactions on
4 Impedance 𝑍𝑏𝑎𝑠𝑒 17.28Ω — Power Electronics, Vol.27, No.1, January 2009.
5 Inductance 𝐿𝑏𝑎𝑠𝑒 55mH —
6 Capacitance 𝐶𝑏𝑎𝑠𝑒 184.3𝜇F —

VII. C ONCLUSION
The effect of 𝑑𝑣/𝑑𝑡 as shown in this paper can be ef-
fectively mitigated using clamp LC filter. A new approach
for designing the LC filter is proposed, its effectiveness is
verified experimentally. As resonance frequency is greater than
switching frequency, filter is compact and can be placed within
the inverter package easily. Also by connecting the neutral
of the filter to the DC bus mid-point both common mode
and differential mode components are addressed. The design
procedure is carried out in terms of the power converter based

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