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Electrical properties of ALD HfO2

(EOT 0.47 nm)

Molchanova, A., Rogozhin, A.

A. Molchanova, A. Rogozhin, "Electrical properties of ALD HfO2 (EOT 0.47

nm)," Proc. SPIE 9440, International Conference on Micro- and Nano-
Electronics 2014, 944004 (18 December 2014); doi: 10.1117/12.2181009

Event: The International Conference on Micro- and Nano-Electronics 2014,

2014, Zvenigorod, Russian Federation

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 Electrical properties of ALD HfO2 (EOT 0.47 nm)
A. Molchanova1, 2, A. Rogozhin1
1. Institute of Physics and Technology of RAS (IPT RAS), Moscow, Russia, [email protected].
2. Moscow Institute of Physics and Technology (MIPT), Moscow, Russia.

ABSTRACT

The electric properties of the dielectric stack based hafnium were characterized by C-V and I-V curves before
and after annealing. The lowest equivalent oxide thickness (EOT) was obtained after PMA and equals to 0.47 nm. The
leakage current for this sample at 1V gate voltage was about 10 A/cm2. Charge density in the volume of high-k was
extremely high (1.61·1018 cm-3). Obtained density of interface charge is equal to moderate value 1.03·1012 cm-2.

Keywords: Hafnium oxide, High-k dielectrics, plasma-enhanced atomic layer deposition

INTRODUCTION

Since 2007 the microelectronic industry has started to use hafnium based high-k dielectrics with metal gates
(HKMG) in high performance metal-oxide-semiconductor field effect transistors (MOSFETs) 1. Continued device
scaling technology nodes requires reduction in equivalent oxide thickness (EOT) of gate dielectrics. According to ITRS,
more aggressive scaling is required in the gate oxide to achieve minimum EOT for 22 nm technology node application.
It seems that HfSiO(N) was used in industry as a gate dielectric. Unfortunately it has dielectric constant 10-
122 and could not be used in the next generation of MOSFETs. Among possible candidates to gate dielectrics pure
hafnium oxide have very attractive properties3. On the other hand it is well known that SiO2-based interfacial layer
appears at the HfO2/Si interface 4. Furthermore, HfO2 has intrinsic defects such as oxygen vacancies and interstitials
that are causes significant degradation in carrier mobility and charge trapping. Therefore stringent control of interfacial
oxide layer and quality of oxide bulk is necessary.
Thus properties of HfO2 formed by plasma-enhanced atomic layer deposition (PEALD) and
interfacial layer are investigated in this work.

EXPERIMENTAL PROCEDURES

Films of HfO2 with different thicknesses (2 nm, 3 nm, 4 nm, 8 nm, 12 nm) were formed by plasma-enhanced
atomic layer deposition (PEALD). Si (100) wafers (P-doped, 1.1·1015 cm-3) were cleaned according to RCA (SC1 and
SC2) scheme and in 5% hydrogen fluoride (HF). HfO2 was deposited on HF-last Si by PEALD from
Tetrakis(ethylmethylamino)hafnium (TEMAH) and partially ionized O2 at 300°C. Detailed description of PEALD
process can be found elsewhere 5. After that tungsten was deposited by DC magnetron sputtering. Contact areas were
defined using standard photolithographic process, followed by wet etching in 5% hydrogen peroxide (H2O2).Finally, the
postmetallization annealing (PMA) was performed at 425°C for 30 min.
The thickness of interfacial layer was evaluated by spectroscopic ellipsometry before W deposition.
Capacitance –voltage (CV) and current-voltage (IV) characteristics were measured before and after PMA. All electrical
results were obtained from 100x100 µm2. Measured capacitance values were corrected for serial resistance and leakage
current.

RESULTS AND DISCUSSION

Fig.1. shows the cross-section TEM images of the sample with appeared interfacial layer between silicon
film and gate material. It can be seen clearly that the IL thickness was around 1 nm in this sample.

International Conference on Micro- and Nano-Electronics 2014, edited by

Alexander A. Orlikovsky, Proc. of SPIE Vol. 9440, 944004 · © 2014 SPIE
CCC code: 0277-786X/14/$18 · doi: 10.1117/12.2181009

Proc. of SPIE Vol. 9440 944004-1

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 Dielectric constants were estimated under two-layer model (high-k and interfacial layers). The overall gate
capacitance was the series combination of two terms, the high-k gate oxide and interfacial layer capacitance. These two
capacitances added as
d IL (ε 0 S )
−1

= (ε 0 S )
−1 −1
C + d high − k (1),
k IL k high − k
where C is the measured overall capacitance, ε0 is the permittivity of free space, S is the area, d is thickness of the layer
and k is the dielectric constant.
For high-k layer dielectric constant values before and after PMA were equal to 21.5 and 11, respectively (fig. 1). Under
the assumption of SiO2 interfacial layer its thickness was estimated to be 1.8 nm in the unannealed samples. On the
other hand it seems that dielectric layer in annealed samples is quite homogeneous with k=11. It appears that silicon and
oxygen diffusion during annealing led to hafnium silicate formation.

Interfacial
laver

Fig.1. TEM imaged of the sample with interfacial layer.

The schematic structure of investigated gate stack shows in Fig.2.

4
Hf0, 2 =12 nm
i
Interfacial layer (IL) 1.8 nm

Si

Fig.2. Schematic structure of gate stack.

The flatband voltage (VFB) versus high-k layer thickness is plotted in Fig.2. This dependence is described by
the following equation:

Proc. of SPIE Vol. 9440 944004-2

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 qni qn
VFB = φ − d − v d2 (2),
ε 0k ε 0k
where ϕ is the gate electrode work function value, ni is the density of charges at the high-k/IL interface, nv is the volume
density of fixed charges in the high-k film. UFB was derived from the CV curve of MOS capacitor after annealing.

14
After annealing 425 °C, 30 min
As deposited
12

10 C-1=0.52·d high-k+5.33·

8
C-1, nF-1

6
C-1=1.02·d high-k+0.43
4

0
2 4 6 8 10 12
HfO2 thickness, nm
Fig. 3. Reverse capacitance vs. high-k layer thickness.

0,7

0,6
=0 191+0 018 'tian- +0 ODLdh }h -k
0,5

> 0,4
/
\LL
m

0,3

0,2

0,1
2 4 6 8 10 12
Ht02 thickness, nm

Fig. 4. Flatband voltage vs. high-k layer thickness.

Proc. of SPIE Vol. 9440 944004-3

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 The flatband voltage shift is due to interface-trapped and fixed charges, probably related to the existence of
oxygen vacancies in the oxide film and dangling bonds at the interface between the oxide and the substrate. It seems
that charge density in the volume of high-k is extremely high (1.61·1018 cm-3). However volume charge density is
estimated from the nonlinearity of flatband voltage vs. thickness dependence. There were only thicknesses in the range
of 2-12 nm. For precise nonlinearity estimation flatband voltage values of MOS structures with thick (20-50 nm) should
be also used. On the other hand thick film deposition by PEALD is very time consuming.
High fixed charge density can lead to high threshold voltage and low mobility due to remote coulomb
scattering. Annealing in oxygen or forming gas could help with fixed charge6,7. But annealing should be fulfilled
carefully – annealing in oxygen could lead to interface layer growth8 and annealing in forming gas could case reliability

i_ i
problems7.
Density of interface charge is equal to 1.03·1012 cm-2. The value is rather moderate and might be lowered by

a
additional annealings.

,mass
Fig.3 shows normalized capacitance for the dielectric stacks as a function of bias with high-k layer
thickness as parameter. There is no saturation in strong inversion as for a low frequency C-V curve even at
typically high frequency (100 kHz for these samples).
2,0
--2nm
1,8 T 9 nm -
1,6

1,4
--
-iv- 4 nm
12nm
8 nm

%%

WA=
1,2

1,0

0,8 .-._
0,6 A/,aWi
0,4

is.
__,

0,2
r____
I//ISE
0,0
-1,0 -0,5 00 05 I 10 15 20
V, V

Fig.5. Capacitance vs. bias for different HfO2 thickness at 100kHz

Leakage current versus bias for different high-k layer thickness is plotted in Fig.4. The dielectric stack
with 0.47 nm EOT measured under 1 V showed a moderate leakage current value (10 A/cm2).

Proc. of SPIE Vol. 9440 944004-4

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 N

Q
_ 10-8
102
101
100
10-'
10-2
103
Ú 10-a
10-5

10-'
10-8
10-0
. 7
..-....

...
As

\,,, /
AAA.

'rT
:. i
' '* !.r.!
.-.-
''m~
0........"
AA
2 nm
-- 3 n m
--- 4 nm
-.-8nm
12nm
.,.. .,.,....
'

10-10
_ -1 0 1

V, V
Fig.6. Leakage current vs. bias for different HfO2 thickness

CONCLUSION

The electric properties of the dielectric stack based hafnium were characterized by C-V and I-V
curves before and after annealing. The lowest equivalent oxide thickness (EOT) was obtained after PMA and
equals to 0.47 nm. The leakage current for this sample at 1V gate voltage was about 10 A/cm2.
Charge density in the volume of high-k was extremely high (1.61·1018 cm-3). However volume charge density
is estimated from the nonlinearity of flatband voltage vs. thickness dependence. There were only thicknesses in the
range of 2-12 nm. For precise nonlinearity estimation flatband voltage values of MOS structures with thick (20-50 nm)
should be also used. Annealing in oxygen or forming gas could help with fixed charge.
Obtained density of interface charge is equal to moderate value 1.03·1012 cm-2.

This work was supported by RFBR, research project №14-07-00844 А.

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Proc. of SPIE Vol. 9440 944004-5

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