Electronic Projects

new collections
Volume 1
 CIRCUIT IDEAS

Wiper Speed timing resistors R4 and R5 connected in

the circuit of timer IC3 which functions
in astable mode.

Controller Y. K
AT ARIA As presets VR1 through VR10 are
set for different values, different time
periods (or frequencies) for astable
multivibrator IC3 can be selected. The
PRADEEP G. output of IC3 is applied to pnp driver
transistor T1 (TIP32) for driving the fi-

A
continuously working wiper in for the decade counter (IC2) which ad- nal power transistor T2 (2N3055) which
a car may prove to be a nui- vances by one count on each successive in turn drives the wiper motor at the
sance, especially when it is not clock pulse or the push of switch S1. selected sweep speed. The power supply
raining heavily. By using the circuit de- Ten presets (VR1 through VR10), for the wiper motor as well as the circuit
scribed here one can vary sweeping rate set for different values by trial and er- is tapped from the vehicle’s battery it-
of the wiper from once a second to once ror, are used at the ten outputs of IC2. self. The duration of monostable
in ten seconds. But since only one output of IC2 is high multivibrator IC1 is set for a nearly one
The circuit comprises two timer at a time, only one preset (at selected second period.
NE555 ICs, one CD4017 decade counter, output) effectively comes in series with
one TIP32
driver tran-
sistor, a
2N3055
power tran-
sistor (or
TIP3055)
and a few
other dis-
crete compo-
nents.
Timer
IC1 is con-
figured as a
mono- stable
multivibrator
which pro-
duces a
pulse when
one presses
switch S1
momen-
tarily. This
pulse acts as
a clock pulse

ELECTRONICS FOR YOU n  MARCH '99

 2000

EFY
PROJECTS

00
VOLUME

More than 90 fully tested

and ready-to-use
electronics circuits
& IDEAS

2000
Electronics For You
issues
C o n t e n t s
JANUARY 2000
CONSTRUCTION PROJECTS
2000
1) MICROPROCESSOR-CONTROLLED TRANSISTOR LEAD IDENTIFIER --------------------------------------------- 1
2) CONVERSION OF AUDIO CD PLAYER TO VIDEO CD PLAYER — I ----------------------------------------------- 9

CIRCUIT IDEAS
1) MULTIPURPOSE CIRCUIT FOR TELEPHONES ------------------------------------------------------------------------- 13
2) SIMPLE CODE LOCK -------------------------------------------------------------------------------------------------------- 13
3) AUTOMATIC BATHROOM LIGHT ---------------------------------------------------------------------------------------- 14
4) SMART FLUID LEVEL INDICATOR --------------------------------------------------------------------------------------- 15
5) AUTOMATIC SCHOOL BELL SYSTEM ---------------------------------------------------------------------------------- 16
6) DESIGNING AN RF PROBE ------------------------------------------------------------------------------------------------ 18

FEBRUARY 2000
CONSTRUCTION PROJECTS
1) PC BASED SPEED MONITORING SYSTEM ---------------------------------------------------------------------------- 19
2) STEREO CASSETTE PLAYER ----------------------------------------------------------------------------------------------- 24

CIRCUIT IDEAS
1) BASS AND TREBLE FOR STEREO SYSTEM ---------------------------------------------------------------------------- 29
2) PROTECTION FOR YOUR ELECTRICAL APPLIANCES ---------------------------------------------------------------- 29
3) DIGITAL WATER LEVEL METER ------------------------------------------------------------------------------------------ 30
4) UNIVERSAL HIGH-RESISTANCE VOLTMETER ------------------------------------------------------------------------- 31
5) TRIAC/TRANSISTOR CHECKER ------------------------------------------------------------------------------------------- 32
6) A NOVEL METHOD OF FREQUENCY VARIATION USING 555 --------------------------------------------------- 33

MARCH 2000
CONSTRUCTION PROJECTS
1) RESONANCE TYPE L-C METER ------------------------------------------------------------------------------------------- 34
2) ELECTROLYSIS-PROOF COMPLETE WATER-LEVEL SOLUTION --------------------------------------------------- 38

CIRCUIT IDEAS
1) PENDULUM DISPLAY ------------------------------------------------------------------------------------------------------- 42
2) AUDIO LEVEL INDICATOR ------------------------------------------------------------------------------------------------ 42
3) CLEVER RAIN-ALARM ------------------------------------------------------------------------------------------------------ 44
4) LASER CONTROLLED ON/OFF SWITCH -------------------------------------------------------------------------------- 45
5) TELEPHONE CONVERSATION RECORDER ---------------------------------------------------------------------------- 45
6) SIMPLE AND ECONOMIC SINGLE- PHASING PREVENTOR ------------------------------------------------------- 46

APRIL 2000
CONSTRUCTION PROJECTS
1) SMART CLAP SWITCH ----------------------------------------------------------------------------------------------------- 48
2) ELECTRONIC VOTING MACHINE ---------------------------------------------------------------------------------------- 51

CIRCUIT IDEAS
1) WATER-TANK LEVEL METER --------------------------------------------------------------------------------------------- 57
2) PHONE BROADCASTER ---------------------------------------------------------------------------------------------------- 58
3) TELEPHONE CALL METER USING CALCULATOR AND COB ------------------------------------------------------ 59
4) SIMPLE ELECTRONIC CODE LOCK -------------------------------------------------------------------------------------- 60
5) LATCH-UP ALARM USING OPTO-COUPLER -------------------------------------------------------------------------- 61
6) MINI VOICE-PROCESSOR ------------------------------------------------------------------------------------------------- 61
C o n t e n t s
MAY 2000
CONSTRUCTION PROJECTS
2000
1) DIGITAL NUMBER SHOOTING GAME --------------------------------------------------------------------------------- 63
2) PC INTERFACED AUDIO PLAYBACK DEVICE: M-PLAYER ---------------------------------------------------------- 66

CIRCUIT IDEAS
1) STEPPER MOTOR DRIVER ------------------------------------------------------------------------------------------------- 73
2) ELECTRONIC DIGITAL TACHOMETER ---------------------------------------------------------------------------------- 74
3) LIGHT-OPERATED LIGHT SWITCH --------------------------------------------------------------------------------------- 75
4) PRECISION DIGITAL AC POWER CONTROLLER ---------------------------------------------------------------------- 76
5) LUGGAGE SECURITY SYSTEM ------------------------------------------------------------------------------------------- 77

JUNE 2000
CONSTRUCTION PROJECTS
1) PORTABLE OZONE GENERATOR ---------------------------------------------------------------------------------------- 78
2) CONFERENCE TIMER ------------------------------------------------------------------------------------------------------- 84

CIRCUIT IDEAS
1) ADD-ON STEREO CHANNEL SELECTOR ------------------------------------------------------------------------------- 87
2) WATER TEMPERATURE CONTROLLER --------------------------------------------------------------------------------- 88
3) EMERGENCY LIGHT -------------------------------------------------------------------------------------------------------- 89
4) PARALLEL TELEPHONES WITH SECRECY ------------------------------------------------------------------------------ 90
5) TWO-DOOR DOORBELL --------------------------------------------------------------------------------------------------- 91
6) POWERFUL PEST REPELLER ---------------------------------------------------------------------------------------------- 91

JULY 2000
CONSTRUCTION PROJECTS
1) BUILD YOUR OWN C-BAND SATELLITE TV-RECEIVER ------------------------------------------------------------- 92
2) EPROM-BASED PROGRAMMABLE NUMBER LOCK ---------------------------------------------------------------- 99

CIRCUIT IDEAS
1) POWER-SUPPLY FAILURE ALARM ------------------------------------------------------------------------------------- 102
2) STOPWATCH USING COB AND CALCULATOR --------------------------------------------------------------------- 102
3) DIAL A VOLTAGE ---------------------------------------------------------------------------------------------------------- 103
4) ELECTRONIC DANCING PEACOCK ------------------------------------------------------------------------------------ 104
5) INVERTER OVERLOAD PROTECTOR WITH DELAYED AUTO RESET ------------------------------------------- 105
6) TELEPHONE LINE BASED AUDIO MUTING AND LIGHT-ON CIRCUIT ---------------------------------------- 106

AUGUST 2000
CONSTRUCTION PROJECTS
1) DISPLAY SCHEMES FOR INDIAN LANGUAGES—PART I (Hardware and Software) -------------------- 108
2) 8085 µP-KIT BASED SIMPLE IC TESTER ----------------------------------------------------------------------------- 115

CIRCUIT IDEAS
1) LOW COST PCO BILLING METER ------------------------------------------------------------------------------------- 119
2) AUTOMATIC MUTING CIRCUIT FOR AUDIO SYSTEMS ---------------------------------------------------------- 120
3) 2-LINE INTERCOM-CUM-TELEPHONE LINE CHANGEOVER CIRCUIT ----------------------------------------- 120
4) GUARD FOR REFRIGERATORS AND AIR-CONDITIONERS ------------------------------------------------------- 121
5) RADIO BAND POSITION DISPLAY ------------------------------------------------------------------------------------- 122
C o n t e n t s
SEPTEMBER 2000
CONSTRUCTION PROJECTS
2000
1) DISPLAY SCHEMES FOR INDIAN LANGUAGES—PART II (Hardware and Software) -------------------- 123
2) DIGITAL CODE LOCK ----------------------------------------------------------------------------------------------------- 133

CIRCUIT IDEAS
1) BINARY TO DOTMATRIX DISPLAY DECODER/DRIVER ----------------------------------------------------------- 137
2) AUTOMATIC SPEED-CONTROLLER FOR FANS AND COOLERS ------------------------------------------------ 139
3) BLOWN FUSE INDICATOR ---------------------------------------------------------------------------------------------- 140
4) OVER-/UNDER-VOLTAGE CUT-OFF WITH ON-TIME DELAY ----------------------------------------------------- 140
5) ONE BUTTON FOR STEP, RUN, AND HALT COMMANDS ------------------------------------------------------- 142

OCTOBER 2000
CONSTRUCTION PROJECTS
1) MOSFET-BASED 50Hz SINEWAVE UPS-CUM-EPS ---------------------------------------------------------------- 143
2) R-2R D/A CONVERTER-BASED FUNCTION GENERATOR USING PIC16C84 MICROCONTROLLER ---- 150

CIRCUIT IDEAS
1) SIMPLE SWITCH MODE POWER SUPPLY --------------------------------------------------------------------------- 155
2) TOILET INDICATOR ------------------------------------------------------------------------------------------------------- 155
3) FEATHER-TOUCH SWITCHES FOR MAINS -------------------------------------------------------------------------- 156
4) DIGITAL FAN REGULATOR ---------------------------------------------------------------------------------------------- 157
5) TELEPHONE RINGER USING TIMER ICS ----------------------------------------------------------------------------- 159

NOVEMBER 2000
CONSTRUCTION PROJECTS
1) PC-TO-PC COMMUNICATION USING INFRARED/LASER BEAM ----------------------------------------------- 160
2) MULTI-EFFECT CHASER LIGHTS USING 8051 MICROCONTROLLER ----------------------------------------- 166

CIRCUIT IDEAS
1) AUTOMATIC BATTERY CHARGER ------------------------------------------------------------------------------------- 170
2) TEMPERATURE MEASUREMENT INSTRUMENT ------------------------------------------------------------------- 171
3) VOICE BELL ----------------------------------------------------------------------------------------------------------------- 172
4) MOVING CURTAIN DISPLAY ------------------------------------------------------------------------------------------- 173
5) PROXIMITY DETECTOR -------------------------------------------------------------------------------------------------- 174

DECEMBER 2000
CONSTRUCTION PROJECTS
1) ELECTRONIC BELL SYSTEM --------------------------------------------------------------------------------------------- 175
2) SIMPLE TELEPHONE RECORDING/ANSWERING MACHINE ---------------------------------------------------- 179

CIRCUIT IDEAS
1) MULTICHANNEL CONTROL USING SOFT SWITCHES ------------------------------------------------------------ 183
2) AN EXCLUSIVE SINEWAVE GENERATOR ---------------------------------------------------------------------------- 184
3) TTL THREE-STATE LOGIC PROBE -------------------------------------------------------------------------------------- 185
4) AM DSB TRANSMITTER FOR HAMS ---------------------------------------------------------------------------------- 185
5) GROUND CONDUCTIVITY MEASUREMENT ------------------------------------------------------------------------ 186
6) STEPPER MOTOR CONTROL VIA PARALLEL PORT ---------------------------------------------------------------- 187
January

2000
 CONSTRUCTION

generated with Table I, a microprocessor

MICROPROCESSOR-CONTROLLED
can easily indicate the type (npn or pnp)
and the base of the device under test,
with respect to the test socket terminals

TRANSISTOR LEAD IDENTIFIER

marked as 1, 2, and 3. The logic num-
bers, comprising logic 1 (+5V) and logic 0
(0V), applied to generate the base-Id, are
three bit numbers—100, 010, and 001. These
numbers are applied sequentially to the
ARUP KUMAR SEN RUPANJANA leads through the testing socket.
Collector identification. When the
base-emitter junction of a transistor is for-
ward-biased and its base-collector junction

T ransistor lead identification is cru-

cial in designing and servicing. A cir-
cuit designer or a serviceman must be
current enters only through the base. But,
in case of a pnp device, current flows
through the collector as well as the emit-
is reverse-biased, conventional current
flows in the collector-emitter/emitter-col-
lector path (referred to as C-E path in sub-
fully conversant with the types of tran- ter leads. sequent text), the magnitude of which de-
sistors used in a circuit. Erroneous lead During testing, when leads of the pends upon the magnitude of the base cur-
identification may lead to malfunctions, ‘transistor under test’ are connected to rent and the beta (current amplification
and, in extreme cases, even destruction terminals 1, 2, and 3 of the test socket factor in common-emitter configuration) of
of the circuit being designed or serviced. (see Fig.1), each of the leads (collector, the transistor. Now, if the transistor is bi-
Though transistor manufacturers en- base, and emitter) comes in series with ased as above, but with the collector and
capsulate their products in different pack- one of the current directions indicating emitter leads interchanged, a current of
age outlines for identification, it is im- LEDs (D2, D4, and D6) as shown in Fig. 1. much reduced strength would still flow in
possible to memorise the outlines of in- Whenever the current flows toward a par- the C-E path. So, by comparing these two
numerable transistors manufactured by ticular junction through a particular lead, currents, the collector lead can be easily
the industry. Although a number of the LED connected (in proper direction) to identified. In practice, we can apply proper
manuals are published, which provide pin that lead glows up. So, in case of an npn- binary numbers (as in case of the base iden-
details, they may not always be acces- device, only the LED connected to the base tification step mentioned earlier) to the ‘de-
sible. Besides, it is not always easy to lead glows. However, in case of a pnp- vice under test’ to bias the junctions se-
find out the details of a desired transis- device, the other two LEDs are lit. Now, if quentially, in both of the aforesaid condi-
tor by going through the voluminous
manuals. But, a handy gadget, called tran- TABLE I
sistor lead identifier, makes the job easy. Orientation Test socket Test socket Test socket Base-Id Base-Id Collector-Id for
All one has to do is place the transistor No. terminal 3 terminal 2 terminal 1 for npn for pnp pnp and npn
in the gadget’s socket to instantly get the 1 C B E 02 05 04
desired information on its display, irre- 2 C E B 01 06 04
3 E C B 01 06 02
spective of the type and package-outline
4 E B C 02 05 01
of the device under test. 5 B E C 04 03 01
A manually controlled version of the 6 B C E 04 03 02
present project had been published in June B=Base C=Collector E=Emitter Note: All bits of higher nibble are set to zero.
’84 issue of EFY. The present model is to-
tally microprocessor controlled, and hence a glowing LED corresponds to binary 1, an
all manually controlled steps are replaced LED that is off would correspond to binary
TABLE II
by software commands. A special circuit, 0. Thus, depending upon the orientation Q2 (MSB) Q1 Q0 (LSB)
shown in Fig. 1, which acts as an interface of the transistor leads in the test socket, 0 0 1
to an 8085-based microprocessor kit, has we would get one of the six hexadecimal 0 1 0
1 0 0
been developed for the purpose. numbers (taking LED connected to termi-
nal 1 as LSB), if we consider all higher
bits of the byte to be zero. The hexadeci- TABLE III. SET 1
Principle mal numbers thus generated for an npn
—
Q2
—
Q1
—
Q0
Base and type identification. When a and pnp transistor for all possible orien- 0 0 1
semiconductor junction is forward-biased, tations (six) are shown under columns 5 0 1 0
1 0 0
conventional current flows from the source and 6 of Table I. Column 5 reflects the
into the p-layer and comes out of the junc- BCD weight of B (base) position while col-
tion through the n-layer. By applying umn 6 represents 7’s complement of the TABLE IV. SET 2
— — —
proper logic voltages, the base-emitter (B- column 5 number. Q2 Q1 Q0
E) or base-collector (B-C) junction of a bi- We may call this 8-bit hexadecimal 1 1 0
polar transistor may be forward-biased. number base identification number or, in 1 0 1
As a result, if the device is of npn type, short, base-Id. Comparing the base-Id, 0 1 1

6
Fig. 1: Schematic circuit diagram of the transistor lead identifier CONSTRUCTION

tions. As a result, the LEDs con-

nected to the collector and emit-
ter leads start flickering alter-
nately with different bright-
ness. By inserting a resistor in
series with the base, the LED
glowing with lower brightness
can be extinguished.
In the case of an NPN de-
vice (under normal biasing
condition), conventional cur-
rent flows from source to the
collector layer. Hence, the LED
connected to the collector only
would flicker brighter, if a
proper resistor is inserted in
series with the base. On the
other hand, in case of a pnp
device (under normal biasing
condition), current flows from
source to the emitter layer. So,
only the LED connected to the
emitter lead would glow
brighter. As the type of device
is already known by the base-
Id logic, the collector lead can
be easily identified. Thus, for
a particular base-Id, position
of the collector would be indi-
cated by one of the two num-
bers (we may call it collector-
Id) as shown in column 7 of
Table I.
Error processing. Dur-
ing collector identification for
a pnp- or an npn-device, if the
junction voltage drop is low
(viz, for germanium transis-
tors), one of the two currents
in the C - E path (explained
above) cannot be reduced ad-
equately and hence, the data
may contain two logic-1s. On
the other hand, if the device
beta is too low (viz, for power
transistors), no appreciable
current flows in the C-E path,
and so the data may not con-
tain any logic-1. In both the
cases, lead configuration can-
not be established. The rem-
edy is to adjust the value of
the resistor in series with the
base. There are three resistors
(10k, 47k, and 100k) to choose
from. These resistors are con-
nected in series with the test-
ing terminals 1, 2, and 3 re-
spectively. The user has to ro-
tate the transistor, orienting

7
 CONSTRUCTION

nected to in- ‘transistor under test’ is inserted with its

puts of IC 3 collector in slot-3, the base in slot-2, and
(7486, quad 2- the emitter in slot-1 of the testing socket.
input EX - OR Initially, during identification of the
gate). Gates base and type of the device, all the ana-
of IC3 are so logue switches, except SW4, are closed by
wired that the software, applying set-1 binary num-
they function bers to the device. Now, if the device is of
as controlled pnp type, each time the binary number
EX - OR gates. 100 is generated at the output of IC3, the
The outputs BC junction is forward-biased, and hence,
o f IC 3 are a conventional current flows through the
controlled by junction as follows:
the logic level Q2 (logic 1)àSW3àR9àinternal LED of
at pin 12. IC 4àslot3àcollector leadà CB junction
Thus, we ob- à base leadà slot-2à D3à pin 10 of
Fig. 2: Effective biasing of PNP transistors using set 1 binary numbers tain two sets IC5àSW2àQ1 (logic 0).
of outputs Similarly, when the binary number 001
(marked Q 0, is generated, another current would flow
Q 1 , and Q 2 ) through the BE junction and the internal
from IC 3 as LED of IC7. The number 010 has no effect,
given in as in this case both the BC and BE junc-
Tables III tions become reversed biased.
(for pin 12 at From the above discussion it is ap-
logic 1) and parent that in the present situation, as
IV (for pin 12 the internal LEDS of IC4 and that of IC7 are
at logic 0) re- forward-biased, they would go on produc-
spectively. ing pulsating optical signals, which would
One of be converted into electrical voltages by
these two the respective internal photo-transistors.
sets would be The amplified pulsating DC voltages are
chosen for available across their emitter resistors R7
the output by and R17 respectively. The emitter follow-
the software, ers configured around transistors T1 and
by control- T3 raise the power level of the opto-
Fig. 3: Effective biasing of NPN transistors using set 2 binary numbers ling the logi- coupler’s output, while capacitors C3 and
cal state of C5 minimise the ripple levels in the out-
the base in different terminals (1, 2, or 3) pin 12. Set-1 is used to identify the base puts of emitter followers.
on the socket, until the desired results are and type (npn or pnp) of the ‘transistor During initialisation, 8155 is configured
obtained. To alert the user about this ac- under test,’ whereas set-2 is exclusively with port A as an input and ports B and C
tion, a message ‘Adjust LED’ blinks on the used for identification of the collector lead, as output by sending control word 0E(H)
display (refer error processing routine in if the device is of npn type. to its control register.
the software program). The interface. The three data out- Taking output of transistor T1 as
put lines, carrying the stated binary num- MSB(D2), and that of T3 as LSB(D0), the data
bers (coming from pins 3, 6, and 8 of IC3), that is formed during the base identifica-
The circuit are connected separately to three bi-di- tion, is 101 (binary). The microprocessor
The binary number generator. In this rectional analogue switches SW1, SW2, and under the software control, receives this
section, IC1 (an NE555 timer) is used as a SW3 inside IC5 (CD4066). The other sides of data through port A of 8155 PPI (port num-
clock pulse generator, oscillating at about the switches are connected to the termi- ber 81). Since all the bits of the higher
45 Hz. The output of IC1 is applied to clock nals of the test socket through some other nibble are masked by the software, the
pin 14 of IC2 (4017-decade counter). As a components shown in Fig. 1. The control data become 0000 0101=05(H). This data is
result, the counter advances sequentially line of IC3 (pin 12) is connected to the stored at location 216A in memory and
from decimal 0 to 3, raising outputs Q0, Q1, analogue switch SW4 via pin 3 of IC5. The termed in the software as base-Id.
and Q2 to logic-1 level. On reaching the other side of SW4 (pin 4) is grounded. If Now, if the device is of npn type, the
next count, pin 7 (output Q3) goes high and switch SW4 is closed by the software, only binary number that would be effec-
it resets the counter. So, the three outputs set-1 binary numbers are applied to the tive is 010. Under the influence of this
(Q0, Q1, and Q2) jointly produce three binary device under test, and when it is open, number both BC and BE junctions would
numbers, continuously, in a sequential set-2 binary numbers are applied. be forward-biased simultaneously, and
manner (see Table II). To clearly understand the function- hence conventional current would flow in
Q0 through Q2 outputs of IC2 are con- ing of the circuit, let us assume that the the following two paths:

8
 CONSTRUCTION

1. Q1(logic 1)à SW2à R14àinternal

LED (IC6)àslot-2àbase leadàBC junction
LT543
àcollector leadàslot-3à D1à SW3à Q2
(logic 0)
2. Q1 (logic 1)à SW2à R14àinternal
LED (IC6)àslot-2àbase leadàBE junction
à emitter leadà slot 1à D5à SW1à Q0
(logic 0)
Thus, only the internal LED of IC6
would start flickering, and the data that
would be formed at the emitters of the
transistors is also 010. Accordingly, the
base-Id that would be developed in this
case is 0000 0010=2(H).
Since, under the same orientation of
the transistor in the socket, the base-Ids
are different for a pnp and an npn device,
the software can decode the type of the
device.
In a similar way we can justify the
production of the other base-Ids, when
their collector, base, and emitter are in-
serted in the testing socket differently.
Once the base-Id is determined, the
software sends the same number for a
pnp-device (here=05(H)) through port C
(port number 83), with the bit format
shown in Table V.
As a result, the control input of SW2
(pin 12 of IC5) gets logic 0. So the switch
Fig. 4: Schematic circuit of special display system opens to insert resistor R5 in series with
the base circuit. This action is neces-
sary to identify the emitter (and hence
the collector) lead as described earlier
under ‘Principle’ sub-heading.
On the contrary, since an npn-de-

(i) (ii) (iii)

Fig. 5: Flowcharts for the main program and various subroutines

9
 CONSTRUCTION

Fig. 5 (iv)

DISPLAY ROUTINE USING ALTERNATIVE CIRCUIT OF FIG. 4

TABLE V
PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
0 0 0 0 0 1 0 1

TABLE VI
PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
0 0 0 0 1 1 0 1

vice uses the set-2 binary numbers for ters of transistors T 1- T 3

identification of the collector (hence the would be 001. It would be
emitter), the same number (base-Id) ob- modified by the software to
tained during base identification cannot 0000 0001=01(H) . This is
be sent through port C, if the device un- termed in the software as
der test is of npn type. The base-Id found emitter-Id and is stored at
must be EX-ORed first with OF (H). Since memory location 216B.
the base-Id found here is 02 (H), the data On the other hand, if
to be sent through port C in this case the device is of npn type,
would be as shown in Table VI. set-2 binary numbers are
Note that PC3 becomes logic-1, which to be applied to it, and the
would close switch SW4 to get the set-2 transistor would be biased
binary numbers. as shown in Fig. 3. Here,
Once resistor R5 is inserted in the base only the internal LED of IC4
circuit, and set-1 binary numbers are ap- would flicker. So, the data
plied to the device (pnp type), it would be at the output would be
biased sequentially in three distinct ways, 100=04(H). This is termed in
of which only two would be effective. The the software as collector-Id,
same are shown in Fig. 2. and is stored in memory lo- Fig. 5 (v)
In case of binary number 100, the cur- cation 216C. (In case of pnp-
rent through the internal LED of IC4 would device, the collector-Id is determined With this result, the software would
distinctly be very low compared to the mathematically by subtracting the Base- point to configuration CBE in the data
current flowing during number 001 , Id from the emitter-Id.) table, and print the same on the display.
through the internal LED of IC7. If R5 is of So the result could be summarised as: By a similar analysis, lead configuration
sufficiently high value, the former cur- pnp type: for any other orientation of the device in
rent may be reduced to such an extent Base-Id = 05(H), Collector-Id = 01(H). the test socket would be displayed by the
that the related LED would be off. Hence, npn type: software, after finding the related base-
the data that would be formed at the emit- Base-Id = 02(H), Collector-Id = 01(H). and collector-Id.

10
 CONSTRUCTION

PARTS LIST
Semiconductors:
IC1 - NE555, timer
IC3 - CD4017, decade counter-de-
coder
IC3 - 7486, quad EX-OR gates
IC4,IC6,IC7 - MCT2E, optocoupler
IC5 - CD4066, quad bilateral switch
IC8 - LM7805, 3-terminal +5V
regulator
T1,T2,T3 - BC147, npn transistor
D1,D3,D5 - 1N34, point contact diode
D2,D4,D6 - LED, 5mm
D7,D8 - 1N4002, rectifier diode
Resistors (All ¼ watt +/- 5% metal/carbon film
unless stated otherwise)
R1,R9,R10,R14,
R15,R19,R20 - 1 kilo-ohm
R2 - 33 kilo-ohm
Fig. 6: Actual-size, single-sided PCB layout for the circuit in Fig. 1 R5 - 47 kilo-ohm
R4,R11,R16,R21 - 10 kilo-ohm
R3,R6,R7,R12,R17 - 100 kilo-ohm
R8,R13,R18 - 680 ohm
Capacitors:
C1 - 0.5µF polyster
C2 - 0.1µF polyster
C3-C5 - 220µF/12V electrolytic
C6 - 0.22µF polyster
C7 - 1000µF/12V electrolytic
Miscellaneous:
X1 - 230V/9V-0-9V, 250mA power
transformer

The procedure extracts the first data to

be displayed from memory. The start
memory address of the data to be dis-
played is to be supplied by the calling
program. This data (8-bit) is output from
Fig. 7: Component layout for the PCB port B of 8155/8255 PPI (after proper coding
for driving the seven-segment displays),
The Display. The display procedure display procedure. used in the kit. Data lines are connected
described in this article is based on IC Note: Display subroutine at address in parallel to all the octal latches. But
8279 (programmable keyboard/display in- 20FC used at EFY, making use of the moni- only one of the four latches is enabled
terface) which is used in the microproces- tor program of the Vinytics 8085 kit, dur- (via a specific data bit of port C of 8155/
sor kit. The unique feature of the 8279- ing program testing, is listed towards the 8255) to receive the data and transfer the
based display system is that, it can run end of the software program given by the same to its output to drive the correspond-
on its own. You just have to dump the author. To make use of the author’s dis- ing seven-segment LED display. To enable
data to be displayed on its internal RAM, play subroutine, please change the code a particular latch, a logic 1 is sent through
and your duty is over. 8279 extracts this against ‘CALL DISPLAY’ instruction (code a particular bit of port C (bit 4 here, for
data from its RAM and goes on displaying CDFC 20) everywhere in the program to the first data) by the software. Subse-
the same without taking any help or con- code CD 40 21 for 8279 based display or quently, logic 0 is sent through that bit
suming the time of the microprocessor in code CD 07 21 for alternate display referred to latch the data transferred. The pro-
the kit. in the next paragraph. gram then jumps to seek the second data
Unfortunately, not all the micropro- Alternatively, one can construct a spe- from memory, and sends the same
cessor kits present in the market are fit- cial display system using four octal D- through port B as before. However, in this
ted with this IC. Instead, some of them type latches (74373) and four seven-seg- case logic 1 is sent through bit 3 of port
use a soft-scan method for display pur- ment LED displays (LT543). Only one latch C, to latch the data to the second seven-
pose. Hence, the stated procedure cannot and one display has been shown in the segment LED display, and so on.
be run in those kits. Of course, if the schematic circuit of Fig. 4 along with its Register B of 8085 is used as a counter,
monitor program of the kit is to be used, interface lines from 8155 or 8255 of the and is initially stored with the binary
which may have an in-built display rou- kit. To drive this display, a special soft- number 00001000 (08H). Each time a data is
tine to display the content of four spe- scan method explained in the following latched, the logic 1 is shifted right by one
cific memory locations—all at a time, the para has to be used. place. So, after the fourth data is latched,
same may be used in place of the present The soft scan display procedure. the reg. B content would be 0000 0001. Shift-

11
 CONSTRUCTION

Memory Map And Software listing in 8085 Assembly Language Address Op Code Label Mnemonic Comments
RAM Locations used for program :2000H - 21BBH 2087 E607 ANI 07H Checks only first three bits
Stack pointer initialised :2FFFH 2089 EAA021 JPE ERR If 2 bits are at logic-1 jumps to 21A0
Monitor Program :0000H - 0FFFH 208C 326C21 STA 216CH Store the No. (Collector-Id)into mem.
Display Data Table :2160H - 219AH 208F C39220 JMP P4 Jumps to select lead configuration
Control/Status Register of 8155 :80H
Port A (Input) of 8155 :81H ;Lead configuration selection program
Port B (Output) of 8155 :82H 2092 216A21 P4: LXI H,216AH Extracts Base-Id from memory location
Port C (Output) of 8155 :83H 2095 7E MOV A,M 216A to the accumulator
2096 FE05 CPI 05H If the number is 05,
2098 CABA20 JZ P4A jumps to subroutine 4A
Address Op Code Label Mnemonic Comments
209B FE06 CPI 06H If the number is 06,
;Initialisation, base and type identification 209D CAD020 JZ P4B jumps to the subroutine 4B
2000 31FF2F MAIN: LXI SP,2FFFH Initialisation of the ports. A as the 20A0 FE03 CPI 03H If the number is 03,
2003 3E0E MVI A,0EH input and C as the output port. 20A2 CAE620 JZ P4C jumps to the subroutine 4C
2005 D380 OUT 80H Sends 07 through port C to make SW1, 20A5 FE02 CPI 02H If the number is 02,
2007 3E07 MVI A,07H SW2, SW3 ON and SW4 OFF. 20A7 CABA20 JZ P4A jumps to the subroutine 4A
2009 D383 OUT 83H Time delay should be allowed before 20AA FE01 CPI 01H If the number is 06,
200B CD3320 CALL DELAY measuring the logic voltages across 20AC CAD020 JZ P4B jumps to the subroutine 4B
200E CD3320 CALL DELAY capacitors C1, C2, and C3, so that 20AF FE04 CPI 04H If the number is 04,
2011 CD3320 CALL DELAY they charge to the peak values. 20B1 CAE620 JZ P4C jumps to the subroutine 4C
2014 AF XRA A Clears the accumulator 20B4 CDFC20 M: CALL DISPLAY Jumps to display the lead configuration
2015 DB81 IN 81H Input data from interface through. selected in P4A or P4B or P4C
portA 2017E607 ANI 07H Test only first 3 bits, masking others 20B7 C30020 JMP MAIN Jumps back to start
2019 326A21 STA 216AH Stores the number in memory.
;Lead configuration selection (Base Id.=05 or 02)
201C CA2A20 JZ P If the number is zero jumps to 202A
201F EA3D20 JPE P2 If the number has even no. of 1s, 20BA 216C21 P4A: LXI H,216CH Extracts Collector-Id from memory
jumps to 203D (refer note 2) location
2022 E26820 JPO P3 If the number has odd no. of 1s, jump 20BD 7E MOV A,M 216C to the accumulator
to 2068 (refer note 1) 20BE FE01 CPI 01H If it is = 01, jumps to 20CA
2025 00 NOP No operation 20C0 CACA20 JZ E If it is = 04, points to lead
2026 00 NOP No operation configuration “EbC”
2027 00 NOP No operation 20C3 217521 LXI H,2175H in data table
2028 00 NOP No operation 20C6 C3B420 JMP M Jumps to display the lead
2029 00 NOP No operation configuration pointed
202A 218921 P: LXI H,2189H Points to message “PUSH” in data 20C9 00 NOP NOP
table 20CA 217121 E: LXI H,2171H Points to lead config.”CbE” and jumps
202D CDFC20 CALL DISPLAY Displays the message 20CD C3B420 JMP M display the configuration
2030 C30020 JMP MAIN Jumps to start. ;Lead configuration selection (Base Id.= 06 or 01)
;Delay sub-routine 20D0 216C21 P4B: LXI H,216CH Extracts Collector-Id from memory
2033 11FFFF DELAY: LXI D,FFFFH Loads DE with FFFF location
2036 1B DCX D Decrements DE 20D3 7E MOV A,M 216C to the accumulator
2037 7A MOV A,D Moves result into Acc. 20D4 FE02 CPI 02H If it is STE02, jumps to 20E0
2038 B3 ORA E OR E with Acc. 20D6 CAE020 JZ B I If it is =04, points to lead
2039 C23620 JNZ 2036 If not zero, jumps to 2036 20D9 217D21 LXI H,217DH configuration “bEC” in data table
203C C9 RET Returns to calling program 20DC C3B420 JMP M Jumps to display the lead
configuration pointed
;Collector identification program for PNP transistors 20DF 00 NOP No oPeration
203D 216A21 P2: LXI H,216AH Points of Base-Id in data table 20E0 217921 B: LXI H,2179H Points to lead configuration “bCE”
2040 7E MOV A,M Extracts the number to the 20E3 C3B420 JMP M and jumps display the configuration
accumulator
;Lead configuration selection (Base Id.=03 or 04)
2041 D383 OUT 83H Send the number to the interface
2043 216021 LXI H,2160H Points to message ‘PnP’ in data table 20E6 216C21 P4C: LXI H,216CH Extracts Collector-Id from memory
2046 CDFC20 CALL DISPLAY Displays the message location
2049 CD3320 CALL DELAY Waits for few moments 20E9 7E MOV A,M 216C to the accumulator
204C CD3320 CALL DELAY Waits for few moments 20EA FE01 CPI 01H If it is =01, jumps to 20F6
204F CD3320 CALL DELAY Waits for few moments 20EC CAF620 JZ C If it is =02, points to lead
2052 AF XRA A Clears the accumulator 20EF 218121 LXI H,2181H configuration “ECb” in data table
2053 DB81 IN 81H Seeks data from the interface 20F2 C3B420 JMP M Jumps to display the lead
2055 E607 ANI 07H Masks all bits except bits 0,1 and 2 20F5 00 NOP configuration pointed; no operation
2057 EAA021 JPE ERR If the data contains even no. of 1s 20F6 218521 C: LXI H,2185H Points to lead configuration “CEb”
jumps to error processing routine 20F9 C3B420 JMP M and jumps to display the configuration
205A 326B21 STA 216BH Stores the data (Emitter-Id) in memory ;Display routine using 8279 of the kit (if present)
205D 47 MOV B,A Moves the Emitter-Id. to B register 2140 0E04 MVI C,03 Sets the counter to count 4 characters
205E 3A6A21 LDA 216AH Extracts Base-Id from memory 2142 3E90 MVI A,90 Sets cont.8279 to auto-incr. mode
2061 90 SUB B Subtracts Emitter-Id from Base-Id 2144 320160 STA 6001 Address of 8279 cont. reg.=6001
2062 326C21 STA 216CH Stores the result(Collector-Id)in mem. 2147 7E MOV A,M Moves 1st data character from mem.
2065 C39220 JMP P4 Jumps to select lead configuration Loc. pointed to by calling instruction.
;Collector identification program for NPN transistors 2148 2F CMA Inverts data (refer note below)
2149 320060 STA,6000 Stores data in 8279 data reg.
2068 216A21 P3: LXI H,216AH Points to Base-Id in data table (addr=6000)
206B 7E MOV A,M Extract the number to the accumulator 214C 0D DCR C Decrements counter
206C FE07 CPI 07H Refer note 1 214D CA5421 JZ 2154 Returns to calling program if count=0
206E CAB621 JZ ER Jumps to error processing routine 2150 23 INX H Increments memory pointer
2071 EE0F XRI 0FH Refer note 2 2151 C34721 JMP2147 Jumps to get next character from
2073 D383 OUT 83H Send the number to the interface memory
2075 216421 LXI H,2164H Points to the message “nPn” 2154 C9 RET Returns to the calling program
2078 CDFC20 CALL DISPLAY Displays the same
Note: In the microprocessor kit used, data is inverted before feeding the 7-seg display.
207B CD3320 CALL DELAY Waits for few moments
207E CD3320 CALL DELAY Waits for few moments ;Alternative Display Subroutine to be used with interface circuit of Fig. 4
2081 CD3320 CALL DELAY Waits for few moments 2107 0608 MVI B,08H Store 0000 1000 in reg.B
2084 AF XRA A Clears the accumulator 2109 3E00 MVI A,00H Out 00H through Port C to latch data
2085 DB81 IN 81H Seeks data from the interface in all

12
 CONSTRUCTION

Address Op Code Label Mnemonic Comments Addr. Data Display Addr. Data Display Addr. Data Display
210B D383 OUT 83H 74373s. (no data would move to O/Ps) 2164 45 n 217D C7 b 218D C7 b
210D 7E MOV A,M Moves the 1st char. Of the data 2165 37 P 217E 97 E 218E 77 A
pointed, to the accumulator (mem. 2166 45 n 217F 93 C 218F E5 d
address given by 2167 00 2180 00 2190 00
210E D382 OUT 82H calling program) 216A Base-id (store) 2181 97 E 2191 7 a
2110 78 MOV A,B By moving out reg.B data throgh port 216B Emitter-id (store) 2182 93 C 2192 E5 d
C 216C Collector-id (store) 2183 C7 b 2193 E1 J
2111 D383 OUT 83H a specific latch is enabled. 2171 93 C 2184 00 2194 00
2113 1F RAR Logic 1 of counter data moves right 1 2172 C7 b 2185 93 C 2196 83 L
bit 2173 97 E 2186 97 E 2197 97 E
2114 FE00 CPI 00H Checks to see logic 1 moves out from 2174 00 2187 C7 b 2198 77 A
acc. 2175 97 E 2188 00 2199 E5 D
2116 CA2121 JZ 2121H (All 4 data digits latched)to return to 2176 C7 b 219A 00
the calling program. 2177 93 C
2119 47 MOV B,A Else stores back new counter data to B 2178 00
reg.
Address of routines/labels:
211A CD3320 CALL DELAY
211D 23 INX H Memory pointer incremented by 1 MAIN 2000 P 202A DELAY 2033 D 2036
211E C30921 JMP 2109H Jumps to the next character from the P2 203D P3 2068 P4 2092 M 20B4
table P4A 20BA E 20CA P4B 20D0 B 20E0
2121 C9 RET Returns to the calling program P4C 20E6 C 20F6 DISPLAY 20FC ERR 21A0
BAD 21AF ER 21B6
;Error Sub-routine
Notes:
21A0 219121 ERR: LXI H,2191H Points to the message “Adj.” in memory
21A3 CDFC20 CALL DISPLAY Calls the display routine to display the 1. During Base identification, if the data found has odd parity, only then the program
same jumps to this routine (starting at 2068 at P3:) for collector identification. A single logic-1
21A6 CD3320 CALL DELAY Waits denotes a good transistor, whereas three logic-1 (i.e. Base-Id = 07) denote a bad transistor
21A9 CD3320 CALL DELAY Waits with shorted leads. Hence the program jumps to error processing routine to display the
21AC 219621 LXI H,2196H Points to the message “LEAd” in message “bAd”.
memory 2. The purpose of sending the Base-Id number to the interface through Port-C, is to
21AF CDFC20 BAD: CALL DISPLAY Calls the display routine to display insert a resistor in series with the Base (as indicated in the principle above). The logic-1(s) of
21B2 C30020 JMP MAIN Jumps back to start the Base-Id, set the switches connected with the collector and emitter leads to “ON”, and that
21B5 00 NOP No operation with the base to “OFF”. The result is, the resistor already present in the base circuit (10K,
21B6 218D21 ER: LXI H,218DH Points to message “bAd” in the data 47K or 100K which one is applicable), becomes active. To achieve this result, the Base-Id
table found for an NPN device is to be inverted first.
21B9 C3AF21 JMP BAD Jumps to display the message ;Display subroutine used by EFY using monitor program of Vinytics kit.
20FC C5 DISPLAY: PUSH B
Data table:
20FD 3E00 MVI A,0H
Addr. Data Display Addr. Data Display Addr. Data Display 20FF 0600 MVI B,0H
2160 37 P 2179 C7 b 2189 37 P 2101 7E MOV A,M
2161 45 n 217A 93 C 218A E3 U 2102 CDD005 CALL 05D0H
2162 37 P 217B 97 E 218B D6 S 2105 C1 POP B
2163 00 217C 00 218C 67 H 2106 C9 RET

TABLE VII back to the calling one. It would be inter-

esting to note the same reg. B content (a
; Modification to Collector Identification Program for pnp Transistors
binary number comprising a logic 1) is
Address Op Code Label Mnemonic Comments
sent through port C to enable the particu-
203D 216021 P2: LXI H,2160H Points to message ‘PnP’in data table lar latch.
2040 CDFC20 CALL DISPLAY Displays the message
2043 216A21 LXI H,216AH Points to Base-Id in data table Since the base Id numbers and the
2046 7E MOV A,M Extract the number to the accumulator code to enable a specific latch are sent
2047 D383 OUT 83H Send number via port C to interface through the same port (port C) in the
alternate display, the base Id must be
TABLE VIII sent first for displaying the message PnP/
nPn. Therefore changes or modifications
; Modification to Collector Identification Program for npn Transistors
are required in the original program per-
Address Op Code Label Mnemonic Comments
taining to collector identification program
2068 216421 P3: LXI H,2164H Points to the message ‘nPn’
206B CDFC20 CALL DISPLAY Displays the same on display. for pnp transistors (at locations 203D
206E 216A21 LXI H,216AH Points to Base-Id in DATA table through 2048) and npn transistors (at lo-
2071 7E MOV A,M Extract the number to the accumulator cations 2068 through 207A) as given in
2072 FE07 CPI 07H Refer note.1 (see original program.) Tables VII and VIII respectively.
2074 CAB621 JZ ER Jumps to error processing routine
Software flow charts. Software flow
2077 EE0F XRI 0FH Refer note.2 (see original program.)
2079 D383 OUT 83H Send number to interface (via port C) charts for main program and various sub-
routines are shown in Fig. 5.
ing operation is done after first moving Now, with the reg. B content = 0000 0001, PCB and parts list are included only
the data from the register to the accumu- one more shifting of the bits towards right for the main interface diagram of Fig. 1.
lator, and then storing the result back would make the accumulator content = The actual-size, single-sided PCB for the
into the register once again if the zero 0000 0000 , which would set the zero same is given in Fig. 6 while its compo-
flag is not set by the RAR operation. flag. And hence the program would jump nent layout is shown in Fig. 7. ❏

13
 CONSTRUCTION

PARTS LIST-1

CONVERSION OF AUDIO CD PLAYER

Semiconductors:
IC1 - LM7805 voltage regulator +5V
Resisters (All ¼W, ±5% metal/carbon film,
unless stated otherwise):

TO VIDEO CD PLAYER — I
R1 - 68 ohm
R2, R3 - 1 kilo-ohm
G.S. SAGOO VR1 - 100 ohm cermet (variable resistor)
Capacitors:
C1 - 1µF paper (unipolar)
PUNERJOT SINGH MANGAT C2 - 10µF, 16V electrolytic
Miscellaneous:

T
he analogue technology is giving tal data, read from the CD, is reconverted X1 - 230V AC primary to 12V-0-12V, 1A sec.
way to the digital technology as into analogue signals. In case of video sig- transformer
S1, S2 - Push-to-on tactile switch
the latter offers numerous advan- nals, the process used for recording and - MPEG decoder card (Sony Digital Tech.)
tages. Digital signals are not only free reproduction of data is the same as used - TV modulator (optional)
from distortion while being routed from for audio CDs. However, there is an addi- - AF plugs/jacks (with screened wire)
- Co-axial connectors, male/female
one point to another (over various me- tional step involved—both during record- - Co-axial cable
dia), but error-correction is also possible. ing as well as reproduction of the digital
Digital signals can also be compressed video signals on/from the compact disk. Conversion
which makes it possible to store huge This additional step relates to the com-
amounts of data in a small space. The pression of data before recording on the An audio CD player, which is used to play
digital technology has also made remark- CD and its decompression while it is being only audio CDs, can be converted to play
able progress in the field of audio and read. As video data requires very large the video CDs as well. Audio CD players
video signal processing. storage space, it is first compressed using have all the required mechanism/functions
Digital signal processing is being MPEG- (Motion Picture Expert Group) com- to play video CDs, except an MPEG card,
widely used in audio and video CDs and CD patible software and then recorded on the which is to be added to the player. This
playing equipment. These compact disks CD. On reading the compressed video data MPEG card is readily available in the mar-

have brought about a revolution in the from the CD, it is decompressed and passed ket. This MPEG card decompresses the data
field of audio and the video technology. In to the video processor. Thus with the help available from the audio CD player and con-
audio CDs, analogue signals are first con- of the compression technique huge amount verts it into proper level of video signals
verted into digital signals and then stored of video data (for about an hour) can be before feeding it to the television.
on the CD. During reproduction, the digi- stored in one CD.
Construction
Step-by-step conversion of audio CD player
to video CD player is described with refer-
ence to Fig. 1.
Step 1. Connection of MPEG card
to TV and step-down power trans-
former to confirm proper working of
the MPEG card.
● Connect IC7805, a 5-volt regulator, to the

MPEG card. Please check for correct pin

assignments.
● Connect audio and video outputs of the

Fig. 1: Complete schematic layout and connection diagram for conversion of

Audio CD to Video CD player Fig 2: Photograph of TV scene

14
 CONSTRUCTION

MPEG card to the audio/video input of TV form RF EFM in pin of the IC and find TABLE I
via jacks J7 and J11 respectively. Use any solder joint (land) on this PCB track. POSSIBLE EXTRA FUNCTIONS
only shielded wires for these connections. Solder a wire (maximum half meter) to S1 (mode switch) S2 (function switch)
● Check to ensure that the step-down this solder joint carefully. Other end of Slow —
transformer provides 12-0-12 volts at this wire should be joined to RF jack J2 Discview —
Pal/NTSC Pal NTSC
1 ampere of load, before connecting it of the MPEG card. Vol+ Volume Up
to the MPEG card. Connect it to the MPEG Caution: Unplug the soldering iron Vol- Volume Down
card via jack J1. form the mains before soldering this Key+ Left volume down
Key- Right volume down
● Switch on the TV to audio/video mode wire because any leakage in the sol- L/R/CH Left, Right, Mute, Stereo
of operation. Adjust the 100-ohm pre- dering iron may damage the audio CD Play/Pause —
set connected at the video output of player. Note: The above mentioned functions can also be accessed
MPEG card to mid position. ● Another wire should be joined between using remote control.
● Switch on the MPEG card by switching the ground of the audio CD player and
on 230 volts main supply to the 12-0- the ground of jack J2 of the MPEG card. Kenwood Diskman. A photograph of one
12 volt transformer. ● This finishes the connection of the MPEG of the scenes in black and white is in-
● If everything works right, ‘Sony Digital card to the audio CD player. cluded as Fig. 2. (Please see its coloured
Technology’ will be displayed on the Step 3. Playing audio and video CDs. clipping on cover page.)
television. The TV screen will display ● Switch on the power for the audio CD No special PCB is required and hence
this for about 5 seconds before going player and the MPEG card. the same is not included.
blank. Adjust the 100-ohm preset for ● Put a video CD in the audio CD player The author has perferred to use Sony
proper level of video signals. and press its play button to play the Digital Technology Card (against KD680 RF-
Step 2. Connections to audio CD video CD. 35C of C-Cube Technology) because of many
player after confirmation of proper ● After a few seconds the video picture more functions it provides.
functioning of MPEG card during recorded on the CD will appear on the Additional accessibility features of this
step1. television. card (Sony Digital Technology), as shown
● Open your audio CD player. Do this very ● The play, pause, eject, rewind, forward, in Table I can be invoked by adding two
carefully, avoiding any jerks to the au- track numbers, etc buttons present on push-to-on switches between jack 8(J8) and
dio CD player, as these may damage the the audio CD can be used to control the ground via 1K resistors (Fig 1). These will
player beyond repair. new video CD player. enhance the already mentioned functions
● Look for the IC number in Table II (on Now your audio CD player is capable and facilities available on this card, even
page 47) that matches with any IC in of playing video CDs as well. You can con- though it has not been possible to exploit
your audio CD player. nect a power amplifier to the MPEG card the card fully due to non-availability of
● After finding the right IC, note its RF to get a high-quality stereo sound. The technical details. I hope these additions
EF MIN pin number from the Table I. author tested this project on many audio will help the readers get maximum mile-
● Follow the PCB track which leads away players including Thompson Diskman and age from their efforts.

and backward scan facility with 9-view

CONVERSION OF AUDIO CD PLAYER

pictures, slow-motion play, volume and
tone control and R/L (right/left) vocal.

TO VIDEO CD PLAYER — II
K.N. GHOSH

W
ant to convert your audio com- dard, the international stan-
pact disk player into video com- dard specification for compress-
pact disk player. Here is a ing the moving picture and au-
simple, economical but efficient add-on cir- dio, comprising a DSP (digital
cuit design that converts your audio signal processor) IC chip, CL860
CDplayer to video CD player. from C-cube (Fig. 3). The VCD
decoder card features small
size, high reliability, and low
Description power consumption (current
Decoder card. The add-on circuit is about 300ma) and real and gay
based on VCD decoder card, KD680 RF-3Sc, colours. This decoder card has
also known as MPEG card adopting MPEG- two play modes (Ver. 1.0 and
1 (Motion Picture Expert Group) stan- Ver. 2.0) and also the forward Fig. 3: Layout diagram of MPEG card from c-cube

15
 CONSTRUCTION

TABLE II PARTS LIST-2 put (AV in) facility in their TV, can make
DSP ICs and their EFM RF pin numbers Semiconductors: use of a pre-assembled audio-video to RF
DSP IC EFM DSP IC EFM IC1 - LM78L05, voltage regulator +5V converter (modulator) module of 48.25MHz
/RF Pin /RF Pin IC2 - 78L12, voltage regulator +12V or 55.25 MHz (channel 2 or channel3),
KS 5950 5 CXA 1372Q 32, 46 D1,D2 - 1N4001, rectifier diode which is easily available in the market
KS 5990, 5991 5 CXA 1471S 18, 27 Capacitors:
KS 9210 B 5 CXA 1571S 18, 35
(refer Fig. 4). The audio and video signals
C1 - 2200µF, 35V electrolytic
KS 9211 B E, 9212 5 AN 8370S 12, 31 C2,C3 - 100µF, 16V electrolytic from the decoder card are suitably modu-
KS 9282 5, 66 AN 8373S 9, 35 lated and combined at the fixed TV
KS 9283 66 AN 8800SCE 12 Miscellaneous:
KS 9284 66 AN 8802SEN 9 - 230V AC primary to 18V-0-18V, channel’s frequency in the RF modulator.
CXD 1125 QX 5 TDA 3308 3 1A sec. transformer The output from the modulator can be con-
CXD 1130 QZ 5 LA 9200 35 - MPEG decoder card (C-cube Digital
CXD 1135 5 LA 9200 NM 36
nected to antenna connector of a colour
Tech.)
CXD 1163 Q 5 LA 9211 M 72 - TV modulator (optional)
television.
CXD 1167 R 36 HA 1215 8 NT 46, 72 Power supply unit: The VCD decoder
- AF plugs/jacks (with screened wire)
CXD 1167 Q/QE 5 SAA 7210 3, 25
CXD 20109 9, 20 (40 pin) - Co-axial connectors, male/female card and theRF modulator requires +5V and
CXD 2500 AQ/BQ 24 SAA 7310 32 - Co-axial cable +12V regulated power supply
CXD 2505 AQ 24 (44 pin) respec-
SAA 7341 36, 38
CXD 2507 AQ 14 SAA 7345 8 tively. Sup-
SAA 7378 15 ply design
CXD 2508 AQ 36 TC 9200 AF 56
CXD 2508 AR 36
uses two lin-
TC 9221 F 60
CXD 2509 AQ 34 TC 9236 AF 51,56 ear regula-
CXD 2515 Q 36, 38 TC 9284 53 tors7805 and
CXD 2518 Q 36 YM 2201/FK 76
LC 7850 K 7 YM 3805 8 7812 (Fig. 5).
LC 7860 N/K/E 7, 8 YM 7121 B 76 The voltage
LC 7861 N 8 YM 7402 4, 71 regulators
LC 7862 30 HD 49215 71
LC 78620 11 HD 49233 19 fitted with
LC 78620 E 11 AFS TO 220 -type
LC 7863 8 UPD 6374 CU 23
LC 7865 8
heat sink
UPD 6375 CU 46
M 50422 P 15 should be
LC 7866 E 7, 8 M 50427 FP 15, 17 mounted on
LC 7867 E 8 M 504239 17
LC 7868 E 8 M 515679 4 eht CD
Fig. 5: Power supply to cater for MPEG card and RF modulator
LC 7868 K 8 M 51598 FP 20 p l a y e r
LC 78681 8 MN 35510 43 enclosure’s
MN 6617 74 M 65820 AF 17
MN 6222 11 M 50423 FP 17 rear panel The circuit
MN 6625 S 41 CX 20109 20, 9 can be wired on a gen-
MN 6626 3, 62 SAA7311 25
MN 6650 6 M50122P 15
eral-purpose PCB.
MN 66240 44 M50123 FP 17 Installation
MN 66271 RA 44, 52 M50127 FP 17 steps:
MN 662720 44 UPD6374 CV 3
CXA 72S 18, 46 NM2210FK 76
1. Find suitable
CXA 1081Q 2, 27 YM2210FK 76 place in the enclosure
Fig. 6: Block diagram of connections to decoder card and codulator
of the audio CD player
cuit, digital to analogue converter, micro for fixing the decoder card, RF modulator,
The decoder card converts your CD play- computer interface, video signal proces- and the power supply unit. Make appro-
ers or video games to VCD player to give sor, and error detector, etc. Audio and priate diameter holes and fix them firmly.
almost DVD-quality pictures. video signals stored on a CD are in a high- 2. Make holes of appropriate dimen-
The decoder card mainly consists of density digital format. On replay, the digi- sions on the rear panel for fixing sockets
sync signal separator, noise rejection cir- tal information is read by a laser beam for power supply and RF output.
and converted into analogue 3. Refer to Table II (Combined for Part-
signals. I and II) and confirm DSP chip type of the
One can also use another existing audio CD player for EFM (eight to
VCD decoder card comprising an fourteenth modulation)/RF Signal (from op-
MPEG IC 680, from Technics, and tical pick-up unit of the audio CD player)
a DSP IC chip, CXD2500, with pow- pin number, connect EFMin wire to this
erful error-correction from pin.
Sony. Similarly, another card, 4. Make all the connections as per Fig.
KD 2000-680 RF comprising an 6.
MPEG IC chip, CL680 from Tech- Text of articles on the above project
nics and a DSP IC chip, MN6627 received separately from the two authors
from C-cube. have been been reproduced above so as to
RF modulator. For those make the information on the subject as
Fig. 4: Layout of TV RF modulator who do not have audio-video in- exhaustive as possible. We are further

16
 CONSTRUCTION

adding the following information which player part. The DSP chip, more often than served that frequently, the picture/
we have been able to gather during the not, would be a multipin SMT device. In frames froze on the CTV screen and the
practical testing of the project at EFY. the AIWA system we located two such chips power to the MPEG converter card had to
1. There may be more than one PCB (LA9241M and LC78622E both from Sanyo). be switched off and on again. This fault
used in an audio CD player (i.e additional Their data-sheets, picked up from the was attributed to inability of 7805 regu-
for FM radio and tape recorder functions) Internet, revealed the former chip to be an lator to deliver the required current
and even the DSP chips referred in Table1, ASP (analogue signal processor) and latter (about 300 mA) to the MPEG card. The
may not figure on it. For example, we could one (LA78622E) is the CD player DSP chip for regulator circuit was therefore modified
not find the subject IC used in AIWA audio which EFMIN is not found in Table I. For as shown in Fig. 7 to provide a bypass
CD player. The PCB, which is located clos- this chip EFMIN pin is pin 10 while pin 8 is path for current above 110 mA (approxi-
est under the laser system, is related to CD the nearest digital ground pins–which we mately). A step-down transformer of 9V-
used. 0-9V, 500mA is adequate if the modula-
2. Of the two converter cards tor has its own power supply arrange-
(one displaying ‘Sony Digital ment (refer paragraph 4 below).
Technology' and the other dis- 4. RF modulator for TV channels E2
playing ‘C-cube Technology’ and E3 are available in the market com-
on the CTV screen), the latter plete with step-down transformer, hence
card's resolution and colour qual- there may not be any need to wire up a
ity was found to be very good 12V regulator circuit of part II.
when tested by us. The C-cube 5. Apart from the facilities (available
card needs a single 5V DC supply in the MPEG decoder card KD680RF-3SC from
Fig. 7: Modified 5V regulator for enhancing current for its operation. C-cube) as explained by the author, there
capability 3. During testing it was ob- are other facilities such as IR remote con-
trol of the card functions (via Jack J5)
and realisation of change-over between
NTSC and PAL modes (via jack J 4 –no
connections means PAL mode). Similarly,
Jack J1 is meant for external audio and
video input from exchange and connec-
tion of audio and video outputs to
CTV. The foregoing information is avail-
able on document accompanying the
MPEG decoder card. However, the detailed
application/information is not provided
and as such we have not tested these
facilities.
6. EFM is a technique used for encod-
ing digital samples of audio signals into
series of pits and lands into the disc sur-
face. During playback these are decoded
into digital representation of audio sig-
nal and converted to analogue form us-
ing digital-to-analogue converter for even-
tual feeding to the loud speakers.
7. For those enthusiasts who wish to
rig-up their own video modulator, an ap-
plication circuit from National Semicon-
ductor Ltd, making use of IC LM 2889 ,
which is pin for pin compatible with
LM1889 (RF section), is given in Fig 8.
Fig. 8: Two channel video modulator with FM sound —Tech Editor

www.electronicsforu.com
a portal dedicated to electronics enthusiasts

17
 CIRCUIT IDEAS
CIRCUIT IDEAS

MULTIPURPOSE CIRCUIT
the telephone ring.
A CID can be connected using a relay.
The relay driver transistor can be con-

FOR TELEPHONES
nected via point A as shown in the cir-
cuit. To use the circuit for warning
G.S. SAGOO against misuse, switch S1 can be left in
on position to activate the piezo-buzzer
when anyone tries to tap the telephone
RANJITH G. PODUVAL
line. (When the telephone line is tapped,
it’s like the off-hook mode of the tele-

T
his add-on device for telephones happens, the voltage across transistor T1’s phone hand-set.)
can be connected in parallel to the base-emitter junction falls below its con- Two 1.5V pencil cells can provide Vcc1
telephone instrument. The circuit duction level to cut it off. As a result tran- power supply, while a separate power sup-
provides audio-visual indication of
on-hook, off-hook, and ringing
modes. It can also be used to con-
nect the telephone to a CID (caller
identification device) through a re-
lay and also to indicate tapping or
misuse of telephone lines by sound-
ing a buzzer.
In on-hook mode, 48V DC supply
is maintained across the telephone
lines. In this case, the bi-colour LED
glows in green, indicating the idle
state of the telephone. The value of
resistor R1 can be changed some-
what to adjust the LED glow, with-
out loading the telephone lines (by
trial and error).
In on-hook mode of the hand-
set, potentiometer VR1 is so adjusted
that base of T1 (BC547) is forward bi-
ased, which, in turn, cuts off transistor T2 sistor pair T2-T3 starts oscillating and the ply for Vcc2 is recommended to avoid
(BC108). While adjusting potmeter VR1, en- piezo-buzzer starts beeping (with switch draining the battery. However, a single
sure that the LED glows only in green and S1 in on position). At the same time, the 6-volt supply source can be used in con-
not in red. bi-colour LED glows in red. junction with a 3.3V zener diode to cater
When the hand-set is lifted, the volt- In ringing mode, the bi-colour LED to both Vcc2 and Vcc1 supplies.
age drops to around 12V DC. When this flashes in green in synchronisation with

and D pads. The correct code sequence for

SIMPLE CODE LOCK G.S. SAGOO

energisation of relay RL1 is realised by
clocking points A, B, C, and D in that or-
der. The five remaining switches are con-
YASH D. DOSHI nected to reset pad which resets all the
flip-flops. Touching the key pad switch A/

T
he circuit described here is of an example, if the code is 1756, connect line B/C/D briefly pulls the clock input pin high
electronic combination lock for 1 to A, line 7 to B, line 5 to C, line 6 to D and the state of flip-flop is altered. The Q
daily use. It responds only to the and rest of the lines—2, 3, 4, 8, and 9—to output pin of each flip-flop is wired to D
right sequence of four digits that are the reset pad as shown by dotted lines in input pin of the next flip-flop while D pin
keyed in remotely. If a wrong key is the figure. of the first flip-flop is grounded. Thus, if
touched, it resets the lock. The lock code The circuit is built around two CD4013 correct clocking sequence is followed then
can be set by connecting the line wires to dual-D flip-flop ICs. The clock pins of the low level appears at Q2 output of IC2 which
the pads A, B, C, and D in the figure. For four flip-flops are connected to A, B, C, energises the relay through relay driver

18
 CIRCUIT IDEAS

transistor T1. The reset keys

are wired to set pins 6 and
8 of each IC. (Power-on-reset
capacitor C1 has been added
at EFY during testing as the
state of Q output is indeter-
minate during switching on
operation.)
This circuit can be use-
fully employed in cars so
that the car can start only
when the correct code se-
quence is keyed in via the
key pad. The circuit can also
be used in various other ap-
plications.

a reference potential set by preset VR1.

AUTOMATIC BATHROOM LIGHT

The preset is so adjusted as to provide
an optimum threshold voltage so that out-
put of IC2(a) is high when the door is
closed and low when the door is open.
G.S. SAGOO Capacitor C1 is connected at the output
JAYAN A.R. to filter out unwanted transitions in out-

T
his circuit is used to automate the the door with a small sepa-
working of a bathroom light. It is ration between them as
designed for a bathroom fitted shown in Fig. 1. The radia-
with an automatic door-closer, where the tion from IR LED is blocked
manual verification of light status is dif- by a small opaque strip (fit-
ficult. The circuit also indicates whether ted on the door) when the
the bathroom is occupied or not. The cir- door is closed. Detector di-
cuit uses only two ICs and can be oper- ode D2 has a resistance in
ated from a 5V supply. As it does not use the range of meg-ohms when
any mechanical contacts it gives a reli- it is not activated by IR rays.
able performance. When the door is opened,
One infrared LED (D1) and one infrared the strip moves along with
detector diode (D2) form the sensor part of it. Radiation from the IR LED
the circuit. Both the infrared LED and the turns on the IR detector di-
detector diode are fitted on the frame of ode and the voltage across

Fig. 2

it drops to a put voltage generated at the time of open-

low level. ing or closing of the door. Thus, at point
C o m - A, a low-to-high going voltage transition
parator is available for every closing of the door
LM 358 IC 2(a) after opening it. (See waveform A in Fig.
compares 2.)
the voltage The second comparator IC2(b) does the
across the reverse of IC2(a), as the input terminals
photodetec- are reversed. At point B, a low level is
Fig. 1 tor against available when the door is closed and it

19
 CIRCUIT IDEAS

switches to a high level when

the door is opened. (See wave-
form B in Fig. 2.) Thus, a low-
to-high going voltage transi-
tion is available at point B for
every opening of the door,
from the closed position. Ca-
pacitor C2 is connected at the
output to filter out unwanted
transitions in the output volt-
age generated at the time of
closing or opening of the door.
IC 7474, a rising-edge-sen-
sitive dual-D flip-flop, is used
in the circuit to memorise the
occupancy status of the bath-
room. IC 1(a) memorises the
state of the door and acts as
Fig. 3
an occupancy indicator while
IC2(b) is used to control the re-
lay to turn on and turn off the bathroom The occupancy indicator red LED (D3) is off closing of the door. (See waveform C in
light. Q output pin 8 of IC1(b) is tied to D at this point of time, indicating that the Fig. 2.)
input pin 2 of IC1(a) whereas Q output pin room is vacant. When the person exits the bathroom,
5 of IC1(a) is tied to D input pin 12 of When a person enters the bathroom, the door is opened again. The output of
IC1(b). the door is opened and closed, which pro- IC1(b) switches to high level, turning off
At the time of switching on power for vides clock signals for IC1(b) (first) and the bathroom light. (See waveform D in
the first time, the resistor-capacitor com- IC1(a). The low level at point C (pin 5) is Fig. 2.) The closing of the door by the
bination R3-C3 clears the two flip-flops. As clocked in by IC1(b), at the time of open- door-closer produces a low-to-high transi-
a result Q outputs of both IC1(a) and IC1(b) ing the door, keeping the light status un- tion at the clock input (pin 3) of IC1(a).
are low, and the low level at the output changed. This clocks in the low level at Q output
of IC1(b) activates a relay to turn on the The high level point D (pin 8) is of IC1(b) point D to Q output of IC1(a)
bathroom light. This operation is inde- clocked in by IC1(a), turning on the occu- point C, thereby turning off the occupancy
pendent of the door status (open/closed). pancy indicator LED (D3) on at the time of indicator.

SMART FLUID LEVEL INDICATOR

generated by blanking ‘b’ and ‘c’ segments
of the seven-segment display while it de-
codes digit 8. Letter F is obtained by
blanking segment ‘b’ while it decodes let-
ter P.
THOMMACHAN THOMAS RUPANJANA
As CMOS ICs are used, the current con-

M
ost of the fluid level indicator play driver IC. This decoder IC is capable TABLE I
circuits use a bar graph or a of producing some English alphabets be- D C B A DISPLAY
seven-segment display to indi- sides the usual digits 0 through 9. The L L L L 0
cate the fluid level. Such a display using BCD codes for various displays are given L L L H 1
LEDs or digits may not make much sense in Table I. The BCD codes are generated — — — — 2
to an ordinary person. The circuit pre- by NOR gates because of their intercon- — — — — 3
— — — — 4
sented here overcomes this flaw and dis- nections as the sensing probes get im- — — — — 5
plays the level using a seven-segment dis- mersed in water. Their operation being — — — — 6
play—but with a difference. It shows each self-explanatory is not included here. — — — — 7
level in meaningful English letters. It dis- Note that there is no display pattern H L L L 8
plays the letter E for empty, L for low, H like E or F available from the IC. There- H L L H 9
H L H L L
for half, A for above average, and F for fore to obtain the pattern for letters E H L H H H
full tank . and F, transistors T1 and T2 are used. H H L L P
The circuit is built using CMOS ICs. These transistors blank out the unneces- H H L H A
CD4001 is a quad. NOR gate and CD4055 is a sary segments from the seven-segment H H H L —
H H H H BLANK
BCD to seven-segment decoder and dis- display. It can be seen that letter E is

20
 CIRCUIT IDEAS

sumption is extremely low. This makes it mersed in water) is of the order of 70 µA, Note: This circuit should not be
possible to power the circuit from a bat- which results in low rate of probe dete- used with inflammable or highly reactive
tery. The input sensing current through rioration due to oxidation as also low lev- fluids.
the fluid (with all the four probes im- els of electrolysis in the fluid.

The programmable peripheral interfacing

(PPI)Intel-8255-I chip present in the micro-
processor kit has been used. It has three

AUTOMATIC SCHOOL
8-bit wide input/output ports (port A, port
B, and port C). Control word 80 (hex) is
used to initialise all ports of 8255-I as out-
put ports. Bit 0 of port A (PA0) is connected

BELL SYSTEM RUPANJANA

to the base of transistor BC107 through a
10-kilo-ohm resistor as shown in the fig-
ure. It is used to energise the relay when
PA0 pin of 8255-I is high. A siren, hooter,
or any bell sound system with an audio
Dr D.K. KAUSHIK amplifier of proper wattage (along with 2
or 3 loudspeakers) may be installed in

T
his is an effective and useful has been tested by the author on a the school campus. The relay would get
project for educational institu- Vinytics’ microprocessor-8085 kit (VMC- energised after every 40 minutes for a
tions. In most schools and col- 8506). The kit displays
leges, the peon rings the bell after every the period number on
period (usually of a 40-minute duration). two most significant
The peon has to depend on his wrist watch digits of address field
or clock, and sometimes he can forget to and minutes of the
ring the bell in time. In the present sys- period elapsed on the
tem, the human error has been elimi- next two digits of the
nated. Every morning, when the school address field. The
starts, someone has to just switch on the data field of the kit
PA O
system and it thereafter work automati- displays seconds con-
cally. tinuously.
The automatic microprocessor con- The idea used
trolled school bell system presented here here is very simple.

21
 CIRCUIT IDEAS

few seconds. The program (software) and have been used in the program. Please data field is used for display. Similarly,
data used for the purpose are given be- note that before calling the display rou- if register B contains 00 then no dot
low in mnemonic and machine code forms. tine, registers A and B are required to be is displayed at the end of address field,
The program is self-explanatory. initialised with either 00 or 01 to indicate else if B contents are 01, a dot is
The program and data have been en- to the monitor program as to where the displayed.
tered at specific memory locations. How- contents of above-mentioned memory lo- When the program is executed on the
ever, the readers are at liberty to use any cations are to be displayed (e.g. address microprocessor kit, a bell sound would be
other memory area in their kits, depend- field or data field), and whether a dot heard for a few seconds. The address and
ing on their convenience. Two monitor is to be displayed at the end of address data fields would initially display :
programs (stored in kit’s ROM/EPROM) at field or not. (Readers should refer to their 01 00 00
locations 0347H (for clearing the display) kit’s documentation before using the dis- 01 indicates start of first period with 00
and 05DOH (for displaying contents of play routine.) In Vinytics’ kit, if register as elapsed minutes and 00 seconds in the
memory locations 2050H through 2055 in A contents are 00, the address field is data field. The data field (seconds) are
the address and data fields respectively) used for display, and if it is 01, the continuously incremented.

Address Op-code Label Mnemonic Comments Address Op-code Label Mnemonic Comments
20 FC 3E 80 MVI A, 80H Initialise 8255-I as output port 21 66 3E 04 SS MVI A, 04 Put A=4
20 FE DE 03 OUT 03 H 21 68 77 MOV M, A
2100 31 FF 27 LXI SP, 27FFH Initialise the stack pointer 21 69 AF TT XRA A A=0
2103 CD 47 03 CALL 0347H Clears the display 21 6A 47 MOV B,A B=0
2106 C3 69 21 JMP TT Jump to ring the bell 21 6B 21 50 20 LXI H, 2050H
2109 AF AA XRA A Put A=0 21 6E CD D0 05 CALL 05D0H Display the period no. and minutes
210 A 47 MOV B, A Put B=0 in address field
210 B 21 50 20 LXI H, 2050 H Starting address of display 21 71 3E 01 MVI A, 01H A=1
210 E CD D0 05 CALL 05D0H Call output routine to display period 21 73 06 00 MVI B, 00H B=0
no. & minutes to address field 21 75 21 54 20 LXI H, 2054 H
21 11 3E 01 MVI A, 01H A=01 21 78 CD D0 05 CALL 05D0 H Display the seconds in data field
21 13 06 00 MVI B, 00H B=00 21 7B 3E 01 MVI A, 01H
21 15 21 54 20 LXI H, 2054H Current sec. 21 7D D3 00 OUT 00H Exite the 8255:1 for engergising the
21 18 CD D0 05 CALL 05D0H Address of LSD of current sec. relay (rings the bell)
21 1B 21 55 20 LXI H, 2055H 21 7F 21 55 20 LXI H, 2055H
21 1E 7E MOV A, M Move the LSD of current sec. to acc. 21 82 3E 00 MVI A, 00H Stores 00 to memory location
21 1F C6 01 ADI 01 H Add 01 to acc. 21 84 77 MOV M, A 2055 to
21 21 FE 0A CPI 0AH Compare LSD of sec. with 0AH (10 21 85 2B DCX H 2052 H
decimal) 21 86 77 MOVM, A
21 23 CA 36 21 JZ RR If LSD completes 09 jump to RR 21 87 2B DCX H
21 26 77 MOV M, A Move the acc. content to 20 55 H 21 88 77 MOV M, A
location 21 89 2B DCX H
21 27 06 02 DD MVI B, 02H Delay 21 8A 77 MOV M,A
21 29 11 00 FA YY LXI D, FA00H Sub- 21 8B 2B DCXH
21 2C CD 00 25 CALL 2500H Routine 21 8C 7E MOV A, M Brings the LSD current period
21 2F 05 DCR B For no. to acc
21 30 C2 29 21 JNZ YY 1 second 21 8D C6 01 ADI 01 Add 1 to it compare with OA
21 33 C3 09 21 JMP AA After delay of 1 sec. 21 8F FE 0A CPI 0A
Jump to AA for display the time 21 91 CA 98 21 JZ XX If LSD of period no. complete 09 then
21 36 3E 00 RR MVI A, 00H A=0 jump to XX
21 38 77 MOV M, A Store Acc. To memory location 21 94 77 MOVM, A Else store it to memory location
21 39 2B DCX H Decrement HL pair content 21 95 C3 A0 21 JMP XY Jump to XY
21 3A 7E MOV A, M Move the MSD of sec to acc. 21 98 3E 00 XX MVI A, 00H A=0
21 3B C6 01 ADI 01H Add 01 to Acc. 21 9A 77 MOV M,A Store it to main location
21 3D FE 06 CPI 06H Compare MSD of sec with 06H 21 9B 2B DCX H
21 3F CA 46 21 JZ UU If sec. complete 59 move to UU 21 9C 7E MOV A, M Store MSD of period no. to acc
21 42 77 MOV M, A Store acc. content to memory 21 9D C6 01 ADI 01H Add 1 to it
location 21 9F 77 XXX MOV M,A Store it memory location
21 43 C3 27 21 JMP DD Jump for delay of 1 sec. 21 A0 06 02 XY MVI B, 02
21 46 3E 00 UU MVI A, 00 Put A=00 after completing 59 21 A2 11 00 FA XYZ LXI D, FA 00H Program 1 sec display
seconds 21 A5 CD 00 25 CALL 2500 H
21 48 77 MOV M,A 21 A8 05 DCR B
21 49 2B DCX H 21 A9 C2 A2 21 JNZ XYZ
21 4A 7E MOV A,M Move current LSD of minutes to acc. 21 AC AF XRA A=0
21 4B C6 01 ADI 01H Add 01 to acc. 21 AD 47 MOV B,A B=0
21 4D FE 0A CPI 0A Compares acc. to 0A H 21 AE 21 50 20 LXI H, 2050H
21 4F CA 56 21 JZ VV Jump to VV if LSD of minutes 21 B1 CD D0 05 CALL 05D0H
completes 09 21 B4 3E 01 MVI A, 0IH
21 52 77 MOV M,A Move acc. to memory location 21 B6 06 00 MVI B, 00H Program to display
21 53 C3 27 21 JMP DD Jump for delay of 1 sec. 21 B8 21 54 20 LXI H, 2054 H The period no.
21 56 3E 00 VV MVI A,00H 21 BB CD D0 05 CALL 05 D0 H Minutes and second
21 58 77 MOV M,A 21 BE 21 55 20 LXI H, 2055H
21 59 2B DCX H Decrement H-L pair content 21 C1 7E MOV A, M LSD of stored current second to acc
21 5A 7E MOV A,M Move MSD of minutes to acc. 21 C2 C6 01 ADI 01H Add 1 to it
21 5B C6 01 ADI 01H Add 01 to acc. 21 C4 FE 06 CPI 06H Compare with 06
21 5D FE 04 CPI 04H Compare acc. content with 04 H 21 C6 C2 9F 21 JNZ XXX If not 06 jump to XXX
21 5F CA 66 21 JZ SS If minutes 40 then jump to SS 21 C9 3E 00 MVIA, 00H A=0
21 62 77 MOV M,A 21 CB D3 00 OUT 00H Output to 8255 to de-energise
21 63 C3 27 21 JMP DD Jump for delay of 1 sec the relay

22
 CIRCUIT IDEAS

Address OP CODE LABEL Mnemonic Comments Address OPCODE LABEL Mnemonic Comments
21 CD C3 09 21 JMP AA Repeat for next period DATA
20 50 00 MSD of period no.
DELAY SUBROUTINE 20 51 00 LSD of period no.
25 00 1B NEXT DCX D 20 52 00 MSD of minutes
25 01 7A MOV A, D 20 53 00 LSD of minutes
25 02 B3 ORA E 20 54 00 MSD of seconds
25 03 C2 00 25 JNZ NEXT 20 55 00 LSD of seconds
25 06 C9 RET

DESIGNING AN RF PROBE
In other words, for 5-watt power in a
50-ohm load, the voltage across the load
is 15.85 volts.
The rectified DC voltage at the cath-
RUPANJANA
ode of diode D1 is at about the peak level
N.S. HARISANKAR, VU3NSH of the RF voltage at the tip of the probe.
Use shielded cable in between the probe

R
adio frequency probe is used to output and meter. It will act as feed-
TABLE I
directly measure the level of RF through capacitance and thus avoid RF in-
Voltage to Watts Conversion terference. The maximum RF input volt-
RMS voltage present across two
for 50 ohms Termination
points. It is one of the most useful test age level depends on the peak inverse volt-
RMS (V) RF Power (W) age (PIV) of diode D1. The shielded lead
instruments for home brewers as well as
2.24 0.1 length is too large to give accurate re-
for communication equipment service/de- 3.88 0.3
sign labs. 5.0 0.5
sults at UHF. Please refer Tables I and II
RF voltage level being measured pro- 7.08 1
vides useful information only when the 12.25 3
Table II
probe has been designed for use with a 15.90 5
20.0 8 Meter DC Impedence Rx
specific multimeter. The design of RF 22.4 10 20 Meg-ohm 8.25 Meg-ohm
probe is a function of the meter we in- 38.75 25 10 Meg-ohm 4.14 Meg-ohm
tend to use it with. If a meter with a 41.85 35 1 Meg-ohm 41.4 kilo-ohm
different input resistance is used with the 50.0 50 20 kilo-ohm 8.28 kilo-ohm
probe, the reading will be incorrect. The
value of RX (refer figure) is so chosen that (E) so mea-
when this resistor is connected in paral- s u r e d
lel with input resistance of the multim- across a
eter, the peak value is about 1.414 times given load
the RMS voltage. Resistor RX has to drop resistance
this excess voltage so that meter indica- ( R ) to RF
tion is accurate. If we know the input watts (W )
resistance of the meter, we can calculate using the
the value of RX with the help of the fol- following
lowing relationship: relation-
Let meter DC input resistance ship:
X 1.414 = RY Power P
Then RX = Ry – meter DC input resis- = E2 / R
tance watts (W)
For example, if meter input resis- For example, if RF probe voltage read- for ready conversion of RF voltage level (RMS) to
tance is 20 meg-ohm, Ry = 28.28 meg- ing across a load resistance of 50 ohms is equivalent power across a 50-ohm load and deduc-
ohm and RX = 8.28 meg-ohm. found to be, say, 15.85 volts, the power in tion of R value for a given meter’s DC input resis-
X

We can convert the RF voltage level the load = 15.85 x 15.85 / 50 = 5W approx. tance respectively.

23
February

2000
 CONSTRUCTION

As interface circuit can easily be wired

PC BASED SPEED
on any general-purpose PCB, no PCB lay-
out is included for it. The two wires to be
G.S. SAGOO extended to 25-pin parallel port may be
connected using a 25-pin male ‘D’ connec-

MONITORING SYSTEM tor.

Lab Note: Magnetic proximity
switches, from various manufacturers,
SANTHOSH JAYARAJAN are available in the market. The impor-
tant specifications include operating DC
voltage range, operating current and its

T
his project describes the software the machinery. The output of the circuit, sensitivity, i.e. the maximum distance
and hardware necessary to moni- available across resistor R2, is fed to the from a metallic object such that the
tor and capture in real time the PC via 25-pin ‘D’ connector of parallel port switch operates. These specifications are
speed of any rotating object. The speed LPT1. Pin 11 pertains to data bit D7 of the normally mentioned on the proximity
may be defined/stored/displayed in any of input port 379(hex) of the LPT1 port hav- switch itself or in the accompanying lit-
the three units: RPM (rev./minute), RPS ing base address 378(hex), and pin 25 is erature.
(rev./second), or RPH (rev./hour). The sys- connected to PC ground. (In fact, pins 18
tem uses a sampling time of two seconds through 25 of the parallel port are strapped
and can store up to 16 minutes of data per together and connected to ground.) The software
file. The x and y axes can be scaled to read The proximity switch is mounted on The structural block diagram of the soft-
any speed and the x-axis can be ‘stretched’ a stationary part, such as a bolt or stud, ware is shown in Fig. 4. The software has
to observe clustered points. in such a way that it senses each tooth of the following four main modules, which
The hardware mainly comprises a the rotating part as shown in Fig. 3. Two are activated from the main menu using
proximity switch whose output is con- fixing nuts are provided on the threaded four of the function keys, F1 through F4.
nected to the printer
(LPT1) port of the com-
puter through an opto-
coupler. The proximity
switch is used as a
speed-sensor. The pro-
gram is written in C++
and has effective error
handling capability and
a help facility. This sys-
tem can be used to
monitor the speed of ro-
tating parts in the in- Fig. 1: Interface circuit for PC based speed monitoring system
dustry or to read and
record wind speeds. body of the proximity
switch for securing it
firmly onto a fixed
The hardware interface part of the machinery.
The hardware interface circuit is given The software
in Fig. 1. A 230V AC primary to 0-9V, prompts the operator
250mA secondary transformer followed to enter the number of
by IC 7805 is used for catering to the teeth (being sensed
power supply requirement for proximity during every revolu- Fig. 2: Proximity switch
switch and the opto-coupler. The proxim- tion), which is used by
ity switch, as shown in Fig. 2, is a 3-wire the program for calculation
switch (e.g. PG Electronics’ EDP101) of RPM, RPS, or RPH, as
which operates at 6V to 24V DC. the case may be. In any
The inductive type proximity switch specific application, where
senses any metal surface from a distance non-metallic rotating parts
of about 5 mm to 8 mm. Thus, a gear or are present and inductive
fan blade is ideal for counting the number proximity switch cannot be
of revolutions. The number of teeth that used, one may use photo-
trigger (switch-on) the proximity switch electric switch to do the
during every revolution are to be known counting for 2-second sam-
for the software to calculate the speed of pling period. Fig. 3: Mounting of proximity switch

25
 CONSTRUCTION

PARTS LIST
Semiconductors:
IC1 - 7805 regulator 5V
IC2 - MCT2E opto-coupler
Resistors (all ¼ watt, ± 5% metal/carbon
film, unless stated otherwise)
R1 - 300-ohm
R2 - 150-ohm
Capacitors:
C1 - 1000µF, 16V electrolytic
C2 - 0.22µF polyster
Miscellaneous:
X1 - 230V AC primary to 0-9,
250mA sec. transformer
BR-1A - Bridge rectifier, 1-amp.
S1 - Proximity switch (refer text)

the system waits for the first pulse

from the proximity switch to start
monitoring and capturing of data.
(c) The next entry relates to ‘units’,
which has the following further op-
tions:
1 = Revolutions/min.
2 = Revolutions/sec.
3 = Revolutions/hr
(d) The next entry pertains to the
Fig. 4: Structural block diagram of software ‘range of speed,’ which must be more
than the maximum speed that is ex-
1. Speed monitor and capture mod- pected. The options are:
HELPS.PG1 file contents ule. This module is used to monitor the 1 = 400 units
speed and store the data in a user-de- 2 = 800 units, etc
+++SPEED MASTER HELP PAGE+++ fined file. (e) The next entry concerns the ‘num-
(a) The module first prompts for the ber of teeth’ and represents the number
This software can be used to capture filename. The file name is entered with of pulses from the proximity switch per
and monitor the speed of any rotating an extension .DAT. revolution.
part for a maximum of eight minutes (b) The next entry is called ‘trigger After making the above entries, the
with a total sampling time of two sec- mode’. It specifies how the software should following message is displayed on the
onds. The software has four menu lev- start monitoring and capturing data. The monitor screen:
els which can be selected from the Main options are: 1 = manual and 2 = auto. If “Trigger mode: Auto (or Manual) Waiting
Menu. option 1 is selected, the system waits for for first pulse (or Press any key to start)”
In Capture/Monitor mode the soft- a key press to start the monitoring and depending on the trigger mode. If manual
ware has two trigger modes, viz, capturing operation. mode has been selected, then hit any key
Manual, which waits for a key press and If option 2 (auto mode) is selected, to start. If auto mode is selected, the soft-
Auto, which waits for the first pulse from ware waits for the first pulse from the
the sensor. FILE Contents of DEMO.DAT proximity sensor to proceed. The display
The captured file can be viewed in Showing Rev./min. then shows the speed in the units selected
any X-axis scale. However, all points com- 1 0 0 0 0 0 0 0 and the capture file name. Pressing ESC
ing out of the view page are clipped off. 15 0 0 0 0 0 0 0 exits the monitor mode after closing the
When using the gear teeth for speed 0 0 0 15 0 0 0 0 capture file. Pressing any other key re-
calculation, please enter the teeth per 0 0 0 30 0 0 0 0
0 0 0 0 0 15 0 0
turns to main menu.
revolution to enable internal calculation 0 15 0 90 0 15 0 0 2. Viewing a graph file. This mod-
of speed to be made. 0 15 0 0 0 0 0 0 ule is used to view an existing data file.
Enter the filename where the data 0 120 0 0 0 0 0 15 Sequential contents of a DEMO.DAT file
is to be stored, when prompted. The 30 30 0 0 30 0 0 0 are shown in a box (using eight columns).
same file can be viewed in the view page 0 150 0 0 0 0 0 0
30 0 0 0 0 0 0 15 If a non-existant filename is entered, the
option. If an invalid file name is entered, 0 30 0 0 0 0 0 0 software detects the opening error and
or the file cannot be opened, an error is 0 0 0 0 0 0 0 0 prompts the user for re-entering the
displayed and the user can exit to Main. 0 15 60 0 0 15 0 0 filename. The various prompts for enter-
30 150 0 0 0 0 0
...Press Any Key to Return to Main... 0 0 0 0 0 15 0
ing the required data are:
(a) File name – Enter the full filename

26
 CONSTRUCTION

with extension. and units, etc. HELPS.PG1. If this file cannot be opened,
(b) Enter the x-axis scale factor to en- (c) While still in the graph mode, you or is not available, the software prompts
able the graph to be ‘stretched’ on the x- may view a new graph after pressing F1. with “Help file not found or cannot be
axis to observe cramped points properly. For returning to the main menu, press opened.” Pressing any key from the help
After entering the x-axis scale, the graph F2. page returns one to main menu. The con-
appears along with all relevant data, like 3. Help. This module provides one tents of HELPS.PG1 are given in the box
scale factors for x and y axis, file name, page of help and reads from a file called (on previous page).

Program Listing for SPEEDM.CPP

#include<conio.h> outtextxy(150,240,“3.SPEED TRACK HELP - clrscr();
#include<iostream.h> F3”); cprintf(“Enter Unit for Speed(1=Rev/min,2=Revs/
#include<graphics.h> setcolor(LIGHTCYAN); sec,3=Revs/Hr) - ”);
#include<dos.h> outtextxy(150,300,“4.EXIT TO SHELL - F4”); scanf(“%d”, &unit);
#include<stdio.h> setcolor(LIGHTGREEN); if(unit<1 || unit>3)
#include<time.h> outtextxy(180,360,“Enter your choice ”); {
#include<fstream.h> outtextxy(200,383,“(F1 TO F4) ”); textcolor(YELLOW+BLINK);
#include<process.h> USERCHOICE: clrscr();
#include<stdlib.h> while(!kbhit()) cprintf(“ ........Value out of range............ ”);
void startgraphics();//start graphics system// {} delay(2000);
void openingmenu();//opening menu// char userchoice=getch(); goto GETUNIT;
void monitor();//monitor and save to file// switch(userchoice) }
float readspeed(int unit,int teeth);//read the { GETRANGE:
speed// case (char(59)):monitor();break; textcolor(YELLOW);
void display(int unit);//display the speed// case (char(60)):view();break; clrscr();
void view();//View a Speed vs Time Graph// case (char(61)):help();break; cprintf(“Enter Range for Speed(1=400 units,
void grid();//Draw the graph grid// case (char(62)):exiit();break; 2=800 units..etc) - ”);
void displayhelp(char helpfilename[10]); default:goto USERCHOICE; scanf(“%d”, &yrange);
void exiit(); } if(yrange<1 || yrange>100)
void help(); } {
int roundoff(float number); textcolor(YELLOW+BLINK);
//Global Variables// //Monitoring the speed online and storing the clrscr();
int unit;int teeth; data// cprintf(“ ........Value out of range............ ”);
float speed; void monitor() delay(2000);
char monitorfile[8]; { goto GETRANGE;
int gdriver;int gmode; int s;int t; }
int mid; int trigger; GETTEETH:
//Program main menu// int yrange; textcolor(YELLOW);
void main() char unitf[8]; clrscr();
{ int speedf; cprintf(“ Enter Number of teeth for Sensor - ”);
startgraphics(); restorecrtmode(); scanf(“%d”, &teeth);
openingmenu(); clrscr(); if(teeth<1 || teeth>100)
} window(1,1,80,25); {
//Graphics initialisation// clrscr(); textcolor(YELLOW+BLINK);
void startgraphics() textcolor(YELLOW); clrscr();
{ textbackground(LIGHTBLUE); cprintf(“ ........Value out of range............ ”);
registerbgidriver(EGAVGA_driver); gotoxy(25,3); delay(2000);
registerbgifont(small_font); cprintf(“ - S P E E D T R A C K -”); goto GETTEETH;
registerbgifont(triplex_font); gotoxy(25,4); }
int gdriver = DETECT, gmode; cprintf(“=========================”); //Open the file for data storage
initgraph(&gdriver, &gmode, “”); gotoxy(25,6); fstream infile;
} cprintf(“MONITOR & CAPTURE PAGE”); infile.open(monitorfile,ios::out);
//Opening menu// window(10,8,75,8); //Store the units
void openingmenu() textcolor(YELLOW); char *unitf1 = “Rev/min”;
{ clrscr(); char *unitf2 = “Rev/sec”;
setfillstyle(LTSLASH_FILL,5); cprintf(“Enter file name to store Speed data char *unitf3 = “Rev/hr” ;
bar(10, 10, 635, 470); (****.***) - ”); switch(unit)
setlinestyle(SOLID_LINE,0,2); scanf(“%8s”, &monitorfile); {
rectangle(10,10,635,470); GETTRIGGER: case 1:infile<<unitf1<<endl;break;
setlinestyle(SOLID_LINE,0,2); textcolor(YELLOW); case 2:infile<<unitf2<<endl;break;
rectangle(200,40,400,90); clrscr(); case 3:infile<<unitf3<<endl;break;
setcolor(BLUE); cprintf(“Enter trigger mode(1=Manual,2=First }
line(200,91,400,91); pulse) - ”); //Entering the units and y scale to capture file//
line(200,92,400,92); scanf(“%d”, &trigger); //fstream infile;
line(401,90,401,40); if(trigger<1 || trigger>2) //infile.open(monitorfile,ios::out);
settextstyle(2,HORIZ_DIR,8); { infile<<yrange<<endl;
setcolor(YELLOW); clrscr(); clrscr();
outtextxy(220,50,“SPEED TRACK”); textcolor(YELLOW+BLINK); //Setting the trigger mode//
setcolor(LIGHTBLUE); cprintf(“........Value out of range,Enter 1 or switch(trigger)
outtextxy(150,120,“1.SPEED MONITOR & 2........”); {
CAPTURE - F1”); delay(2000); case 1:textcolor(YELLOW+BLINK);cprintf
setcolor(LIGHTRED); goto GETTRIGGER; (“Trigger mode: Manual ..Press any key
outtextxy(150,180,“2.VIEW SPEED vs TIME } to Start”);getch();break;
GRAPH - F2”); GETUNIT: case 2:textcolor(YELLOW+BLINK);cprintf
setcolor(LIGHTMAGENTA); textcolor(YELLOW); (“Trigger mode: Auto..Waiting for first pulse..”);

27
 CONSTRUCTION

s=inp(0x379);t=s;while(s==t)s=inp(0x379);break; } outtextxy(492,60,“X scale =”);

default:textcolor(YELLOW+BLINK);cprintf speed=readspeed(unit,teeth); outtextxy(492,75,“Y scale =”);
(“Trigger mode: Manual ..Press any key to cleardevice(); outtextxy(492,90,“Units =” );
Start”); getch();break; sprintf(msgd, “%f”, speed); outtextxy(492,105,“File =” );
} outtextxy(250,200,msgd); outtextxy(492,120,“Points = “ );
startgraphics(); } setcolor(GREEN);
for(int pointno=1;pointno<481;++pointno) void view()//View a speed vs time graph// outtextxy(492,150,“Options:”);
{ { outtextxy(492,165,“F1= New Graph”);
char in; VIEWSTART: outtextxy(492,180,“F2= Main Menu”);
display(unit); closegraph(); outtextxy(492,210,“NOTE:”);
speedf=roundoff(speed); int xscale=1;int yscale; outtextxy(492,225,“X axis=960sec”);
infile<<speedf<<endl; char msgx[2];char msgmaxy[5];char msgmaxx outtextxy(492,240,“Y axis=400units”);
if (kbhit()) [5];char msgy[2];char msgun[8];char gunits[8]; outtextxy(492,255,“For Xscale=1”);
{ char msgfile[10]; outtextxy(492,270,“and Yscale=1”);
if ((in = getch()) == ‘\x1B’)break; char filename[8]; setcolor(YELLOW);
} char msgpoint[5]; sprintf(msgx, “%d”, xscale);
} int coordinate[10000]; outtextxy(580,60, msgx);
infile.close();//Close the file,clean up and return int errorcode; sprintf(msgy, “%d”, yscale);
to main// fstream infile; outtextxy(580,75, msgy);
restorecrtmode(); window(1,1,80,25); sprintf(msgun, “%s”, gunits);
window(10,8,75,8); clrscr(); outtextxy(580,90, msgun);
textcolor(YELLOW+BLINK); textcolor(RED); sprintf(msgfile, “%5s”, filename);
cprintf(“Data Capture Interrupted or File full(960 textbackground(BLUE); outtextxy(565,105, msgfile);
sec)..Press any key..”); gotoxy(25,3); sprintf(msgpoint, “%d”, pointcount);
getch(); cprintf(“ - S P E E D M A S T E R - ”); outtextxy(567,120, msgpoint);
startgraphics(); gotoxy(25,5); sprintf(msgmaxx, “%d”, (960/xscale));
openingmenu(); cprintf(“ VIEW FILE PAGE ”); outtextxy(480,450,msgmaxx);
} window(10,8,50,8); sprintf(msgmaxy, “%d”, (400*yscale));
//Read the speed and convert into the asked textcolor(YELLOW); outtextxy(10,20,msgmaxy);
units// clrscr(); outtextxy(60,20,msgun);
float readspeed(int unit,int teeth) cprintf(“ Enter name of file to view - ”); outtextxy(480,460,”Seconds”);
{ scanf(“%8s”, &filename); grid();
int sett=255;int tes=255;mid=0; scalefactor: setviewport(10,40,490,440,1);
clock_t start, end=0; int i=0;int pointcount=0; setcolor(GREEN);
sett=inp(0x379); XAXIS: int x1=0;int y1=0;
tes=sett; clrscr(); int j;
for(start=clock();(end-start)/CLK_TCK<2.0; cprintf(“ Enter X axis scale factor - ”); for (j=0;j<pointcount-1;++j)
end=clock()) scanf(“%d”, &xscale); {
{ if(xscale<0||xscale>9) goto XAXIS; line(x1*xscale,400-y1/yscale,(j+1)*xscale,400-
sett=inp(0x379); infile.open(filename,ios::in); coordinate[j]/yscale);
if(sett!=tes)++mid; if(infile.fail()) x1=j+1;
tes=sett; { y1=coordinate[j];
} window(10,8,70,9); }
//Calculation of the speed depending on unit textcolor(YELLOW+BLINK); GRAPHMENU:
selected// clrscr; while (!kbhit())
switch(unit) cprintf(“..Error opening file or file does not {}
{ exist..\n\r Press F3 to exit,F4 to re-enter ”); char choiceg;
case 1:return(mid*15.0/(teeth)); ERRORGRAPH: choiceg=getch();
case 2:return(mid/(4.0*teeth)); while (!kbhit()) switch(choiceg)
case 3:return(mid*900.0/teeth); {} {
default:return(mid/(4.0*teeth)); char choicegraph; case (char(59)):goto VIEWSTART;
} choicegraph=getch(); case (char (60)):closegraph();main();break;
} switch(choicegraph) default:goto GRAPHMENU;
//Display the speed on the screen update every 2 { }
secs// case (char(62)):goto VIEWSTART; }
void display(int unit) case (char (61)):main();break; //To draw the graph grid//
{ default:goto ERRORGRAPH; void grid()
char msgd[80]; } {
char msgf[80]; } int i;
fstream infile; infile>>gunits>>yscale; setcolor(RED);
setcolor(LIGHTRED); while(!infile.eof()) for(i=140;i<440;i=i+100)
setbkcolor(LIGHTGREEN); { line(10,i,490,i);
settextstyle(1,HORIZ_DIR,4); infile>>coordinate[i]; setcolor(BLUE);
rectangle(5,5,630,470); ++i; for (i=70;i<490;i=i+60)
outtextxy(175,30,”SPEED MASTER”); ++pointcount; line(i,40,i,440);
moveto(150,400); } }
outtext(“Press ESC to exit.....”); infile.close(); //Main help call function//
outtextxy(150,300,”Capture file =”); startgraphics(); void help()
sprintf(msgf, “%s”, monitorfile); cleardevice(); {
outtextxy(400,300,msgf); setcolor(CYAN); closegraph();
moveto(150,100); setbkcolor(DARKGRAY); clrscr();
outtext(“Speed ”); rectangle(10,40,490,440); displayhelp(“HELPS.PG1”);
switch(unit) settextstyle(2,HORIZ_DIR,6); getch();
{ outtextxy(140,15,“Speed Master..GRAPH VIEW }
case 1:outtextxy(250,100,“in Revs/Min”);break; PAGE..”); //Exit to shell with graphics clean up//
case 2:outtextxy(250,100,“in Revs/Sec”);break; setcolor(GREEN); void exiit()
case 3:outtextxy(250,100,“in Revs/Hr”);break; outtextxy(492,40,“Graph Variables”); {

28
 CONSTRUCTION

cleardevice(); infile.open(helpfilename,ios::in); main();

setbkcolor(LIGHTGREEN); if(infile.fail()) }
setcolor(RED); { //Function to round off the float number to the
moveto(150,200); window(10,8,70,9); nearest integer//
outtext(“Exiting to DOS..”); textcolor(YELLOW+BLINK); int roundoff(float number)
delay(2000); clrscr; {
closegraph(); cprintf(“.....HELP NOT AVALABLE OR ERROR int quotient;
exit(1); OPENING FILE.....\n\r ....Press any KEY TO float result;
} RETURN TO MAIN....”); quotient=int(number);
//Display the helpfile if resident or else indicate getch(); result=number-quotient;
error// main(); if(result>0.5)
void displayhelp(char helpfilename[10]) } {
{ while(!infile.eof()) return(quotient+1);
fstream infile; { }
textbackground(BLACK); infile.getline(buffer,max); else
window(1,1,80,25); cout<<buffer; {
textcolor(LIGHTRED); cout<<endl; return(quotient);
const int max=80; } }
char buffer[max]; infile.close(); }
clrscr(); getch(); ❏

29
 CONSTRUCTION

reo head preamplifier, a function selec-

tor, and an FM transmitter. The pream-

STEREO CASSETTE PLAYER plifier is built around IC LA3161. The out-

puts from 200-ohm stereo R/P (record/
play) head are connected to the left and
G.S. SAGOO right input pins 1 and 8 of LA3161 pream-
REJO G. PAREKKATTU plifier. A 9V regulated power supply, ob-
tained from the voltage regulator built
around transistor T1, is used for the
preamplifier. The outputs of this pream-

A
n electronics hobbyist always finds reo cassette player is shown in Fig. 1. plifier are routed to the function selector
pleasure in listening to a song The circuit may be divided into three func- configured around two CD4066 (quad bi-
from a cassette player assembled tional sections as shown in the block dia- polar analogue switches) and an HEF4017
with his own hands. Here are the details gram. (decade counter).
of a stereo cassette player with the fol- Section I (Fig. 2). It comprises a ste- When any control input pin (5, 6, 12,
lowing features, which many electronics
enthusiasts would love to assemble and
enjoy:
1. Digital 4-function selector (radio,
tape, line input, and transmit).
2. Four sound modes (normal, low
boost, hi-fi, and x-bas).
3. Bass and treble controls.
4. Function and output level displays.
5. Built-in FM transmitter for cordless
head-phones.

Description
The functional block diagram of the ste- Fig. 1: Functional block diagram of stereo cassette player

Fig. 2: Preamplifier and function selector and FM TX (Section I)

30
 CONSTRUCTION

and 13) of tions. In other words, it acts like an ana- nals from the output of the preamplifier
CD4066 , as logue switch which can be turned on or reach the output terminals of the circuit.
shown in off by making its input control pin high At the same time, a 9V regulated power
Fig. 3, is or low. A single IC contains four such supply to the preamplifier is switched on
made high, switches/sections (A, B, C, and D). The through transistor T1. When Q2 (pin 4)
it can switch control inputs of the two ICS (CD4066) goes high, any audio signals applied to
AC and/or are derived from the decade counter IC the auxiliary I/P terminals (Aux. I/P (L)
DC signals (HEF4017). Only four outputs of this IC and Aux. I/P(R)) reach the output termi-
between its (Q0 through Q3) are used and the fifth nals. When Q3 (pin 7) goes high, the
correspond- output Q4 (pin 10) is connected to the power to both the FM transmitter and
ing output reset pin (pin 15) via diode D1. preamplifier is switched on and the sig-
pins (3-4, 8- When power is turned on, the output nals from the preamplifier appear at the
9, 10-11, and Q0 (pin 3) of this IC will be high. In this base of transistor T3 (BF494) which, in
Fig. 3: Internal schematic 1-2 respec- condition any audio signal fed to the ‘ra- association with some passive compo-
diagram of CD4066 tively) in dio I/P’ terminal reaches the output. If nents, forms an FM transmitter. The de-
switcher IC both direc- desired, the audio output from a radio tails of coil L1 are included in the parts
receiver can be connected list. The frequency of this transmitter falls
to this input terminal. between 88 and 108 MHz.
Circuit diagram and de- The frequency can be slightly varied
tails of such radio receiv- by adjusting trimmer capacitor VC1. The
ers have appeared in ear- transmitted signals can be received on any
lier issues of EFY. FM receiver working in 88-108 MHz
With each depression range. LEDs D2 through D5 are bilateral
of switch S1, the outputs LEDS which are used to display the se-
of IC4 (Q0-Q3) go high se- lected function.
quentially to control dif- Section II. This section employs a
ferent modes of operation. JFET dual operational amplifier LF353
When Q1 (pin 2) of IC4 whose gain for different audio frequen-
Fig. 4: Simplified schematic diagram of tone and sound goes high, the audio sig- cies is controlled by the corresponding po-
mode control (left channel)
tentiometer settings (VR3 and
VR6 for bass, VR4 and VR5 for
treble for left and right channels
respectively) and, additionally,
by sound mode selector switch
S2. The simplified circuit dia-
gram for left channel is shown
in Fig. 4, while the complete
schematic circuit diagram is
shown in Fig. 5.
In the simplified diagram,
the function of decade counter
IC (HEF 4017) and bipolar ana-
logue switcher ICs (CD4066) are
replaced by a simple switch, SW.
The output of preamplifier (sec-
tion I) is applied as input to the
inverting terminal of op-amp IC8
and at the output we obtain a
180o phase shifted amplified sig-
nal. Potentiometers VR3 and
VR4 are used to control low fre-
quencies (bass) and high fre-
quencies (treble) respectively.
In the normal mode (Q0 out-
put of IC7 high), pole-P of switch
SW is in contact with terminals
1 and 2 simultaneously. In this
condition, normal gain is
achieved for both high and low
Fig. 5: Tone and sound mode control (Section II) frequencies as per settings of

31
 CONSTRUCTION

VR3 and VR4. But the mid-

range frequency compo-
nents get attenuated due
to capacitor C41 (0.047µF).
In the hi-fi mode (Q1
output of IC7 high), pole-P
of the switch is in contact
with terminal 1. In this po-
sition, normal gain is
achieved for entire audio
frequency range (since ca-
pacitor C41 is disconnected
from the feedback path).
When pole-P of switch
SW is in position 2 (Q2 out-
put of IC7 high), the at-
tenuation of mid-range fre-
quency components is re-
established and also the
gain of the amplifier for
very low frequencies in-
creases (since an additional
feedback resistance of 100k
(R25) is introduced in the
feedback loop). This is the
low-frequency boost mode.
When pole-P is in con- Fig. 6: Preamplifier, audio level indicator, and power supply (Section III)

PARTS LIST
Semiconductors: R25,R32,R29, C38,C41,C43,C45 - 0.047µF polyester
IC1 - LA3161 stereo preamplifier R34 R41,R42 - 2.2-kilo-ohm C39,C42 - 2.2nF polyester
IC2,IC3,IC5,IC6 - CD4066B quad bilateral R43,R44 - 1-ohm C40,C44 - 6.2nF polyester
analogue switch R45-R50 - 33-kilo-ohm C58,C61 - 470µF, 25V electrolytic
IC7,IC4 - HEF4017B decade counter R61 - 680-ohm C62 - 2200µF electrolytic
IC8 - LF353 JFET input dual R62 - 330-ohm,0.5W C63-C66 - 4.7µF, 25V electrolytic
op-amp VR1-VR3,VR6 - 47-kilo-ohm linear C67,C69 - 1000µF, 25V electrolytic
IC9 - TA7230 stereo power potmeter C68,C70 - 4700µF, 25V electrolytic
amplifier VR4,VR5 - 100-kilo-ohm linear VC1 - 8-25pF trimmer
IC10 - KA2281 stereo level potmeter Miscellaneous:
indicator VR7 - 220-kilo-ohm linear L1 - 5T, 22 SWG, 5mm dia air
T1 - 2SC1815 npn transistor potmeter core
T2 - CL100 npn transistor VR8,VR9 - 47-kilo-ohm log potmeter L2 - 250T, 18 SWG over a
T3 - BF494 npn transistor Capacitors: ferrite rod
D1,D12,D13, C1,C5,C17,C27-C30, X1 - 230V AC primary to 12-0-
D24 D25,D9 - 1N4001 rectifier diode C32,C47,C59,C60 - 0.1µF ceramic disc 12V, 2A sec. transformer
D2,D3,D4,D5 - Bilateral coloured LEDs C2,C4,C24 - 100µF, 25V electrolytic S1,S2 - Push-to-on tactile switch
D6-D8,D14-D23 - Coloured LED C3,C11,C26 - 22nF ceramic disc - Tape drive mechanism
D10,D11 - 1N5408 rectifier diode C6,C16,C22,C23 complete with 200-ohm
D26,D27 - 9.1V zener C34,C36,C22, R/P stereo head, leaf
Resistors (all ¼W, ±5% metal carbon film, C23,C52,C53 - 1nF ceramic disc switch, and 12V DC, 2400
unless stated otherwise) C7,C15,C35,C37 rpm motor
R1,R6,R10 - 100-ohm C49,C50,C10, - Telescopic antenna
R2,R7 - 7.5-kilo-ohm C12,C51,C54 - 10µF, 25V electrolytic LS1,LS2 - 4-ohm, 8W, 9cm diameter
R3,R8,R22,R23, C8,C13,C55, woofers with piezoelectric
R28,R37,R39,R40 - 100-kilo-ohm C56,C57 - 47µF, 25V tweeter
R4,R9,R11, C9,C14 - 15nF polyester - Readymade FM/AM radio
R26,R35 - 10-kilo-ohm C18 - 100pF ceramic disc reciever kit
R5 - 150-ohm C19 - 22pF ceramic disc - Cabinet
R12,R13 - 1.2-kilo-ohm C20 - 10pF ceramic disc - Shielded cable
R14-R21,R51-R60- 1-kilo-ohm C21 - 68pF ceramic disc - Heat sink and other
R24,R27,R33,R30 C25 - 1µF, 25V electrolytic hardware items
R31,R36,R38 - 4.7-kilo-ohm C31,C33,C46,C48 - 2.2µF, 25V electrolytic

32
 CONSTRUCTION

Fig. 7. Actual-size, single-sided PCB for stereo cassette player

Fig. 8. Component layout for the PCB

33
 CONSTRUCTION

tact with terminal 3 (Q3 output of IC7 to the IC to prevent thermal run-away. sembled on a single PCB. A separate PCB
high), normal gain is provided for the Potmeters VR8 and VR9 are volume con- is used for the audio level indicator
high-frequency components (treble) and trols for left and right channels respec- and for mounting LEDs (D2 through
higher gain is available for a wide range tively, while VR7 is the balance control. D8). Single-sided, actual-size PCB for the
of low frequencies (including some mid- A dual power supply is used for the complete circuit is given in Fig. 7. The
range frequencies). This is termed as the circuit. The +12V section uses a π filter component layout for the PCB is shown
X-BAS mode. The gain of the amplifier with capacitors in the parallel arms and in Fig. 8.
for different frequencies, in each of the an inductor in the series arm. However, Use sockets for all ICs except IC1 and
above-mentioned modes, is also dependent for the – 12V supply, the inductor of the IC9. Shielded wires must be used for con-
on VR3 and VR4 potmeter settings. series arm (as used for +12V supply) is nections to stereo head and all potentio-
In the actual circuit diagram, the bi- replaced by a resistor. Filters are provided meters. The PCB must be mounted away
polar analogue switcher (CD4066) replaces to reduce the ripple factor and thereby from power transformer and DC motor.
switch SW. The LEDs D6, D7, and D8 reduce hum (noise). Please refer inductor Inductor L2 should also be placed
are used to represent the sound modes— details in parts list. away from the power transformer. If in-
low-boost, hi-fi, and X-BAS repsectively. The audio level indicator is built ductor L2 is difficult to procure or fabri-
Switch S2 is used to select variouse sound around IC KA2281. LEDs D14 through cate, it may be substituted with a 5-ohm,
modes. At power on, Q0 (pin 3) of IC7 is D23 are connected at its outputs to show 5W wire-wound resistor.
high and therefore normal sound mode the audio level of each channel in five A suitable cassette drive mechanism
is on. steps. The input to this audio level indi- and cabinet may be used to assemble the
Section III (Fig. 6). This section com- cator is derived from the output of the stereo cassette player. Readymade cabi-
prises an audio power amplifier, a 12V power amplifier. The gain of this level nets and cassette mechanisms are avail-
dual power supply, and an audio level in- indicator can be varied by changing the able in the market.
dicator. The power amplifier used is the values of resistors R49 and R50. Adjust potmeters VR1 and VR2 for
popular IC-TA7230, which delivers up to minimum distortion at higher volume
7-watt (RMS) power per channel into a level. Use separate aerials for FM trans-
4-ohm load. This IC has in-built short cir-
Assembly mitter and FM receiver. ❏
cuit protection and over-temperature cut- The complete circuit, with the exception
off. A suitable heat sink must be connected of the audio level indicator, can be as-

34
 C I RC ICR CUUII TT I ID D
EAS
EAS

BASS AND TREBLE FOR

Hence, bass has nil attenuation, and it is
called bass boost. When the slider is at
the lowest end, capacitor C1 is effectively

STEREO SYSTEM
in parallel with potentiometer VR2. In this
position, bass will have maximum attenu-
ation, producing bass cut.
G.S. SAGOO
Bass boost and bass cut are effective
by ±15 dB at 16 Hz, compared to the out-
VIVEK SHUKLA
put at 1 kHz. Treble boost and treble cut
are also effective by the same amount at

M
odern audio frequency amplifi- control. When the slider of potentiometer 20 kHz, compared to the value at 10 kHz.
ers provide flat frequency re- VR1 is at the lower end, minimum treble After assembling the circuit, we may
sponse over the whole audio signal develops across the load. The low- check the performance of the bass and
range from 16 Hz to 20 kHz. To get faith- est point is referred to as treble cut. As treble sections as follows:
ful reproduction of sound we need depth the slider is moved upward, more and 1. Set the slider of the potentiometers
of sound, which is provided by bass (low more treble signal is picked up. The high- at their mid-positions.
notes). Hence low-frequency notes should est point is referred to as treble boost. 2. Turn-on the stereo system.
be amplified more than the high-frequency Bass would be cut if capacitive reac- 3. Set the volume control of stereo
notes (treble). To cater to the individual
taste, and also to offset the effect of noise
present with the signal, provision of bass
and treble controls is made. The combined
control is referred to as tone control.
The circuit for bass and treble control
shown in the figure is quite simple and
cost-effective. This circuit is designed to
be adopted for any stereo system. Here,
the power supply is 12-volt DC, which
may be tapped from the power supply of
stereo system itself. For the sake of clar-
ity, the figure here shows only one chan-
nel (the circuit for the other channel be-
ing identical). The input for the circuit is
taken from the output of preamplifier tance in series with the signal increases. system at mid-level.
stage for the left as well as right channel Thus, when the slider of potentiometer 4. Set the slider at the position of op-
of the stereo system VR2 is at the upper end, capacitor C1 is timum sound effect.
Potentiometer VR1 (10-kilo-ohm) in shorted and the signal goes directly to This circuit can be easily assembled
series with capacitor C4 forms the treble the next stage, bypassing capacitor C1. using a general-purpose PCB.

The circuit comprises a step-down

PROTECTION FOR YOUR G.S. SAGOO

transformer followed by a full-wave recti-
fier and smoothing capacitor C1 which acts
as a supply source for relay RL1. Initially,

ELECTRICAL APPLIANCES when the circuit is switched on, the power

supply path to the step-down transformer
X1 as well as the load is incomplete, as
the relay is in de-energised state. To
MALAY BANERJEE
energise the relay, press switch S1 for a
short duration. This completes the path

H
ere is a very low-cost circuit to to damage due to such conditions. for the supply to transformer X1 as also
save your electrically operated The simple circuit given here switches the load via closed contacts of switch S1.
appliances, such as TV, tape re- off the mains supply to the load as soon Meanwhile, the supply to relay becomes
corder, refrigerator, and other instruments as the power trips. The supply can be available and it gets energised to provide
during sudden tripping and resumption of resumed only by manual intervention. a parallel path for the supply to the trans-
mains supply. Appliances like refrigera- Thus, the supply may be switched on only former as well as the load.
tors and air-conditioners are more prone after it has stabilised. If there is any interruption in the

35
 CIRCUIT IDEAS

power supply, the supply to the trans-

former is not available and the relay de-
energises. Thus, once the supply is inter-
rupted even for a brief period, the relay is
de-energised and you have to press switch
S1 momentarily (when the supply re-
sumes) to make it available to the load.
Very-short-duration (say, 1 to 5 milli-
seconds) interruptions or fluctuations will
not affect the circuit because of presence
of large-value capacitor which has to dis-
charge via the relay coil. Thus the circuit
provides suitable safety against erratic
power supply conditions.

which is applied to pin 1 of IC1. It com-

DIGITAL WATER LEVEL METER

prises a positive pulse of variable dura-
tion (0.5 second to 3 seconds, depending
upon the water level in the tank) followed
by 4-second low level.
K. UDHAYA KUMARAN, VU3GTH G.S. SAGOO Thus, during positive duration of tim-
ing pulse at pin 1 of IC1, the frequency
counter is allowed to count the number of

T
his digital water level meter shows this frequency counter needs two types of negative going pulses which are continu-
up to 65 discrete water levels in inputs. One of the these is a continuous ously available at its pin 2. At the same
the overhead tank (OHT). This 30Hz clock (approx.), which is applied to time the pnp transistor T1 remains cut-off
helps to know the quantity of water in pin 2 of IC1. The other is a timing pulse, due to the positive voltage at its base, and
the OHT quite precisely. The
circuit is specially suited for
use in apartments, hostels,
hotels, etc, where many taps
are connected to one OHT.
In such cases, if someone for-
gets to close the tap, this cir-
cuit would alert the opera-
tor well in time.
Normally, for multi wa-
ter level readings, one has to
use complicated circuits em-
ploying multi-core wires from
the OHT to the circuit. This
circuit does away with such
an arrangement and uses
just a 2-core cable to monitor
various water levels. Fig. 2.
shows various water levels
and the corresponding read-
ings on 7-sement displays.
IC1 and IC2 shown in Fig.
1 are CD4033 (decade up
counter cum 7-segment de-
coder) which form a two-digit
frequency counter. The CK
pin 1 and CE pin 2 of IC1 are
used in such a way that the
counter advances when pin 1
is held high and pin 2 under-
goes a high-to-low transition.
For water level reading, Fig. 1

36
 CIRCUIT IDEAS

actual level. depending upon the level of water in the

Timer IC4 is used tank, the in-circuit value of VR1 (or VR2)
as a free-running resistance changes the charging time of
astable multivibrator capacitor C2 and so also the duration of
which generates con- positive pulse period of IC3 from 0.5 sec-
tinuous 30Hz clock ond to 3 seconds.
pulses with 52 per Adjustment of presets for achieving
cent duty cycle. The the desired accuracy of count can be ac-
output of IC4 is avail- complished, without using any frequency
able at its pin 3, counter, by using the following procedure
which is connected to (which was adopted by the author during
pin 2 of IC1. calibration of his prototype):
The other timer, 1. First adjust the values: VR1 (or
IC3, is used as tim- VR2) = 2 kilo-ohm, VR3 = 64 kilo-ohm,
ing pulse generator VR4 = 90 kilo-ohm, VR5 = 23.5 kilo-ohm.
wherein we have in- 2. Now switch on the circuit. The 7-
Fig. 2 dependent control segment DIS.1 and DIS.2 blink. If neces-
over high and low du- sary, adjust VR3 such that the display
ration (duty cycle) of goes ‘on’ for 4-second period.
the timing pulses available at its output 3. If display readout is 15, increase
pin 3. The different duration of high and value of pot VR1 from 2-kilo-ohm to 340-
low periods of the timing pulses are kilo-ohm. Now, the display should show
achieved because the charging and dis- 90. If there is a difference in the displayed
charging paths for the timing capacitor count, slightly adjust presets VR5 and VR3
Fig. 3
C2 differ. The charging path of capacitor in such a way that when VR1 is 2-kilo-ohm
so the displays (DIS.1 and DIS.2) remain C2 consists of resistor R19, diode D1, and the display readout is 15, and when VR1 is
off. However, at the end of positive pulse potmeters VR1 for OHT (or VR2 for sump 340-kilo-ohm the display readout is 90.
at pin 1 of IC1 (and base of transistor T1), tank, depending upon the position of slide 4. If 15- to 90-count display is achieved
the frequency counter is latched. During switch S1) and VR3. However, the dis- with less than one-third movement of pot
the following 4-second low level period, charge path of capacitor C2 is via diode shaft, increase the value of VR5 slightly.
transistor T1 conducts and displays DIS.1 D2 and variable resistor VR4. If 15- to 90-count display is not achieved
and DIS.2 show the current count. At be- By adjusting preset VR4, the low-du- with one-third movement of pot shaft, de-
ginning of the next positive timing pulse ration pulse period (4 seconds) can be set. crease value of VR5.
the frequency counter resets (as the reset The low-pulse duration should invariably If you need this digital water level
pin 15 of IC1 and IC2 receives a differenti- be greater than 3 seconds. meter to monitor the levels of water in
ated positive going pulse via capacitor C1) Potmeter VR1 (or VR2), a linear the overhead as well as the sump tanks,
and starts counting afresh. wirewound pot, is fitted in such a way in it can be done by moving DPDT slide
Thus, this digital water level meter the overhead tank (or sump tank) that switch to down (DN) position. The indica-
shows water level reading for four-second when water level is minimum, the value tion of the position selected is provided
duration and then goes off for a variable of VR1 = 2 kilo-ohm. When water level in by different colour LEDs (refer Figs 1 and
period of 0.5 second to 3 seconds. Thereaf- the tank is maximum, the in-circuit value 2) or by using a single bi-colour LED. To
ter the cycle repeats. This type of display of potmeter VR1 increases to 340-kilo-ohm monitor water level in more than two
technique is very useful, because if there (approximately). This is achieved by one- tanks, one may use a similar arrange-
is ripple in water, we shall otherwise ob- third movement of pot shaft. The change ment in conjunction with a rotary switch.
serve rapid fluctuations in level readings, in resistance of VR1 results in the change For timing capacitors C2 and C4 use
and shall not get a correct idea of the in charging period of capacitor C2. Thus, tantalum capacitors for better stability.

(b) 5V AC rms in position 2

UNIVERSAL HIGH-RESISTANCE (c) 5V peak AC in position 3

(d) 5V AC peak-to-peak in position 4
The circuit is basically a voltage-to-

VOLTMETER S.C. DWIVEDI

TABLE I
Position 1 of Function Switch
Edc input Meter Current
YOGESH KATARIA
5.00V 44 µA
4.00V 34 µA

T
he full-scale deflection of the uni- depends on the function switch position 3.00V 24 µA
versal high-input-resistance volt- as follows: 2.00V 14 µA
meter circuit shown in the figure (a) 5V DC on position 1 1.00V 4 µA

37
 CIRCUIT IDEAS

(d) Peak-to-peak AC voltme- TABLE II

ter (sine wave only): RID = 0.318
Position 2 of Function Switch
full-scale EPK-TO-PK / IFS
Erms input Meter Current
The term I FS in the above
5V 46 µA
equations refers to meter’s full- 4V 36 µA
scale deflection current rating in 3V 26 µA
amperes. 2V 18 µA
It must be noted that neither 1V 10 µA
meter resistance nor diode volt-
age drops affects meter current. TABLE III
Note: The results obtained Position 3 of Function Switch
during practical testing of the cir- EPk input Meter Current
cuit in EFY lab are tabulated in 5V peak 46 µA
4V peak 36 µA
Tables I through IV. 3V peak 26 µA
A high-input-resistance op- 2V peak 16 µA
amp, a bridge rectifier, a 1V peak 6 µA
microammeter, and a few other
current converter. The design procedure discrete components are all that TABLE IV
is as follows: are required to realise this versatile cir- Position 4 of Function Switch
Calculate RI according to the applica- cuit. This circuit can be used for mea- EPk-To-Pk Meter Current
tion from one of the following equations: surement of DC, AC RMS, AC peak, or 5V peak to peak 46 µA
(a) DC voltmeter: RIA = full-scale EDC/IFS AC peak-to-peak voltage by simply chang- 4V peak to peak 36 µA
(b) RMS AC voltmeter (sine wave only): ing the value of the resistor connected 3V peak to peak 26 µA
2V peak to peak 16 µA
RIB = 0.9 full-scale ERMS/ IFS between the inverting input terminal of 1V peak to peak 7 µA
(c) Peak reading voltmeter (sine wave the op-amp and ground. The voltage to
only): RIC = 0.636 full-scale EPK/IFS be measured is connected to non-invert- ing input of the op-amp.

TRIAC/TRANSISTOR CHECKER
milliammeter or a multimeter to monitor
the current flowing through the SCR. If
the SCR is ‘no good,’ the LED would never
glow. If the SCR is faulty (leaky), the LED
PRAVEEN SHANKER would glow by itself. In other words, if
RUPANJANA
the LED glows only on pressing switch
S1 momentarily and goes off on pressing

H
ere is a very simple circuit which
can be used for testing of SCRs
as well as triacs. The circuit
could even be used for checking of pnp
and npn transistors.
The circuit works on 3V DC, derived
using a zener diode in conjunction with a
step-down transformer and rectifier ar-
rangement, as shown in the figure. Alter-
natively, one may power the circuit using
two pencil cells.
For testing an SCR, insert it in the Fig. 1
socket with terminals inserted in proper
slots. Slide switch S3 to ‘on’ position (to- switch S2, the SCR is good.
wards ‘a’) and press switch S1 momen- For testing a triac, initially connect
tarily. The LED would glow and keep its MT1 terminal to point A (positive),
glowing until switch S2 is pressed or MT2 to point K (negative), and its gate to
mains supply to step-down transformer point G. Now, on pressing switch S1 mo-
is interrupted for a short duration using mentarily, the LED would glow. On press-
switch S4. This would indicate that the ing switch S2 momentarily, the LED
SCR under test is serviceable. would go off. Next, on pressing switch S5,
With switch S3 in ‘off’ position (to- the LED will not glow.
Fig. 2
wards ‘b’), you may connect a Now reverse connections of MT1 and

38
 CIRCUIT IDEAS

MT2, i.e. connect MT1 to the negative actually two SCRs connected back to back. Fig. 2 indicates the conventional current direc-
and MT2 to the positive side. For a good The first accepts positive pulse for con- tion and forward biasing condition for pnp and npn
working triac, S2 would not initiate con- duction while the second accepts nega- transistors. If the transistor under test is of npn type,
duction in the triac and the LED would tive pulse for conduction.) on pressing S1, theLED glows, and on releasing or
remain off. On the other hand, momen- You can also check transistors with lifting the finger, it goes off, indicating that the tran-
tary depression of S5 would initiate con- this circuit by introducing a resistor sistor is good. For pnp transistor, the LEDglows on
duction of the triac and LED1 would glow. (about 1 kilo-ohm) between the junction pressing switch S5 and goes off when it is released.
The indication of a leaky triac is simi- of switches S1 and S5 and point G. The This indicates that the transistor under test is good.
lar to that of an SCR. If, during both the collector of npn or emitter of pnp tran- A leaky or short-circuitedSCR or transistor would
above-mentioned tests, the LED lights up, sistor is to be connected to positive (point be indicated by a permanent glow of the LED by
only then the triac is good. A), while emitter of an npn and collector itself, i.e. without pressing switch S1 or S5.
Before connecting any SCR/triac in the of a pnp transistor is to be connected to
circuit, please check its anode/MT1’s con- negative (point K). The base in both cases
nection with the case. (Note: A triac is is to be connected to point G.

A NOVEL METHOD OF FREQUENCY

VARIATION USING 555 NA
ANJA
RUP
VYJESH M.V.

E
lectronics For You readers are
TABLE I
very much familiar with the func-
VR1 Frequency Frequency
tioning of timer 555 in astable (Ω) (Hz) (C1=0.1µ) (Hz) (C1=1µ)
mode of operation. Traditionally, if at all 10 453 46
there was a need to keep the duty factor 33 455 46.5 results in increase of frequency, instead of
constant and change the frequency con- 68 459 47 decrease. When the value of variable re-
tinuously, the method was to use a vari- 100 462 48 sistor is zero, frequency is given by
220 467 50
able capacitor, rated in picofarads. But in 500 478 52
that case, changing the frequency in tens 1000 506 55
of hertz range would become tedious. On 2000 585 63 Now, when the value of variable re-
the other hand, sacrificing duty factor, 3300 780 81 sistor VR1 is increased, the frequency in-
4700 1300 140
change of frequency can be done by chang- creases from the value of ‘f ’ as determined
5600 2200 244
ing the values of R1 or R2. Duty Cycle Duty Cycle from above formula (with VR1=0).
Both of the above-mentioned problems =66% =68% Lab note: The circuit has been prac-
can be overcome simply by using a vari- Note: Using higher values of capacitors (e.g., tically verified with two different values
able resistor, as shown in the circuit dia- 10µ) or higher values of resistors (e.g., 6.8k), of timing capacitor C1 and the results
gram. Surprisingly, increase of resistance the results were found to be erratic. obtained are tabulated in Table I.

39
March

2000
 CONSTRUCTION

varying the value of the standard cali-

RESONANCE TYPE L-C METER

brated capacitor. Since frequency of the
RF source is the same in both the cases
(say f MHz), the unknown value of induc-
tance of the coil under test, LX (in micro
RUPANJANA henries), can be calculated using the fol-
ARUP KUMAR SEN
lowing relation:

T
he voltage developed across a ca-
pacitor or an inductor in a series-
resonant LCR circuit reaches its When inductance Lw (in micro Hen-
maximum value at resonance. This fact ries) of the work-coil is known, the value
can be used to find the value of an un- of unknown inductor, LX, can also be cal-
known inductance or a capacitance. The culated using the relation:
present circuit is based on this very prin-
ciple and it may be used to measure an
inductance of even less than 1 µH, or a Author’s prototype
capacitance of the order of a few pico Far- Alternatively, the coil under test can
ads. The quality factor ‘Q’ of the circuit prising a known value of inductance (called be connected directly to the circuit, with-
can be measured if the applied RF volt- work-coil) and a standard variable cali- out any work-coil in series. In this case
age and the resonant voltage, developed brated capacitor. The resonance condition the inductance is given by the relation:
across an inductor or a capacitor, are mea- is detected by a peak detector which de-
sured with the help of a sensitive RF volt- tects the peak voltage developed across

Fig. 1: Schematic diagram of the resonance L-C meter

the capacitor at reso- where f is in MHz and C is in pF.

nance and gives a visual The value of a small unknown capaci-
indication of the same. tor, CX, can also be measured similarly in
An unknown inductance the following two steps:
is measured in two steps 1. A resonant condition is achieved
as follows: by varying the standard capacitor against
1. The circuit is tuned a particular combination of a work-coil
to resonance, using cali- and a crystal (forming part of crystal os-
brated tuning capacitor, cillator). Let the in-circuit value of tun-
with the work-coil in the ing capacitor be CA pF.
circuit. The in-circuit 2. The unknown capacitor is connected
Fig. 2: 9V power supply value of calibrated capaci- in parallel to the standard capacitor, and
tor is noted. Let this value decreasing the value of the standard tun-
meter, since Q is simply the ratio of these be CA in pico Farads. ing capacitor brings the resonant condi-
two voltages. 2. The unknown inductance is brought tion back. Let this new in-circuit value of
in series with the work-coil, and the cir- the tuning capacitor be CB pF.
cuit is retuned to resonance using the cali-
Methodology brated capacitor. Let the new in-circuit
The value of the unknown capacitor CX
would be the difference of these two values
Signal from a variable-frequency RF source value of the calibrated capacitor be CB of the standard variable capacitor, i.e.
is applied to the coil under test, which is pico Farads.
in series with a resonating network com- In both the cases tuning is done by

41
 CONSTRUCTION

The frequency of the RF source may be PARTS LIST

varied from 1.8 MHz to 14.3 MHz by con- Semiconductors:
necting different crystals of known reso- IC1 - 7809, 3-terminal +9V
nant frequencies. (Refer parts list.) regulator
T1, T3 - BF194B npn transistor
Transistor T1, along with capacitors T2 - BFW10 field-effect transistor
C3 and C4, and crystal Xtal, forms the T4, T5 - BC147 npn transistor
Fig. 3: Single-layer coil Colpitts oscillator. The crystal operates D1-D4 - 1N34/OA79 point-contact
signal diode
near its parallel resonant frequency. Nec- D5, D6 - LED, 5mm
The formulae (1) to (3) are based on essary positive feedback is obtained via D7, D8 - 1N4002 rectifier diode
the assumption that there would be no capacitors C3 and C4 with a feedback fac- Resistors (all ¼W, ±5% metal carbon film,
mutual inductive coupling between the tor β = (C3+C4)/C3. Since the voltage gain unless stated otherwise)
work-coil and the coil under test, and no A of a common-collector stage is less than R1, R7 - 33-kilo-ohm
R2 - 22-kilo-ohm
stray capacitance exists to affect the reso- unity, β is made slightly greater than unity
R3 - 2.7-kilo-ohm
nating network. The stray capacitance, if to sustain oscillation. (Loop gain Aβ be- R4 - 330-ohm
any, is to be determined and added to both comes 1 in steady-state condition.) The R5 - 1-meg-ohm
CA and CB to get better accuracy. The stray output of the oscillator is taken from emit- R6 - 4.7-kilo-ohm
R8 - 620-ohm
capacitance would have no effect upon the ter of transistor T1 and is fed to the power R9, R10 - 1-kilo-ohm
results obtained using the method pertain- amplifier transistor T3, through a buffer VR1, VR2 - 470-kilo-ohm, variable (linear)
ing to formula (4) above, as it would be stage. Field-effect transistor T2, config- Capacitors:
cancelled out by the subtraction procedure. ured as a common drain amplifier, serves C1, C9 - 220µF, 25V electrolytic
as a buffer amplifier. Due to the high in- C2, C11 - 0.2µF ceramic disc
C3 - 100pF polyester
put impedance of the source follower, load-
Description ing on the oscillator is very low. Moreover,
C4 - C8, C10
C12
-
-
820pF polyester
1000µF, 25V electrolytic
In the present circuit shown in Fig. 1, any variation in the output load imped- CT - 10pF - 280pF 2J type
CF - 0pF - 10pF trimmer
the RF signal source is formed using a ance has no pulling effect on the oscillator
Miscellaneous:
crystal-controlled Colpitt’s oscillator, a frequency. The use of common collector
X1 - 230V AC primary to 12V-0-
buffer amplifier, and a power amplifier. configuration for the oscillator and the 12V, 250mA secondary
power amplifier stages pro- transformer
vides a better high-fre- LW - Work-coil (refer Table I)
M1, M2 - DC mA meter, 1 mA F.S.D.
quency response. Xtal - 1.8, 3.5, 6, 10, 12, 14.3 MHz
The peak voltage at quartz crystal
resonance is indicated by SW1, SW2,
the intensity of LED D5 SW4 - ON/OFF switch
SW3 - SPDT switch
connected to the collector - BNC and SIP connectors
terminal of transistor T4. - Snap connectors for coils
A milliammeter (M1) may (male/female)
also be used in series with
the LED to get sharper point-contact RF signal diodes (1N34), D1
tuning. The base of tran- and D2. The input signal to the bridge is
sistor T4 is driven by the the voltage developed across the parallel
average DC voltage devel- combination of variable capacitors CT (cali-
oped over a complete cycle, brated tuning capacitor, such as the one
at the output of a half- used in radio work with Cmax ≅ 280 pF for
bridge rectifier. The recti- 2J) and CF (calibrated fine tuning capaci-
Fig. 4: Actual-size, single-sided PCB layout for the circuit fier is formed with two tor 0-10 pF). Diode D1 conducts only dur-
ing positive half cycle of the input signal
TABLE I and causes a base current proportional to
Work-coil Specifications for Different Crystal Frequencies the average value of the signal voltage to
Crystal SWG Turns Coil No. of Inductance flow through the B-E (base-emitter) junc-
frequency enameled /inch diameter turns closely (µH) tion of transistor T4. On the other hand,
(MHz) copper wire (in inch) wound
diode D2 conducts heavily during nega-
1.8 36 120 0.4 88 45
3.5 36 120 0.3* 42 15
tive half cycle and ensures that no re-
6.0 36 120 0.3* 30 10 verse-bias leakage current flows through
10.0 28 63 10/16 10 2.3 diode D1 via B-E junction. (The leakage
12.0 28 63 1016 10 2.3 current reduces the average voltage de-
14.3 28 63 10/16 10 2.3 veloped over a complete cycle, and hence,
*Note. The coils are to be wound on standard ebonite coil formers (ferrite cored) that reduces the intensity of the LED.) If a
are used in radio work. The listed inductance values are with the core almost second identical detector stage, built
completely dipped in the hole of the former. The values, without a core, would be around transistor T5, is connected to the
approximately half of the listed values. power amplifier output (emitter of tran-

42
 CONSTRUCTION

TABLE II sponding to a particular

frequency, and is given by
Construction Details of the Coils
the relation:
Coil Radius(r) Length(l) Turns(N) L*
(inch) (inch) (µH)
metres,
L1 10.4/16 5/16 20 7
L2 10.4/16 3/16 10 2.2 where f is the frequency in
L3 0.25 1.25 77 25
L4 0.25 13/16 50 15 MHz.
L5 10.4/16 2/16 4 0.4 To wind a coil of re-
quired inductance, we may
use the following equation:

TABLE III
Here, r is the mean ra-
Determination of the Unknown
dius, l is the length of the
Inductances by Two-frequency
Method coil in inches, and n is the
Fig. 5: Component layout for the PCB number of turns per inch
Coil Peak response C(pF) Results
obtained at L(µH) of the selected SWG (as per
fosc (MHz) wire tables). Initially, a table of l-vs-L is
ness in tuning. The peak detector input to be generated for a particular SWG, by
L1 3.5 265.2
6 74.8 7.16 should not have any direct coupling with putting various values of winding length
L2 10 81.6 the power amplifier via a stray resistance l in equation (6) and finding the resultant
14.3 20.4 2.1 or capacitance, as it would cause hin- L. The winding length, and consequently
L3 1.8 265.2 drance during the search for a peak. the number of turns required for the in-
3.5 37.8 25.2 To get better results, different work- ductance calculated above, may then be
coils are to be used with different crystal found from this table. However, it is to
sistor T3), it would show a dip in the in- frequencies. The details of these coils are be noted that formula (6) above could only
tensity of the LED, as the resonant cir- given in Table I. help us to get close to the target induc-
cuit is tuned to a peak. If a continuously variable RF source tance. The desired value is then achieved
Positive 9V supply, for the meter cir- is desired, one may substitute the crystal by adjusting its core, after connecting the
cuit, is derived using a conventional three- in the oscillator circuit with a suitable coil in the circuit.
terminal fixed-voltage regulator IC 7809. combination of an inductance and a vari- In equation (6) we may substitute N
AC mains voltage is stepped down by able condenser. The approximate fre- (total number of turns) for product l.n, if
power transformer X1 from 230V AC to quency of oscillation of the circuit can be desired.
12V AC, which is then rectified to deliver determined with the help of a radio re-
the unregulated DC input to the regula- ceiver—by bringing it close to the meter
tor IC. (Refer Fig. 2.) circuit. The frequency on the dial at which Methods
maximum reception would be heard is the Some methods to find the value of induc-
desired frequency. tance are given below:
Construction The required inductance for a particu- 1. Direct connection. Most of the un-
During construction, special care is to be lar frequency range can be calculated from known inductances may be measured by
exercised towards lead dressing. Any stray the following relation: connecting them directly to the circuit and
coupling from output to input through a using the relation:
stray capacitance, or an unwanted mu-
tual inductance, may produce unwanted
oscillations, which would hamper the re- Here, C is in µF and Cmax ≅ 280 pF for
liability of the meter. Since stray capaci- 2J. λ is the wavelength in metres corre- Here, f is in MHz and C is in pF. The
tances play a very adverting role in a mea- steps to be followed are given below:
surement, the same should be minimised TABLE IV 1. Switch on the RF generator
by keeping the length of the connecting Determination of Unknown Inductances (switch S1) with the coil under test
wires as short as possible. by Series Connection Method connected to the circuit across points
The voltage developed across tuning Coil Peak response C(pF) Results X1-X2.
capacitors (CT and CF) gradually increases obtained at (µH) 2. Switch on S2 to apply RF power
as the frequency of oscillation is lowered. fosc (MHz) to the resonating network.
Hence, the input to the peak detector L1(Lw) 6 65 3. Rotate LED-intensity-control
must be controlled accordingly for its safe L1(Lw)+L2(Lx) 6 40.8 L2=2.3 potmeter VR1 to obtain the maximum
operation. On the other hand, a reduc- L3 (Lw) 1.8 265.2 intensity of LED D5.
L3(Lw)+L4(Lx) 1.8 156.4 L4=13.6
tion in the applied voltage to the peak 4. Tune calibrated tuning capaci-
detector reduces the current through the L2(Lw) 14.3 20.4 tor CT (and/or fine-tuning calibrated
L2(Lw)+L5(Lx) 14.3 10.3 L5=0.43
LED, which again enhances the sharp- capacitor CF) for maximum intensity

43
 CONSTRUCTION

of LED D5, or peak on the meter. The against a particular crystal and work-coil MHz crystal, 17µH work-coil, and a 2J
intensity of LED D5, or the deflection of combination. capacitor for CT.
the meter pointer, would be the maxi- 2. Read the capacitance values from 2. Rotate the tuning capacitor towards
mum at resonance. If no peak is found, it the dials. Let the sum be CA pF. its maximum capacity (approx. 280 pF).
might be due to low signal input to the 3. Connect the capacitor under test in 3. Tune by varying the slug of the coil
peak detector. Gradually decrease the in- parallel with CT. to get a peak on the meter or LED.
circuit resistance value of potmeter VR1. 4. Retune the circuit to get the peak 4. If you require a resolution of 10
If still no peak is found, it would mean back. pF, connect a standard low-tolerance 10
that crystal frequency is not appropriate. 5. Note the new values of capacitance pF capacitor in parallel with CT. Instantly
Try with another crystal. from the dials. Let the sum be CB pF. the circuit would be out of tune.
5. Note down the capacitance values 6. Calculate the unknown capacitance 5. Rotate capacitor CT to get back the
from the dials of CT and CF. The total from the relation: peak again. Mark the new position of CT.
value of capacitance C is given by C = Cx = (CA – C B) pF It would be Cmax =10 pF.
CT+CF+CStray. Method to determine an unknown 6. Redo steps 4 and 5 to cover the
The value of CStray may be in the range frequency. Frequency of an unknown RF entire angular span (=180o). Each time
of 10-30 pF. If CT is sufficiently high, CStray sinewave signal may be measured by fol- the new position of CT would be 10pF less
may be dropped from the calculation. lowing the steps given below: than its previous value.
6. Calculate the value of LX using 1. Connect a suitable work-coil in the
equation (7). circuit.
2. Series connection. This includes 2. Connect the RF signal source (with Limitations
following steps: unknown frequency FX) to the gate of While tuning with CT to get a resonance,
1. Insert a crystal in the crystal socket. buffer transistor T2, after disconnecting the LCR circuit may produce a peak volt-
Connect the coil under test across termi- the crystal oscillator from it, with the help age at the harmonic frequency of the crys-
nals X1-Y and a suitable work-coil across of switch S3. tal used, which would give misleading re-
X2-Y (Table I). Initially short X1-Y termi- 3. Apply power to the meter by turn-
sults. To avoid this situation, the posi-
nals using a small wire. Tune CT and CF ing switch S1 ‘on’.
tions of those harmonic frequencies on the
to get a peak on LED D5 (or meter). Note 4. Apply RF power to the resonant
dial of CT, for a particular crystal and
the capacitance values from the dials of circuit after turning switch S2 ‘on’.
work-coil combination, should be spotted
tuning capacitors CT and CF. Let this value 5. Tune the resonant circuit to get a
first, by rotating the capacitor over its
be CA. If no peak is obtained, try with peak. If no peak is obtained, try with an-
full swing.
another crystal and work-coil combination. other work-coil.
During tuning, if a conductive body is
2. Remove the short across X1-Y and 6. Note the capacitance value from
brought near the resonant network of the
retune the circuit by rotating CT (and/or the dials of the tuning capacitors. Let the
variable capacitor, interference would be
CF) towards lower capacitance value to sum be C.
7. Calculate the frequency of the in- produced.
establish the peak once again. Make a
fine adjustment using CF. Note the new coming RF signal using the following re-
positions on the dials. Let the new sum lation: Results
of CT and CF be CB. Coils practically wound, using the formu-
3. Calculate the value of the unknown MHz
lae given in the article, and inductance
inductance from Eqs (1) or (2) given above.
Here, Lw is in µH and C in pF. practically determined, using two-fre-
3. Two-frequency method. If a coil
quency method and series connection
of inductance LX gives peak responses on
method, are tabulated in Tables II, III,
two different frequencies—fA at CA and fB Calibration and IV respectively.
at CB on tuning the dial—then LX can be
If a standard variable capacitor is not Power supply may be assembled sepa-
calculated from the formula given below:
available, we may use, after proper cali- rately on the PCB, which may be cut out
bration, a 2J type variable capacitor which from the main PCB. Variable tuning ca-
is generally used for radio work. To cali- pacitors (CT and CF), snap connectors for
Method to find the value of capaci- brate the same, follow the steps given be- coils (L W and L X ), switches, LEDs,
tance. Follow the steps given below: low: potmeters, etc may be mounted on front
1. Tune the circuit to resonance 1. Switch on the RF source with a 3.5 panel. ❏

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44
 CONSTRUCTION

ELECTROLYSIS-PROOF COMPLETE comprises a step-down transformer (with

secondary voltage and current rating of
15V-0-15V, 1A respectively), followed by

WATER-LEVEL SOLUTION
a bridge rectifier, filter, and 12-volt regu-
lators [LM7812 for +12V (V CC ) and
LM7912 for –12V (V EE)]. Capacitors C1-
RUPANJANA C4, across rectifier diodes, and C8 and
LOKESH KUMATH C10, across regulator output, function as
noise eliminators. Diodes D5 and D6 are

O
ne major problem in using wa-
ter as a conducting medium
arises due to the process of elec-
trolysis, since the sensor probes used for
level detection are in contact with water
and they get deteriorated over a period of
time. This degradation occurs due to the
deposition of ions on the probes, which
are liberated during the process of elec-
trolysis. Thereby, the conductivity of the
probes decreases gradually and results in
the malfunctioning of the system. This
can be avoided by energising the probes
using an AC source instead of a DC
source.
The circuit presented here incorpo-
rates the following features:
1. It monitors the reservoir (sump
tank) on the ground floor and controls the
pump motor by switching it ‘on’ when the
sump tank level is sufficient and turning
it ‘off’ when the water in the sump tank
reaches a minimum level.
Fig. 1: Circuit diagram of complete water level solution (contd. refer Fig. 2)

2. Emergency switching on/off of the

pump motor manually is feasible.
3. The pump motor is operated only if
the mains voltage is within safe limits.
This increases the life of the motor.
4. It keeps track of the level in the
overhead tank (OHT) and switches on/off
the motor accordingly automatically.
5. It checks the proper working of the
motor by sensing the water flow into the
tank. The motor is switched ‘on’ and ‘off’
three times, with a delay of about 10 sec-
onds, and if water is not flowing into the
overhead tank due to any reason, such as
air-lock inside the pipe, it warns the user
by audio-visual means.
6. It gives visual and audio indica-
tions of all the events listed above.
7. An audio indication is given while
the motor is running.
8. The system is electrolysis-proof.

Description
The power supply section (Fig. 1). It

45
 CONSTRUCTION

Note: Identically marked points in

Figs 1 and 2 are interconnected

Fig. 2: Part circuit of complete water level solution (contd. from Fig. 1)

used as protection diodes. are not met, the output of IC7 goes high to transistor T9 does not conduct with logic
The under- and over-voltage cut- de-energise relay RL1 via transistor T7. 0 voltage (1 to 2V) at its base.
off section (Fig. 1). It comprises a dual Bipolar squarewave generation When the motor is running (all the
comparator, two pnp transistors, and a (Fig. 1). One side of the secondary of inputs to NAND gate IC7 are high), tran-
few other discrete components. This part transformer X1 is also connected to op- sistor T9 base is pulled to ground and
of the circuit is meant to stop the motor in amp IC10 (µA 741), which is used here as thus capacitor C15 starts charging via re-
case of a low mains voltage (typically 180V a comparator to provide bipolar square sistor R16. The RC combination is selected
to 190V) or a voltage higher than a speci- wave (having positive and negative [using the well-known charging formula
fied level (say 260V to 270V). The unregu- halves). It is not advised to directly con- V(t) = Vfinal (1-e-t/RC)] such that it takes
lated DC is sampled by means of a poten- nect the secondary output to the probe in about 15 seconds for the capacitor to reach
tial divider network comprising resistors the tanks because, if due to any reason 1/3 Vcc, i.e. about 4 volts to clock flip-flop
R3 and R4. The sampled voltage is given the primary and secondary get shorted, IC4(a) to toggle, taking its Q pin low to
to two comparators inside IC LM319. The there is a risk of shock, as the secondary stop the motor (via IC7, transistor T7,
reference voltages for these two compara- would be directly connected to the probes and relay RL1). However, if water starts
tors are set by presets VR1 and VR2. The immersed in water inside the tank. But if flowing within 15 seconds after the start-
outputs of both the comparators are ac- we use a comparator in between the sec- ing of motor, transistor T8 would start
tive-low (normally high, until the low or ondary and probes, the IC would get open conducting and discharge capacitor C15,
high voltage limits are exceeded). That is, in case primary and secondary windings not allowing it to charge, irrespective of
when the AC mains goes below (or rises are short-circuited. For additional safety, the state of transistor T9. Thus capacitor
above) the preset levels, the outputs of fuses F2 and F3, both of 1A capacity, are C15 remains discharged.
the comparators change to logic zero. The connected to the output of secondary wind- But if water does not flow due to any
output of either comparator, when low, ings. reason, such as air lock or pump motor
results in lighting up of the respective Pump motor fault-detection circuit failure, IC4(a) toggles after about 15 sec-
LED—D7 (for lower limit) and D8 (for (Figs 1 and 2). A sensor probe detects onds, which makes its Q pin 2 low. As a
upper limit) via transistors T1 and T2 the flow of water. It is fixed just at the result, the output of IC7 goes high and
(2N2907), which are switching transistors. mouth of the inlet pipe, inside the over- the motor stops. Simultaneously, capaci-
The outputs from the comparators also head tank. When the motor is off (output tor C15 is discharged. At the instant Q
go to 8-input NAND gate IC7 (CD4068) to ‘G’ of NAND gate IC7 is high), transistor goes low, Q (pin 1) goes high and so a
control the motor via transistor T7. All T9 (2N222) is ‘on’ (saturated) and, there- clock is applied to IC5 via resistor-capaci-
inputs to IC7 are high when all conditions fore, capacitor C15 is short-circuited. It tor combination of R18-C16, so that clock
required for running of the pump motor also pulls the clock input pin 3 of IC4(a) input pin 14 of IC5 goes high after about
are fulfilled. When one or more conditions flip-flop to ground. Zener D30 ensures that 10 seconds. As a result, pin 2 of IC5 goes

46
 CONSTRUCTION

Fig. 3: Actual-size, single-sided PCB layout for the circuit shown in Figs 1 and 2

Fig. 4: Component layout for the PCB

high and resets IC4(a) to make Q high seconds to restart the motor. If this con- The output of IC9 is used to switch
again. This starts the motor again. dition repeats for the third time, pin 7 of ‘on’ the speaker at the set frequency. The
But if water still does not flow into IC5 goes high, to reset it. The same out- frequency (tone) can be set using preset
the OHT this time, Q of IC4(a) becomes put from pin 7 of IC5 functions as a clock VR4. The Q output of IC4(b) is also used
low again to switch off the motor. Simul- pulse for IC4(b), to give a logic high sig- to light up the ‘Motor Fault’ LED D27.
taneously, IC5 gets another clock pulse nal to RESET pin 4 of IC9 (NE555), con- This fault condition can be reset by press-
and IC4(a) is reset once again after 10 figured as astable multiviberator. ing switch S2 to reset IC4(a) and IC4(b),

47
 CONSTRUCTION

motor fault), indicating that the PARTS LIST

overhead tank has been filled Semiconductors:
completely. At this instant LED IC1 - 7812, +12V regulator
IC2 - 7912, –12V regulator
D11 is lit to indicate this condi- IC3 - LM319 dual comparator
tion, while during motor fault IC4 - CD4027 dual JK flip-flop
condition motor fault LED D27 IC5 - CD4017 Johnson ring
is lit. Thus, by using the same counter
IC6, IC9 - NE555 timer
alarm facility and two different IC7 - CD4068, 8-input NAND gate
Fig. 5: Proposed front-panel layout LEDs, two different conditions IC10 - µA741 op-amp
are indicated. The collector of the IC8 - UM66 melody generator
T1, T2, T7 - 2N2907 pnp switching
after taking appropriate remedial action same transistor T5 is connected to NAND transistor
such as filling the foot-valve of the motor gate IC7 to switch off the motor when the T3-T5,T8-T10 - 2N2222 npn switching
with water or by removing the air-lock tank is filled up to its maximum level. transistor
T6 - SL100 npn transistor
inside the pipe. The ground pin of melody generator D1-D6, D23 - 1N4007 rectifier diode
Reservoir/sump tank level detec- UM66 (IC8) is connected to the emitter of D7-D11,
tion (Fig. 2). To start the motor when transistor T7. Thus, the melody IC is ‘on’ D27-D29 - LED, coloured
D12, D13,
the water level in the reservoir is suffi- when the motor is running. The volume D16-D21
cient (level B), and to stop the motor when of this melody can be controlled by preset D24-D26 - 1N4148 switching diode
the level falls below a particular level VR3. D14,D15,D31 - 1N4001 rectifier diode
D22, D30 - 3.1V zener diode
(level A), are the two functions performed Diode D23 connected across the relay Resistors (all ¼ watt, ±5% carbon film, unless
by this section. IC6 (timer NE555) is con- is the ‘snubber’ diode to protect emitter stated otherwise):
figured here to function in the bistable junction of T7. Capacitor C25 is added to R1, R23 - 100-kilo-ohm
R2, R16 - 68-kilo-ohm
mode of operation. When the water level avoid chattering of the relay. R3, R31 - 6.8-kilo-ohm
is below the minimum level A, both pins LS1 can be any 0.25W-1W, 8-ohm R4, R19, R20,
2 and 6 of IC6 are low. In this state, the speaker. RL1 should be a good-quality R24, R34,R35 - 2.7-kilo-ohm
output is high, as the internal R-S flip- 12V, 200-ohm relay, with a contact rating R5, R7, R17,
R26-R28,R36 - 1-kilo-ohm
flop is in the set condition. of at least 10A. The combinations of ca- R6, R8, R30 - 560-ohm
When water rises up to level A and pacitor-resistor C19-R21 and C27-R32 R9-R11, R29,
above, but below level B, pin 2 is at high form power-on reset circuits. Since the R33 - 620-ohm
R12-R15, R21,
level. But in this state no change occurs CMOS ICs are used here, the noise mar- R25, R32 - 10-kilo-ohm
at the output because both the inputs to gin is quite high. The front-panel layout R18 - 270-kilo-ohm
the flip-flop are at logic zero, and so the for the system is given in Fig. 5. R22 - 82-kilo-ohm
VR1-VR2 - 10-kilo-ohm, preset
initial condition remains at the output. VR3, VR4 - 4.7-kilo-ohm, preset
When water touches level B probe,
pin 6 goes high and the output low. As a
Precautions Capacitors:
C1-C4, C8, C10
result, collector of transistor T10 goes high 1. The probes should be made of a mate- C22- C24,
C28, C29 - 0.1µF ceramic disc
and the motor starts, if all other inputs rial which is rust-proof, such as alu- C5, C6 - 1000µF, 25V electrolytic
of IC7 are also high. Thus, water level in minium or brass. C7, C9, C13,
the reservoir starts decreasing, and when 2. Adjust presets VR1 and VR2 using C16-C19, C21,
C26, C27 - 100µF, 25V electrolytic
it goes below level A, the output of IC6 an auto-transformer. C11, C12,C20 - 10µF, 25V electrolytic
goes high and the motor stops. 3. IC1 and IC2 should be provided C14 - 22µF, 25V electrolytic
Capacitors C20 and C21 act as filter with heat-sinks. C15,C25,C30 - 470µF, 25V electrolytic
capacitors. The value of C21 is selected 4. Level A of the reservoir should be Miscellaneous:
such that it takes about 10 seconds to such that the foot-valve is just under wa- X1 - 230V AC to 15V-0-15V, 1A
sec. transformer
reach 2/3 Vcc potential at pin 6, thereby ter. RL1 - Relay 12V, 200-ohm with con-
avoiding any erroneous start of the mo- 5. The probes energised with AC (con- tact rating ≥ 10A
tor due to random fluctuations in the wa- nected to output of IC10) should run up - IC bases
LS1 - Speaker, 8-ohm, 1W
ter level of the reservoir due to any rea- to the bottom of the OHT and sump tanks. - Heat-sinks for IC1 and IC2
son. Resistors R22 and R23 are bleeder 6. The water-flow-sensing probe S1 - Mains on/off switch
resistors for discharging these capacitors. should be installed well above the ‘tank- S2-S4 - Single-pole tactile switches
F1 - 0.5A fuse
Switches S3 and S4 are used to switch full’ level. F2-F3 - 1A fuse
‘on’ and switch ‘off’ the motor respectively, 7. Remember that the ‘low level’ LED - Sensing probes
in case of any emergency. indicates that water is between the ‘low
Miscellaneous functions (Figs 1 level’ and ‘half level’. When both ‘low level’ as possible (but not too close to avoid any
and 2). Transistors T3 through T5 are and ‘half level’ LEDs are on, the water water droplets sticking across them) to
used to drive LEDs D9 through D11, which level is between ‘half’ and ‘full level’. have minimum water resistance.
indicate the level of water inside the over- 8. The probes inserted deep, down to A single-sided, actual-size PCB for the
head tank. The base of transistor T5 is the bottom, should be completely uncov- complete circuit of the project is given in
also connected to RESET pin 4 of IC9 to ered up to the top position of the tank, Fig. 3, and a component layout for the
sound an alarm (similar to that in case of and the different probes should be as close same is given in Fig. 4. ❏

48
 C I RC ICR CUUII T
T I D E A S
IDEAS

through Triac10) via corresponding tran-

PENDULUM DISPLAY RUPANJANA

sistors (T1 through T10) to light up the
bulbs connected to them.
Initially, when output O0 of IC3 goes
high, the output of flip-flop formed by
K.P. VISWANATHAN
NOR gates N3 and N4 goes high, thus
keeping pin 10 of IC2 at logic 1, and the

T
he circuit presented here can be The BCD outputs of IC2 are con- counter counts up. Subsequently, when
used for producing eye-catching nected to IC3 (CD4028), which is a 1-of- output O9 become high, the flip-flop is
effects like ‘pendulum’ and ‘dash- 10 decoder. As per sequential BCD in- toggled and pin 10 of IC2 is pulled to
ing light’. To and fro motion of
a pendulum can be simulated
by arranging ten bulbs in a
curved fashion and lighting
them up sequentially, first in
one direction and then in the
other, using this circuit. For
pendulum effect, the frequency
of oscillator should be quite low.
Similarly, one may create
a dashing light effect by using
19 bulbs and connecting them
in such a way that bulb num-
ber 1 and 19, 2 and 18, 3 and
17, so on are in parallel. For
achieving the dashing light ef-
fect, the oscillator frequency
should be comparatively high.
In this circuit NOR gates
N1 and N2 form an oscillator
whose period can be adjusted
through potmeter VR1. Oscil-
lator output is fed to clock pin
15 of IC2 (CD4029), which is
a binary/BCD up/down
counter. As long as pin 10 of
IC2 is at logic 1, it counts up;
when it changes to logic 0, it
counts down. This changeover is ex- puts (up or down), outputs of IC3 go logic 0, and the counter starts counting
plained below. high and trigger the triacs (Triac1 down. The cycle repeats endlessly.

AUDIO LEVEL INDICATOR S.C. DWIVEDI

ranged in circular form and only two
colours are used, a number of different
combinations are possible. For example,
LOKESH KUMATH one may have red and green LEDs ar-
ranged in two rows, one over the other.

T
he audio level indicator described fect in the circles) also increases. The LEDs of one row may be made to ap-
here is quite simple and utilises lighting LEDs of one of the two circles pear moving from left to right and of
readily available ICs. The func- would appear to move in clockwise di- the other in the opposite direction, i.e
tion of the circuit can be understood rection, while the other circle’s LEDs from right to left.
with reference to Fig. 2 which shows appear to move in anticlockwise direc- In the circuit shown in Fig. 1, IC
two concentric circles formed by red and tion. When no audio is available, the 555 is wired to operate in an astable
green LEDs respectively. speed of these two roulettes appears to mode as a voltage controlled oscillator
When the audio level increases, the be constant. (VCO). The only difference here is that
speed of the roulette (moving light ef- Although the LEDs here are ar- pin 5 (which is a frequency controlling

49
 C I R C U I T I D E A S

The audio output is not

taken directly from the out-
put of the deck (across
speaker terminals) because
the output across speaker
terminals depends upon the
setting of the volume con-
trol and would vary from
one model to the other.
Here, the left and the right
outputs (in case of a stereo
deck) are fed to the input
of an audio amplifier IC
TBA810, via capacitors C1
and C2 (0.01µF). These low-
value capacitors help to
maintain the required sepa-
ration between left and
right channels. Otherwise,
at high frequencies the
separation may fall tremen-
dously, thereby short-cir-
cuiting L and R channels.
The 10k preset VR1 be-
fore IC TBA810 is used to
control the output level so
that at maximum output
the potential at pin 5 of
Fig. 1 555 is such that the fre-
quency of 555 is between 1
pin connected to the invert- and 15 Hz (approximately). Otherwise,
ing terminal of a compara- all the LEDs at the output of IC3 will
tor inside the IC) is not appear flickering.
grounded via a capacitor, The other 10k preset VR2 is used to
but the potential at this pin set the normal speed of the roulette,
is made to change in ac- between 2 and 3 Hz.
cordance with the audio One point to be noted here is, that
level. This causes the in- the audio signals should be taken from
ternal flip-flop of timer the output of preamplifier IC of the deck
NE555 to set and reset ac- just before the volume control. The out-
cording to the audio level, put will depend on the setting of vol-
and hence the output fre- ume control (which we do not want) if
quency varies correspond- the taken after the volume control.
ingly. This output is fed to The power supply for the circuit may
the clock input pin of ring be tapped from the power supply of the
counter IC CD4017 whose deck, as shown in Fig. 1. The power
output advances at a rate supply voltage in a deck is not exactly
proportional to the clock in- 12V DC, but is around 15 to18V. It is
Fig. 2 put or the audio level preferable to connect a 7812 regulator
present at pin 5 of IC2. IC for 12V regulation.

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50
 C I R C U I T I D E A S

put of gate N7 is high if any one or more

CLEVER RAIN-ALARM
of the rain-sensor plates SR1 through
SR4 remain dry. The output of gate N7 is
NA coupled to inverter gates N5 and N6. The
ANJA
RUP output from gate N5 (logic 1 when rain is
M.K. CHANDRA MOULEESWARAN sensed) is brought to ‘EXT’ output con-
nector, which may be used to control

U
sually rain-alarms employ a The four rain-sensors SR1 to SR4, other external devices. The output from
single sensor. A serious draw- along with pull-up resistors R1 to R4 the other inverter gate N6 is used as
back of this type of sensor is (connected to positive rails) and invert- enable input for NAND gate N8, which is
that even if a single drop of water falls ers N1 to N4, form the rain-sensor-moni- configured as a low-frequency oscillator
on the sensor, the alarm would sound. tor stage. The sensor wires are brought to drive/modulate the piezo buzzer via
There is a probability that the alarm to the PCB input points E1 to E5 using a transistor T1. The frequency of the oscil-
may be false. To overcome this draw- 5-core cable. The four outputs of Schmitt lator/modulator stage is variable between
back, here we make use of four sensors, inverter gates N1 to N4 go to the four 10 Hz and 200 Hz with the help of preset
each placed well away from the other at inputs of Schmitt NAND gate N7, that VR1. The buzzer is of piezo-electric type
suitable spots on the roof. The rain alarm makes the alarm driver stage. having a continuous tone that is inter-
would sound only if all the four sensors When all four sensors sense the rain, rupted by the low-frequency output of
get wet. This reduces the probability of all four inputs to gates N1 through N4 go N8. The buzzer will sound whenever rain
false alarm to a very great extent. low and their outputs go high. Thus all is sensed (by all four sensors).
6V power supply (100mA) is used
Fig. 1 here to enable proper interfacing of
the CMOS and TTL ICs used in the
circuit. The power supply require-
ment is quite low and a 6-volt battery
pack can be easily used. During
quiscent-state, only a negligible cur-
rent is consumed by the circuit. Even
during active state, not more than
20mA current is needed for driving a
good-quality piezo-buzzer. Please
note that IC2, being of TTL type,
needs a 5V regulated supply. There-
fore zener D1, along with capacitor
C2 and resistor R5, are used for this
purpose.
A parallel-track, general-purpose
PCB or a veroboard is enough to hold
all the components. The rain-sensors
SR1 to SR4 can be fabricated as shown
in the construction guide in Fig. 2.
They can be made simply by connect-
ing alternate parallel tracks using
jumpers on the component side. Use
some epoxy cement on and around
the wire joints at A and B to avoid
corrosion. Also, the sensors can be
cemented in place with epoxy cement.
If the number of sensors is to be
Fig. 2 four in- increased, just add another set of
puts to CD40106 and 7413 ICs along with the
N A N D associated discrete components.
gate N7 Another good utility of the rain-
also go alarm is in agriculture. When drip-irri-
high and gation is employed, fix the four sensors
its output at four corners of the tree-pits, at a suit-
at pin 6 able height from the ground. Then, as
goes to soon as the water rises to the sensor’s
logic 0. level, the circuit can be used to switch
The out- off the water pump.

51
 C I R C U I T I D E A S

LASER CONTROLLED ON/OFF SWITCH S.C.

DWIV
EDI

Dr K.P. RAO

T
his circuit is built around a 555 isfactorily, though it can be controlled only in dark or dull-lit environments.
timer using very few compo- from still longer distances. Aiming By focussing the laser beam on
nents. Since the circuit is very (aligning) the laser beam exactly on to LDR1 the connected gadget can be acti-
simple, even a novice can easily build it the LDR is a practical problem. vated through the relay, whereas by fo-
and use it as a controlling device. A laser The circuit is very useful in switch- cussing laser beam on LDR2 we can

pointer, now easily available in the mar- ing on/off a fan at night without get- switch off the gadget. The timer is con-
ket, can be used to operate this device. ting off the bed. It can also be used for figured to operate in bistable mode.
This circuit has been tested in op- controlling a variety of other devices The laser pointers are available for
erational conditions from a distance of like radio or music system. The limita- less than Rs 150 in the market. The cost
500 metres and was found to work sat- tion is that the circuit is operational of the actual circuit is less than Rs 50.

TELEPHONE CONVERSATION
The second part of the circuit con-
trols relay RL1, which is used to switch
on/off the tape recorder. A voltage of 48

RECORDER
volts appears across the telephone lines
in on-hook condition. This voltage drops
EDI
DWIV to about 9 volts when the handset is
S.C.
lifted. Diodes D1 through D4 constitute
PRADEEP VASUDEVA a bridge rectifier/polarity guard. This
ensures that transistor T1 gets voltage

T
his circuit enables automatic connected to the telephone lines. Re- of proper polarity, irrespective of the
switching-on of the tape recorder sistors R1 and R2 act as a voltage di- polarity of the telephone lines.
when the handset is lifted. The vider. The voltage appearing across R2 During on-hook condition, the out-
tape recorder gets switched off when is fed to the ‘MIC-IN’ socket of the tape put from the bridge (48V DC) passes
the handset is replaced. The signals are recorder. The values of R1 and R2 may through 12V zener D5 and is applied to
suitably attenuated to a level at which be changed depending on the input im- the base of transistor T1 via the volt-
they can be recorded using the ‘MIC- pedance of the tape recorder’s ‘MIC-IN’ age divider comprising resistors R3 and
IN’ socket of the tape recorder. terminals. Capacitor C1 is used for R4. This switches on transistor T1 and
Points X and Y in the circuit are blocking the flow of DC. its collector is pulled low. This, in turn,

52
 C I R C U I T I D E A S

causes transistor T2 to cut off

and relay RL1 is not energised.
When the telephone handset
is lifted, the voltage across points
X and Y falls below 12 volts and
so zenor diode D5 does not con-
duct. As a result, base of transis-
tor T1 is pulled to ground poten-
tial via resistor R4 and thus is cut
off. Thus, base of transistor T2
gets forward biased via resistor
R5, which results in the energisation of loaded with a cassette and the record lifted. Capacitor C2 ensures that the re-
relay RL1. The tape recorder is switched button of the tape recorder should re- lay is not switched on-and-off repeat-
‘on’ and recording begins. main pressed to enable it to record the edly when a number is being dialled in
The tape recorder should be kept conversation as soon as the handset is pulse dialing mode.

switch S1.

SIMPLE AND ECONOMIC SINGLE- As soon as single-phasing or major

unbalance occurs, 8 to 12 volts are in-
duced across point P1-P2, which after

PHASING PREVENTOR S.C. DWIV

EDI
rectification operates relay RL1. As a
result, the supply to contactor coil is cut
off and it de-energises, thereby protect-
ing the apparatus. Lamp L(d) is also lit
PRAVINCHANDRA B. MEHTA up (unless B phase has failed), indicat-
ing that SPP has operated. Lamps L(a),

T
hree-phase motors and other ap- the circuit diagram. Three-phase supply L(b), and L(c) indicate the healthiness of
pliances are widely used in all is given to apparatus (load) through three phases R, Y, and B. After resump-
sectors of industry. These appli- contactor C. While the primaries of trans- tion of the balanced 3-phase supply, the
ances are prone to damage due to single formers X1, X2, and X3 are connected contactor will automatically energise
phasing. Apart from damage to the costly ahead of the contactor. The contactor (with S1 closed) and supply to the appli-
apparatus, it may also cause a produc- can be energised via N/C (normally ance will be resumed.
tion loss. Many circuits of single phasing closed) contacts of relay RL1 by pressing Notes: 1. In the actual circuit for-
preventor (SPP) are avail-
able but the circuit sug-
gested here is very simple
and economical.
Easily-available mains
step-down transformers
X1, X2, and X3 (230V AC
primary to 0-12V, 500mA
secondary rating) are used
with their primaries con-
nected in star mode and
secondaries in open delta
mode. The characteristic
of this type of connection
is that when three-phase
balanced input is applied
to the primaries, no out-
put across open delta sec-
ondaries will be available.
But in case of major un-
balance or single-phasing,
some voltage, called re-
sidual voltage, is induced
in the secondaries across
points 1 and 6 shown in

53
 C I R C U I T I D E A S

warded by the author, the transformers energising properly with single-phasing. the two secondary connections to get the
X1, X2, and X3 primaries as well as 3. Proper polarity of the transformer required output. Similarly, connect the
switch S1 were connected after the con- connections has to be ensured in the third transformer secondary in series
tacts of contactor. As a result energisation above circuit. To determine proper po- with the other two secondaries. The out-
of contactor was not feasible. Even when larity, connect the primary ends which put across the unconnected ends should
switch S1 was shifted to a ‘live’ phase, are eventually to be connected to three now be treble (36V AC). If it is not so,
relay RL1 (as well as contactor C) was phases, to any single phase (the other reverse the connections of the third sec-
energising/de-energising in quick suc- ends are connected to neutral). Now pro- ondary. Now shift the primary ends
cession during single-phasing and caus- ceed to connect secondaries of two of the (connected to single phase) to each of
ing sparking—for obvious reasons. Hence three transformers in series and mea- the three phases, as shown in the fig-
the circuit was suitably modified at EFY sure the AC ouput across the uncon- ure. The voltage across points P1-P2 will
(as presented). nected ends. This should be double (24V be nearly zero if all three phases are
2. The relay was also changed from AC) of the individual secondary output present.
12V to 6V rating, as 12V relay was not (12V AC). If it is not so, reverse one of —Technical Editor

54
April

2000
 CONSTRUCTION

ICs are pin-to-pin compatible.

SMART CLAP SWITCH

The other ICs used in the control sec-
tion are IC3 (dual JK flip-flop) and IC4
RUPANJANA (NE555 timer, configured as monostable
flip-flop). When power is applied to the
LOKESH KUMATH circuit, IC3, IC4, and IC5 are reset by
power-on reset circuits comprising capaci-

C
ircuit of a smart clap switch, in- around op-amp N2. The gain of preampli- tor-resistor combinations of C14-R19, C11-
corporating certain unique fea- fier stage is 6.6. R16, and C15-R21 respectively. Thus, all
tures, is presented here. It over- The next stage comprising capacitor outputs of IC5 (QA to QD) are at logic zero.
comes the shortcomings observed in nor- C4 and resistor R6 constitutes a high-pass Hence, all the parallel load inputs (A
mal clap switches. The following two spe- filter with a cut-off frequency of about 3 through D) of IC5 are also at logic zero.
cial features, which you would not have kHz. This filter avoids false activation of The Q outputs of IC3 are ‘low’ while its Q
observed in other clap switches, are in- the switch by spurious low-frequency outputs are ‘high’. The CLK2 input of IC3
cluded in its design: sounds such as those produced by a fan, is initially ‘high’ because transistor T1 is
(a) It comprises a 4x4 clap switch, i.e. a motorcycle, and other gadgets. Although in conduction state.
it operates only when you clap four times this precaution may not be absolutely es- Now, when a clap sound is produced,
to switch ‘on’ a device. Similarly, for sential because we are using a coded IC5 gets a low-to-high going clock pulse.
switching ‘off’ the device, you are required sound, it provides additional safety. Its count goes up from 0000 to 0001, i.e.
to again clap four times. The high-pass filter stage is followed it is incremented by one digit. Since QA
(b) The clapping should occur within by an amplifier stage around op-amp N3
PARTS LIST
an interval of about 3.5 seconds, other- with a gain of 23. Thus, the overall gain
Semiconductors:
wise the clap switch status will remain of the op-amps N2 and N3 is about 150, IC1 - LM324 quad op-amp
unchanged. which is quite adequate. IC2 - 7812 +12V regulator
In a simple clap switch, the connected The next stage formed using op-amp IC3 - CD4027 dual JK flip-flop
device is switched ‘on’ by a single clap N4 is a comparator. The reference volt- IC4, IC6 - NE555 timer
IC5 - 74C192 up/down decade
and is switched ‘off’ in a similar manner age connected to the inverting terminal
counter
by a single clap. Since the transducer used of the comparator can be varied, from D1, D9 - Colour LED
in a clap switch is normally a condenser about 0.2V to about 8V, by adjusting pre- D2-D4, D8 - 1N4007 rectifier diode
mic, it is unable to detect difference be- set VR1. Thus, the sensitivity to clap D5-D7 - 1N4148 switching diode
tween a clap and a sound produced when sound can be set by preset VR1. The red T1, T2 - 2N2907 pnp transistor
T3 - 2N2222 npn transistor
a metallic object falls to the ground or LED D1 gives an indication that the clap
Resistors (all ¼W, ±5% metal carbon film,
simply the sound of a shouting person. signal has been detected.
unless stated otherwise)
This is a common problem in clap [Note: IC6 (NE555), configured as a R1, R15, R26 - 10-kilo-ohm
switches. monostable, with a pulse width of 250 ms, R2, R3, R18,
In the circuit of the smart clap switch, has been added at EFY lab during the R19, R21 - 100-kilo-ohm
this problem is completely eliminated. course of testing, to eliminate the effect R4, R7, R9,
Thus, it will not be affected by any spuri- of multiple pulses generated at the out- R13, R14, R16
R20, R22, R23 - 1-kilo-ohm
ous sound, including the one produced put of comparator N4, even with a single R5, R6 - 5.6-kilo-ohm
when a door is strongly banged. This can clap.] R8, R24 - 22-kilo-ohm
be well understood from the working of The main control section is formed R10 - 220-ohm
the circuit explained below. around IC5 (74C192 or CD40192), which R11 - 4.7-kilo-ohm
R12 - 680-ohm
is a 4-bit up/down presetable decade R17 - 33-kilo-ohm
counter. 74C192/CD40192 is a CMOS ver-
The circuit sion of 74192. Here, one can even use
R25
VR1
- 470-ohm
- 10-kilo-ohm preset
230V AC is converted into 12V regulated 74C193/CD40193, a 4-bit up/down binary Capacitors:
DC supply using 15-0-15,1A secondary, counter, since counting up to decimal digit C1 - 47nF ceramic disk
step-down transformer and other related 8 only is involved. The above-mentioned C2, C3 - 4.7µF, 25V electrolytic
components. Since CMOS ICs are used in C4, C6-C8, C12,
TABLE I C18 - 0.01µF ceramic disk
the circuit, its power consumption is quite C5, C10, C13 - 100µF, 25V electrolytic
low and the noise immunity of the circuit Q D QC QB QA Switch/Device status
C9 - 2200µF, 25V electrolytic
is high (about 5.4V). 0 0 0 0 Device remains ‘off’ in this C11, C17 - 10µF, 25V electrolytic
0 0 0 1 region as QC remains at C14, C15, C16 - 0.1µF ceramic disk
Resistor R1 biases the condenser mi-
0 0 1 0 logic low
crophone and the electrical signals (con- Miscellaneous:
0 0 1 1
verted from sound waves) are fed to RL1 - 12V, 200-ohm relay
0 1 0 0 Device remains ‘on’ in this MIC1 - Condenser microphone
buffer stage N1 with high input imped- 0 1 0 1 region as QC remains at X1 - 230V AC primary to 15V-
ance. The high-frequency noise signals are 0 1 1 0 logic high 0-15V, 1A secondary
bypassed to ground by shunting the mi- 0 1 1 1 transformer
crophone with capacitor C1. The mic out- 1 0 0 0 Device is reset to off state - Heat-sink
put is fed to a preamplifier stage built (unstable state) F1, F2 - 1A fuse

56
 CONSTRUCTION

goes from ‘low’ to

‘high’, it acts as
a clock (CLK1)
for first section
of IC3. As a re-
sult Q1 of the
IC3 goes ‘low’ to
trigger IC4,
which produces
a pulse of about
3.5-second dura-
tion at its output
pin 3. The out-
put of IC4 is in-
verted by tran-
sistor T1, which
toggles the sec-
ond JK flip-flop
inside IC3. As a
consequence, its
Q2 output goes
‘low’ and the
count present at
the parallel load
inputs are
loaded. The par-
allel count
loaded depends
on the number of
clock pulses ar-
riving at IC5
within these 3.5-
seconds, which
again depends
on the number of
claps produced
within the same
period. Table I
shows the status
at parallel in-
puts of IC5 and
the status of re-
lay RL1 or the
device connected
via the normally-
Fig. 1: Schematic diagram of smart clap switch

open contacts of
the relay to the
supply.
The first clap
activates the
monostable flip-
flop IC4. It is
clear from Table
I that if no fur-
ther claps occur
within 3.5 sec-
onds of the first
clap, the parallel
inputs to IC5 be-
come 0000 be-

57
 CONSTRUCTION

allotted 3.5-second time, the output of IC5

becomes 0100 and the connected device
turns ‘on’. At this stage, the parallel in-
put is 0100 and therefore, on parallel load-
ing, the output of IC5 keeps the device in
the ‘on’ state.
Even if a total of seven claps occur
(i.e. three more claps after the device is
‘on’), the counter remains loaded with
0100, thereby resetting the device to its
previous state. Thus, once the device is
‘on’, it requires a total of four claps within
3.5 seconds to turn ‘off’ the device. This
happens because at the fourth clap count,
the output reaches 1000 (from its previ-
ous output of 0100). As a result, QD be-
comes ‘high’, and IC3 and IC5 are reset
to their initial state.
Diode D5 is used to reset flip-flop 1 of
Fig. 2: Actual-size, single-sided PCB layout for the circuit IC3, once IC4 has been triggered. Tran-
sistor T2 is used to reset flip-flop 2 of IC3
when a LD pulse has been applied to IC5.
Manual reset switch S1 (tactile type) is
used to switch off the connected device,
at any instant. It thus serves as an ‘emer-
gency off ’ switch.
Precautions. The microphone should
be soldered as close to the PCB as fea-
sible, using shielded wire. Heat-sink
should be provided for the regulator IC2.
If you desire to change the timings within
which claps should occur, use the formula
given below to calculate the values of tim-
ing resistor R and capacitor C for the
pulse width of a monostable flip-flop us-
ing timer IC NE555.
t = 1.1 RC seconds
where t is the time for which output goes
‘high’, R is the value of R17 in ohms, and
C is the value of C13 in farads.
Fig. 3: Component layout for the PCB Finally, a switch across ‘common’
and ‘N/O’ contacts of the relay may be used
cause QC output (connected to C input) to the switch in its previous state. to bypass the smart clap switch, if desired.
would still be ‘low’ when load input be- This happens up to a total of three Actual-size, single-sided PCB for
comes active low, at the end of 3.5-second. claps occuring within the allotted time du- the circuit shown in Fig. 1 is given in
period. Thus 0000 is loaded into IC5, thereby ration of 3.5-seconds. But if three more Fig. 2. Component layout for the PCB is
keeping the relay or the device connected claps occur after the first clap, within the given in Fig. 3.

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a portal dedicated to electronics enthusiasts

58
 CONSTRUCTION

candidate, by depressing the keyboard

ELECTRONIC VOTING MACHINE

switch allocated to that candidate.
Reset switch (S49). If any malfunc-
tioning is observed during the operation of
the voting machine, the RESET switch
can be used to shut down the system.
JUNOMON ABRAHAM RUPANJANA This voting machine has the capabil-
ity to handle up to 48 candidates. Each
switch on the keyboard represents one

N
ow-a-days electronic voting ma- 8085, the 8-bit address used is duplicated specific candidate. If one does not need
chines are being used effectively. on lower (AD0-AD7) as well as higher (A8- all the 48 switches, only the required
The confidence of the voter in A15) address bus. number of switches need to be wired. The
its flawless working is gradually building The system runs with a clock fre- remaining keyboard switches can be done
up and these machines are thus becom- quency of 1.79 MHz (i.e. half the crystal away with. In this unit, LED D4 is used
ing quite popular throughout the coun- oscillator frequency of 3.58 MHz). Auto to indicate that the system is ready for
try. (Please note that the design being reset facility is incorporated in this sys- accepting the next (one) vote.
presented here is not intended to resemble tem for avoiding corruption of count dur-
that of electronic voting machines used ing interruption in power supply. This is
by the Election Commission. If any re- achieved by using the latching property Operating Procedure
semblance is noticed between the two, it of SCR. A battery backup (3x1.5V UM3 1. Switch ‘on’ the power, using switch
is totally unintended.) Features of the type) is provided for RAM chip to retain S53.
electronic voting machines include avoid- the latest counts. 2. Press ‘start’ button.
ance of invalid votes and reduction of The control and processing unit com- 3. A software-based security feature
counting time and the consequent expen- prises the 8085 microprocessor, memory has been added in this system which re-
diture incurred on manpower deployment. (EPROM and RAM), and some function quires one to enter the password digits
switches. To get an overview of the vot- via the keyboard for getting access to the
ing machine, we shall start with the ex- machine for its operation. (The maximum
Hardware description planation of the functional switches. length of password is seven digits, but it
The voting machine circuit being described Start switch (S48). When the circuit
PARTS LIST
here is designed around Intel’s basic 8085 is initially powered on, it is in reset state
Semiconductors:
microprocessor. It has two main units: due to the auto reset facility. If you want to
IC1 - 8085A microprocessor
(i) control and processing unit, and activate the system, press the ‘start’ but- IC2 - 74LS373 octal latch
(ii) keyboard and display unit. ton. This causes the SCR to conduct and IC3 - 74LS138 decoder/
Keyboard and display are interfaced take RS pin 36 of 8085 to logic ‘high’. As a demultiplexer
through a general-purpose programmable result 8085 microprocessor becomes ac- IC4 - 27C32 EEPROM
IC5 - 6116A RAM
peripheral interface (PPI) IC 8255. The tive. In this state, the microprocessor will IC6 - 82C55 programmable
system monitor programs are stored in execute the booting program (starting at peripheral interface
2732 EPROM. RAM 6116 is used for stor- location/address 0000H). IC7 - 74LS47, BCD to 7-segment
ing counts and a portion of it is also used Clear switch (S52). This switch is decoder/driver
as stack. IC 74LS373 (octal D-type latch) IC8 - 7805, +5V regulator
used for clearing the previous count in
T1-T4 - BC547 npn transistor
is used for segregating the lower order memory. When pressed, the RST 5.5 in- D1, D3 - 1N4001 rectifier diode
address bits from multiplexed address/ terrupt starting at location 002CH is ac- D2, D4 - Colour LED
data bus of 8085. Two of the higher order tivated. Here the vector (0100H) pointing SCR1 - BT169
bits are decoded by 74LS138 to generate to the sub-routine for clearing the memory Resistors (all ¼W, ±5% metal carbon film,
chip select signals for IC4 through IC6. contents is stored. unless stated otherwise)
The address/address range for each de- Display switch (S50). This switch R1-R3 - 330-ohm
R4-R11 - 3.3-kilo-ohm
vice is shown in Table I. Please note that activates RST 7.5 interrupt (location R12 - 47-ohm
during I/O read/write instructions in µP 003CH) containing vector for executing R13, R22, R23 - 2.2-kilo-ohm
‘display routine’ used for displaying the R14 - 680-ohm
TABLE I R15-R21 - 68-ohm
count of the votes polled by any candi-
Address Map of Devices Used date. If one wants to see the count of a Capacitors:
Address (Hex) Device specific candidate, ‘display’ switch is C1 - 10pF ceramic disc
0000-01FF EPROM pressed first, followed by the depression C2 - 0.1µF ceramic disc
8000-80FF RAM of the switch on the keyboard allocated to Miscellaneous:

}
C0 Port A Xtal - 3.58MHz crystal
C1 Port B the specific candidate.
of 8255 S53 - On/off switch
C2 Port C Count switch (S51). This switch ac- S0-S52 - Tactile switch
C3 Control port tivates RST 6.5 interrupt (location 0034H, P21 - Piezo buzzer
Here we have used ports B and A as output containing the jump address 00B6 for DIS1-DIS4 - LT542 common-anode
ports and port C as input port. count subroutine) for activating the mi- display
- 4.5V battery
croprocessor to accept only one vote for a

59
CONSTRUCTION

60
Fig. 1: Schematic diagram of the electronic voting machine.
 CONSTRUCTION

her vote.)
7. Now, the voter can
cast his/her vote by press-
ing the appropriate key-
board switch allocated to
the candidate of his/her
choice. The acceptance of
the vote by the system is
acknowledged by a beep
sound as well as the dis-
play of the ‘ ’ symbol in
the display and ‘off’ condi-
tion of LED D4.
8. Steps 6 and 7 have
to be repeated for casting
a fresh vote.
9. If the count of any
particular candidate’s
votes (count) is needed to
be displayed, press ‘dis-
play’ switch and then the
switch corresponding to
the specific candidate on
the keyboard.
10. Reset the system.
11. Switch ‘off’ the sys-
tem.

Software description
The system programs are
stored in the EPROM. The
entire software is divided
into five modules, namely,
booting, display, clearing
memory, counting, and
keyboard.
The operation of each
module can easily be un-
derstood with reference to
the flowcharts.
Booting. This module
initialises the stack pointer
Fig. 2: Flow chart for the various software programs 8255 PPI, verifies the
password entered via the
can be changed by adjusting some values display of symbol ‘[’ and the glowing of keyboard, and initialises the interrupts.
in the system software.) At present, only LED D4 would mean that the system is Display. This module uses the inter-
three-digit password is used. If the pass- ready for accepting one vote. (Please note rupt service subroutine at RST 7.5. This
word digits entered via keyboard equal that the ‘count’ switch is placed is used for displaying the count (votes)
the password stored in the EPROM, LED under the control of electoral staff so polled by each of the candidates.
D2 glows to give access for operation of that it is satisfied with the identity of the Clearing memory. This module is in-
the machine. voter before allowing him/her to cast his/ voked via interrupt service subroutine RST
4. If the entered password is incor- 5.5. It is used to clear the count memory.
rect, press RESET button (S49) and pro- TABLE II Counting. This module uses the in-
ceed again from the first step. Start Address Map of Hardware Interrupts terrupt service subroutine RST 6.5. It ac-
5. Clear the previous content of count Address (hex) Interrupt tivates the microprocessor to accept only
memory by pressing ‘clear’ button (S52). 0024 TRAP one vote. If the count of any candidate
Clearance of memory is indicated by sym- 002C RST 5.5 exceeds ‘9999’, it will produce a continu-
bol ‘:’ in the display. 0034 RST 6.5 ous beep sound and display ‘ ’, and then
6. Now press ‘count’ switch S51. The 003C RST 7.5
onwards the system will not be ready for

61
 CONSTRUCTION

Fig. 3: Actual-size, single-sided PCB layout for the circuit

Fig. 4: Component layout for the PCB

62
 CONSTRUCTION

accepting any further vote. Thus, the maxi- to a maximum of seven digits. The pass- plied by 4 and converted into hex format,
mum number of votes that can be regis- word should be decided before burning the and then stored in consecutive memory
tered against any one candidate should program in the EPROM. Password check- locations starting from 00F9H. For ex-
not exceed 9999. This is the limitation in ing is performed during execution of boot- ample, if the PW is 1, 4, 8, the length is
the present design. ing program. For entering the password, loaded as 03 in register C and the data is
Keyboard. This module is used for the same keyboard switches are used that as follows:
checking key closure and generating the otherwise represent specific candidates. EPROM Hex Conversion PW
binary value corresponding to the closed For the setting of password (PW), the location data digit
00F9 ß 04 ß 04H ß 04 ß 4x1 1
switch. length of PW is chosen first and then it is 00FA ß 10 ß 10H ß 16 ß 4x4 4
loaded into register C using instruction 00FB ß 20 ß 20H ß 32 ß 4x8 8
‘MVI A, length’ in the booting program. An actual-size, single-sided PCB for
Password security The digits of the password are stored in the circuit shown in Fig. 1 is given in
This voting machine has a password op- memory locations 00F9H to 00FFH. Each Fig. 3, while its component layout is given
tion. The length of the password is limited of the PW digits chosen has to be multi- in Fig. 4.

Software Listings
Address Opcode Mnemonics Comments Address Opcode Mnemonics Comments
004E DE C1 OUT C1
Booting Program 0050 11 7F 01 LXID 017F
0000 31 FF 80 LXI SP, 80FF Initialise SP 0053 1B DCX D
0003 3E 89 MVI A, 89 Initialise 8255 0054 7A MOV A, D
0005 D3 C3 OUT, C3 Port A, B = input, Port C = output 0055 B3 ORA E
0007 11 F9 00 LXI D, 00F9 Load Stored Password (PW) 0056 C2 53 00 JNZ 0053
000A 0E 03 MVI C, 03 Password length = 3 digits 0059 23 INX H
000C C5 PUSH B 005A 78 MOV A, B
000D D5 PUSH D 005B 07 RLC
000E AF XRA A Makes contents of Acc. zero 005C 47 MOV B, A
000F 67 MOV H, A Make H reg contents zero 005D D2 4C 00 JNC 004C
0010 CD 70 00 CALL 0060 E1 POP H
KEYBOARD 0061 C3 49 00 JMP 0049
0013 D1 POP D
0014 C1 POP B Keyboard subroutine
0015 1A LDAX D Load Acc. from mem loc pointed by 0070 D3 C1 OUT C1 Display the mode
DE 0072 CD 20 01 CALL DELAY(O/P contents of Acc. thro Port B)
0016 BD CMPL 0075 FB EI
0017 C2 23 00 JNZ 0023 If PW is incorrect, stop execution 0076 IE 00 MVI E, 00 Scan the keyboard
001A 13 INX D 0078 3E 80 MVI A, 80
001B 0D DCR C 007A 06 06 MVI B, 06
001C C2 0C 00 JNZ, 000C 007C 07 RLC
001F 3E C8 MVI A, C8 If PW is right, enable the inter- 007D 6F MOV L, A
rupts and glow the LED (D2) to 007E B4 ORA H
0021 30 SIM indicate that the system is 007F D3 C0 OUT C0
0022 FB EI energised 0081 DB C2 IN C2
0023 76 HLT 0083 0E 08 MVI C, 08
0085 0F RRC
RST 5.5 (contains vector for memory clearing subroutine) 0086 DA 9C 00 JC 009C
002C 00 NOP 0089 1C INR E
002D C3 00 01 JMP Jump to Interrupt Secvice 008A 16 7F MVI D, 7F
MEMCLEAR Subroutine MEMCLEAR 008C 15 DCR D
008D C2 8C 00 JNZ 008C
RST 6.5 (contains vector for count subroutine) 0090 0D DCR C
0034 00 NOP 0091 C2 85 00 JNZ 0085
0035 C3 B6 00 JMP COUNT Jump to Interrupt Service 0094 7D MOV A, L
Subroutine COUNT 0095 05 DCR B
0096 C2 7C 00 JNZ 007C
RST 7.5 Display subroutine 0099 C3 76 00 JMP 0076
003C 00 NOP 009C F3 DI
003D 00 NOP 009D 7B MOV A, E If closed key is sensed, multiply
003E 31 FF 80 LXI SP, 80FF Initialise SP 009E 07 RLC the key number by 4
0041 3E 1E MVI A, 1E Load data byte for displaying 009F 07 RLC
0043 26 00 MVI H, 00 display mode indicator ‘ ’ 00A0 6F MOV L, A
0045 CD 70 00 CALL 00A1 3E 80 MIV A, 80
KEYBOARD Check key closure 00A3 67 MOV H, A
0048 FB EI 00A4 D3 C0 OUT CO Generate a beep
0049 E5 PUSH H 00A6 CD 20 01 CALL DELAY
004A 06 10 MVI B, 10 Scan the display 00A9 AF XRA A
004C 7E MOV A, M 00AA D3 C0 OUT CO
004D B0 ORA B 00AC C9 RET

63
 CONSTRUCTION

Address Opcode Mnemonics Comments Address Opcode Mnemonics Comments

00F0 76 HLT
Count subroutine
00B6 31 FF 80 LXI SP, 80FF Password data
00B9 3A D0 80 LDA 80D0 Load contents of mem loc 80D0 00F9 04 See text
00BC FE 80 CPI 80 If overflow occurs, generate 00FA 10
00BE C2 C4 00 JNZ 00C4 continuous beep 00FB 20
00C1 D3 C0 JNZ 00C4
00C3 76 HLT Memory clear subroutine
00C4 3E 1A MVI A, 1A If there is no overflow,
00C6 26 40 MIV H, 40 load data byte for displaying count 0100 21 00 80 LXIH 8000
00C8 CD 70 00 CALL count mode indicator ‘[’ and 0103 36 00 MVI M, 00 Load ‘00’ to RAM areas
KEYBOARD glowing LED D4 0105 2C INR L
00CB 0E 04 MIV C, 04 Increment the count of the key 0106 C2 03 01 JNZ 0103
00CD 7E MOV A, M number (candidate code) pressed 0109 3E 80 MVI A, 80 After clearing, generate
00CE 3C INR A Increment Acc 010B D3 C0 OUT CO a beep and display ‘:’
00CF 77 MOV M, A Move mem (HL) to Acc. 010D CD 20 01 CALL DELAY
00D0 FE 0A CPI OA 0110 3E 1C MVI A, 1C
00D2 C2 EB 00 JNZ 00EB 0112 D3 C1 OUT C1
00D5 36 00 MVI M, 0 If it becomes 10, make mem 0114 AF XRA A
(HL)=0 0115 D3 C0 OUT C0
00D7 23 INX H 0117 FB EI
00D8 0D DCR C 0118 76 HLT
00D9 C2 CD 00 JNZ 00CD 0.8 sec Delay Subroutine
00DC 2B DCX H 0120 F5 PUSH PSW
00DD 36 0D MVI M, 0D 0121 C5 PUSH B
00DF 3E 80 MVI A, 80 If overflow occurs, store 80 to 0122 01 FF FF LXI B, FFFF
00E1 D3 C0 OUT C0 memory locatio 80D0 and display 0125 0B DCX B
00E3 32 D0 80 STA 80D0 ‘ ’. Also generate a 0126 78 MOV A, B
00E6 3E 1D MVI A, 1D continuous beep 0127 B1 ORA C
00E8 D3 C1 OUT C1 0128 C2 25 01 JNZ 0125
00EA 76 HLT 012B C1 POP B
00ED D3 C1 OUT C1 Success display ‘ ’ 012C F1 POP PSW
00EF FB EI 012D C9 RET ❏

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64
 C I RC ICR CUUII TT I ID D
EAS
EAS
of copper or brass strips (6mm wide and
1mm thick) which are shaped into rings

WATER-TANK LEVEL METER

that can tightly slip over the ‘Y’ pieces.
The ends of these strips are folded firmly
and formed into solder tags S1 to S10 and
S.C. DWIVEDI
SG. The wall-mounting brackets, made of
M.K. CHANDRA MOULEESWARAN aluminium die-cast, are screwed directly
on ‘X’ at two suitable places. The sensor
cable ‘WC’ wires are soldered to solder

T
he water-tank level meter de- available material, it can be fabricated to tags, and some epoxy cement is applied
scribed here is very simple and meet one’s own specific requirements. around the joints and tags to avoid corro-
useful for monitoring the water The common ground reference elec- sion by water. The common ground refer-
level in an overhead tank (OHT). The wa- trode ‘X’ is an aluminium conduit of 15mm ence wire ‘SG’ is taken from tag ‘T’. The
ter level at 30cm intervals is monitored outer diameter and 3-metre length, to ca- cable’s individual wires from S1 to S10
and continuously indicated by LEDs ar- ter to a 3-metre deep overhead tank. Insu- and SG are cut and matched in length for
ranged in a meter-format. When all the lating spacer rings ‘Y’ (10mm length, a neat layout. The other ends of the cable
LEDs are ‘off’, it indicates that the OHT is 15mm dia.) are fabricated from electrical are connected to the PCB terminal points
empty. When the water level reaches the wiring conduits of 15mm inner diameter. S1 to S10 and SG respectively. No sepa-
top limit, the whole LED-meter begins to These are pushed tightly over the alumi- rate ground is needed.
flash. num conduit at preferred places, say 30cm The electronics portion is simple and
The height at which the level-sensing apart. If the pieces are too tight, they can straightforward. A long piece of veroboard
electrodes are fitted is adjustable. Thus, be heated in boiling water for softening can hold all the parts including the power
the minimum and maximum level settings and then pushed over ‘X’. supply section. For easy installation, the
may be varied as desired. The range of the The sensor electrodes ‘Z’ are made out LEDs can be set at the track side of the
meter can also
be enlarged to
cater to any
level.
No special
or critical com-
ponents are
used. CMOS
ICs are used to
limit the idle
current to a
minimum level.
Even when
all the LEDs
are ‘on’, i.e. wa-
ter reaches the
top level, the
demand on the
power supply is
reasonably low.
Further, the ex-
tremely high in-
put resistance
of the Schmitt
inverter gates
reduces the in-
put current and
thus minimises
the erosion of
electrodes.
The princi-
pal part of the
device is its wa-
ter-level sensor
assembly. By
using easily

65
 CIRCUIT IDEAS

board, in a single line, so that they may tors R14 through R23 via emitter-collec- cessively.
be pushed through the cutouts in the front tor path of transistor T2. The LED D1 is The novel feature of this circuit is that
panel of the enclosure from inside. thus lit up. whenever the water level is below the first
The water level at 30cm intervals is Similarly, other LEDs turn ‘on’ suc- sensor, all the LEDs are ‘off’ and the qui-
monitored by corresponding sensors, caus- cessively as the water level rises. As soon escent current is very low. Thus, a power
ing the input to the concerned inverters as the water in OHT reaches the top level, ‘on’/‘off’ switch is not so essential. Even
(normally pulled ‘high’ via resistors R1 the output of gate N10 goes to logic 1 and when the LED-meter is fully on, the cur-
through R10) to go ‘low’, as soon as water causes flashing-type LED D11 to start rent drawn from the power supply is not
reaches the respective sensors. flashing. At the same time, transistor T1 more than 120 mA. A heat-sink may, how-
On initial switching ‘on’ of the power conducts and cuts off alternately, in syn- ever, be used for transistor T2, if the tank
supply, when the tank is empty, all the chronism with LED D11’s flash rate, to is expected to remain full most of the time.
electrodes are open. As a result, all the ground the base of transistor T2 during A power supply unit providing unregu-
inverter inputs are ‘high’ (via the pull-up conduction of transistor T1. As a result, lated 6V DC to 15V DC at 300mA current
resistors R1 to R10) and their outputs are transistor T2 also starts cutting ‘off’ dur- is adequate.
all ‘low’. Thus, all the LEDs are ‘off’. As ing conduction of transistor T1, to make Caution. A point to be noted is that
soon as the water starts filling the tank, the LED meter (comprising LEDs D1 water tends to stick to the narrow space
the rising water level grounds the first through D10) flash and thus warn that at the sensor-spacer junction and can
sensor. The logic 1 output of first inverter the water has reached the top level. When cause a false reading on the LED-meter.
gate N1 causes conduction of transistor the water level goes down, the reverse This can be avoided if the spacers are
T2 to extend ground to one side of resis- happens and each LED is turned ‘off’ suc- made wider than 10 mm.

mitter section.

PHONE BROADCASTER
The low-power FM transmitter sec-
tion comprises oscillator transistor T3, coil
S.C. DWIVEDI
L1, and a few other components. Transis-
tor T3 works as a common-emitter RF
ANJAN NANDI oscillator, with transistor T2 serving as
an electronic ‘on’/‘off’ switch. The audio

H
ere is a simple yet very useful The switching voltage of the circuit de- signal available across the telephone lines
circuit which can be used to pends on zener breakdown voltage (here automatically modulates oscillator fre-
eavesdrop on a telephone con- 24V) and switching voltage of the transis- quency via transistor T2 along with its
versation. The circuit can also be used as tor T1 (0.7V). Thus, if we adjust preset series biasing resistor R3. The modulated
a wireless telephone amplifier. VR1 to get over 24.7 volts, it will cause RF signal is fed to the antenna. The tele-
One important feature of this circuit the zener to breakdown and transistor T1 phone conversation can be heard on an
is that the circuit derives its power di- to conduct. As a result collector of transis- FM receiver remotely when it is tuned to
rectly from the active telephone lines, and tor T1 will get pulled towards negative FM transmitter frequency.
thus avoids use of any external battery supply, to cut off transistor T2. At this Lab Note: During testing of the cir-
or other power supplies. This not
only saves a lot of space but also
money. It consumes very low cur-
rent from telephone lines without
disturbing its performance. The
circuit is very tiny and can be
built using a single-IC type
veroboard that can be easily fitted
inside a telephone connection box
of 3.75 cm x 5 cm.
The circuit consists of two sec-
tions, namely, automatic switching
section and FM transmitter section.
Automatic switching section
comprises resistors R1 to R3, preset
VR1, transistors T1 and T2, zener D2, stage, if you lift the handset of the tele- cuit it was observed that the telephone
and diode D1. Resistor R1, along with pre- phone, the line voltage drops to about 11V used was giving an engaged tone
set VR1, works as a voltage divider. When and transistor T1 is cut off. As a result, when dialed by any subscriber. Addi-
voltage across the telephone lines is 48V transistor T2 gets forward biased through tion of resistor R5 and capacitor C6 was
DC, the voltage available at wiper of pre- resistor R2, to provide a DC path for tran- found necessary for rectification of the
set VR1 ranges from 0 to 32V (adjustable). sistor T3 used in the following FM trans- fault.

66
 CIRCUIT IDEAS

will be further incremented according to

pulse rate. So one call should always be

TELEPHONE CALL METER USING

included before counting the calls.
For making call in pulse rate 4, slide
switch S1 to ‘off’ (pulse set position) and

CALCULATOR AND COB

press calculator buttons in the following
order: 1, ‘+’, 0.25, ‘=’. Here, 1 is initial
S.C. DWIVEDI count, and 0.25 is PRE. Now calculator
displays 1.025. This call meter is now
K. UDHAYA KUMARAN, VU3GTH ready to count. Now make the call, and
as soon as the call matures, immediately
slide switch S1 to ‘on’ (start/standby posi-

I
n this circuit, a simple calculator, in minal A and B are combined using a tion). The COB starts generating clock
conjunction with a COB (chip-on- bridge, comprising diodes D1 to D4, to pulses of 1 Hz. Transistor T1 conducts
board) from an analogue quartz obtain 1Hz clock pulses. These clock once every second, and thus ‘=’ button in
clock, is used to make a telephone call pulses are applied to the base of transis- calculator is activated electronically once
meter. The calculator enables conversion tor T1. The collector and emitter of tran- every second. The calculator display
of STD/ISD calls to local call equivalents sistor T1 are connected across calculator’s starts from 1.25, advancing every second
and always displays current local call- ‘=’ terminals. as follows:
meter reading.
The circuit is simple and presents an
elegant look, with feather-touch operation.
It consumes very low current and is fully
battery operated. The batteries used last
more than a year.
Another advantage of using this cir-
cuit is that it is compatible with any type
of pulse rate format, i.e. pulse rate in
whole number, or whole number with
decimal value. Recently, the telephone de-
partment announced changes in pulse rate
format, which included pulse rate in whole
number plus decimal value. In such a
case, this circuit proves very handy.
To convert STD/ISD calls to local calls, The number of pulses forming an 1.25, 1.5, 1.75, 2.00, 2.25, 2.50, and
this circuit needs accurate 1Hz clock equivalent call may be determined from so on.
pulses, generated by clock COB. This COB the latest telephone directory. However, After finishing the call, immediately
is found inside analogue quartz wall clocks the pulse rate (PR) found in the directory slide switch S1 to ‘off’ position (pulse set
or time-piece mechanisms. It consists of cannot be used directly in this circuit. For position) and note down the local call
IC, chip capacitors, and crystal that one compatibility with this circuit, the pulse meter reading from the calculator display.
can retrieve from scrap quartz clock rate applicable for a particular place/dis- If decimal value is more than or equal to
mechanisms. These can be purchased tance, based on time of the day/holidays, 0.9, add another call to the whole num-
from watch-repairing shops for less than is converted to pulse rate equivalent ber value. If decimal value is less than
Rs 20. (PRE) using the formula PRE = 1/PR. 0.9, neglect decimal value and note down
Normally, the COB inside clock You may prepare a look-up table for only whole numbers.
mechanism will be in good condition. How- various pulse rates and their equivalents To store this local call meter reading
ever, before using the COB, please check (see Table). Suppose you are going to into calculator memory, press ‘M+’ but-
its serviceability by applying 1.5V DC make an STD call in pulse rate 4. Note ton. Now local call meter reading is stored
across terminals C and D, as shown in down from the table the pulse rate equiva- in memory and is added to the previous
the figure. Then check DC voltage across lent for pulse rate 4, which is 0.25. Please local call meter reading. For continuous
terminals A and B; these terminals in a note that on maturity of a call in the tele- display of current local call meter read-
clock are connected to a coil. If the COB phone exchange, the exchange call meter ing, press ‘MRC’ button and slide switch
is in good condition, the multimeter needle immediately advances to one call and it S1 to ‘on’ (start/standby position). The cur-
would deflect forward and backward once
every second. In fact, 0.5Hz clock is avail- LOOKUP TABLE
able at terminals A and B, with a phase Pulse rate (PR) 2 2.5 3 4 6 8 12 16 24 32 36 48
difference of 90o. The advantage of using Pulse rate
this COB is that it works on a 1.5V DC eqlt. (PRE) 0.500 0.400 0.333 0.250 0.166 0.125 0.083 0.062 0.041 0.031 0.027 0.020
source. Note: Here PRE is shown up to three decimal places. In practice, one may use up to five
The clock pulses available from ter- or six decimal places.

67
 CIRCUIT IDEAS

rent local call meter reading will blink ‘on’. So, in the idle condition, the ‘=’ but- culator as terminals E and F. Affix COB on a gen-
once every second. ton is activated electronically once every eral-purpose PCB and solder the remaining compo-
In prototype circuit, the author used second by transistor T1, to keep the cal- nents neatly. For giving the unit an elegant look,
TAKSUN calculator that costs around Rs culator continuously ‘on’. purchase a jewellery plastic box with flip-type cover
80. The display height was 1 cm. In this Useful hints. Solder the ‘=’ button (size 15cm x 15cm). Now fix the board, calculator,
calculator, he substituted the two button- terminals by drilling small holes in its and batteries, along with holder inside the jewellery
type batteries with two externally con- vicinity on PCB pattern using thin cop- box. Then mount the box on the wall and paste the
nected 1.5V R6 type batteries to run the per wire and solder it neatly, such that look-up table inside the box cover in such a way that
calculator for more than an year. the ‘=’ button could get activated electroni- on opening the box, it is visible on left side of the box.
The power ‘off’ button terminals were cally as well as manually. Take the cop- Caution. The negative terminals of battery A
made dummy by affixing cellotape on con- per wire through a hole to the backside and battery B are to be kept isolated from each other
tacts to avoid erasing of memory, should of the PCB, from where it is taken out of for proper operation of this circuit.
someone accidentally press the power ‘off’ the calculator as terminals G and H.
button. This calculator has auto ‘off’ fa- At calculator’s battery terminals, sol-
cility. Therefore, some button needs to be der two wires to ‘+’ and ‘–’ terminals.
pressed frequently to keep the calculator These wires are also taken out from cal-

number or letter can be used to mark them. Switch

SIMPLE ELECTRONIC
S10 is also placed together with other switches so
that any stranger trying to operate the lock fre-
quently presses the switch S10, thereby resetting the

CODE LOCK
circuit many times. Thus, he is never able to turn the
S.C. DWIVEDI relay ‘on’. If necessary, two or three switches can be
connected in parallel with S10 and placed on the key-
board panel for more safety.
REJO G. PAREKKATTU A 12V power supply is used for the
circuit. The circuit is very simple and can

T
he circuit diagram of a simple elec- pressed simultaneously. Capacitor C2 and be easily assembled on a general-purpose PCB. The
tronic code lock is shown in fig- resistor R3 are provided to prevent noise code number can be easily changed by changing the
ure. A 9-digit code number is used
to operate the code lock.
When power supply to the circuit is
turned on, a positive pulse is applied to
the RESET pin (pin 15) through capaci-
tor C1. Thus, the first output terminal
Q1 (pin 3) of the decade counter IC (CD
4017) will be high and all other outputs
(Q2 to Q10) will be low. To shift the high
state from Q1 to Q2, a positive pulse must
be applied at the clock input terminal (pin
14) of IC1. This is possible only by press-
ing the push-to-on switch S1 momentarily.
On pressing switch S1, the high state
shifts from Q1 to Q2.
Now, to change the high state from Q2
to Q3, apply another positive pulse at pin
14, which is possible only by pressing switch
S2. Similarly, the high state can be shifted
up to the tenth output (Q10) by pressing
the switches S1 through S9 sequentially
in that order. When Q10 (pin 11) is high,
transistor T1 conducts and energises relay
RL1. The relay can be used to switch ‘on’
power to any electrical appliance.
Diodes D1 through D9 are provided during switching action. connections to switches (S1 to S9).
to prevent damage/malfunctioning of the Switch S10 is used to reset the circuit
IC when two switches corresponding to manually. Switches S1 to S10 can be
‘high’ and ‘low’ output terminals are mounted on a keyboard panel, and any

68
 CIRCUIT IDEAS

LATCH-UP ALARM
Simultaneously, the LED inside opto-
coupler glows and the phototransistor
conducts. As a result, trigger transistor

USING OPTO-COUPLER
T1 gets base bias via phototransistor and
S.C. DWIVEDI
resistor R6. The alarm sounds
continuously until reset switch S2 is
pressed. When switch S2 is pressed, tran-
PRADEEP G. sistor T1 is switched ‘off’ to bring pin 4
of IC1 to logic ‘low’ and the alarm

T
he latch-up alarm described here is disabled.
is based on single IC NE555,
configured as an astable
multivibrator. The timing components are
selected such that the oscillation fre-
quency of the multivibrator lies within
the audio range. Instead of a flip-flop
stage, an opto-coupler (MCT2E) is used
for latching of the alarm.
Under normal condition, pin 4 of IC1
is pulled to ground via resistor R2, and
its output at pin 3 is held ‘low’. When
switch S1 is pressed momentarily, tran-
sistor T1 conducts to bring reset pin 4 of
555 to logic ‘high’. As a result, IC1 is
activated and the alarm starts to sound.

MINI VOICE-PROCESSOR S.C. DWIVEDI

speaker. For understanding the operation,
the functions of switches S1 through S4
and their corresponding pins is described
(BASED ON UMC APPLICATION NOTE AND below.
DATA SHEET FOR IC UM5506B) S1(RECL). Pressing (grounding) this

T
he UM5506B is a highly integrated
voice processor CMOS IC with in-
built ADM (adaptive delta modu-
lation) capability. The chip integrates an
analogue comparator, a 10-bit D/A con-
verter, a low-pass filter, an op-amp, and
a 96-kilobit static RAM. It has an on-chip
amplifier for sound recording and direct
speaker driving capability.
Although 28 pins/pads are shown
in the figure, its COB version mounted
on a PCB, as tested at EFY Lab, had only
16 lines coming out of the COB. These
lines, after proper identification, have
been indicated with asterisk (*) marks in
Fig. 2. Very few external components are
needed for its use in applications such as
greeting cards or toys. The tested PCB
measured 3 cm x 5.25 cm and required voice signals picked up by the condenser pin ends the power-down mode and ini-
only 3-volt supply for operation. mic are converted into digital signals us- tiates a record cycle. Recording continues
The IC, along with external compo- ing ADM algorithm and stored in its in- as long as this pin is held ‘low’, provided
nents, as shown in Fig. 2, can be used for ternal SRAM. During play mode, the digi- memory is not completely filled. If
recording of sound for a recording length tal data is converted back into analogue memory is full or the pin is ‘high’, it en-
of 6 seconds. During record mode, the signals and played back through the ters the power-down mode.

69
 CIRCUIT IDEAS

S2 (PLAYL). Pressing
(grounding) this pin ends the
power-down mode and ini-
tiates the play cycle. The
stored/recorded message is
played until finished or this
pin is taken ‘high’.
S3(PLAYE). Pressing
(grounding) this pin momen-
tarily ends the power-down
mode and enters the play
mode. Subsequent taking of
this pin ‘high’ has no effect.
However, pressing this pin
once more finishes the play
mode and the chip enters
the power-down mode.
The action is analogous to
the falling-edge trigger
mode.
S4 (PLAY/RPT). Press-
ing (grounding) this pin ends
the power-down mode and
enters the play mode. The chip will com- ter the power-down mode. and play-mode active period. A beep is
plete the recorded message and then keep LED1 connected to BUZY pin lights produced in the speaker to indicate start
repeating the message as long as it is up to indicate end of power-down of record cycle and also that the memory
kept pressed. When released, it will en- mode and remains ‘on’ during record is full. ❏

70
May

2000
 CONSTRUCTION

trigger switches. Ten push-to-on swit-

DIGITAL NUMBER
ches designated ‘S0’ through ‘S9’ are con-
nected to the ten Q outputs (pins 3, 2, 4,
7, 10, 1, 5, 6, 9, and 11 respectively) of
RUPANJANA this IC.

SHOOTING GAME These Q outputs become ‘high’ one by

one sequentially with every clock pulse.
IC2 and IC3 must count in unison, i.e. for
A. JEYABAL the number shown in the display the cor-
responding Q output of IC3 should be
‘high’. For the numbers 0 through 9, the

M
any electronic video games are matic diagram of digital number shooting Q0 through Q9 outputs of IC3 respectively
available in the market. But game is shown in Fig. 2. The Schmitt trig- must become ‘high’. For this purpose, the
for those who may prefer to as- ger input NAND gates N1 and N2 of IC ‘carry out’ (pin 5) of IC2 is connected to
semble the game themselves, a digital CD4093 (IC1) are used for producing clock the reset pin 15 of IC3 through a
number shooting game circuit is described pulses for random number generation. differentiator circuit comprising resistor
here. NAND gate N2, in combination with ca- R4 and capacitor C3.
A train of single-digit random num- pacitor C2 and resistor R2, forms an oscil- During the transition from 9 to 0, the
bers appears on a 7-segment display, and lator to produce pulses. NAND gate N1 state of ‘CO’ pin 5 changes from ‘low’ to
the player has to shoot a number by press- and its associated components comprising ‘high’ and the differentiator circuit pro-
ing a switch corresponding to that num- capacitor C1 and resistor R1 form another duces a sharp pulse to reset IC3. Thus, in
ber before it vanishes. If he shoots the oscillator, whose frequency is ten times every ten pulses, any timing difference, if
number, he scores ten points which are less than of the former oscillator. present, is corrected. Resistor R3 (470k)
displayed on the scoreboard. Successful The pulses from the two oscillators connected in parallel to capacitor C3
shooting is accompanied by a beep sound. are ANDed by NAND gate N2 to get ran- quickly discharges it during the low state
dom clock pulses. The output frequency of ‘CO’ pin 5 of IC2.
from gate N2 (pin 4) varies due to phase Control pulse generator. NAND
The circuit difference between the two oscillator fre- gate N3, along with its external compo-
Fig. 1 shows the block diagram of the quencies and the period of ‘on’ state of nents, forms another oscillator of very low
whole circuit. Blocks 1, 2, and 3 consti- output from gate N3 (pin 10).
tute the random number generator. Block The prototype was carefully watched PARTS LIST
4 controls the ten triggering switches and for consecutive 150 random numbers gen- Semiconductors:
block 5 checks for any foul play. The score- erated by IC2 (and displayed on DIS.1). IC1 : CD4093 Schmitt trigger
board is constituted by blocks 6 and 7, No repetition in the order of the numbers quad two-input NAND
while block 8 is meant for audio indica- was witnessed but, interestingly, at times, gate
IC2, IC5, IC6 : CD4033 decade counter/
tion. the same number was repeated thrice. decoder/7-segment LED
Block 9 controls the speed of the num- Random number generator and display driver
ber displayed, the digital counter, the switch controller. The output of gate N2 IC3 : CD4017 decade counter/
switch controller, and the foul play (pin 4) is connected to pin 1 of decade decoder
IC4 : CD4027 dual JK flip-flop
checker. counter/decoder/7-segment LED driver T1, T2 : BC547 npn silicon
Clock pulse generator. The sche- CD4033 (IC2). This IC counts and drives transistor
the 7-seg- DIS.1-DIS.4 : LT543 common-cathode,
ment dis- 7-segment LED display
play DIS.1. Resistors (all ¼watt, ±5% carbon film,
The control unless stated otherwise)
pulse pro- R1,R2,R4,R6-R9 : 100-kilo-ohm
R3 : 470-kilo-ohm
duced by R5 : 1-mega-ohm
gate N3 ac- R10-R12 : 1-kilo-ohm
tivates this VR1 : 1-mega-ohm pot
display. Capacitors:
T h e C1 : 0.1µF ceramic disk
clock pulses C2 : 0.01µF ceramic disk
C3 : 0.001µF ceramic disk
also go to C4 : 0.22µF ceramic disk
d e c a d e C5 : 100µF, 16V electrolytic
counter/de- Miscellaneous:
coder IC PZ1 : Piezo buzzer, continuous
CD4017 type
(IC3, pin S0-S10 : Push-to-on switch
14). This IC S11 : On/Off switch
: DC IN socket
Fig. 1: Block diagram of the digital number shooting game controls the

72
 CONSTRUCTION
Fig. 2: Circuit diagram of the digital number shooting game

frequency (of the order of 1 Hz to 4 Hz).

Its frequency can be varied with the help
of potentiometer VR1.
For proper functioning of CD4033 and
CD4017, their clock-enable (CE) pins 2
and 13 respectively must be held ‘low’.
These pins are connected to the output of
gate N3 (pin 10). If these pins are in logic
high state, the ICs are disabled from re-
ceiving clock pulses, and the Q outputs of
IC3 and segment drive outputs of IC2 re-
tain their last state before the CE pins go
‘high’.
The control clock pulses from gate
N3 also go to the base of transistor
BC547B (T1). This transistor pulls down
the common cathode of 7-segment LED
display DIS.1 to ground during the high
level of control clock pulses, to display
the number.
The control pulse also performs one
more function. After being inverted by
NAND gate N4, it resets JK flip-flop IC
CD4027 (IC4), which serves as the foul
play checker.
In nutshell, during the low state of
output of gate N3, both IC2 and IC3 are
enabled and the pulses are counted by
IC2, but the number cannot be seen in
the display because transistor T1 is re-
verse biased and cut-off.
When the output of gate N3 changes
to high state, IC2 and IC3 are disabled.
T1 gets its base voltage and pulls down
the cathode of display DIS.1, and the dis-
play shows the number (which is a ran-
dom number). At the same time, the Q
output of IC3 corresponding to the dis-
played number goes ‘high’.
Now, if one presses the correct
key corresponding to the number
shown in the display, before it vanishes,
a high-going pulse is applied to clock in-
put pin 3 of IC4. Its Q output (pin 1)
becomes ‘high’, which advances the tens
counter (IC5 of the scoreboard). It also
biases transistor T2, to drive the piezo
buzzer PZ1 for confirmation of the num-
ber shot.
Foul play checker/debouncer. Due
to bouncing, the switches produce spuri-
ous pulses and lead to erratic operation.
The player may press a switch more than
once to score more, and may keep press-
ing a switch before the respective num-
ber is displayed. This is where the foul
play checker/debouncer circuit comes
into play.
For faithful operation, the circuit re-
quirements are as follows:

73
 CONSTRUCTION

Score counter and scoreboard.

This block comprises two decade counter/
decoder/7-segment display driver ICs
CD4033 (IC5, IC6), and three common
cathode 7-segment LED displays (DIS.2
through DIS.4). The ‘a’ through ‘f ’
segments of DIS.1, meant for units,
are directly connected to positive supply
rail and its cathode is connected to nega-
tive supply rail through a 1k (R12) cur-
rent-limiting resistor. Thus it always
shows zero.
The Q output (pin 1) of IC4 is con-
nected to clock input (pin 1) of IC5, the
tens counter. The carry-out (pin 5) of IC5
is connected to the clock input (pin 1) of
IC6 for cascading hundreds counter. The
Fig. 3: Actual-size, single-sided PCB layout
CE (pin 2) and Lamp Test (pin 14) of both
IC5 and IC6 are grounded, for proper
functioning. Both resets (pin 15) are
grounded through a 100k (R9) resistor and
connected to positive supply, through re-
set switch S10.
Ripple blanking input (pin 3) of IC6
is grounded, so the leading zero to be dis-
played in DIS.4 will be blanked out. The
ripple blanking output (pin 4) will be low
while the number to be displayed is zero.
Likewise, zero will be blanked out in dis-
play DIS.3, because RB0 of IC6 is con-
nected to RB1 of IC5. So when reset
switch S10 is depressed, the unit counter
display shows only zero and the other two
displays are blanked out.
The maximum score which can be dis-
played is 1000, after which it automati-
Fig. 4: Component layout for the PCB
cally resets to zero.
1. The spurious pulses must be ig- reset pin 4. Sound-effect generator. For simplic-
nored. During the low-level period of gate ity and compactness, a piezo buzzer (con-
2. The counter must advance only on N3, output of gate N4 is ‘high’ and the tinuous type) is employed. When the Q
the first pressing of the switch for a num- flip-flop (IC4) is in the reset state. If output of IC4 goes high, after the correct
ber and further pressing must be ignored. any one of the ten switches is pressed, switch is pressed, it forward biases tran-
3. The pressing of the switch should even though clock pulses are present at sistor BC547B (T2) and drives the piezo
be effected only after the corresponding clock input (pin 3) of IC4, the Q output buzzer. This produces a beep sound for
number is displayed. will not change, as this IC is in the reset confirmation of successful shooting of that
To fulfil all these conditions, the state. number.
dual JK flip-flop IC CD4027 (IC4) is When the output of gate N3 is ‘high’,
employed and only one of the two flip- the output of gate N4 is ‘low’, which clears
flops is used. The flip-flop is inhibited IC4 from the reset state. If the player Construction
when both J and K inputs are low presses the correct switch, a clock pulse This circuit can be assembled on a
(requirements 1 and 2). The data on is applied to the clock input (pin 3) of IC readymade PCB or strip board. However,
the J input is transferred to the Q output CD4027. The ‘high’ level data from J in- a proper single-sided PCB for the circuit
for a positive-going clock pulse only put is transferred to Q output (pin 1) of of Fig. 2 is shown in Fig. 3 and its compo-
(requirement 3). The K input (pin 5) of this IC and IC5 advances by one count, nent layout is shown in Fig. 4. For
IC CD4027 is grounded and J input which means ten points (DIS.2 is always switches, push-to-on tactile or membrane
(pin 6) is connected to Q output (pin 2). zero). Now Q output (pin 2) of IC4, which switches can be used. For power supply,
One terminal of all the ten switches is is connected to J input, goes ‘low’. As both four pen-torch cells (AA3) can be used with
connected to clock input (pin 3) of IC4. J and K inputs are at low level, IC4 is a battery holder. DC IN socket is provided
Control pulses from gate N3 (pin 10) inhibited and further clock pulses to pin for connecting a battery eliminator for op-
are inverted by gate N4 before it goes to 3 of IC4 have no effect. erating it on mains supply.

74
 CONSTRUCTION

EDI

PC INTERFACED AUDIO
DWIV
S.C.

PLAYBACK DEVICE: M-PLAYER where Vref is the reference voltage in volts

and R1 is the resistance in kilo-ohms.
The output current from the DAC is
converted into its corresponding voltage
N.V. VENKATARAYALU AND M. SOMASUNDARAM using a simple current-to-voltage con-
verter wired around one part of the dual
wideband JFET op-amp LF353. The out-

S
ounds of various kinds have always put from IC2(a) is the required audio sig-
fascinated human beings. Many de-
Hardware nal that has to be processed and ampli-
vices have been invented for re- The circuit functions as an 8-bit mono fied to feed the speaker. The part follow-
cording and playing back the sounds— player, i.e. the sound files (with .WAV ing the I-V converter is the bass- and
from magnetic tapes to DVD (digital ver- extension) with sound quantised to eight treble-control circuit employing RC-type
satile disc), from Adlib cards to high-per- bits or 256 levels can be played. In variable low-pass and high-pass filters
formance sound cards with ‘surround case of files with 16-bit quantisation, these connected to the input of audio amplifier
sound’ capability. For personal comput- are re-quantised as discussed under ‘Soft- built around the second op-amp inside
ers (PCs), there is a wide variety of such ware’ subheading. Thus, only eight bits LF353 [IC2(b)].
devices. A modern PC, generally, has a are sent to the card through the printer The frequency response of the filters
‘Sound Blaster’ card installed in it. If your port. can be varied using potentiometers VR1
PC does not have a sound card, here is Since there is no duplex communica- and VR2. The low frequencies or bass can
a low-cost audio playback circuit with tion necessary between the player card be cut or boosted with the help of poten-
bass, treble, and volume controls to cre- and the PC, it is sufficient to use the eight tiometer VR1. Similarly, high frequencies
ate your own music player. output data lines of the port 378H (pins 2 or treble can be cut or boosted with the
The playback device ‘M-player’ (i.e. through 9 of 25-pin D-connector). This 8- help of potentiometer VR2. At low fre-
media player) described here uses mini- bit digital output is converted into an ana- quencies, capacitors C2, C3, and C4 act
mal hardware to achieve a moderately logue signal using DAC 0808 (IC1) from as open circuits and the effective feed-
good-quality audio playback device. National Semiconductor. back is through 10k resistors (R4, R5,
The software that accompanies the hard- The output current from the DAC and R6) and potentiometer VR1.
ware is meant for a PC running under varies with the input digital level The audio amplifier IC2(b) acts as an
MS-DOS or a compatible operating sys- (represented by bits D0 through D7), inverting amplifier and the amplification
tem. This device can play a simple 8-bit the reference voltage (Vref), and the value (or attenuation) of the low-frequency bass
PCM (pulse code modulation) wave file of series resistor R1 connected to Vref signals depends on the value of potenti-
with some special effects. The PC is con- pin 14 of DAC0808 IC. The output cur- ometer VR1. The frequency f1 at which C
nected to the device through the PC par- rent Io (in mA) is given by the relation- = C2 = C3 becomes effective is given by
allel port. ship: the equation:

Fig. 1: Circuit of M-player audio playback device

75
 CONSTRUCTION

ohm speaker. The

output-end audio
At frequnecies higher than f2 (f>f2, power amplifier is
high end of audio range), capacitors designed to give a
C2 and C3 overcome the effect of potenti- gain of around 50.
ometer VR1. As C2 and C3 behave One can also use
as short, potentiometer VR1 has no LM380 in various
effect on the output response. Now, the other configurations
gain is controlled by treble potentiometer as per one’s require-
VR2. The frequency f2, below which ments. Another
treble potentiometer VR2 has no popular configura-
effect on the response, is given by the tion is the ‘bridge
equation: configuration’—in
which two LM380s
can be used to ob- Fig. 2: Actual-size PCB layout for M-player
tain larger power
The output of this module is sent to output with a gain
the final 2-watt audio power amplifier of 300.
(LM380) stage through potentiometer VR3
which is used as the volume control. The
power output of this module is fed to an 8-
Parallel port
The output of the
PARTS LIST parallel port is TTL
Semiconductors: compatible. So, logic
IC1 - DAC0808 8-bit D/A converter level 1 is indicated
IC2 - LF353 JFET input wide-band by +5V and logic
op-amp
level 0 by 0V. The
IC3 - LM380, 2-watt audio amplifier
current that one can
Resistors (all ¼watt, ±5% carbon film, unless
sink and source var-
stated otherwise)
ies from port to
R1 - 4.7-kilo-ohm
R2, R9 - 47-kilo-ohm port. Most parallel Fig. 3: Component layout for the PCB
R3 - 1-kilo-ohm ports can sink and
R4-R6 - 10-kilo-ohm source around 12 mA. verted into mono 8-bit PCM data. This
R7, R8 - 39-kilo-ohm The software assumes 0x378 (378H) software is accompanied with a CTUI-
VR1 - 100-kilo-ohm potmeter to be the base address of the parallel port based interface.
VR2 - 470-kilo-ohm potmeter
to which the device is connected. Another The wave file format is probably the
VR3 - 50-kilo-ohm potmeter
possible base address is 0x278 (278H). It least undocumented sound format since
Capacitors:
is advised to modify this address of the there are different schemes with differ-
C1 - 1µF, 25V electrolytic
C2, C3 - 0.05µF ceramic disk parallel port in the software program, af- ent number of chunks of related informa-
C4 - 0.005µF ceramic disk ter checking the device profile. tion in the file. Even the chunks can be
C5-C7 - 2.2µF, 25V electrolytic Actual-size PCB layout for audio play- of variable size. Therefore it is difficult to
C8, C9 - 470µF, 25V electrolytic back circuit of Fig. 1 is given in Fig. 2 get documentation on all available
Miscellaneous: and its component layout in Fig. 3. chunks.
- 25-pin D connector (male) This software can be used only on
- Loudspeaker 8-ohm, 2W PCM data with data chunk. Every wave
- Power supply: (a) +12V, 500mA Software file has some minimum chunks (see Table
- (b) –12V, 100mA
The software accompanying this construc- II). These chunks will be present in every
- (c) +5V, 100mA
tion project is written in Turbo C/C++ for wave file. Then there are other chunks
DOS. It can be used to which are actually non-standard. In PCM
TABLE I
Relevant Details of Parallel Port play simple 8-bit PCM itself, the above chunk may be followed
wave files. 16-bit wave either by DATA chunk or by LIST chunk
Pin No. Pin No. SPP signal Direction Register
(D-type 25) (centronics) in/out files are converted into 8- which, in turn, has lots of sub-chunks.
bit PCM data before pro- (Any information obtained on these
2 2 Data 0 Out Data
3 3 Data 1 Out Data ceeding. chunks by the readers may please be
4 4 Data 2 Out Data Even stereo wave shared with the authors.)
5 5 Data 3 Out Data files can be played; but During playback, the speed with
6 6 Data 4 Out Data
7 7 Data 5 Out Data not the stereo way. Only which the processor in the PC can ex-
8 8 Data 6 Out Data one channel is chosen. ecute the main loop is first studied using
9 9 Data 7 Out Data Up to six-channel PCM a dummy loop and thus the delay is
18 - 25 19-30 Ground Gnd data can be read and con- adaptively varied with respect to the speed

76
 CONSTRUCTION

TABLE II The software does not include mouse support.

Wave File Format can be used to play
with the following
From byte Number Information
effects:
Conclusion
of bytes
RIFF chunk: • Play normally We have presented a simple sound card
0 4 Contains the characters ‘RIFF’ • Play with a to playback .wav files with bass and treble
4 4 Size of the RIFF chunk different playback controls. Though the current design
WAVE chunk:
rate, i.e. play it fast plays only mono files (stereo files are
or slow converted to mono), a stereo file player
0 4 Contains the characters ‘WAVE’
4 Variable The FORMAT chunk • Fade-in or can be designed in a similar manner. The
fade-out the volume software can be modified to play audio
The normal FORMAT chunk:
levels either linearly files other than .wav files without any
0 4 Contains the characters ‘fmt’
or exponentially change in the hardware circuit. The en-
4 4 Size of the FORMAT chunk
8 2 Value specifying the scheme
• Reverse the coding format of the other audio file types
1-PCM, 85-MPEG layer III wave file and then (like .ra, .mp3) is only to be known. With
10 2 Number of channels play that, those files can be decoded and raw
1-mono, 2-stereo, etc. The menu items digital 8-bit data can finally be sent to the
12 4 Number of samples per second. can be selected us- hardware device. The hardware device can
This gives us the playback rate. ing keyboard keys even be permanently mounted inside the
16 4 Average number of bytes per second. Alt+F for file, Alt+E PC with all the power supplies (+12V, +5V,
This field is used to allocate buffers, etc. for effects, and and –12V) tapped from the system’s
20 2 Contains block alignment information. Alt+O for operation. SMPS.
22 Variable This field contains format-specific data.
Apart from the soft- Note: The complete source code con-
For PCM files, this field is 2 bytes long
ware, the hardware sisting of Mplayer.cpp, Sounds.h,
can be used to vary Globals.h, the executable file Mplayer.exe,
of target processor. This is one of the bass, treble, and volume for the wave file and a sample wave file are likely to be
methods to achieve invariance of the play- that is played. Thus, the hardware and included in next month’s CD (optional)
back speed over a wide range of proces- software complement each other to pro- accompanying EFY.
sor speeds available. vide a good music player. The software

Program Listing
MPLAYER.CPP cprintf(“%c”,205); delay(75);
#include “Sounds.h” for(j=y1+1;j<=y2-1;j++){ gotoxy(3,13);cprintf(“ ”);
void DisplayTip(char *string) gotoxy(x1,j); delay(75);
{ cprintf(“%c”,186); gotoxy(3,14);cprintf(“ ”);
text_info tinf; gotoxy(x2,j); delay(75);
if(strlen(string)<75) cprintf(“%c”,186); gotoxy(3,15);cprintf(“ ”);
{ } delay(75);
gettextinfo(&tinf); gotoxy(x1,y1);cprintf(“%c”,201); gotoxy(3,16);cprintf(“ ”);
textbackground(LIGHTGRAY);textcolor(RED); gotoxy(x2,y1);cprintf(“%c”,187); delay(75);
gotoxy(2,25); gotoxy(x1,y2);cprintf(“%c”,200); gotoxy(3,17);cprintf(“ ”);
for(int i=0;i<75;i++) cprintf(“ ”); gotoxy(x2,y2);cprintf(“%c”,188); return;
gotoxy(2,25); if(caption!=NULL){ }
cprintf(string); textcolor(WHITE); void MenuInitialise(void)
textattr(tinf.attribute); gotoxy(x1+2,y1); {
gotoxy(tinf.curx,tinf.cury); cprintf(“%s”,caption); int i;
} } // The FILE menu option
return; textattr(tinfo.attribute); Menu[MNU_FILE].nextMenu=MNU_EFFECT;
} return; Menu[MNU_FILE].prevMenu=MNU_OPERATION;
void Window(int x1,int y1,int x2,int y2,char } Menu[MNU_FILE].Child=FALSE;
*caption,int BackCol,int TextCol) void DrawScreen(void) Menu[MNU_FILE].num_items=4;
{ { for(i=0;i<4;i++)
text_info tinfo; textbackground(LIGHTGRAY);textcolor(BLACK); {
int i,j; clrscr(); Menu[MNU_FILE].Enabled[i]=TRUE;
gettextinfo(&tinfo); Window(1,2,80,24,NULL,BLUE,WHITE); Menu[MNU_FILE].subMenu[i]=NONE;
textbackground(BackCol);textcolor(TextCol); gotoxy(1,1);cprintf(“ File Effects Operation”); Menu[MNU_FILE].String[i]=(char *)malloc(15);
for(j=y1;j<=y2;j++){ textcolor(RED); Menu[MNU_FILE].Tip[i]=(char *)malloc(50);
gotoxy(x1,j); gotoxy(3,1);cprintf(“F”); Menu[MNU_FILE].OptionID[i]=1+i;
for(i=x1;i<=x2;i++) gotoxy(12,1);cprintf(“E”); }
cprintf(“ ”); gotoxy(24,1);cprintf(“O”); Menu[MNU_FILE].Enabled[1]=FALSE;
} textbackground(BLUE);textcolor(LIGHTBLUE); strcpy(&(Menu[MNU_FILE].String[0][0]),“Open”);
gotoxy(x1+1,y1); gotoxy(3,10);cprintf(“ ”); strcpy(&(Menu[MNU_FILE].String[1][0]),“Save”);
for(i=x1+1;i<=x2-1;i++) delay(75); strcpy(&(Menu[MNU_FILE].String[2][0]),“-”);
cprintf(“%c”,205); gotoxy(3,11);cprintf(“ ”); strcpy(&(Menu[MNU_FILE].String[3][0]),“Exit”);
gotoxy(x1+1,y2); delay(75); strcpy(&(Menu[MNU_FILE].Tip[0][0]),“Open the
for(i=x1+1;i<=x2-1;i++) gotoxy(3,12);cprintf(“ ”); *.wav file”);

77
 CONSTRUCTION

strcpy(&(Menu[MNU_FILE].Tip[1][0]),“Save as a (char *)malloc(15); if(subMenu[0]!=NULL) longLength+=3;

*.wav file”); Menu[MNU_FADEIN].Tip[i]=(char *)malloc(50); for(i=1;i<num_items;i++)
strcpy(&(Menu[MNU_FILE].Tip[2][0]),” “); Menu[MNU_FADEIN].OptionID[i]=31+i; {
strcpy(&(Menu[MNU_FILE].Tip[3][0]),”Quit the } length=strlen(String[i]);
program”); strcpy(&(Menu[MNU_FADEIN].String[0][0]),“Linear”); if(subMenu[i]!=NULL) length+=3;
Menu[MNU_FILE].AtX=2;Menu[MNU_FILE].AtY=2; strcpy(&(Menu[MNU_FADEIN].String[1][0]),” if(length>longLength) longLength=length;
// The EFFECT menu option Exponential”); }
Menu[MNU_EFFECT].nextMenu=MNU_OPERATION; strcpy(&(Menu[MNU_FADEIN].Tip[0][0]),“Apply textbackground(LIGHTGRAY);textcolor(WHITE);
Menu[MNU_EFFECT].prevMenu=MNU_FILE; Linear attenuation or amplification”); for(i=StartY;i<StartY+num_items+2;i++)
Menu[MNU_EFFECT].Child=FALSE; strcpy(&(Menu[MNU_FADEIN].Tip[1][0]),“Apply {
Menu[MNU_EFFECT].num_items=5; Exponential attenuation or amplification”); gotoxy(StartX,i);cprintf(“ ”);
for(i=0;i<5;i++) Menu[MNU_FADEIN].AtX=33;Menu gotoxy(StartX+longLength+5,i);cprintf(“ ”);
{ [MNU_FADEIN].AtY=2; }
Menu[MNU_EFFECT].Enabled[i]=FALSE; // The FADE-OUT menu option StartX++;
Menu[MNU_EFFECT].subMenu[i]=NONE; Menu[MNU_FADEOUT].nextMenu=Menu gotoxy(StartX,StartY);cprintf(“%c”,218);
Menu[MNU_EFFECT].String[i]= [MNU_FADEOUT].prevMenu=NONE; for(i=0;i<longLength+2;i++) cprintf(“%c”,196);
(char*)malloc(15); Menu[MNU_FADEOUT].Child=TRUE; cprintf(“%c”,191);
Menu[MNU_EFFECT].Tip[i]=(char *)malloc(50); Menu[MNU_FADEOUT].num_items=2; gotoxy(StartX,num_items+StartY+1);cprintf(“%c”,192);
Menu[MNU_EFFECT].OptionID[i]=11+i; for(i=0;i<2;i++) for(i=0;i<longLength+2;i++) cprintf(“%c”,196);
} { cprintf(“%c”,217);
strcpy(&(Menu[MNU_EFFECT].String[0][0]),“Fade Menu[MNU_FADEOUT].Enabled[i]=FALSE; for(i=0;i<num_items;i++)
In”); Menu[MNU_FADEOUT].subMenu[i]=NONE; {
strcpy(&(Menu[MNU_EFFECT].String[1][0]),“Fade Menu[MNU_FADEOUT].String[i]= if(String[i][0]!=‘-’)
Out”); (char *)malloc(15); {
strcpy(&(Menu[MNU_EFFECT].String[2][0]),“-”); Menu[MNU_FADEOUT].Tip[i]= textcolor(WHITE);
strcpy(&(Menu[MNU_EFFECT].String[3][0]),“Reverse”); (char*)malloc(50); gotoxy(StartX,StartY+i+1);cprintf(“%c ”,179);
strcpy(&(Menu[MNU_EFFECT].String[4][0]),“Playback Menu[MNU_FADEOUT].OptionID[i]=41+i; if(Enabled[i])
Rate”); } textcolor(BLACK);
strcpy(&(Menu[MNU_EFFECT].Tip[0][0]),“Reduce strcpy(&(Menu[MNU_FADEOUT].String[0][0]), else
volume with increasing time”); “Linear”); textcolor(BROWN);
strcpy(&(Menu[MNU_EFFECT].Tip[1][0]),“Increase strcpy(&(Menu[MNU_FADEOUT].String[1][0]), gotoxy(StartX+2,StartY+i+1);
volume with increasing time”); “Exponential”); for(j=0;j<longLength+1;j++)
strcpy(&(Menu[MNU_EFFECT].Tip[2][0]),“ ”); strcpy(&(Menu[MNU_FADEOUT].Tip[0][0]),“Apply if(j<strlen(String[i]))
strcpy(&(Menu[MNU_EFFECT].Tip[3][0]),“Reverse Linear attenuation or amplification”); cprintf(“%c”,String[i][j]);
the wave file”); strcpy(&(Menu[MNU_FADEOUT].Tip[1][0]),“Apply else
strcpy(&(Menu[MNU_EFFECT].Tip[4][0]),“Vary Exponential attenuation or amplification”); cprintf(“ ”);
the Playnack Rate”); Menu[MNU_FADEOUT].AtX=33;Menu textcolor(WHITE);
Menu[MNU_EFFECT].subMenu[0]=MNU_FADEIN; [MNU_FADEOUT].AtY=2; cprintf(“%c”,179);
Menu[MNU_EFFECT].subMenu[1]=MNU_FADEOUT; } }
Menu[MNU_EFFECT].AtX=11;Menu[MNU_EFFECT]. void RemoveMenu(int MenuID) else
AtY=2; { {
// The OPERATION menu option int i,j; textcolor(WHITE);
Menu[MNU_OPERATION].nextMenu=MNU_FILE; textbackground(BLUE);textcolor(WHITE); gotoxy(StartX,StartY+i+1);cprintf(“%c”,195);
Menu[MNU_OPERATION].prevMenu=MNU_EFFECT; gotoxy(Menu[MenuID].AtX,Menu[MenuID].AtY); for(j=0;j<longLength+2;j++) cprintf(“%c”,196);
Menu[MNU_OPERATION].Child=FALSE; for(i=0;i<30;i++) cprintf(“%c”,205); cprintf(“%c”,180);
Menu[MNU_OPERATION].num_items=3; for(i=1;i<=Menu[MenuID].num_items+2;i++) }
for(i=0;i<3;i++) { }
{ gotoxy(Menu[MenuID].AtX,Menu[MenuID].AtY+i); for(;;)
Menu[MNU_OPERATION].Enabled[i]=FALSE; for(j=0;j<30;j++) cprintf(“ ”); {
Menu[MNU_OPERATION].subMenu[i]=NONE; } DisplayTip(Tip[CurSelect]);
Menu[MNU_OPERATION].String[i]= return; textbackground(GREEN);
(char*)malloc(15); } if(Enabled[CurSelect])
Menu[MNU_OPERATION].Tip[i]= int ShowMenu(int MenuID) textcolor(BLACK);
(char*)malloc(50); { else
Menu[MNU_OPERATION].OptionID[i]=21+i; MENU *menu; textcolor(BROWN);
} int *subMenu; gotoxy(StartX+1,StartY+CurSelect+1);
strcpy(&(Menu[MNU_OPERATION].String[0][0]),“Play”); int nextMenu, prevMenu; cprintf(“ ”);
strcpy(&(Menu[MNU_OPERATION].String[1] char **String, **Tip; for(j=0;j<longLength+1;j++)
[0]),“-”); int *OptionID; if(j<strlen(String[CurSelect]))
strcpy(&(Menu[MNU_OPERATION].String[2] BOOL *Enabled; cprintf(“%c”,String[CurSelect][j]);
[0]),“Record”); char IsChild; else
strcpy(&(Menu[MNU_OPERATION].Tip[0][0]),“Play int num_items; cprintf(“ ”);
the file that was opened”); int longLength,length; ch=getch();
strcpy(&(Menu[MNU_OPERATION].Tip[1] int StartX,StartY; if(ch==0) ch=getch();
[0]),“ “); int i,j; ch+=300;
strcpy(&(Menu[MNU_OPERATION].Tip[2][0]), int CurSelect=0,ch,RetVal; switch(ch)
“Record sound through the microphone”); menu=&(Menu[MenuID]); {
Menu[MNU_OPERATION].AtX=23;Menu num_items=menu->num_items; case ESCAPE:
[MNU_OPERATION].AtY=2; String=menu->String; RemoveMenu(MenuID);
// The FADE-IN menu option nextMenu=menu->nextMenu; return(-1);
Menu[MNU_FADEIN].nextMenu=Menu prevMenu=menu->prevMenu; case ENTER:
[MNU_FADEIN].prevMenu=NONE; subMenu=menu->subMenu; RemoveMenu(MenuID);
Menu[MNU_FADEIN].Child=TRUE; IsChild=menu->Child; if(Enabled[CurSelect]==TRUE)
Menu[MNU_FADEIN].num_items=2; OptionID=menu->OptionID; return(OptionID[CurSelect]);
for(i=0;i<2;i++) Tip=menu->Tip; else
{ Enabled=menu->Enabled; return(-1);
Menu[MNU_FADEIN].Enabled[i]=FALSE; StartX=menu->AtX; case LEFT_ARROW:
Menu[MNU_FADEIN].subMenu[i]=NONE; StartY=menu->AtY; if(IsChild==TRUE)
Menu[MNU_FADEIN].String[i]= longLength=strlen(String[0]); {

78
 CONSTRUCTION

RemoveMenu(MenuID); } ButtonDisplay(45,7,ENABLE_NOTACTIVE,“Cancel”);
return(0); void ButtonDisplay(int x1,int y1,char state gotoxy(x,y);
} char *caption) break;
else { case 1:
{ text_info tinfo; _setcursortype(_NOCURSOR);
if(prevMenu!=NONE) gettextinfo(&tinfo); ButtonDisplay(25,7,ENABLE_ACTIVE,“ Ok ”);
{ int i; break;
RemoveMenu(MenuID); if(state==ENABLE_NOTACTIVE) textcolor case 2:
return(ShowMenu(prevMenu)); (YELLOW); ButtonDisplay(45,7,ENABLE_ACTIVE,“Cancel”);
} if(state==ENABLE_ACTIVE) textcolor(WHITE); ButtonDisplay(25,7,ENABLE_NOTACTIVE,“
} if(state==DISABLE) textcolor(LIGHTGRAY); Ok ”);
break; textbackground(CYAN); break;
case RIGHT_ARROW: gotoxy(x1,y1);cprintf(“ %s ”,caption); }
if(subMenu[CurSelect]!=NONE) textbackground(LIGHTGRAY);textcolor(YELLOW); ch=getch();
{ cprintf(“%c”,220); if(ch==0) ch=getch()+300;
RetVal=ShowMenu(subMenu[CurSelect]); gotoxy(x1+1,y1+1);for(i=0;i<8;i++)cprintf(“%c”,223); ch+=300;
if(RetVal!=0) textattr(tinfo.attribute); switch(ch)
{ } {
RemoveMenu(MenuID); void ButtonPushed(int x1,int y1,char *caption) case TAB:
return(RetVal); { Control=(++Control)%3;
} text_info tinfo; break;
} gettextinfo(&tinfo); case ESCAPE:
else int i; _setcursortype(_NOCURSOR);
{ textbackground(LIGHTGRAY);textcolor(WHITE); ButtonPushed(45,7,“Cancel”);
if(nextMenu!=NONE) gotoxy(x1,y1);cprintf(“ ”); ch=1; Control=2;
{ gotoxy(x1,y1+1);cprintf(“ ”); break;
RemoveMenu(MenuID); textbackground(CYAN); case ENTER:
return(ShowMenu(nextMenu)); gotoxy(x1+1,y1);cprintf(“ %s ”,caption); _setcursortype(_NOCURSOR);
} delay(250); ButtonPushed(25,7,“ Ok “);
} gotoxy(x1,y1);cprintf(“ %s ”,caption); ch=1;Control=1;
break; textbackground(LIGHTGRAY);textcolor(YELLOW); break;
case DOWN_ARROW: cprintf(“%c”,220); case SPACE:
textbackground(LIGHTGRAY); gotoxy(x1,y1+1);cprintf(“ ”);for(i=0;i<8;i++) if(Control==2){_setcursortype(_NOCURSOR);
if(Enabled[CurSelect]) cprintf(“%c”,223); ButtonPushed(45,7,“Cancel”);ch=1;}
textcolor(BLACK); textattr(tinfo.attribute); if(Control==1){_setcursortype(_NOCURSOR);
else } ButtonPushed(25,7,“ Ok ”);ch=1;}
textcolor(BROWN); BOOL DisplayDialog(char mode) break;
gotoxy(StartX+1,StartY+CurSelect+1); { case BACK_SPACE:
cprintf(“ ”); int Control=0,ch; if(Control==0 && i>0)
for(j=0;j<longLength+1;j++) int x=29,y=5,i=0,N=0; {
if(j<strlen(String[CurSelect])) char TempStr[40];TempStr[0]=0; gotoxy(—x,y);
cprintf(“%c”,String[CurSelect][j]); switch(mode) cprintf(“ ”);
else { i—;
cprintf(“ ”); case FILE_OPEN: Window(10,3,70,9,“Open TempStr[i]=0;
CurSelect++; File”,LIGHTGRAY,YELLOW);break; gotoxy(29,5);
if(CurSelect==num_items) CurSelect=0; case FILE_SAVE: Window(10,3,70,9,“Save cprintf(“%s”,TempStr);
while(String[CurSelect][0]==’-’) File”,LIGHTGRAY,YELLOW);break; }
{ case PLAYBACK_RATE: Window(10,3,70,9,” break;
if(CurSelect==num_items) Playback Rate”,LIGHTGRAY,YELLOW);break; default:
CurSelect=0; } ch-=300;
else ButtonDisplay(25,7,ENABLE_NOTACTIVE,“ if(ch<300 && i<N)
CurSelect++; Ok ”); {
} ButtonDisplay(45,7,ENABLE_NOTACTIVE,“Cancel”); TempStr[i++]=(char)ch;
break; textbackground(LIGHTGRAY);textcolor(YELLOW); TempStr[i]=0;
case UP_ARROW: gotoxy(13,5); gotoxy(29,5);
textbackground(LIGHTGRAY); if(mode==FILE_OPEN || mode==FILE_SAVE) cprintf(“%s”,TempStr);
if(Enabled[CurSelect]) { x++;
textcolor(BLACK); cprintf(“Enter Filename: ”); }
else strcpy(TempStr,sFileName); break;
textcolor(BROWN); N=39; }
gotoxy(StartX+1,StartY+CurSelect+1); } if(ch==1) break;
cprintf(“ ”); else }
for(j=0;j<longLength+1;j++) { textbackground(BLUE);textcolor(WHITE);
if(j<strlen(String[CurSelect])) cprintf(“Playback Rate : ”); for(ch=3;ch<=9;ch++)
cprintf(“%c”,String[CurSelect][j]); strcpy(TempStr,sPlayBackRate); }
else N=5; gotoxy(10,ch);
cprintf(“ ”); } for(i=10;i<=70;i++)
CurSelect—; textbackground(BLUE);textcolor(WHITE); cprintf(“ ”);
if(CurSelect<0) CurSelect=num_items-1; cprintf(“ ”); }
while(String[CurSelect][0]==’-’) gotoxy(29,5);cprintf(“%s”,TempStr); if(Control==1)
{ i=strlen(TempStr); {
if(CurSelect<0) x+=i; if(mode==FILE_SAVE || mode==FILE_OPEN)
CurSelect=num_items-1; for(;;) strcpy(sFileName,TempStr);
else { if(mode==PLAYBACK_RATE)strcpy(sPlayBackRate,
CurSelect—; switch(Control) TempStr);
} { return(TRUE);
break; case 0: }
} _setcursortype(_NORMALCURSOR); return(FALSE);
} textbackground(BLUE);textcolor(WHITE); }

79
 CONSTRUCTION

void SetEnvVariables(){} printf(“———————\n”); attn1=exp(i*step);

void SaveFile(){} printf(“\tM.Somasundaram - [email protected]\n fputc(128+(unsigned char)((long double)(fgetc(fp)-
void main() \tN.V.Venkatarayalu - [email protected]\n\n”); 128)*attn1),fpt);
{ break; }
int ch; } fclose(fpt);
textbackground(BLACK);textcolor(LIGHTGRAY); } fclose(fp);
clrscr(); } unlink(“test.aud”);
_setcursortype(_NOCURSOR); SOUNDS.H rename(“tmp.aud”,”test.aud”);
DrawScreen(); #include “Globals.h” }
MenuInitialise(); /////////// Playback Sounds /////////////// /////////////// Reverse Wave File ////////////////
sFileName[0]=0; void mPlay(void) void ReverseWave(void)
strcpy(sPlayBackRate,”22400"); { {
for(;;) FILE *fp; FILE *fp, *fpt;
{ unsigned char Sample; long double i;
DisplayTip(“Ready”); clock_t t1; fp=fopen(“test.aud”,“rb”);
ch=getch(); long k=0,t=0,i=0; fpt=fopen(“tmp.aud”,“wb”);
if(ch==0) ch=getch(); fp=fopen(“test.aud”,“rb”); for(i=0.0;i<NoSamples;i++)
ch+=300; t1=clock(); {
switch(ch) while(clock()-t1<18.2){ fseek(fp,-(long)i,SEEK_END);
{ if(k<RateOfPlayBack){ fputc(fgetc(fp),fpt);
case AltF:ch=ShowMenu(MNU_FILE);break; fgetc(fp); }
case AltE:ch=ShowMenu(MNU_EFFECT);break; outp(0x37a,0); fclose(fpt);
case AltO:ch=ShowMenu(MNU_OPERATION); if(feof(fp)) break; fclose(fp);
break; t++;} unlink(“test.aud”);
} k++;} rename(“tmp.aud”,”test.aud”);
switch(ch) i=k/(RateOfPlayBack+2000); }
{ k=0;rewind(fp); /////////////// Set Playback rate ///////////////
case FILE_EXIT: t1=clock(); void SetPlayBackRate(long rate)
ch=AltX; while(clock()-t1<18.2){ {
break; if(k%i==0){ if(rate<65535)
case FILE_OPEN: fgetc(fp); {
if(DisplayDialog(FILE_OPEN)) outp(0x37a,0); if(rate!=0)
if(mOpen()) if(feof(fp)) break; {
{ t++; rate=atol(sPlayBackRate);
for(int i=0;i<5;i++) } RateOfPlayBack=rate;
Menu[MNU_EFFECT].Enabled[i]=TRUE; if(k>0) k=k; }
Menu[MNU_OPERATION].Enabled[0]=TRUE; k++;} ultoa(RateOfPlayBack,sPlayBackRate,10);
for(i=0;i<2;i++) i=k/(RateOfPlayBack+2000); }
{ k=0;t=0;rewind(fp); return;
Menu[MNU_FADEIN].Enabled[i]=TRUE; while(feof(fp)==FALSE) }
Menu[MNU_FADEOUT].Enabled[i]=TRUE; { /////// Open a wav file and set parameters ///////
} t1=clock(); BOOL mOpen(void)
} if(k%i==0){ {
break; Sample=(unsigned char)fgetc(fp); void DisplayTip(char *);
case FILE_SAVE: outp(DATA_OUT,Sample); int TYPE_OF_OUTPUT=MONO_OUTPUT;
/*if(DisplayDialog(FILE_SAVE))mSave();*/ t++;} FILE *fsource, *fdest;
break; k++; fsource=fopen(sFileName,“rb”);
case FADEIN_LINEAR: } if(fsource!=NULL)
FadeCommon(FADEIN,LINEAR); fclose(fp); {
break; outp(DATA_OUT,0); fdest=fopen(“test.aud”,“wb”);
case FADEIN_EXP: } RIFF riff;
FadeCommon(FADEIN,EXPONENTIAL); ///////////// Fade Common Function //////////////// WAVE wave;
break; void FadeCommon(char far InOrOut,char far DATA data;
case FADEOUT_LINEAR: Type) fread(&riff,sizeof(riff),1,fsource);
FadeCommon(FADEOUT,LINEAR); { fread(&wave,sizeof(wave),1,fsource);
break; FILE *fp, *fpt; fseek(fsource,20+wave.fmt.fLen,SEEK_SET);
case FADEOUT_EXP: long double i; fread(&data,sizeof(data),1,fsource);
FadeCommon(FADEOUT,EXPONENTIAL); long double step; if(strncmpi(data.dID,“FACT”,4)==0){
break; long double attn1; fseek(fsource,data.dLen,SEEK_CUR);
case REVERSE: fp=fopen(“test.aud”,“rb”); fread(&data,sizeof(data),1,fsource);
ReverseWave(); fpt=fopen(“tmp.aud”,“wb”); }
break; step=1.0/NoSamples; if(!(strncmpi(riff.rID,“RIFF”,4)==0 && strncmpi
case PLAYBACK_RATE: if(InOrOut==FADEIN) (wave.wID,“WAVE”,4)==0 && strncmpi(data.dID,
if(DisplayDialog(PLAYBACK_RATE)==FALSE) attn1=0; “DATA”,4)==0 && strncmpi(wave.fmt.fID,“fmt
SetPlayBackRate(0); else ”,4)==0 && wave.fmt.wFormatTag==PCM &&
else { wave.fmt.nChannels<=6))
SetPlayBackRate(1); attn1=1; {
break; step=-step; printf(“\a”);
case PLAY: } DisplayTip(“Unrecognizable Format -Not PCM
mPlay(); if(Type==LINEAR) 8-bit.”);
break; for(i=0.0;i<NoSamples;i++) return FALSE;
} { }
if(ch==AltX) attn1+=step; unsigned long dlen=data.dLen;
{ fputc(128+(unsigned char)((long double)(fgetc(fp)- char array[6];int arrayi[6];
_setcursortype(_NORMALCURSOR); 128)*attn1),fpt); int nChannels=wave.fmt.nChannels;
textcolor(LIGHTGRAY); } SamplingFrequency=PBR=RateOfPlayBack=
textbackground(BLACK); else wave.fmt.nSamplesPerSec;
clrscr(); for(i=0.0;i<NoSamples;i++) ultoa(RateOfPlayBack,sPlayBackRate,10);
printf(“MPLAYER Ver.1.0\n”); { NoSamples=(dlen/nChannels)*TYPE_OF_

80
 CONSTRUCTION

OUTPUT;dlen=NoSamples; break; #define AltE 318

BOOL bits16=FALSE; case 4: array[0]=(char)((long)(arrayi[0]+ #define AltF 333
if(wave.fmt.FormatSpecific==BITS16) bits16= 32768)*255/65535); #define AltO 324
TRUE; fputc((int)array[0],fdest); #define AltX 345
if(bits16==FALSE) if(TYPE_OF_OUTPUT==STEREO_OUTPUT) #define LEFT_ARROW 375
while(dlen>0) { #define RIGHT_ARROW 377
{ array[2]=(char)((long)(arrayi[2]+32768)*255/ #define UP_ARROW 372
fread(array,1,nChannels,fsource); 65535); #define DOWN_ARROW 380
switch(nChannels) fputc((int)array[2],fdest); #define ESCAPE 327
{ } #define ENTER 313
case 1: fputc((int)array[0],fdest); break; #define SPACE 332
if(TYPE_OF_OUTPUT==STEREO_OUTPUT) case 6: array[1]=(char)((long)(arrayi[1]+ #define BACK_SPACE 308
fputc((int)array[0],fdest); 32768)*255/65535); #define TAB 309
break; fputc((int)array[1],fdest); #define PCM 1
case 2: fputc((int)array[0],fdest); if(TYPE_OF_OUTPUT==STEREO_OUTPUT) #define IN 0
if(TYPE_OF_OUTPUT==STEREO_OUTPUT) { #define OUT 1
fputc((int)array[1],fdest); array[4]=(char)((long)(arrayi[4]+32768)*255/ #define LINEAR 0
break; 65535); #define EXPONENTIAL 1
case 3: fputc((int)array[0],fdest); fputc((int)array[4],fdest); #define FADEIN 0
if(TYPE_OF_OUTPUT==STEREO_OUTPUT) } #define FADEOUT 1
fputc((int)array[1],fdest); break; #define DATA_OUT 0x378
break; } #define BITS16 16
case 4: fputc((int)array[0],fdest); dlen—; #define BITS8 8
if(TYPE_OF_OUTPUT==STEREO_OUTPUT) } #define STEREO_OUTPUT 2
fputc((int)array[2],fdest); } #define MONO_OUTPUT 1
break; fclose(fsource); typedef char BOOL;
case 6: fputc((int)array[1],fdest); fclose(fdest); typedef struct{
if(TYPE_OF_OUTPUT==STEREO_OUTPUT) return TRUE; char rID[4];
fputc((int)array[4],fdest); } unsigned long rLen;
break; else }RIFF;
} { typedef struct{
dlen—; printf(“\a”); char fID[4];
} DisplayTip(“The file is not available!”); unsigned long fLen;
else return FALSE; unsigned int wFormatTag;
{ } unsigned int nChannels;
NoSamples/=2; } unsigned long nSamplesPerSec;
dlen=NoSamples; GLOBALS.H unsigned long nAvgBytesPerSec;
while(dlen>0) #include <stdio.h> unsigned int nBlockAlign;
{ #include <dos.h> unsigned int FormatSpecific;
fread(arrayi,2,nChannels,fsource); #include <process.h> }FORMATCHUNK;
switch(nChannels) #include <conio.h> typedef struct{
{ #include <string.h> char wID[4];
case 1: array[0]=(char)((long)(arrayi[0]+ #include <math.h> FORMATCHUNK fmt;
32768)*255/65535); #include <stdlib.h> }WAVE;
fputc((int)array[0],fdest); #include <time.h> typedef struct{
if(TYPE_OF_OUTPUT==STEREO_OUTPUT) #define FALSE 0 char dID[4];
fputc((int)array[0],fdest); #define TRUE 1 unsigned long dLen;
break; #define ENABLE_ACTIVE 1 }DATA;
case 2: array[0]=(char)((long)(arrayi[0]+ #define ENABLE_NOTACTIVE 2 struct MENU
32768)*255/65535); #define DISABLE 0 { int subMenu[10];
fputc((int)array[0],fdest); #define NONE -1 char *Tip[10];
if(TYPE_OF_OUTPUT==STEREO_OUTPUT) #define MNU_FILE 0 char *String[10];
{ #define MNU_EFFECT 1 int OptionID[10];
array[1]=(char)((long)(arrayi[1]+32768)*255/ #define MNU_OPERATION 2 BOOL Enabled[10];
65535); #define MNU_FADEIN 3 int num_items;
fputc((int)array[1],fdest); #define MNU_FADEOUT 4 char Child;
} #define FILE_OPEN 1 int AtX,AtY;
break; #define FILE_SAVE 2 int nextMenu;
case 3: array[0]=(char)((long)(arrayi[0]+ #define FILE_EXIT 4 int prevMenu;
32768)*255/65535); #define FADEIN_LINEAR 31 } Menu[5];
fputc((int)array[0],fdest); #define FADEIN_EXP 32 long RateOfPlayBack=15000,PBR;
if(TYPE_OF_OUTPUT==STEREO_OUTPUT) #define FADEOUT_LINEAR 41 long double NoSamples=76455;
{ #define FADEOUT_EXP 42 double SamplingFrequency=44000;
array[1]=(char)((long)(arrayi[1]+32768)*255/ #define REVERSE 14 char sFileName[40];
65535); #define PLAYBACK_RATE 15 char sPlayBackRate[6];
fputc((int)array[1],fdest); #define PLAY 21 ❏
} #define RECORD 22

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81
 C I RC ICR CUUII TT I ID D
EAS
EAS

mon terminal to the ground. Now give

STEPPER MOTOR DRIVER

the lowest possible supply (3V) and check
for correct sequence of the remaining
three terminals, using trial-and-error
S.C. DWIVEDI
method for the maximum six combina-
PIYUSH P. TAILOR tions/possibilities. At correct sequence, the
motor would rotate in either clockwise or

S
tepper motors are widely used (IC1) with decoded outputs is used here anti-clockwise direction.
where precision and accuracy are as a sequence generator (similar to the To use external clock pulses, simply
the primary considerations during running-light effect). As we need only four disconnect pin 14 of CD4017B from pin 8
rotation or positioning. Microprocessors or outputs, the fifth output (pin 10) is con- of CD4069B and then connect external
microcontrollers are often employed for nected to the RESET pin (pin 15). The clock pulses to pin 14 of CD4017B. Each
controlling
their operation.
But it may not
always be con-
venient or nec-
essary to use
microcon-
trollers, as it
would make the
gadget unnec-
essarily cost-
lier.
Here is a
simple and low-
cost circuit to
drive a stepper
motor on full
power for any
number of
whole steps.
The present cir-
cuit is intended
to drive four-winding stepper motors, but four outputs, in conjunction with four npn pulse drives the motor by one step, which
one can easily modify it for other types. power transistors, function as half-power may normally be 1.8o or 3.6o, as shown on
The popular decade counter CD4017 full-step drivers. In order to get full power, the label plate of the motor.
eight diodes (8 x 1N4148) are used. Truth To reverse the direction of rotation,
TABLE I Table I depicts the half-power operation, one should interchange terminals A with
Half-Power Operation while truth Table II depicts the full-power B and C with D simultaneously.
Step Supply to coils operation. The colours of motor terminal wires,
number A B C D The use of hex inverter IC2 (CD4069) shown in the diagram, are those of the
1 On Off Off Off gives two benefits: stepper motor used in head-drive of a
2 Off On Off Off 1. The inversion through NOT gates 1.2MB floppy disk drive unit, operating
3 Off Off On Off
4 Off Off Off On
allows the use of pnp power transistors on 12V with a 3.6o/step, which the author
5 Repetition On Off Off Off (4 x BD140), which make it possible to has used in his prototype.
| | | | | ground the common terminal of the mo- Notes: 1. Heat-sinks may not be re-
| | | | | tor. This is useful in many applications. quired for the power transistors.
2. The two unused inverter gates (N1 2. Cost of the circuit is less than
TABLE II and N2) are handy to use as clock gen- Rs 100.
Full-Power Operation erator, in conjunction with preset VR1 and 3. Supply voltage for the circuit is
Step Supply to coils capacitor C1. Varying the preset allows equal to the operating voltage of the mo-
number A B C D the change in clock frequency and hence tor (i.e. between 3V and 12V).
1 On On Off Off the speed of the motor. 4. RPM of motor = , where
2 Off On On Off
If one does not know the sequence of f is the frequency of clock pulses and d
3 Off Off On On
4 On Off Off On motor terminals to be connected to termi- the angular displacement in degrees per
5 Repetition On On Off Off nals A through D of the circuit, then first step.
| | | | | connect any one terminal of motor to ter-
| | | | | minal A of the circuit and connect com-

82
 CIRCUIT IDEAS

ELECTRONIC DIGITAL
stage consists of a digital counter based
on 4-digit counter IC 74C926. When light
from any source falls on junction of the

TACHOMETER
infrared module, its output goes low. This
S.C. DWIVEDI output is connected to pin 2 of NE555
(configured as a monostable) to trigger it.
The output pulses from pin 3 are con-
nected to clock pin 12 of 74C926. Hence,
ADITYA U. RANE
on receipt of every pulse, the count of IC
74C926 increments by one. For checking

T
achometer is nothing but a simple stripe is pasted on the rotating part of the revolutions in a predetermined time
electronic digital transducer. It the machinery. The reflected light from period, a stopwatch may be used. Before
finds many applications in our the contrasting stripe falls on the junc- counting starts, depress reset switch S1

day-to-day life. t i o n and release it as soon as counting is to

Normally, a tachometer is used for of the sensor module to alternately acti- start. At the instant when counting is to
measuring the speed of a rotating shaft, vate and deactivate it, depending upon end, one should immediately withdraw ei-
gear, or a pulley. A tape or a contrasting the size and width of the tape pasted ther the sensor module or switch ‘off’ the
on the pul- light source to see the final reading (revo-
ley or ro- lutions) on the display. Accuracy will be
tating part better if the counting period is compara-
of the ma- tively larger.
chine. The 74C926 is basically a 4-digit
Hence, counter module, which can count from
one gets 0000 to its maximum possible value of
the output 9999. It can be operated with VCC of 3 to
in the 15 volts. Here, regulated 5-volt supply is
form of
sharp pulses for every revolu-
tion.
Apart from counting the
revolutions of a moving object,
the circuit can also be used
for counting the objects on a
conveyer belt.
The basic digital tachom-
eter circuit consists of two
stages. The first stage is a
simple monostable, wired
around IC NE555. The second

83
 CIRCUIT IDEAS

The chip 74C926 pulls its carry out- should be equal to

put (pin 4) ‘high’ when the counter reaches θ2. The other im-
6,000. This output can be suitably used portant thing is
in clock circuits for resetting; for example, that the contrast-
if the clock input is 100 Hz per second, ing stripe may be
the carry output will be available every a mirror with a
minute. However, here we are not using small piece of tape
the carry output. pasted on it, as
used for the entire circuit. The circuit There are different versions of 4-digit shown in Fig. 5.
shown in Fig. 2 employs 7805 regulator. counter modules for different applications. Fig. 6 shows another application of
This 4-digit counter can be readily inter- For example, in 74C927, the second most the same circuit for counting the objects
faced to many circuits such as clock-fre- significant digit gets divided by 6, rather moving over a conveyer belt. The only
quency meter, digital voltmeter, tachom- than 10. Similarly, in 74C928, the most difference between applications shown
significant digit in Figs 3, 4, and 6 is that in the first
gets divided by 2, two applications, one requires a contrast-
rather than 10, ing stripe, whereas in case of Fig. 6, one
and its carry out- requires a light source and a sensor mod-
put goes ‘high’ at ule which are kept on the opposite sides
the count of of the conveyer belt.
2000, and ‘low’ When there is no object between the
only when the re- source (light) and the sensor module, one
set switch is gets a continuous pulse at the output pin
pulled ‘high’. 3 of monostable IC NE555. But as soon
Figs 3 and 4 as the object on moving conveyer belt ob-
show the applica- structs the light path, the output of NE555
tions of the elec- goes ‘low’. Since output pin 3 of NE555 is
tronic digital ta- connected to the clock input pin 12 of
chometer. Basic 74C926, the number of objects get counted
principle in both continuously—up to 9999, using a single
these applica- 74C926. A simple IR light-source circuit
tions is the same. is shown in Fig. 7.
eter (as explained here), stop watch, etc. The important factor is that maximum The total cost of fabrication of the
A reset switch is connected between pin reflected light from the contrasting stripe complete circuit is approximately Rs 250.
13 and VCC. should fall on the IR detector, i.e. θ1

LIGHT-OPERATED LIGHT
SWITCH S.C.
DWIV
EDI
from the lamp (not from the torch) keeps
LDR’s resistance low. So, the lamp re-
mains continuously ‘on’. Once the lamp is
PRADEEP G. ‘on’, it can be switched ‘off’ again by in-
terrupting the light falling on LDR, by
either waving hand in front of it or by

H
ere is a light-operated, remote- interrupting
controlled solidstate switch to power supply to
operate a lamp. During darkness, the circuit for a
the resistance of LDR shoots up to meg- moment.
ohm range. Thus, the triac does not get RFC emplo-
gate drive and hence it does not conduct. yed here can be
When LDR is illuminated by means made by winding
of a torch-light beam, the resistance of about 15 turns of
LDR suddenly decreases (below 10-kilo- 18 SWG wire
ohm). This causes the triac to conduct over an insulated
and switch ‘on’ the lamp. Light received ferrite rod.

84
 CIRCUIT IDEAS

PRECISION DIGITAL AC POWER ready mentioned earlier, is that only the

firing time has to be programmed to set
different firing angles. It is to be noted

CONTROLLER
that the more precise the timer, the more
precise will be the power being controlled.
S.C. DWIVEDI
In this circuit, the time period of
mains waveform is divided into 20 equal
PRATAP CHANDRA SAHU parts. So, there is a time interval of 1 ms
between two consecutive steps. The sam-
pling voltage is unfiltered full-wave and

S
CRs and Triacs are extensively one divides the angle described during one is obtained from the diode bridge at the
used in modern electronic power complete cycle of the sinewave (2π = 360o) output of the power transformer. The
controllers—in which power is con- into equal parts, then time period T of timer is reset at every zero crossing of
trolled by means of phase angle variation the wave will be divided into identical full wave and set again instantly for the
of the conduction period. Controlling the equal parts. Thus, it becomes fairly easy next delay time. This arrangement helps
phase angle can be made simple and easy to set the different programmable tim- the timer to be set for every half of mains
if we set different firing times correspond- ings synchronised with the AC mains wave—when the positive half of the mains
ing to different firing angles. The design sinewave at zero crossing. The main ad- waveform starts building up, the timer is
given here is a synchronised program- vantage of such an arrangement, as al- set for that half and as it begins to cross
zero, it gets reset and set again
for negative half, when the
negative half begins to build up.
The process is repeated. Here,
instead of using two zero cross-
ing detectors—one for each half
of mains wave—a single detec-
tor is used to perform both the
functions. This is possible be-
cause the sampling wave for
negative half is inverted by the
rectifier diode bridge.
The 18V AC from power
transformer is fed to the four
diodes in bridge configuration,
followed by the filter capacitor
which is again followed by a
three-terminal voltage regula-
tor IC LM7812. The voltage so
obtained drives the circuit. The
unfiltered voltage is isolated
from the filter capacitor by a
diode and is fed to zener diode
D8, which acts as a clipper to
clip voltage above 6 volts.
This voltage is fed to the
mable timer which achieves this objec- base of transistor T1, which is wired
tive. as zero crossing detector. When base
The following equation for a sinewave voltage reaches the threshold, it con-
shows how firing time and the phase angle ducts. It thus supplies a narrow posi-
are related to each other: tive pulse which resets the timer at
θ = 2πft or θ∝t every zero crossing.
Here, θ is the angle described by a A 32.768kHz crystal is used to
sinewave in time t (seconds), while f is get stable output of nearly
the frequency of sinewave in Hz. Time 1 kHz (1,024Hz) frequency after five
period T (in seconds) of a sinewave is stages of binary division by
equal to the reciprocal of its frequency, an oscillator-cum-divider IC CD4060.
i.e. T = 1/f. The 32.768kHz crystal is used be-
The above equation indicates that if cause it can be found in unused

85
 CIRCUIT IDEAS

quartz clocks and is readily reaches the desired time interval, the cor-
available in the market. But use responding output of CD4017 inhibits the
of a 1kHz crystal using a quad- counter CD4017 (via pole of rotary switch
NAND IC CD4093 as clock gen- and diode D6) and fires the Triac. Tran-
erator, as shown in Fig. 2, is bet- sistor T2 here acts as a driver transistor.
ter as it provides the exact time The reset pin of 4017 is connected to zero
interval required. In that case, crossing detector output to reset it at ev-
CD4060 oscillator/divider is not ery zero crossing. (The load-current wave-
required. forms for a few positions of the rotary
The CD4017B counter-cum- switch, as observed at EFY Lab, are
decoder IC then divides this shown in Fig. 3.)
1kHz signal into ten equal in- The circuit can be used as power con-
tervals, which are programmed troller in lighting equipment, hot-air oven,
via the single-pole, 10-way ro- universal single-phase AC motor, heater,
tary switch. Once the delayed output etc.

LUGGAGE SECURITY SYSTEM

DHURJATI SINHA EDI alarm sounds, connections to pin 1 and 6
DWIV
S.C. may be made as per the table.
Select 1 Select 2 Sound effect

W
hile travelling by a train or bus, sistor T1 gets forward biased to extend (Pin6) (Pin1)
we generally lock our luggage the positive supply to the alarm circuit. X X Police siren
using a chain-and-lock arrange- In idle mode, the power consumption of VDD X Fire-engine siren
ment. But, still we are under tension, ap- the circuit is minimum and thus it can be VSS X Ambulance siren
prehending that somebody may cut the used for hundreds of travel hours. “-” VDD Machine-gun sound
chain and steal our luggage. Here is a To enable generation of different Note: X = no connection; “-” = do not care
simple circuit to alarm you when
somebody tries to cut the chain.
Transistor T1 enables supply to
the sound generator chip when the
base current starts flowing through
it. When the wire (thin enameled
copper wire of 30 to 40 SWG, used
for winding transformers) loop
around the chain is broken by some-
body, the base of transistor T1,
which was earlier tied to positive
rail, gets opened. As a result, tran-

86
June

2000
 C O N S T R U C T I O N

are carcinogenic. That is why, ozone is

PORTABLE OZONE GENERATOR

used today in preference to chlorine.
Complete disinfection of water, in
any impure form, is realised with an
ozone content of 4 mg/litre. Ozone gen-
erator presented here has a capacity of
K PADMANABHAN, S ANANTHI AND KIRIT PATEL S.C. DWIVEDI producing 10 mg/minute of ozone com-
bined with atmospheric air. This unit
can treat five litres of impure water in
just two minutes.

T
his article is dedicated to the use of a discharge tube to which a high The discharge tube is supplied air
good health of EFY readers in electric field is applied so as to break from an air-group, which is built into the
the year 2000 and beyond. It de- down the oxygen present in the air. This unit. The unit produces ozonated air at a
scribes an ozone generator for portable phenomenon occurs at or near a field pressure head of 15-20 cm of water via
(and portable1) use. strength of 25 kV/cm, and the resulting its outlet. So the exit tube can be let into
Ozone gas is now-a-days used for discharge that takes place is known as water containers with water up to a level
treatment of drinking water, disinfec- corona. The corona has a light bluish of 10-15 cm.
tion, and air-purification. What one re- glow. It is in this corona field that oxy- Another advantage of this unit is
quires is a small and handy unit to be gen becomes ozone (O3). that it is light in weight (less than a
plugged into mains to get ozonated air Ozone has tendency to revert back to kilogram) and carries a very simple con-
at suitable pressure flowing out from a its original form in about 10-20 minutes, trol and a microammeter showing the
tube It can then be let into environment in the atmosphere. Therefore, it is nec- ozone concentration. It employs a high
or bubbled through water or any other essary in any ozone application to gener- voltage of over 5 kV at a high frequency
polluted liquid. But the gadget must be ate ozone as and when requied for use of 15 kHz to 20 kHz, which would not
completely safe to work with. since it cannot be kept stored the way cause a lethal shock. Shock voltages are
Ozone generators invariably make chlorine is stored (in cylinders). Chlo- not cause a lethal shock. Shock voltages
rine is used in our cit- are not dangerous at these high frequen-
ies to disinfect drink- cies, while at 50 Hz these high voltages
ing water supply. It is are quite dangerous.
highly carcinogenic be- Commercial ozone generators make
cause when it comes use of mains 50Hz frequency and are
into contact with rem- thus very dangerous while assembling.
nants of pesticides in Extreme care is required to be exercised
our foodstuff (veg- by the user while diagnosing any prob-
etables), it generate lem with such apparatus. Ozone genera-
Fig. 1: Airflow through cylindrical space of discharge tube halomethanes, which tor at the higher frequencies used here

Fig. 2: Schematic Diagram of portable ozone

88
 C O N S T R U C T I O N

Fig. 3: Actual-size, single-sided PCB layout

Fig. 4: Component layout for the PCB

89
 C O N S T R U C T I O N

was also noticed. MOSFETs during the leading edges of

the square wave.
The 15-ohm resistor R11 and switch-
The circuit ing diode D9 (1N914) are needed to pre-
Pulse generator. A simple pulse gen- vent any negative signal input ot the
erator is realised using two CMOS inte- power MOSFET IRF840 gate. The power
grated circuits. The CD4069 is a hex MOSFET is a boon to switch-mode cir-
buffer, while CD4011 is a quad NAND cuit operation. It looks like te 5V regula-
gate. Two of the 4069 gates are used to tor 7805 in TO-220 package, with which
generate 15-20 kHz pulses. The fre- everyone is familiar. It needs a small
quency of this oscillator can be varied by aluminium heat-sink
10-Kilo-ohm preset VR1 on the board. The drain of the MOSFET is connected
The width of the pulse can also be ad- in series with a 33-ohm, 10-watt
Metering circuit
justed using preset VR2, but it is left at wirewound resistor (replaced by EFY Lab
is more efficient and silent in its dis- 33 per cent duty cycle. The circuit uses with 2 x 47-ohm, 10W resistors R13 and
charge. One can easily assemble this por- an RC (resistance-capacitance) feedback R14, in parallel). It is then connected to
table ozone generator in a plastic for generation of the square-wave oscil- EHT primary winding of the ferrite core
breadbox (used for storing one full bread), lations. The 330pF capacitor C1 used line output transformer (LOT)-also re-
which is all insulated(with no exposed here charges during one-half cycle ferred to as EHT transformer. Switching
metal parts) The cost of making a simple through the 110-ohm resistor R3 and diode BA159 is also placed in series with
unit is much less than Rs 1,000. the 1-kilo-ohm width-setting variable the primary, as shown in Fig. 2. The sup-
The air pump used in this project is an resistor VR2. During the other half, ca- ply is the rectified DC voltage, which is
aquarium pump which costs less than Rs pacitor C1 discharges through 10k resis- derived form the mans voltage directly.
100. This pump works on mains and has a tor R2 and the adjustable-frequency pre- (During testing at EFY Lab, the mains
50Hz vibrator attached to a rubber bel- set VR1. Diodes D1 and D2 differentiate voltage was stepped down to 120V AC as
lows that provides a pulsating airflows between the two half cycles. mentioned earlier.) An RC series network
that provides a pulsating airflow. This air Note: In Fig. 2, the line joining resis- comprising 33kpF (3000V rating) capaci-
flows through the cylindrical space of dis- tor R1 to D1, D2, and the 3,300pF ca- tor C8 and 100-ohm (10W) resistor R12 is
charge tube as shown in Fig.1. The dis- pacitor C1 represents a joint only and is placed across drain-source terminal of the
charge tube outlet gives ozonated air. not ground. MOSFET. The source terminal of the
The circuit as shown in Fig.2 gener- The second oscillator, shown in Fig. MOSFET is directly grounded.
ates a controlled high-frequency AC volt- 2, also uses the gates from same IC Low-voltage supply. The ICs 4069
age of above 5 kV. The circuit has been CD4069. It is, however, wired using 0.1uF and 4011, and transistors T1 and T2,
designed such that all components used capacitor C2, instead of the 330pF used require a low voltage of around 12V. A
in the circuit are economical and freely in the former oscillator. The 1k potmeter separate 12V, 250mA transformer could
available from TV spares shops. VR3 in the circuit is for ozone output also be used with a rectifier bridge and
The single-sided, actual-size PCB lay- control. This control is brought out, as filter capacitor to derive the necessary
out for the complete circuit and its shown in Fig. 8, for slightly varying the voltage. But, in this compact design, the
component layout are shown in Figs 3 ozone output. This control is brought same is derived from mains using a ca-
and 4 respectively. The entire assembly out, as shown in Fig. 8, for slightly vary- pacitor and diode pair. The mains supply,
of the unit-including the air pump, dis- ing the ozone output. This second oscil- through the series limiting resistor of 82-
charge tube, circuit board, and the fuse- lator works at around 2 kHz. Therefore ohm, 1W (replaced at EFY Lab, with a 10-
can be comfortably fitted within th when the outputs of the two oscillators kilo-ohm, 10W resistor R8) sends a cur-
breadbox, as shown in Fig.8. Because of are combined using the NAND gate N6 rent via 0.47uF, 400V polyester capacitor
this compact packaging, no mains trans- of CD4011 (IC2) and inverted by gate (replaced at EFY Lab with two such ca-
former (which is generally heavy) is em- N7, one gets a modulated output of high pacitors C4 and C5 in parallel) and diode
ployed. The unit should not be touched and low frequencies. Such an excitation D8 to change 100uF capacitor C6 during
after its assembly in the breadbox, nor of the discharge tube has been found to positive half cycle. Zener diode D7, with
should its lid be opened after plugging be very efficient and less heat-producing a breakdown voltage of 12V, limits the
into the mains. as compared to a plain high-frequency voltage across capacitor C6 to 12V. Diode
Lab note: During practical testing or a plain low-frequency excitation. D6 provides an easy path during nega-
of the circuit at EFY Lab, an auto-trans- The output pulse train from pin 11 of tive half cycle of the AC input. The stable
former for stepping down the mains volt- the CD4011 gate N7, which is of the 12V DC supply developed across capaci-
age to about 120V AC had to be used to same polarity after the second inversion tor C6 is used for the ICs and transistors
avoid build-up of excessively high volt- (first inversion takes place in gate N6), 2N2222 and 2N2907.
age-greater than 30 kV peak. At AC in- is sent through the pair of complemen- Ferrite-core transformer. The fer-
put voltage greater than 160V (RMS), tary transistors T1 and T2 (2N2222 and rite core transformer used here is the
overheating of resistors (parallel combi- 2N2907, respectively). These two buffer commonly available B&W television
nation of resistors R13 and R14) in se- the signal for giving adequate charging transformer, known as LOT (line output
ries with the primary of EHT winding current to drive the gate capacitance of transformer). AT2070 type used int he

90
 C O N S T R U C T I O N

circuit has a high-voltage winding for small cut made int he box with drill and PARTS LIST
the EHT of the picture tube. This EHT is fret saw. Semiconductors:
connected to the electrode (aluminium The meter has a top which can be IC1 (N1-N5) - CD4069 hex inverter
foil) of the ozone discharge tube. easily removed and replaced, as it is IC2 (N6-N7) - CD4011 quad 2-input
The LOT used should be two-limb snug fit. Removal of the meter top ex- Nand gate
T1 - 2N2222 np transistor
type, i.e, the low-voltage windings should poses the meter scale, which can be re- T2 - 2N2907 pnp transistor
be on the left limb of the ferrite core, and drawn in per cent of 0-1 gm/hour O3. T3 - IRF840 n-channel
the EHT winding (primary and second- The meter shows the discharge cur- MOSFET
D1-D4, D9 - 1N914 detector diode
ary), which is generally epoxy potted, on rent through the ozone-generating tube
D5-D6, D8, D11 - 1N4007 rectifier diode
the right limb. The LOT should have an The earth side of the discharge tube D10 - BA159 switching diode
external EHT diode and not an inter- (aluminium tube) is connected through D7 - 12V, 1W zener
nally wired EHT diode, as is common in a 1-kilo-ohm, 1W resistor to ground. The D12 - 1N4001 rectifier diode
D13 - Green LED
colour television LOTs. The reason be- EHT wire is connected to the electrode
ing that only AC voltage is needed here. Resistors (all 1/4-watt, +_ 5% carbon,
(aluminium foil) on top of the glass tube
unless stated otherwise):
Further, it is necessary to remove any The 1-kilo-ohm resistor develops a volt- R1, R4 - 100-kilo-ohm
coupling between the two limbs, which age in approximate proportion to the R2, R6, R10 - 10-kilo-ohm
may be present in the LOT windings. A ozone that would have been generated. R3 - 110-ohm
R5, R15, R17 - 1-kilo-ohm
connection from the left limb to the right A series combination of 4.7-kilo0-ohm R7 - 2.2-ohm, 10 watt fusible
limb is used to increase the mutual cou- resistor and a diode (1N4001) supply resistor
pling. In the circuit presented here that current to the meter coil. R8 - 10-kilo-ohm, 10-watt
coupling leads to over-currents in the LED indicator (Fig. 6). The indica- R9 - 6.8-kilo-oh,m
R11 - 15-ohm
event of any discharge tube sparking, tor LED on panel gets its current through R12 - 100-ohm, 10-watt
thereby damaging the IRF840 instantly. a single turn wound on the top limb of the R13, R14 - 47-ohm, 10-watt
It is therefore necessary to cut off the ferrite transformer. The current is recti- fusible resistor
connection linking the two limb windings fied by a 1N4003 diode and filtered by a R16 - 4.7-kilo-ohm
VR1 - 10-kilo-ohm preset
before installation. Preferably, a 1,00- 10uF, 16V capacitor which supplies the VR2 - 1-kilo-ohm preset
ohm, 2#W resistor may be wired in the current through 1-kilo-ohm series resis- VR3 - 1-kilo-ohm potmeter
place of this cut, if an improved perfor- tor to the LED. The glowing of the LED Capacitors:
mance of ozone generation is desired. indicates that the circuit is working. C1 - 3300pF ceramic disk
Lab. note. During testing of EFY Lab. Note: At EFY Lab, about eight C2, C7 - 0.1uF ceramic disk
C3 - 100p, 400V electrolytic
Lab, transformer stamped as LOT 2070 turns of insulated wire around top limb
C4, C5 - 0.47uF, 400V polyster
obtained from the market was found to of LOT were used. C6 - 100uF, 35V electrolytic
be single limbed and could generate about AC input. The AC mains supply is C8 - 3.3 kpF, 300V polyster/
34kV peak voltage at 120V AC input. at 230V AC and has a fuse of 500 mA in mica
C9 - 10u, 16V electrolytic
Therefore a double-limbed Leader brand series. A switch can be wired in series
transformer 2095 was procured and used Misellaneous:
with the same, though the same is not
X1 - LOT 2070 EHT
after removal of the encased TV20 recti- shown in the circuit here. (Please note transformer (without
fier diode, in a manner exactly as de- that at EFY, 12V AC input was used as EHT diode) or Leader
scribed by the authors. This transformer mentioned earlier.) brand LOT 2095 (diode
could produce about 30kV peak with AC to be removed)
- Al tube, length=20cm,
input of 120V. The corona discharge
across EHT secondary was prominent
Testing diameter=1cm
- Glass tube, length =
with an air-gap of up to 125 cm. At only Prior to operation of the circuit board 17cm, diameter=1.2cm
80V AC input to the circuit, 100pA space for ozone generation, it is required to - HT electrode
- Aluminium full
current was measured using the meter- test the circuit properly. This can be - M-seal, small packet
ing circuit described below. done as follows: - Teflon tape, two rols
The metering circuit (Fig. 5). This 1. The low-voltage pulse generation - Cork, two numbers
- VU meter
employs a simple low-cost 100uA meter part has to be tested first. For this, in - Short glass tube
used as VU-meter in audio amplifiers place of the mains-derived 12-volt sup- - 1.5cm length, dia=5
and is freely available. Either the edge- ply, a separate 12V supply, derived using mm, 2 numbers
mounting type or the plain type may be an external 12-0-12 volts, 1-amp trans- - Flexible polythene
pipe 5mm diameterm,
used. It has a former, and a 7812 voltage regulator, can one metre length
clear front be used. The two oscillators should have - Aquarium pump
plastic case of frequencies in the specified range and F1 - Fuse, 500mA :
DC IN socket
25 sq. cm which the presets should be able to adjust them
is easily over the range mentioned. Otherwise, 2. Then, using a CRO, the pulse train
mounted on the slight alteration of resistor values may should be observed at the junction of two
front side of the be needed. The 3300pF capacitor used bipolar transistors. Next, MOSFET IRF
Fig. 6: LED indicator plastic box, should be of good ceramic or polyester 840 is connected in the circuit.
circuit with a suitable type, with a rating of 100V or more. 3. Now apply 12V supply to the end

91
 C O N S T R U C T I O N

of the LOT winding, in place of the mains R14, rated 10W, got red-hot if voltage rotated over a gas burner to soften the
rectified 200V DC, as shown in Fig. 2. was increased beyond 160 V AC. ends of the tube. It should now be made
For testing, one is not required to use Construction of the discharge tube chamfered on to the metal tube, such
230V directly at all. The same in Fig. 2. (Fig. 7). A simple method for construct- that, at the edges, the glass tube fits the
For testing, one is not required to use ing the discharge tube is presented here, metal tube with no gap. Still, the glass
230V directly at all. The same 12V, or which is suitable for any hobbyist. An tube should be able to slide over the
the unregulated 12V prior to the 7812 aluminium tube of 20cm length and about aluminium tube.
regulator, can be connected. In Fig. 2, 1cm diameter is taken. Antenna scrap After the glass tube is so positioned
the BA159 anode is shown connected to tube can be used, provided the same does over the metal tube, the ends of the
the mains rectified supply at the posi- not have kinks, bends, or burrs. Fig. 7 glass tube are taped using Teflon tape.
tive terminal of the 100uF, 400V electro- shows the construction of the discharge The tube assembly, with the glass enve-
lytic capacitor. But, for the present, con- tube. This aluminium tube is blocked on lope taped, is held at its edge, leaving
nect the unregulated 12V (may be 16V the inside with a small amount of M-seal about 15 cm free at either end, and
or slightly more) to the circuit at the compound, so that no air can pass di- clamped to the wall of the plastic box, as
anode of BA159. rectly through its middle hole. shown in Fig. 8. Clamps meant for TV
4. After switching 'on' the supply, M-seal comes in a pack of two parts. antennae, which are made of plastic
observe the voltage on the EHT wind- The sealing compound is prepared as mouldings, can be used for this purpose.
ing, which comes from the LOT, on a DC and when required, bu taking equal quan- Preparation of the hot electrode.
multimeter kept at its maximum range tities of the two and mixing them to- The hot electrode, to which a voltage
(say, 500 or 1,000V DC). The meter gether throughly. One of the compounds greater than 6,000 volts is applied at
should show a deflection of above 500V. is black and the other is of cream colour. high frequency, is made by closely wrap-
5. The presets in the circuit can be The two are taken, each about 1 cc, and ping plain aluminium foil around the
adjusted to tune the ferrite transformer, then mixed will. This mixture is inserted outer side of the glass tube. The foil is
for this voltage to be a maximum. Then, into the tube with a pencil and spread to wrapped leaving 1 cm uncovered area on
adjust the 1-kilo-ohm potentiometer VR3 attach to the inside wall of the aluminium either ends of the tube. The foil is to be
so that it shows the possibility of vary- tube, blocking any air path. Then, two taped for tightness on the outer glass,
ing the voltage over a limited range, side holes of 2mm diameter are made on using cellulose tape, and a piece of Teflon-
above a threshold value. the tube at the two ends, about 33 cm insulated wire connected to the alu-
6. Now, the 12V transformer supply from each end. These holes can be on the minium foil brought out. This wire is
can be disconnected. The 12V low-voltage opposite faces of the aluminium tube. connected to the EHT lead from the LOT
generation part has to be separately To provide the discharge gap, a on the circuit board.
tested. For this, remove the connection to thinwalled glass tube, commonly used as Assembling the unit. The unit is
the LOT from the MOSFET. Also remove chemistry test tube, is required. It should easy to assemble. First, the circuit board
the CMOS ICs from sockets. Then, on the have an inner diameter about 1.2-1.5 mm is fixed on the bottom of the box with
PCB, one can easily check for zener volt- greater than thet of the aluminium tube, plastic bushes and screws. If screws are
age of 12V. If this voltage is less than 12 i.e., if a 10mm outer dia aluminium tube not needed externally, the bushes can be
volts, adjust the value of 82-ohm series is taken, a glass tube of 11.5 mm inner pasted on to the box. Then, clamps are
resistor to a lesser value, say, 68-ohm. diameter should be used. This will en- fixed for discharge tube. Polythene tubes
Lab. note. At EFY, this part of the sure the best performance with an air (transparent plastic) are fitted to the
circuit has been modified, and it is pos- gap of 0.75 mm all around. If the gap is 0.6 glass tube ends.
sible to get correct 12V output at AC mm, it is still better, but then the metal At the bottom of box, the air pump,
input voltage of 120 volts. Only the modi- tube should be extremely perfect. with its outer plastic casing removed, is
fied circuit is included in Fig. 2. The glass tube is cut such that it fixed to the bottom with a screw. The
The circuit will ordinarily work even covers the length of the aluminium tube, inside of the diaphragm pump is shown
at 200-volt mains, but not below that. except for about 1.5 cm at each end. in Fig. 8. The casing of the pump is not
The mains input can go up to 240V, but Thus if a 20cm long aluminium tube is needed for two reasons: to save space
not more. taken, the glass tube will be 17 cm long. needed for fixing it within the bread box,
Lab note. During testing it was ob- The metal tube should be able to go and the vibrator part is now accessible.
served that fusible resistors R13 and freely in it Now, the glass tube may be A small plastic sheet is fixed by applying
glue (Araldite) to
the vibrating ar-
mature, so that it
serves as a
simple fan for the
inside. The mains
supply is con-
nected to the
PCB in parallel
with the supply
Fig. 7: Construction details of discharge tube to the air-pump.

92
 C O N S T R U C T I O N

But now this connection is removed and known quantity of KI solution and bubble put of 120V AC after changing some of
only the pump is made to work. the ozonated air from ozone generator the component values, including LOT,
The end of the aquarium air-pump, through it, for a definite time (one at EFY Lab. The changed components/
which produces air under pressure, is minute). The free liberated iodine can be values have been incorporated into the
connected by a s short length of tube to estimated by titration experiment with final circuit shown in Fig. 2. Since higher
the corked glass tube of the discharge thiosulphate. Thus, by knowing how AC voltage (greater than 20 kV) was
tube assembly. The other end of the tube much iodine has been liberated, one can available, we could increase the separa-
is fixed to another similar polythene tube find how much ozone has been absorbed tion between the aluminium and glass
of adequate length (say, one metre). in the solution by quantitative analysis. tubes appreciably.
Now, after allowing the air-pump to This gives the gas output form the tube 1. Water disinfection. The impure
work, one must check whether there is in mg/litre. The gas output can be foud water can be disinfected by bubbling
adequate draft of air through the tube by finding the time taken to replace the ozone through it for a time so that esti-
connected to the air-pump, without any 1 litre of water by the bubbling gas. mated 4 mg/litre is dissolved.
leakage. Any air leakage prior to tube After estimating the output of the unit, 2. Air purification. You can purify
entry or through the Teflon tape seals, marks are made on the meter. This is a the air of your room by letting out
or through the inner metal tube, can be prototype marking which can be followed ozonated air upward into it for five min-
easily detected with figers or soap bubble in other units of similar design. utes, with a fan running.
test. The leaks have to be plugged 3. Mosquito repulsion. Same as
and all air that comes out of the pump above, but please shut the windows soon
should go through the annular gap of the
Usage after switching 'off' the ozone generator.
discharge path and exit through the out- The unit can be used where a 230V AC This operation is to be done in he morn-
let tube. mains supply outlet is available. The ozone ing to drive away the mosquitoes and in
After this check, the meter connec- generated can be let into air or bubbled the early evening at around 5 pm to
tion is made from the board's 1-kilo-ohm through the solution or water being prevent them from coming in. The opera-
shunt discharge resistor R15, with se- treated using ceramic diffusers (available tion may be repeated at midnight when
ries diode D11 and current limiting re- from aquarium equipment shops). The malaria mosquitoes normally attack.
sistor R16. The meter is fixed, as stated time rating of this unit is very short. Sine 4. Bleaching. The stains of ink on
earlier, to the from small edge of the there is no fan employed for cooling, both clothes can be bleached by applying ozone
box, which also accommodates the LED the discharge tube and circuit board tran- gas. On bubbling ozone into the diluted
and ozone output control potmeter. The sistor may quickly heat up The tested ink contained in a test tube, the water
LED is wired along with diode D12, re- rating at ambient temperature of 25o Cis becomes clear within a short time.
sistor R17, and capacitor C9 as shown in 5 minutes.. This tim is sufficient for all 5. Pollutant treatment. Ozone in
Fig. 6. the applications described below. large quantities can be used for treating
The lid, on the outside, may be pasted Lab note: The circuit could be con- polluted water in industry, along with
with the warnign label: “DANGER—DO tinuously kept 'on' with reduced AC in- bacterial treatment. The BOD (biologi-
NOT OPEN WHEN IN USE”. cal oxygen demand) can be
After the whole assembly is checked brought down to 30 with
and mains supply is given, one can watch ozone only.
the meter reading and green LED on the 6. Mouth washing.
panel. The glowing LED indicates that You may ozonate 200 cc of
the circuit, along with LOT, is working water and use it for gar-
and the meter shows that the there is a gling.
discharge. The sound of the air-pump 7. Vegetable clean.
wil be heard of course, but one can also Only ozonated water
hear the hissing corona sound distinctly. should be used for cleaning
If lights are 'off', a blue glow may also be vegetables like cabbage, to-
seen on watching from the end of the matoes, and carrot. Chlori-
glass. A smell like that of rotten fish nated water is harmful.
from the tube indicates presence of ozone. 8. Skin wound heal-
The meter reading needs calibration now. ing. An exposure to the
ozone gas quickly heals
skin wounds and rashes.
Calibration You may apply ozonated
There are two ways ot do the calibra- olive oil to speed up heal-
tion. One is by using an ozone gas ing.
analyser, which is an expensive instru- There are may other
ment. So, the other method, which is uses of ozone which one can
economical, is described here. try. The gas should not,
Potassium iodide (KI) solution is con- however, be inhaled di-
verted to iodine gas by ozone. Taken a Fig. 8: Photograph of author’s prototype rectly, continuously. G

93
 C O N S T R U C T I O N

the unit digit (DIS.1) and tens digit

CONFERENCE TIMER S.C. DWIVEDI

(DIS.2) both become zero. At this junc-
ture, the timer stops decrementing fur-
ther and an interrupted beep sound is
heard from the buzzer, indicating that
K. UDHAYA KUMARAN VU3GTH
the time allotted to the particular
speaker is over.

D
uring a conference where speak- tactile switches S2 and S3, with slide In this circuit, IC5 (CD4060B, a 14-
ers are allotted different time switch S1 in 'set' position. Once the time stage binary counter with internal os-
slots for completing their duration is preset, the same is displayed cillator) is used for generation of the
speech, it is essential to use a suitable in 7-segment LED displays (DIS.1 and basic timing pulses. Presets VR1 and
conference timer which could be pro- DIS.2). VR2 are required to be adjusted for ob-
grammed for the given time slot. It As soon as the designated speaker taining approximately 1 Hz (1.0666 Hz,
should not only provide indication as to starts speaking, switch S1 is flipped to be more precise) pulses from pin 7
when the allotted time slot. It should from 'set' position to 'start' position. The (Q4) of IC5, while the pulses from pin
not only provide indication as to when displayed time will start decrementing 15 (Q10) are available at the rate of one
the allotted time is over, but also about once a minute until it becomes 00, i.e pulse per minute. For countdown timer
the leftover time at any given instant.
The conference timer presented here is
designed to incorporate all such facili-
ties and is expected to prove quite use-
ful.
This conference timer is just a 2-
digit (minutes) countdown timer which
can be preset from 01 minute to 99 min-
utes. The time duration is preset using

PARTS LIST
Semiconductors:
IC1, IC2 - CD4511B, BCD-to-7-
segment latch/decoder/
driver
IC3,IC4 - CD4510 BCD up/down
counter
IC5 - 4060B 14-stage counter/
divider/oscillator
T1-T4 - BC547 npn transistor
T5 - SL100 npn transistor
D1-D8 - 1N4007 rectifier diode
D9 - 5.1V zener
LED1 - Red LED
DIS1, DIS2 - LTS543 common-
cathode display
Resistors (all 1/4-watt, +_5% carbon, unless
stated otherwise):
R1-R14 - 470-ohm
R16-R18
R24, R28, R31 - 100-kilo-ohm
R19 - 100 ohm
R20, R27 - 33-kilo-ohm
R22, R23 - 10-kilo-ohm
R25, R30 - 22-kilo-ohm
R29 - 22-kilo-ohm
R26 - 470-ohm
VR1 - 50-kilo-ohm preset
VR2 - 1-mega-ohm preset
Capacitors:
C1 - 180pF ceramic disk
C2 - 47pF, 25V electrolytic
C3 - 001uF ceramic disk
C4 - 0047uF ceramic disk
Miscellaneous:
RL1 - Relay 6G, 100-ohm
S1 - DPDT slide switch
S2, S3 - Tactile switch
S4 - SPDT slide switch
PB - Piezo buzzer
Fig. 1: Circuit diagram of conference timer

94
 C O N S T R U C T I O N

(CD4510B). They convert the ference timer while its down counting
BCD code to 7-segment posi- mode is used for normal timer opera-
tive logic output code to dis- tion.
play the equivalent decimal When presetting, the carry 'pout' pin
digits. While displaying deci- 7 of IC3 and carry 'in' pin 5 of IC4 are
mal digits 9 and 6, their tails not cascaded, to permit presetting of
are not displayed. The store tens and units digits independently (us-
function available in these ICs ing push-to-on tactile switches S2 and
is not used in this circuit and S3, respectively). In countdown mode
hence the store pin 5 of IC1 carry 'out' pin 7 of IC3 and carry 'in'
and IC2 is made permanently pin 5 of IC4 are cascaded for 2-digit
Fig. 2: Appliance ‘on/off’ switching application for timer low. countdown timer operation. For preset-
ting function, 1Hz (approx.) pulses
are used, while for normal cas-
caded countdown operation of the
timer, pulse rate of one-pulse-per-
minute is used. As stated earlier,
these two types of pulses are
available from pins 7 and 15, re-
spectively, of IC5.
Transistor T2 is used to stop
or activate the IC5 binary
counter. When transistor T2 is in
'cut-off'' state, its collector volt-
age goes 'high'. As a result, the
positive supply rail is extended
to pin 11 of IC5 via resistor R23
and diode D6 to stop IC5 from
counting further. When transis-
tor T2 conducts, its collector volt-
age goes low and counter IC5 be-
comes active. The stop and run
functions of IC5 binary counter
are used during countdown opera-
tion only. While presetting, the
IC4 binary counter will be in run-
ning condition.
When slide switch S1 is slided
to 'set' position, pin 10 of both IC3
and IC4 is taken 'high' to select
the countup mode for presetting
th timer. As the same time, tran-
sistor T12 gets forward biased and
conducts. As a result, its collec-
tor as well as pin 5 of IC4 go 'low'.
Pin 5 of IC3 is permanently low
Fig. 3: Actual-size, single-sided PCB layout Fig. 4: Component layout for the PCB and both these ICs are not cas-
caded. The one-pulse-per-minute
operation, this pulse (one-per-minute) CD4510B is a divided-by-10 BCD up/ (from pin 15 of IC5) is no longer avail-
is simultaneously applied to pin 15 of down counter. This counter increments able to diode D3-D4 junction, while 1Hz
IC3 and IC4 through switch S1 (in start or decrements by one count for every pulse (available from pin 7 of IC5 ) may
position), and diodes D3 and D4. For low-to-high transition of the clock pulse be applied to hte clock input in 15 of
presetting this timer, bounceless pulses applied to its clock pin15, depending on IC3 or IC4 by pressing the respective
are required at clock pin 15 of both IC3 the logic level at its pin 10. Thus, when tactile switches S2 and S3. For preset-
and IC4. For this reason 1Hz pin 10 of IC3 and IC4 are held high, the ting the timer, depress tactile switch
(bounceless) pulses available from pin 7 counters increment by one count for ev- S2 and S3 until desired count is dis-
of IC5 are used to preset the timer. ery clock pulse, and when they are held played in unt and tens digit (DIS.1 and
IC1 and IC2 (CD4511B), 7-segment low, the counters decrement by one DIS.2). When desired digit has been dis-
latch and driver, accept BCD input code count for every clock pulse. The up played in DIS.1 or DIS.2, immediately
from up/down counters IC3 and IC4 counting mode is used to preset the con- release switch S2 and S3, as the case

95
 C O N S T R U C T I O N

may be. Due to conduction of diode D7, pin 15 of both ICs (IC3 and IC4) through disturbance in timer setting.
transistor T2 will be ‘on’ state and thus diodes D3 and D4. Now the digits dis- This circuit, apart from using as a
binary counter (IC5) is in runing played in DIS.1-DIS.2 combination start conference timer, may be converted into
condingion. At the same time, ‘auto re- decrementing once every minute. When programmable 2-digit 'on' or 'off' timer
set’ transistor T4 will also be in ‘on’ digits displayed in DIS.1-DIS.2 become to switch 'on'/'off' any electrical or elec-
state, with its collector pulled low. Thus, '00', carry 'out' pin 7 of both IC3 and tronic appliance after 1 minute to 99
IC5 will continue to operate normally. IC4goes 'low' and transistor T2 does not minutes duration by incorporating ad-
When slide switch S1 is slided from conduct. As a result, collector of tran- ditional add-on circuit shown in Fig.2.
‘set’ position to ‘start’ position, the red sistor T2 goes 'high' and the binary During 'on'/off timer operation, the dig-
LED1 immediately glows. Transistor T4 counter stops counting. Simultaneously, its displayed in DIS.1-DIS.2 help one to
goes to 'cut-off' and its collector tran- transistor T3 conducts and activates the know the exact leftover time to switch
sits from 'low' to 'high' state. The high- buzzer (functioning in interrupted ‘on’ ‘off’ the appliance. When using this
going spike is coupled through capaci- mode). Thus, interrupted beep sound is circuit as ‘off’ timer, slide switch S4 to
tor C3 to reset pin 12 of IC5. Thus, IC5 heard from the buzzer, indicating that ‘off’ position and, for ‘on’ timer opera-
is reset and starts counting from begin- preset time duration has ended. Pin 7 tion, slide switch S4 to 'on' position.
ning. During this operation, pin 10 of of both IC3 and IC4 goes 'low' during When displayed digits become '00', the
both IC3 ad IC4 are held low to select display of digits '00' in DIS.1 and DIS.2 relay will be energised to turn 'on'/'off'
countdown mode of operation. Transis- During display of any digits other than the load.
tor T1 goes to 'cut-off' state. Thus carry '00', the carry 'out' pin 7 of either IC3 The actual-size, single-sided PCB for
'out' pin 7 of IC3 and carry 'in' pin 5 of or IC4 will be high or both may be 'high'. the circuit in Fig.1 is shown in Fig. 3,
IC4 are cascaded through resistor R16. When the timer is in countdown mode, while its component layout is given in
The one-pulse-per-minute is applied to do not press switch S2 or S3 to avoid Fig. 4. G

96
 C I RC ICR CUUII T
T I D E A S
IDEAS
counter IC. Since only one of its out-
puts is high at any instant, only one

ADD-ON STEREO CHANNEL

switch will be closed at a time. IC
CD4017 is configured as a 4-bit ring
counter by connecting the fifth output

SELECTOR
Q4 (pin 10) to the reset pin. Capacitor
RUPANJANA
C5 in conjunction with resistor R6 forms
a power-on-reset circuit for IC2, so that
on initial switching ‘on’ of the power
supply, output Q0 (pin 3) is always
PRABHASH K.P.
‘high’. The clock signal to CD4017 is pro-
vided by IC1 (NE555) which acts as an

T
he add-on circuit presented here channel A is selected, the audio from astable multivibrator when transistor
is useful for stereo systems. This the tape recorder will be present at the T1 is in cut-off state.
circuit has provision for connect- output. After the tape is played com- IC5 (KA2281) is used here for not
ing stereo outputs from four different pletely, or if there is sufficient pause only indicating the audio levels of the
sources/channels as inputs and only one between consecutive recordings, the cir- selected stereo channel, but also for for-
of them is selected/ connected to the cuit automatically switches over to the ward biasing transistor T1. As soon as
output at any one time. output from the radio receiver. To a specific threshold audio level is de-
When power supply is turned ‘on’, manually skip over from one (selected) tected in a selected channel, pin 7 and/
channel A (A2 and A1) is selected. If no active channel, simply push the skip or pin 10 of IC5 goes ‘low’. This low
audio is present in channel A, the cir- switch (S1) momentarily once or more, level is coupled to the base of transistor
cuit waits for some time and then se- until the desired channel inputs gets T1, through diode-resistor combination
lects the next channel (channel B), This selected. The selected channel (A, B, C, of D2-R1/D3-R22. As a result, transis-
search operation continues until it de- or D) is indicated by the glowing of cor- tor T1 conducts and causes output of
tects audio signal in one of the chan- responding LED (LED11, LED12, IC1 to remain ‘low’ (disabled) as long as
nels. The inter-channel wait or delay LED13, or LED14 respectively). the selected channel output exceeds the
time can be adjusted with the help of IC CD4066 contains four analogue preset audio threshold level.
preset VR1. If still longer time is switches. These switches are connected Presets VR2 and VR3 have been in-
needed, one may replace capacitor C1 to four separate channels. For stereo cluded for adjustment of individual au-
with a capacitor of higher value. operation, two similar CD4066 ICs are dio threshold levels of left stereo chan-
Suppose channel A is connected to used as shown in the circuit. These ana- nels, as desired. Once the multivibrator
a tape recorder and channel B is con- logue switches are controlled by IC action of IC1 is disabled, output of IC2
nected to a radio receiver. If initially CD4017 outputs. CD4017 is a 10-bit ring does not change further. Hence, search-

97
 C I R C U I T I D E A S

ing through the channels continues un- switch S1 is used to skip a channel even ily extended up to ten, by using addi-
til it receives an audio signal exceeding if audio is present in the selected chan- tional 4066 ICs.
the preset threshold value. The skip nel. The number of channels can be eas-

WATER TEMPERATURE
ture starts increasing above approxi-
mately 30o C, LEDs from LED1 through
LED8 of the bargraph start glowing one

CONTROLLER
after the other. When temperature is
RUPANJANA
around 30oC, only LED1 would be ‘on’.
For temperature greater than 97dig C,
all display LEDs will be ‘on’.
To detect the temperature of water,
VIJAY D. SATHE commonly used resistance-temperature
detector (RTD) PT100 is used. It is con-

T
he circuit presented here controls bargraph. When the temperature of wa- nected to one of the arms of a Wheat-
the temperature of water as well ter is 0o C, none of the bargraph dis- stone bridge as shown in the figure RTD
as indicates it on an LED play LEDs glows. But as the tempera- PT100 has a resistance of 100 ohms

98
 C I R C U I T I D E A S

when surrounding temperature is 0dig the RTD in boiling water and slightly creasing. Gradually, the buzzer goes
C. (To cater to resistance tolerances and adjust preset VR2 such that the output ‘off’, as output of IC5(d) goes ‘low’. When
calibration, resistor R6 (22-ohm) and 1- of IC3 becomes 6V. Respeat the above temperature goes below 80oC, output
kilo-ohm preset VR1 were added at EFY two steps four to five times. of IC5(b) goes ‘low’ to turn ‘off’ transis-
lab. During testing.) Ideally, at 0oC, the To control the temperature of wa- tor T1 and relay RL1. As a result, the
bridge has to be in balanced condition ter, ‘on’/’off’ type controller is used. power supply provided to relay RL2 (via
and, for other temperatures, the bridge Lower threshold point is set at 97oC. RL1 N/O contacts) is cut off and relay
will be unbalanced. The unbalanced volt- An electric heater coil is used for heat- RL2 de-energises. This will again turn
age of the bridge is converted into suit- ing the water. When power supply is ‘on’ the mains electric power supply to
able value in the range 0V to 5V (corre- switched ‘on’, the heater starts heating the heater coil. Once again, the tem-
sponding to temperatures 0oC to 100oC, the water. When temperature reaches perature of water starts increasing and
respectively) by the instrumentation 80oC, output of IC5(b) goes ‘high’. This the cycle repeats to maintain water tem-
amplifier formed by op-amps IC1 turns ‘on’ relay driver transistor T1 to perature within the limits 80oC to 97oC.
through IC3 (uA741). Output of instru- energise relay RL1. In this state, relay This controller can be used to con-
mentation amplifier is given to voltage RL2. Relay RL2 in energised state cuts trol the temperature of water in water
compactors for driving the display off power supply to the heater coil. Re- heaters, boilers, etc. The lower and up-
LEDs. lay RL2, once energised, remains so due per threshold points can be changed by
Before using this circuit, the follow- to the latching arrangement provided connecting the base terminals of tran-
ing adjustments have to be made. First, by its second pair of contacts. Simulta- sistors T1 and T2 to different output
immerse the RTD in ice water (0oC) neously, the buzzer also sounds, due to terminals of voltage comparators (IC4
and adjust preset VR1 such that the forward biasing of transistor T3. and IC5). Base terminals of transistors
bridge becomes balanced and the out- Since the supply to the heater is cut- T1 and t2 are meant for lower and up-
put of IC3 becomes )V. Next, immerse off, the temperature of water starts de- per threshold points, respectively.

EMERGENCY LIGHT S.C. DWIVEDI

RAJESH KAMBOJ

T
he circuit of emergency light pre- D1 and D2 from a full-wave rectifier, tor C2 and resistor R3. Transformer X2
sented here is unique in the and capacitor C1 filters the rectified is ferrite core type. Its winding details
sense that it is automatic, com- voltage. The output of filter is about are shown in Fig. 2. While core details
pact, reliable, low-cost, and easy to as- 12V DC, which is connected to the col- are shown in Fig. 3. Resistor R3 pro-
semble for anyone. The circuit consists lector of transistor T1 provides a fixed vides DC bias to the base of transistor
of four sections, namely, battery charg- bias of 8.2V. Thus, transistor T1 works T2, while capacitor C2 couples the posi-
ing section, inverter section, changeover as a regulator and provides a constant tive AC feed-back from winding L1 to
section, and low battery voltage indica- voltage for charging the lead-acid bat- the base of transistor T2 to sustain the
tion section. tery. LED1 indicates the charging of bat- oscillations. The AC power developed
In the battery charging section, 230V tery. across primary winding L2 is trans-
AC mains is converted to 9V AC using The inverter section comprises ferred to secondary winding L3, which
step-down transformer X1. The diodes transformer X2, transistor T2, capaci- ultimately lights up the fluorescent
tubes.
T h e
changeover
section uses
diodes D3
and D4 as an
automatic
switch. In the
presence of
AC mains
supply, diode
D3 keeps
transistor T2
in its cut-off
state, while
diode D4 pro-

99
 C I R C U I T I D E A S

T2. The inverter can be switched ‘off’,

when not required, by using ‘on/off’
switch S1.
Low battery voltage indicator cir-
cuit comprises transistor T3, senser di-
ode D6, LED 2, variable resistor VR1,
and resistors R4 through R6. The
low battery indication can be adjusted
from 4.7V to 5V by using variable re-
sistor VR1. When the battery voltage
is above 4.7V, zener diode D6 comes
out of conduction, keeping transistor
T3 at cut-off level. At the same time,
supply, diode D4 is reverse biased and LED2 gives the indication of low bat-
acts as an ‘off’ switch, inhibiting tery volt-age.
vides DC path for charging of the bat- the conduction of diode D3, which al- The whole circuit can be assembled
tery. But, in the absence of AC mains lows normal functioning of transistor in a cabinet of emergency light suitably.

PARALLEL TELEPHONES S.C. DWIVEDI

WITH SECRECY
to the line.
MANUJ PAUL To receive a call at an end where
the instrument is not connected to

O
ften a need arises for connec- the line, you just have to flip the
tion of two telephone instru- toggle switch at your end to re-
ments in parallel to one line. ceive the call, and act as usual to
But it creates quite a few problems in have a conversation. As soon as the
their proper performance, such as over position of the toggle switch is
loading and overhearing of the conver- changed, the line gets transferred
sation by an undesired person. In order to the other telephone instrument.
to eliminate all such problems and get Mount one DPDT toggle switch,
a clear reception, a simple scheme is one telephone ringer, and one tele-
presented here (Fig. 1). phone terminal box on two wooden
This system will enable the incom- electrical switchboards, as shown in
ing ring to be heard at both the ends. Fig. 3. Interconnect the boards us-
The DPDT switch, installed with each ing a 4-pair telephone cable as per
of the par- Fig. 1. The
allel tele- system is
phones, ready to
connects use. Ensure
you to the that the two
line in one lower leads
position of of switch S2
the switch are con-
and discon- nected to
nects you in switch S1
the other after rever-
position of sal, as
the switch. shown in
At any one the figure.
time, only L a b .
one tele- Note: The external ringer for the project
phone is as shown in Fig. 2., was designed/fab-
connected ricated at EFY Lab.

100
 C I R C U I T I D E A S

a small cabinet. Tone can be adjusted

S.C. DWIVEDI with the help of preset VR1. Before
power is switched 'on' , it is advisable
to adjust VR1 to approximately 5 kilo-
C.K. SUNITH
ohm, that is, at the centre of the full

T
he circuit described her is dif-
ferent form conventional door
bell circuits in the sense that it
can produce two different tones-one of
a lower frequency and the other of a
much higher frequency.
The circuit uses a timer IC 555,
which has been wired in free-running
mode. When switch S1 is depressed, the
circuit oscillates at around 1.5 kHz, re-
sulting in a higher frequency note. When
switch S2 is depressed, transistor T1 is
turned 'on' and thus it shunts resistor
R2 across capacitor C2. As a result, the
circuit now oscillates at approximately
150 Hz and a tone of much lower fre-
quency is generated.
The circuit can be conveniently em-
ployed as a doorbell for two separate near the re-spective doors. range of potentiometer VR1. A trimpot
doors at the same floor level. Doorbell The circuit can be assembled on a can be used as VR1 for convenience of
switches S1 and S2 can be mounted general-purpose PCB and housed inside assembly.

PRADEEP G. S.C. DWIVEDI

A
major drawback of some pest transformer X1. Transformer X1 is wound SWG while secondary winding comprises
repellers is that their power out- over ferrite core (UU or CC core). Pri- 40 turns of 24 SWG wire. Adjust potenti-
put is low and hence their effec- mary winding consists of 150 turns of 28 ometer VR1 for maximum effectiveness.
tiveness suffers. The pest repeller cir-
cuit described here generates powerful
ultrasonic signals to repel pests. In ad-
dition to the ultrasonic frequency oscil-
lator, separate push-pull power ampli-
fier and transformer are used to boost
ultrasonic signals.
Ultrasonic frequency oscillator is 2
built around IC CD4047, which provides
complementary outputs. These comple-
mentary outputs are amplified by tran-
sistors T1 and T2 (BD139) to drive
transistorised push-pull power amplifier
stage comprising power transistors T3
and T4 (2N3055).
The output of the power amplifier is
coupled to a tweeter, through output

101
July

2000
 CONSTRUCTION

BUILD YOUR OWN C-BAND which supports the entire dish.

(b) The parabolic reflector.

SATELLITE TV RECEIVER
(c) The electromechanical arrange-
ment to move the dish in the horizontal
S.C. DWIVEDI
and vertical planes to track the satellite.
(This arrangement is generally used in a
S. DAS GUPTA dish of 3.7 metre and above sizes.)
(d) LNB mounting arrangement.
Base structure should be strong

S
atellite TV reception has gained covered by a satellite downlink antenna) enough to withstand the entire load of
much popularity in India over measured in terms of effective isotropic the dish. To withstand the wind load dur-
the last three decades, specially af-
ter the live telecasting of the Gulf
war by CNN. Both the S-band and C-band
satellite signals are available to India.
C-band signals are beamed from various
satellites like Asiasat, Aralisat, and
Insat 2B.
In India, the C-band reception is much
more popular compared to the S-band.
The popular satellite programmes which
can be received on C-band include Star
TV, Zee TV, PTV2, CNN, ATN, Sun TV,
and Doordarshan. Besides, programmes
from Russia, China, France, and Saudi
Arabia are also available on C-band chan-
nels, although their language is a bar-
rier.

Fig. 1: Footprint of Star TV (Southern)

Fundamentals of C-band reception
You are aware that to receive any satel- radiated ing heavy wind or storms, the base struc-
lite signals, a dish antenna is required. p o w e r ture should be firmly grounded in con-
The mechanical aspects and the dish-ori- (EIRP) in crete.
entation principles to receive satellite sig- dBW (deci- The parabolic reflector. It is the most
nals in S-band and C-band remain basi- bels w.r.t. important part of the dish. The reflector
cally the same. The C-band downlink fre- one watt) of
quencies range from 3.7 GHz to 4.2 GHz Fig. 2: Feed horn Asiasat sat- TABLE I
The direct reception system comprises: ellite (transmitting Star TV programmes) Relationship between F/d and X
(i) Dish antenna over India is given in Fig.1. Star TV rec- F/d X (mm)
(ii) LNB (low-noise block converter) ommends the following sizes of dish an- 0.42 0
and feed horn assembly. tennae for various regions: 0.40 5
(iii) Satellite receiver. 0.38 10
Personal Cable distribution 0.36 15
Dish antenna: There are different
receiving system 0.34 20
types of dish antennae (e.g. fibre and
system
mesh) available in various sizes ranging TABLE II
from 1.8 metres to 4.8 metres. The size of Delhi 1.8 mtr 3.0 mtr
Mumbai 2.0 mtr 3.0 mtr Specification of the DBS tuner
the dish is dependent on the size of the with FM demodulator
distribution network and the strength of Calcutta 3.0 mtr 4.8 mtr
Receiving frequency 950 MHz to 1750 MHz
the signal. Chennai 3.7 mtr 6.0 mtr Input impedance 75-ohm
The area where the signal is weak In order to maintain optimum carrier- IF 479-5 MHz
Channel select (SY) By electronic tuning
requires a large dish, and vice-versa. The to-noise ratio (C/N ratio), a larger size of
ODU supply in-and-out 18-25V DC
strength of the signal can also be dish is required for the larger cable dis- Tuning voltage 0.6V to 20V DC
recognised from the footprints of differ- tribution network. A dish consists of the IF bandwidth 27 MHz (3 dB down)
ent satellites. As an example, the foot- following parts: Output impedance 75-ohm
print (i.e the geographic area on ground (a) The stand or the base structure Demodulation (SY) PLL

103
 CONSTRUCTION

fields—electric field and magnetic field—

which are mutually at right angle to each
other and also at right angle to the direc-
tion of motion.
In vertical polarisation, the electric
field is along the North-South axis of the
satellite.
In horizontal polarisation, the electric
field is at 90o to the North-South axis of
the satellite.
In circular polarisation the electric
field advances like a cork screw. It can be
either left-hand circular (LHC) or right-
hand circular (RHC).
To convert this circularly polarised
waves into linearly polarised waves (ver-
tical or horizontal), a 6.4mm thick fibre
glass piece is fixed in the feed horn along
its diameter. For example, CNN trans-
Fig. 3(a): Block diagram of C-band satellite receiver
mission has circular polarisation, and
(b) Pol- therefore the fibre glass piece is essential
arator: In- to get maximum signal pick-up. On the
side the other hand, Star TV signal is vertically
feed horn, polarised, and hence the fibre glass piece
there is a is not required. It should in fact be re-
p r o b e , moved to avoid 3dB loss.
which is re- For maximum signal pick-up, the
q u i r e d probe should be in line with the
to move ac- polarisation of the signal it is receiving.
cording to Probe movement is therefore required for
the polari- alignment purpose. If the probe is aligned
sation of the to receive a horizontally polarised signal
satellite sig- and the signal being received is vertically
nals. polarised, the probe has to be moved
Fig. 3(b): Pin out of DBS timer with FM demodulator F o r through 90o for maximum signal pick-up.
receives the signals from the satellite and large dish assemblies, a motorised This will give a crystal-clear picture. This
focuses them to the focal point where the polarator is prefered. The motor used in can be done either by trim control or with
feed horn is positioned. The focused sig- a polarator has three terminals: +5V, the help of V/H switch, with the trim con-
nal picked up by the feed horn is fed into ground, and pulse. trol in its centre position.
the LNB, which is mounted on feed horn The motor responds to the width of (c) LNB. The LNB stands for low-noise
itself. The dish antenna kits are now-a- the pulse supplied by the receiver. The block converter. LNB comprises an ampli-
days readily available and can be easily pulsewidth can be varied from 0.8 to 2.8 fier and a frequency converter. The sig-
assembled. ms with the help of the ‘trim’ controls in nals in C-band (3.7 GHz to 4.7 GHz), which
LNB assembly. The LNB assembly the receiver and the position of the V/H are received and reflected by the dish, are
consists of the following three parts: the (vertical/horizontal polarisation) switch. In fed to the amplifier inside LNB via the
scalar ring, polarator, and LNB. ‘H’ position, the probe can rotate by al- feed horn probe, as mentioned earlier. The
(a) The scaler ring: There are two most 140o. For a stream of pulses with signal-to-noise ratio of the amplifier has
types of scalar rings, namely, adjustable fixed width, the probe position will be to be rather good because the received
and fi fixed. The probe will move only when the signals are very weak. The lower the noise,
(i) Adjustale scalar ring: In this, the pulsewidth is changed. Keeping the ‘trim’ the better will be picture quality.
scalar ring slides on the feed horn and can control in mean position and changing the The converter inside the LNB com-
be positioned to suit the focal distance to V/H switch from V to H or H to V results prises a fixed frequency oscillator running
diameter ratio (F/d) of the dish (refer in pulsewidth changes in one step, en- at 5150 MHz, which beats with the in-
Fig. 2). The focal distance ‘X’ is related to abling the probe to rotate through 90o. To coming signal frequency. The difference
the F/d ratio, as shown in Table I. know as to why the probe movement is frequencies obtained range from 5150 -
ii) Fixed scalar ring: Here, the scalar required, we have to know about the 4200 = 950 MHz, to 5150 – 3700 = 1450
ring is an integral part of the feed horn ‘polarisation’. MHz, i.e. the input frequency range of
and the distance ‘X’ is fixed. It may not There are three types of polarisations: 4.2 GHz to 3.7 GHz is converted to 950 to
always suit the F/d ratio of the dish be- (a) vertical, (b) horizontal, and (c) circu- 1450 MHz range. The gain of LNB is typi-
ing used. Hence it is not preferred. lar. Electromagnetic waves have two cally around 50 dB.

104
CONSTRUCTION

Another important
parameter of the LNB is
its noise temperature.
The noise equivalent tem-
perature of most of the
good-quality LNBs ranges
from 26 oK to 40 o K (K
stands for kelvin). The
picture on a 26oK LNB
will show less noise com-
pared to that of a 40oK
LNB, especially when the
received signal is weak.
Theoretically, the noise
power is related to the
temperature as follows:
Noise power = KTB
watts
where K is the
Boltsman’s constant =
1.381 x 10-23 T is tempera-
ture in oK; and B is the
system bandwidth in Hz.
A coaxial cable con-
nected between the LNB
and receiver serves two
purposes: (i) it feeds +18V
DC to the LNB, to power
the amplifier and con-
verter circuits inside
LNB, and (ii) the con-
verted frequency (950
MHz to 1,450 MHz) is fed
from LNB to ‘C-band’ re-
ceiver.
C-band receiver.
The main function of the
receiver is to select a par-
ticular channel from the
converted block of fre-
quencies (between 950
and 1450 MHz) and re-
trieve the audio and video
signal information. The
Fig: 4: Circuit diagram of C-band satellite receiver

audio and video output

signals are finally fed to
the TV monitor’s audio-
and video-input termi-
nals, respectively. If the
TV does not have sepa-
rate audio and video in-
put points, then feed the
audio and video output
signals from receiver to
an RF modulator which
modulates the RF and
provides a modulated
VHF RF output (corre-
sponding to anyone of the
channels in the VHF

105
 CONSTRUCTION

10 of IC1.
Audio IF fre-
quency can be
varied by varying
the voltage of
VCO (voltage-con-
trolled oscillator)
of the IC. The
VCO voltage is
controlled with
the help of
potmeter VR2,
which is con-
nected to pin 13 of
IC1 and acts as
an audio IF fre-
quency-controller.
Fig. 5: Power supply unit Varactor diode D1
(MV2109) is con-
band from channel 2 to channel 12) to PARTS LIST nected across pins 12 and 13 through ca-
operate the domestic receiver directly. Semiconductors: pacitors C9 and C11.
The block diagram of a satellite re- IC1 - NE564 phase locked loop Audio bandwidth can also be adjusted
IC2 - NE592 video amplifier
ceiver is shown in Fig. 3(a). IC3 - NE555 timer
The coaxial cable from LNB is con- IC4, IC7 - 7805, 5V regulator Capacitors:
nected to the tuner (which contains RF IC5 - 7818, 18V regulator C1, C7, C11, C18
IC6 - 7812, 12V regulator C21, C27 - 1kpF ceramic disc
and IF modules) through ‘F’ socket. To
T1 - T6 - 2SC2458 npn transistor C28, C29, C44
simplify the design for an average con- C2, C3, C4,26 - 56pF ceramic disc
D1 - MV2109 varicap diode
structor, the Mitsumi TSU2-EOIP tuner D2, D5, D6 - 1N4148 switching diode C5, C6, C9, C13
is used in the circuit. Pinout of the tuner D3, D4 - OA79 detector diode C15, C31 - 0.01µF ceramic
are shown in Fig. 3(b) while its specifica- D7 - D14 - 1N4007, 1-amp silicon diode C8 - 1µF, 25V electrolytic
LED - Red LED C10 - 27pF ceramic disk
tions are given in Table II. It is a C12 - 18pF ceramic disk
Resistors (all 1/4W, ± 5% carbon, unless
readymade tuner with tunable range from stated otherwise) C14, C16,C24 - 22µF, 25V electrolytic
950 MHz to 1450 MHz, giving baseband R1, R3, R11 - 220 ohm C17 - 68pF ceramic disk
output directly with audio sub-carrier. R2, R16, R20 C19, C20 - 150pF ceramic disk
The tuner module is tuned with a volt- R27 - 1 kilo-ohm C22 - 10pF ceramic disk
R4, R19 - 1.8 kilo-ohm C23 - 0.1µF ceramic disk
age (VT) between 0 and 20V and requires C25 - 220µ/25V electrolytic
R5 - 390 ohm
no high/low band switch. It has a termi- R6 - 1.2 kilo-ohm C30 - 0.22µF ceramic disk
nal for applying the supply voltage for R7, R8, R12 C32 - 100µF, 25V electrolytic
LNB, which is carried to the LNB via the R17, R35 - 2.2 kilo-ohm C33 - 68µF, 25V electrolytic
R9 - 120 ohm C34 - 2200µF, 50V electrolytic
down lead, coaxial cable type RG-8 or C35 - 3300µF, 50V electrolytic
R10 - 5.6 kilo-ohm
RG-11. The module itself is fed +12V and R13, R14, R15 C43 - 10 kpF ceramic disk
+5V DC for its operation. The complete R25,R26, R39 - 10 kilo-ohm C37-C40, C45
circuit diagram of the receiver is shown R18 - 180 ohm C46, C36 - 0.1µF, 400V, ceramic disk
in Fig. 4. R21, R33 - 100 ohm C41 - 33 µF, 40V electrolytic
R22, R24 - 150 ohm C42 - 100 µF, 25V electrolytic
The baseband output from the tuner
R23 - 330 ohm Miscellaneous:
module is fed to the audio stage, video R28 - 470 ohm - VU meter (250µA)
stage, and signal-strength indication cir- R29 - 82 ohm - Mitsumi tuner (TSU2-
cuit. R30 - 47 kilo-ohm EOIP)
Audio section. It consists of three R31 - 270 ohm - PCB
R32 - 1.5 kilo-ohm - Chassis, knobs, on/off
stages: sound intermediate frequency
R34 - 8.2 kilo-ohm switch
(SIF) stage, sound driver stage, and sound R36 - 120 kilo-ohm - Heat-sink for regulators
output stage. R37, R44 - 82 ohm L1, L2, L3 - 4.7µH inductor (fixed)
The audio signal from the baseband R38 - 100 kilo-ohm L4 - 2.2µH inductor (fixed)
output of tuner module is separated with R40, R41 - 560 ohm - 3-pin screw type connector
R42 - 15 ohm for motorised feed horn pulse
the help of an LC (inductance-capacitance) R43 - 68 ohm X1 - 230V AC primary to
tuned wave-trap circuit comprising capaci- VR1, VR2, 17V AC, 1-amp and
tors C1 through C4 and inductors L1 VR7, VR8 - 4.7 kilo-ohm linear 24V AC, 1-amp secondary
through L3. SIF signal is fed to pin 6 potentiometer transformer
VR3, VR4, S1 - DPDT rocker switch
(limiter section) of IC1 (NE564). The posi-
VR5, VR6 - 4.7 kilo-ohm presets S2 - On/off switch
tive DC voltage is fed to pins 1, 3, 9, and

106
 CONSTRUCTION

module is fed via resistor

R17 (2.2 kilo-ohm) to the
base of video amplifier com-
prising transistor T3
(2SC2458). Capacitor C17
and resistor R19 are used to
suppress the interference.
R20 (1k) is used for emitter
bias.
Video signal is taken
from the emitter of transis-
tor T3 and fed to video de-
tector IC2 (NE592) through
an LC network comprising
capacitors C18 through C20
and inductor L4 (a video
take-off coil). Pin 1 of IC is
taken as reference input and
pin 14 is taken as signal in-
put. A suitable positive bias
is given to pin 1 and pin 14
through resistors R22 to R24.
The output is taken from
pin 8 of IC (positive video)
and fed to the video driver
as well as the output stage
comprising transistors T4
and T5. After amplification
of video signal, 1V peak-to-
peak video output is taken
from the emitter of transis-
tor T5 through capacitor C25
and resistor R29. Potmeter
VR4 (4.7k) is a video gain
control, which is used to ad-
just the contrast of picture.
Signal-strength indica-
tor. To indicate the signal
strength of the incoming sig-
nal, a 250µA ammeter (or
VU meter used in stereo
decks) is employed. To drive
the meter, an amplifier com-
prising transistor T6
(2SC2458) is used. The sig-
nal from baseband output of
tuner module is fed to the
base of transistor T6
through resistor R18 and ca-
Fig. 6: PCB layout for the circuits in Figs 4 and 5 (track-side)
pacitor C26. Positive bias is
with the help of potmeter VR1 (audio sistors T1 and T2 (2SC2458), which de- given to the base of transistor through
B/W control) by changing the voltage at velop 1-volt peak-to-peak audio output resistor R30 (47k). The high-frequency AC
pin 2 (phase comparator section) of IC. across resistor R16. output is taken from the collector of tran-
Potmeter VR1 generally changes the Potmeter VR3 acts as an audio gain sistor T6 through capacitor C28 and fed
phase of the audio signal. control. to the voltage doubler circuit comprising
After processing of the audio IF sig- Video section: This is divided into four diodes D3 and D4 and capacitors C28
nal, including its amplification and recti- stages, namely, video amplifier, video de- and C29. The output is fed to
fication, an AF output is available at pin tector, video driver, and video-output microammeter via potmeter VR5, which
14. The audio output is further amplified stage. can be adjusted for convenient deflection.
by transistor amplifiers built around tran- Signal from baseband output of tuner A double-sided PCB has been used,

107
 CONSTRUCTION

Fig. 7: Component layout for the PCB of Fig. 6

50 ELECTRONICS FOR YOU ❚  JULY 2000

97
 CONSTRUCTION

TABLE III
Testing
IC1 (NE 564)
Pin no: 1 2 3 4 5 6 7 8 After completion of assembly and con-
Voltage (V): 7.5 1.5 1 6.5 6.5 3 1 0 struction, check the +12V and +18V DC
Pin no: 9 10 11 12 13 14 15 16 from power-supply regulator, before con-
Voltage (V): 1 4.5 1 2 2 4 1.5 0.5 necting it to the PCB. Now connect both
IC2 (NE592) the supplies to PCB and check that +18V
Pin 1 2 3 4 5 6 7 8 8 10
Volt 9V 0V 9V 8.5V 0V 0V 9V 9V 0V 12V
is available at the input ‘F’ socket of tuner
Pin 11 12 13 14 module. Then connect the dish/LNB lead
Volt 8.5V 8.5V 0V 9V to the tuner and connect the audio and
Transistors video output from receiver either to the
Base Emitter Collector modulator or to the audio- and video-in-
T1 3.2V 3.2V 7V put terminals of the TV set.
T2 7V 7V 12V
T3 8.2V 8.2V 12V
Switch ‘on’ the receiver and adjust
T4 7V 7V 12V channel-selection potentiometer VR1 to
T5 7V 7V 12V select the desired channel. Audio can be
T6 2V 0V 2V fine tuned using potmeters VR1 and VR2.
Audio amplitude can be adjusted with the
Fig. 8 with component side serving as help of potmeter VR3. Picture contrast is
a ground plane. From component to be adjusted using potmeter VR4.
side, copper foil has been etched In case the receiver does not work
from around all holes except properly, refer to the circuit diagram and
those connected to ground. Ac- check its connections. Check thoroughly
tual-size solder-side track layout all the connections and resolder if you
is shown in Fig. 6. Component find any dry joints. Finally, check the volt-
layout for the PCB is shown in ages at the pins of IC5 and transistors,
Fig. 7. The author’s prototype is as given in Table III, for any major
shown in Fig. 8. discrepencies. ❏

109
 CONSTRUCTION

EPROM-BASED PROGRAMMABLE pin 3 is at logic 1 and thus monostable

IC1 is enabled. When magnitude of input
A is not equal to B, the output pin 3 of

NUMBER LOCK
IC4 is at logic 0 and as a result IC1 is
disabled.
RUPANJANA In enabled state, the monostable IC1
generates an output pulse when switch
JUNOMON ABRAHAM S1 (marked zero) is momentarily pressed.
This output pulse from IC1 is used as a
clock pulse for counter IC2 and shift reg-

M
ost of the code lock/number lock Please note that its reset pin 4 is con- ister IC5. While IC2 counts on high-to-
circuits presented in EFY so far nected to output A = B (OA=B) pin 3 of low transition of the clock, IC5 shifts on
have been based on discrete comparator IC4 (CD4585). Thus, as long low-to-high going transition of the clock.
TTL and/or CMOS ICs.
This circuit is based on
a familiar EPROM
27C32, wherein the re-
quired code is stored. It
is a number lock, which
can be programmed to
any coded number. The
length of the number
can also vary.
To make a code-
lock for a particular
number (octal, decimal,
or hexadecimal), that
number is first con-
verted to its binary
equivalent. It is then
entered bit-by-bit into
consecutive memory lo-
cations of EPROM 2732
(IC3), starting with the
MSB and ending with
the LSB (D0). Assume
that the required num-
ber is 12 (hex). Its
equivalent binary num-
ber is 00010010. This
binary number is en-
tered into the EPROM
at memory locations Fig. 1: Complete circuit diagram of number lock
starting with 001(hex),
as shown in Table I. The first memory as 4-bit Hence, to synchronise the operation of IC2
TABLE I
location is always loaded with binary byte magni- and IC5, the clock pulse to IC2 is inverted
Memory Data by the transistorised inverter stage
XXXXXXX0 (here, X means “do not care”). tude of
address Hex Binary
The data is stored in consecutive loca- (Hex) Equivalent input A around transistor T1.
tions, starting with location 001H, as 000 X0 XXXXXXX0 to IC4 is At power on, IC2 is reset due to power-
stated earlier. 001 X0 XXXXXXX0 equal to on-reset circuit built using capacitor C3
002 X0 XXXXXXX0 4 - b i t and resistor R5. Hence, all its outputs
003 X0 XXXXXXX0 m a g n i - (including O0 through O5 connected to
Description 004 X1 XXXXXXX1
addresses A0 through A5 of EPROM IC3)
005 X0 XXXXXXX0 tude of
The circuit comprises six ICs, inclu- 006 X0 XXXXXXX0 the other are initially at logic 0. In other words,
ding the EPROM and the voltage regula- 007 X1 XXXXXXX1 input B initial address selection for EPROM is
tor. IC1 is a timer NE555, which is 008 X0 XXXXXXX0 (to IC4), 000H, since address lines A6 through A11
configured as a monostable flip-flop. Note: X means do not care its output of EPROM 27C32 are permanently

110
 CONSTRUCTION

power-on reset cir- PARTS LIST

cuit comprising ca- Semiconductors:
pacitor C5 and re- IC1 - NE 555 timer
sistor R6, connected IC2 - CD 4040 12-bit binary
to its master reset counter
pin 5. Thus, ini- IC3 - 27C32 EPROM
IC4 - CD 4585 4-bit magnitude
tially its output O0 comparator
at pin 1 is at logic IC5 - CD 4035 4-bit shift register
0. On receipt of first IC6 - 7805 regulator
clock pulse from T1, T2 - BC 547 npn transistor
IC1, the data pin Resistors (all ¼-watt, ±5% carbon, unless
states of J and K stated otherwise):
R1, R5 - 10-kilo-ohm
pins (4 and 3) get
R2 - 220-kilo-ohm
shifted to output R3 - 2.2-kilo-ohm
pin 1. The logic R4 - 3.3-kilo-ohm
level at these two R6 - 15-kilo-ohm
pins (3 and 4) is R7, R8 - 1-kilo-ohm
Fig. 2: Acutal-size, single-sided PCB layout
normally zero as Capacitors:
they are pulled to C1 - 1µ/10V electrolytic
C2, C4 - 0.01µ ceramic disk
ground via resistor C3 - 10µ/10V electrolytic
R3, when push to C5 - 22µ/10V electrolytic
‘on’ switch is in its C6 - 1000µ/16V electrolytic
normal (off) posi- Miscellaneous:
tion. However, if RL1 - 6V/100-ohm relay
switch S2 is kept S1, S2 - tactile switch
pressed when clock S3 - On/off switch
- DC power supply
pulse is generated (7.5V to 12V)
by IC1 (by pressing
switch S1 momen- digits), the tap A needs to be connected
tarily), logic 1 is to O3. Similarly, for 16-bit code, point A
output to pin 1 of is to be connected to O4, and so on.
shift register IC5.
In this circuit,
the final opening or
Operation
closing of lock is When the power supply to the circuit is
Fig. 3: Component layout for the PCB achieved through initially switched ‘on’, IC2 and IC5 are
energisation of re- reset, as explained earlier. Both A0 and
grounded in this circuit. With each lay RL1 via relay-driver transistor T1, B0 inputs to IC4 are zero and thus its
clock pulse from IC1, the counter IC2 out- whose base is connected to either O2, O3, output at pin 3 is ‘high’ and hence IC1 is
put increments by one and so also O4, or O5 outputs of IC2 via resistor R7. enabled. But, since pin 2 of IC1 is pulled
the address of EPROM. Since the clock The selection of the position where point ‘high’ via resistor R1, output of IC1 is
pulses from IC1 are also being applied to A is to be connected would depend on the initially ‘low’. Initially, all ICs are in their
clock pin 6 of 4-bit shift register IC5 binary digits in the code. If binary code is reset positions because of the capacitors
(CD4035), let us examine how the data of 4-bit length (equivalent to one hex connected to their reset pins.
at its input pins 3, 4 (K, J) and output digit), then four clock pulses are needed Assume that the required code num-
pin 1 (O0) changes. Please note that O1 for advancing the EPROM address by four ber is lodged in the EPROM and point A
through O3 (at pins 15, 14 and 13 respec- locations. On fourth pulse, O2 will be at is joined to appropriate output of IC2 de-
tively) of the shift register are not used logic 1 (unless IC1 gets disabled due to pending on the length of lodged code, as
in this circuit. non-matching of the code in comparator discussed in the description of relay op-
On initial switching ‘on’ of power sup- CD4585, earlier) to energise relay RL1. eration. Then, lock relay can be energised
ply to the circuit, IC5 is reset due to the For 8-bit long code (equivalent to two hex by inputting the correct binary code seri-

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111
 CONSTRUCTION

ally via IC5 with the help of switches S1 parator goes ‘low’ and it inhibits IC1. switch S3.
(marked zero) and S2 (marked one). A Thus, further data would not get entered Please note that for locking, the cir-
‘zero’ is entered by momentarily depress- in the absence of clock pulse from IC1. If cuit need not play any role. The locking
ing switch S1 alone, and a ‘one’ is en- data at each location of EPROM keeps operation could be performed manually.
tered by depressing switch S1 momen- matching with the data input via switches Only for opening of the lock, this code
tarily, after holding switch S2 in the S1 and S2, the output of comparator lock may be used. However, you are at
pressed condition. (at pin 3) will continue to stay ‘high’ to liberty to use the lock the other way
The ‘D0’ bit of EPROM and ‘O0’ bit of keep IC1 enabled until all the bits of the around.
shift register (CD4035) are compared by code have thus been compared. At the An actual-size, single-sided PCB for
magnitude comparator (CD4585). If the end of the code, the tap A will be at logic the circuit of Fig. 1 is shown in Fig. 2,
two data bits are equal, the output of com- 1, to energise relay RL1. If you have while Fig. 3 shows its component layout.
parator remains ‘high’ and it does not in- by mistake entered wrong code via One may extend/modify the circuit by
terrupt/inhibit the operation of switches S1 and S2, you can try again by utilising other seven unused data bits of
monostable IC1 (NE555). However, if switching ‘off’ and then switching ‘on’ EPROM as well (presently only bit D0
there is a mismatch, the output of com- the circuit once again, using ‘on’/‘off’ has been used in this circuit). ❏

112
 C I RC ICR CUUII TT I ID D
EAS
EAS

POWER-SUPPLY FAILURE ALARM the components are not critical. If the

alarm circuit is powered from any exter-
nal DC power-supply source, the mains-
supply section up to points ‘P’ and ‘M’
S.C. DWIVEDI
M.K. CHANDRA MOULEESWARAN can be omitted from the circuit. Follow-
ing points may be noted:
1. At a higher DC voltage level, tran-

M
ost of the power-supply failure transistor T1. Since, in the absence of sistor T1 (BC558) may pass some collec-
indicator circuits need a sepa- mains supply, the base of transistor is tor-to-emitter leakage current, causing a
rate power-supply for them- pulled ‘low’ via resistor R8, it conducts continuous murmuring sound from the
selves. But the alarm circuit
presented here needs no ad-
ditional supply source. It em-
ploys an electrolytic capacitor
to store adequate charge, to
feed power to the alarm cir-
cuit which sounds an alarm
for a reasonable duration
when the mains supply fails.
During the presence of
mains power supply, the rec-
tified mains voltage is stepped
down to a required low level.
A zener is used to limit the
filtered voltage to 15-volt
level. Mains presence is indicated by an and sounds the buzzer (alarm) to give a buzzer. In that case, replace it with some
LED. The low-level DC is used for charg- warning of the power-failure. low-gain transistor.
ing capacitor C3 and reverse biasing With the value of C3 as shown, a good- 2. Piezo buzzer must be a continuous
switching transistor T1. Thus, transistor quality buzzer would sound for about a tone version, with built-in oscillator.
T1 remains cut-off as long as the mains minute. By increasing or decreasing the To save space, one may use five small-
supply is present. As soon as the mains value of capacitor C3, this time can be sized 1000µF capacitors (in parallel) in
power fails, the charge stored in the ca- altered to serve one’s need. place of bulky high-value capacitor C3.
pacitor acts as a power-supply source for Assembly is quite easy. The values of

STOPWATCH USING (from Ajanta timepiece used by EFY) are

combined to obtain one pulse per second
output across resistor R4.

COB AND CALCULATOR RUPANJANA (EFY Lab note: Please note that
COBs used in different clocks may give
different outputs—frequency as well as
ANANDAN M.A. polarity—which may necessitate reversal
of diodes, use of additional transistor in-

T
he heart of this circuit is a COB requirement (about 6 mA for a low-power verter stage, and modification of key op-
which is used in quartz clocks. SCR) for the SCR, to maintain it in ‘on’ eration sequence of calculator.)
SCR1 is used for ‘start’ and ‘stop’ state. By placing the LED in the vicinity The voltage developed across resistor
operations. LED1 used in the circuit of LCD, one can read the display even R4 provides forward bias for transistor T1.
serves two purposes. It provides the path during darkness. The positive going out- Transistor T1 conducts and switches ‘on’
to satisfy the minimum holding current put pulses from the two points of the COB the optocoupler, whose output (across col-

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113
 CIRCUIT IDEAS

lector and emitter of the in-built transis-

tor) is connected to the two terminals of
the ‘=’ (of Casio FX-82LB used during actu-
al testing at EFY) button’s keypad tracks,
with collector connected to the more posi-
tive terminal than the emitter. Thus, once
every second the ‘=’ button is activated.
To operate the calculator in stopwatch
mode, switch on the calculator and press
the keys in the following sequences:
(a) For seconds mode: [1][+][+]
(b) For minutes mode: [6][0][1/x][+][+]
(c) For hours mode: [3][6][0][0][1/x][+][+] mal notation (i.e. degree, minute, second) of 60x22x6 mm inside the Casio FX-82B
Note: The invoking of function (1/x) by invoking ‘° ' '' ’ key. For example, a di- calculator. By using a chip LED, the size
in different calculators may require press- splay of 5.87 in hour mode will get conver- restriction for installing the LED can be
ing of a function key marked ‘INV’ or ted to 5, 52,12 (5 hrs, 52 min., and 12 sec.) overcome. It can be placed near the LCD
‘SHIFT’ or ‘2ndF’, etc. Hence, use the ap- when one invokes ‘° ' '' ’ function key. display to provide indication of the func-
propriate key in your calculator for 1/x For downcounting in seconds, min- tioning of the stopwatch. The whole cir-
operation. utes, or hours mode, the procedure as out- cuit can be assembled on a 55x20 mm
For accurate starting, press the ‘0’ key lined in the preceding paragraphs is to be PCB. The start/stop tactile switches can
to reset the count immediately after press- followed except that keys [-][-] should be also be installed inside, with their operat-
ing the start switch. (However, if you de- depressed in place of [+][+]. ing lever popping out through a cutout
sire upcounting from a number other than Pause/hold can be achieved by press- above the keypad.
‘0’ second/minute/hour in respective modes, ing the ‘=’ key continuously, or pressing You may find certain keypad buttons
you may do so by keying that number im- switch S2. Intermediate time can be stored such as ‘hyp’ which you may never re-
mediately after pressing start switch.) The by pressing the ‘Min’ key. This reading quire to use. Two such buttons can be
final reading can be taken by pressing the can be retrieved by pressing the ‘MR’ key, removed to create place for ‘start’ and ‘stop’
stop switch. The fractional portion of the after the stop switch has been pressed. switches, if required. By this arrangement,
results obtained during minutes mode and This circuit can easily be installed in- you can start or stop the clock, without
hours mode can be converted to sexagesi- side the calculator. There is a vacant space affecting its working.

is taken remain fixed, while the voltage

DIAL A VOLTAGE
source is moved from one pair of points
RUPANJANA to another.
As shown in the diagram, a total of
RATHINDRA NATH BISWAS 31 resistors are required to provide
settability to within 0.01V. There are a

I
n a conventional voltage-divider set- vides precision DC voltages from 0 to 10 total of three such dials. Each dial has
up, the fixed voltage is applied across volts, in steps of 0.01V, can be easily and ten resistors, except the last one (dial III),
the entire network and the output economically built using a circular volt- which contains eleven resistors. Dial 1
is taken from across a selectable tap. Al- age divider. In this simple divider arrange- has ten resistors, having a value of 1 kilo-
though this approach provides precision ment, the points across which the output ohm each. It is marked from 0 to 9 volts
voltage out-
put, it in-
volves com-
plex switch-
ing and un-
usually
large num-
ber of resis-
tors. Thus, it
is not eco-
nomical, as
precision re-
sistors are
quite expen-
sive.
A bridge
that pro-

114
 CIRCUIT IDEAS

in 1-volt steps. Dial II has ten resistors of m o r e

1,100-ohm value each. This dial is marked closely the
from 0 to 0.9 volt in 0.1 volt steps. Dial bridge
III has eleven resistors, having a value of output can
1,210-ohm each, with dial marking from be read. If
0 to 0.09 volt in 0.01 volt steps. The val- l o w e r
ues of the resistors in a given ring are 1.1 value re-
times the values of the resistors in the sistors are
preceding ring. The bridge shown in the used, the
illustration would read the value of un- bridge
known voltage as 6.43 volt (when the null 2. Please do not confuse the dial volt- output impedance becomes lower. How-
detector reads ‘0’) as detailed below: ages mentioned inside each of the three ever, this would increase the power dissi-
Dial I - 6 volts dials with the actual voltages across the pation in the bridge.
Dial II - 0.4 volt associated resistors, which would be dif- The principal limitation of this ar-
Dial II - 0.03 volt ferent. rangement is the allowable power dissi-
Total : 6.43 volt The tighter the tolerance of the resis- pation of the resistor in the first ring,
Note: 1. For the above example, the tors, the more accurate will be the mea- across which the full supply voltage is
equivalent circuit has been reduced to a surement of the unknown voltage. For applied. Resistors in dial I must be able
simpler form by EFY— in three stages, null detection, any micro-ammeter or gal- to withstand the full supply voltage of 10
as shown in Fig. 2, for the benefit of the vanometer can be used. However, the volts. Regulated power supply (10-volt)
readers. more sensitive the null detector is, the only should be used in this circuit.

ELECTRONIC DANCING PEACOCK of LEDs arranged according to a prede-

termined pattern.
EDI The circuit is built around two dual
C.K. SUNITH DWIV
S.C. JK flip-flop ICs 7476, which have been
wired as a Johnson counter. The count

A
ll of you must have observed a around, closing them, and then doing it sequence of this counter is shown in
dancing peacock, spreading out all over again. The author has attempted Table I. The free running oscillator built
its beautiful feathers, turning to reproduce a similar effect using a set around IC1, a popular timer NE555, gen-

115
 CIRCUIT IDEAS

TABLE I gins to count in a particular se- your thumb and forefinger to resemble a
Johnson Counter Count Sequence quence, as shown in Table I. When- dancing peacock.
D C B A Decimal LED’s LIT ever the output of a flip-flop goes The countdown sequence of the
MSB LSB Count Upon Count high, the associated transistor con- counter will be initiated upon the arrival
0 0 0 0 0 Nil nected at its output saturates. It of the next clock pulse, which causes the
0 0 0 1 1 L1 to L3 drives current through the array of count to read 1110. At this stage, the ar-
0 0 1 1 3 L1 to L7
0 1 1 1 7 L1 to L11 LEDs connected as collector load, ray of LEDs at the centre of the display
1 1 1 1 15 L1 to L15 thereby causing them to turn ‘on’. panel will be turned ‘off’. The counter then
1 1 1 0 14 L4 to L15 Upon arrival of first clock pulse, counts down to 1100 upon the arrival of
1 1 0 0 12 L8 to L15 the LSB will be set. The counter will the next clock when the array of LEDs
1 0 0 0 8 L12 to L15
0 0 0 0 0 Nil
now count 0001. This means that adjacent to the centre array (on both
the array of LEDs at the centre of sides) will also be turned ‘off’. In this man-
erates approximately 1Hz waveform. The the display panel will be lit. When the ner, the counter continues to count down
output of IC1 serves as the clock input next clock pulse arrives, logic 1 will also till the contents read 0000, when the
for the counter built around IC2 and IC3. be copied to its preceding flip-flop and the whole array of LEDs are turned ‘off’ and
The circuit can be reset by momen- counter will read 0011. As a result, the one full cycle is completed. The counter
tarily depressing switch S1. When the cir- array of LEDs adjacent to the centre ar- then starts the counting sequence all over
cuit is powered on, capacitor C1 will be ray (on both sides) will be lit. In this fash- again.
initially uncharged, with the result that ion, the count progresses upwards till it The circuit can be assembled on a gen-
all the flip-flops are cleared. Now, as the reaches 1111, when all the arrays of LEDs eral-purpose PCB. The LEDs can be
capacitor starts charging toward the posi- will be lit. Now the wings of the peacock stacked into an array as per the pattern
tive rail, the clear inputs of all the flip- are fully spread. At this stage, you may shown in the figure. The circuit requires
flops go to logic 1 (and stay there) and manually swing the display board both both +5V and +12V DC supplies. The cir-
the flip-flops are enabled. The counter be- ways, holding it at its centre bottom by cuit can be used as a festival display.

INVERTER OVERLOAD PROTECTOR

verter in an overload condition. It has the
following desirable features:
• It shuts down the inverter and also

WITH DELAYED AUTO RESET

provides audio-visual indication of the
overload condition.
• After shutdown, it automatically re-
S.C. DWIVEDI starts the inverter with a delay of 6 sec-
SIDDHARTH SINGH onds. Thus, it saves the user from the
inconvenience caused due to manually re-

A
n overload condition in an inverter an overload shutdown facility, while those setting the system or running around in
may permanently damage the incorporating this feature come with a darkness to reset the system at night.
power transistor array or burn off price tag. • It permanently shuts down the in-
the transformer. Some of the domestic in- The circuit presented here is an over- verter and continues to give audio warn-
verters sold in the market do not feature load detector which shuts down the in- ing, in case there are more than three

Fig. 1

116
 CIRCUIT IDEAS

is connected as a Schmitt of inverter as shown in Fig. 1. This means

‘trigger’, whose output goes that one of the two leads terminated on
low when the voltage at its the existing switch has to be cut and the
pin 2 exceeds 3.3V. IC4 cut ends have to be connected to the pole
(again an NE555 timer) is and N/O contacts respectively of relay
configured as a monostable RL1.
multivibrator with a • The ammeter should be connected
pulsewidth of 6 seconds. in series with the negative terminal of the
Fig. 2 IC5 (CD4017) is a CMOS battery and inverter, as shown in Fig. 2.
successive overloads. Under this condition, counter which counts the three overload Move the wiper of preset VR1 to the
the system has to be manually reset. (Suc- conditions, after which the system has to extreme position which is grounded.
cessive overload condition indicates that be reset manually, by pressing push-to- Switch ‘on’ the inverter. For a 300W in-
the inverter output is short-circuited or a on switch S1. verter, connect about 250-260W of load.
heavy current is being drawn by the con- The circuit can be powered from the Now adjust VR1 slowly, until the inverter
nected load.) inverter battery. In standby condition, it just trips or shuts down. Repeat the step
The circuit uses an ammeter (0-30A) consumes 8-10 mA of current and around if necessary. Use good-quality preset with
as a transducer to detect overload condi- 70 mA with relay (RL1), buzzer (PZ1), dust cover (e.g. multi-turn trimpot) for
tion. Such an ammeter is generally and LED1 energised. Please note the fol- reliable operation.
present in almost all inverters. This am- lowing points carefully: The circuit can be easily and success-
meter is connected between the negative • Points A and B at the input of IC2 fully installed with minimum modifica-
supply of the battery and the inverter, as should be connected to the corresponding tions to the existing inverter. All the com-
shown in Fig. 2. The voltage developed points (A and B respectively) across the ponents used are cheap and readily avail-
across this ammeter, due to the flow of ammeter. able. The whole circuit can be assembled
current, is very small. It is amplified by • Points C and D on the relay termi- on a general-purpose PCB. The cost of
IC2, which is wired as a differential am- nals have to be connected in series with the whole circuit including relay, buzzer,
plifier having a gain of 100. IC3 (NE555) the already existing ‘on’/‘off’ switch leads and PCB does not exceed Rs 100.

TELEPHONE LINE BASED AUDIO tor T1 conducts, causing energisation of

relays RL1, RL2, and RL3. Diode D1 con-

MUTING AND LIGHT-ON CIRCUIT nected in anti-parallel to inbuilt diode of

IC1, in shunt with resistor R1, provides
an easy path for AC current and helps in
limiting the voltage across inbuilt diode
DHURJATI SINHA S.C. DWIVEDI to a safe value during the ringing. (The
RMS value of ring voltage lies between
70 and 90 volts RMS.) Capacitor C1 main-

V
ery often when enjoying music or (opto-coupler) conducts and capacitor C1 tains necessary voltage for continuously
watching TV at high audio level, gets charged and, in turn, transistor T1 forward biasing transistor T1 so that the
we may not be able to hear a tele- gets forward biased. As a result, transis- relays are not energised during the nega-
phone ring and thus miss an
important incoming phone call.
To overcome this situation, the
circuit presented here can be
used. The circuit would auto-
matically light a bulb on ar-
rival of a telephone ring and
simultaneously mute the mu-
sic system/TV audio for the du-
ration the telephone handset
is off-hook. Lighting of the
bulb would not only indicate
an incoming call but also help
in locating the telephone dur-
ing darkness.
On arrival of a ring, or
when the handset is off-hook,
the inbuilt transistor of IC1

117
 CIRCUIT IDEAS

tive half cycles and off-period of ring sig- no more available and thus relays RL1 energisation of DPDT relay RL3 opens
nal. Once the handset is picked up, the through RL3 are deactivated. the leads going to the speakers and thus
relays will still remain energised because As shown in the figure, the energised mutes both audio speakers. Use ‘NC’ con-
of low-impedance DC path available (via relay RL1 switches on the light, while tacts of relay RL3 in series with speakers
cradle switch and handset) for the in-built energisation of relay RL2 causes the path of music system and ‘NC’ contacts of RL2
diode of IC1. After completion of call when of TV speaker lead to be opened. (For in series with TV speaker. Use ‘NO’ con-
handset is placed back on its cradle, the dual-speaker TV, replace relay RL2 with tact of relay RL1 in series with a bulb to
low-impedance path through handset is a DPDT relay of 6V, 200 ohm.) Similarly, get the visual indication.

118
August

2000
 CONSTRUCTION

DISPLAY SCHEMES FOR INDIAN quence. Here, the direct eye-to-finger re-

LANGUAGES—PART I
flex does not take place, because there is
a thinking process involved. For example,
for typing ‘hoom’, he has to know the
grammer to split that into a ‘ha’, a ‘oo’,
(HARDWARE AND SOFTWARE) and an ‘mm’. Thus the typist does not
pick up speed even after considerable
practice, and as a result fatigue sets in
K. PADMANABHAN, S. ANANTHI, K. CHANDRASEKHARAN, quickly for him.
AND P. SWAMINATHAN As mentioned earlier, the Indian lan-
guages have more characters than those

F
or displaying text of Hindi, En- ters involved in most of the Indian lan- in the English language. The well-known
glish, or any other Indian language guages, in contrast to a mere 52 (2 x 26) ASCII codes for English are just 128 in
on a TV-like screen, as may be characters in English language. In spite of number, including several control charac-
required for public announcements or for the fact that Hindi, or for that matter ters and punctuation marks. Each code
educative programs etc, presently there Tamil or Telugu etc, have to deal with a occupies one byte and hence the total code
are two possible ways: large number of basic consonants, which space is 7FH for the complete English set.
1. Use a personal computer (PC), with combine, singly or doubly, with a similarly With our Indian languages, we have var-
all its hardware, such as the hard disk, large set of vowels, the four-row keyboard ied sets of characters. Consonants are quite
monitor etc, and develop or buy a suit- deals with all of them adequately to en- many, and therefore it is not easy to ac-
able software to display such text on its sure fast typing. Our trained typists are commodate all characters within the same
screen using its keyboard. able to make up to 40 strokes per minute set space of 128. For this purpose, the
2. Develop a dedicated low-cost mi- (approximately 15 words per minute) in author proposed a scheme of forming such
croprocessor based system employing a the most intricate of Indian languages. ASCII-like codes for Hindi as well as other
CRT controller circuit, with suitable firm- Today, there is both a concern and Indian languages, which occupy a space of
ware for each of the languages. talk in several circles, e.g. computer, tele- 128 bytes only for each. Based on the stan-
This article provides the software for communications, and other hi-tech indus- dard typewriter format for English, Hindi,
use with a PC based system as well as tries, to develop a new type of keyboard Tamil etc, a method for typing text of
use of a dedicated microprocessor based layout for Indian languages, with the aim these and other languages, all simulta-
system, complete with circuitry and firm- of making the software development task neously, is described in this article.
ware programs. Incidentally, it introduces easy enough. In this context, phonetic key- This proposed scheme of coding would
an important aspect concerning coding of boards have been proposed and are also not cause any disturbance to the present
text characters for Indian languages and in vogue already, with a great deal of soft- typists of these languages. They do not
provides an efficient solution. The soft- ware available commercially. These key- have to undergo fresh training for using
ware developed for both the above boards do not make use of hook charac- the proposed keyboard.
schemes of display is based on the pro- ters, but then such a keyboard is not well The method of making the ASCII code
posed simplified coding solution. suited for training. set for any Indian language is based on
Generally, typewriting is a process the typist’s existing keyboard. For ex-
based on direct eye-to-limb reflex signal ample, in English, the letter ‘d’ has its
ASCII codes and Indian languages generation, with little thinking going on code as 64H. So, the code for the Hindi
The typewriter for the English language, deep down in the brain. If the typist looks letter ‘ka’ (d) is also 64 hex. For Tamil
along with its mechanism, has been al- at a letter ‘hu’, he presses the ‘ha’ key ASCII code 64 hex is used for ‘na’, and so
ready adopted for almost all of our In- first, and as he sees a hook ‘oo’ below it, on… for the other languages. A table of
dian languages with practically no change he strikes the corresponding hook key, such codes for the three languages Hindi,
in its layout. The positions of keys and and so on. Thus the process can be speeded English, and Tamil is shown in Table I.
their operation remain unchanged. It has up with practice and is not easily forgot- Character generator for Indian
the same four rows of keys, including shift ten. We know of language typists, who languages. While characters of any lan-
and space keys, with top row for numer- even after 30 years of work, continue to guage need a character generator, which
als, and so on. type as fast as they did when they were puts dots in a rectangular matrix to de-
The combination vowels in Indian lan- young. Some of them can even talk while pict the shape of the character on the
guages such as ‘oo’ are made as separate typing without missing anything. screen, the English language, in its sim-
‘hook’ characters, which upon stroke are Now, consider the phonetic keyboard plest form of display, manages to write
non-space-moving. Persons involved in typist. He has to split each letter men- all its characters within a 5 x 7 matrix.
development and adoption of the English tally into its vowel and consonant parts; Therefore, within an 8 x 8 matrix, there
keyboard have cleverly tackled the prob- find out the consonant key and the hook is enough gap to allow for inter-character
lem of typing the large number of charac- key, and then press them in proper se- and inter-row space. But, in Hindi and

120
 CONSTRUCTION
Fig. 1(a): Schematic diagram of 8085 microprocessor based multilingual display system (memories and decoder portion)

for all the

text char-
acters in a
manner as
shown in
Table I, it
is now re-
quired to
put the
dots for
each code
into the
character
generator.
Thus, we
specify text
only by its
codes. For
example,
for English
letter ADD,
the code is
41, 44, 44.
The actual
dots are
available
within the
character
generator,
and hence
the space
needed for
storing text
is just lim-
ited to the
characters
or strokes.
But, in
o t h e r
schemes
generally
employed
in other
software,
the text is
stored as
graphic
patterns
and hence
quite a
l a r g e
our other Indian languages, we cannot for instance like the standard Time Ro- amount of memory is needed.
manage to use even a simple font within man of English, more dots need to be Now take a look at the keyboard—
this 8 x 8 matrix (which needs one byte shown, and hence the character slot size row by row. The top row contains numer-
per line or 8 bytes per character). The will be even greater than 12 x 12 dots. als. Next row starts with ‘Q’ and ‘q’ (in
smallest size in Indian language requires In the proposed scheme a 12 x 12 dot English) and is used for ‘PHA’ and ‘u’ hook
a 12 x 12 matrix, and hence we need 1.5- font size is used, both for the dedicated in Hindi with and without shift key press-
byte space horizontally and a total of 12 microprocessor based display scheme as ing, respectively. So, these have the same
x 1.5 = 18 bytes space for each letter. well as for the PC based scheme. ASCII equivalent codes, i.e., 51 hex and
Further, if one wants better looking fonts, Since we have already specified codes 71 hex, respectively.

121
 CONSTRUCTION

Fig. 1(b): 6845 character and video generator portion of multilingual display system

The character generator is just a list the high address for Hindi starts at page rect addresses and dot codes are pro-
of dots for the characters in an order. It 10 and it goes up to page17 (with each posed to be issued in EFY-CD during
does not necessarily require any hard- page comprising 256 bytes). In page 10, Sept. 2000.
ware. Though such a list of dots, if stored locations 00 through 7F are used for stor- It means that the actual code is start-
in this order in an EPROM, can be a hard- ing the low addresses while 80 through ing from the address 14 B4 (1000 + 04B4).
ware component. In the PC based design, FF are used for storing high addresses So, this is indirect addressing mode.
this is just a file containing the dot pat- for each character. Accordingly for ‘d’, the The actual hex values of the dots for
terns, while in the design using a dedi- low address is stored at 10 64 and the each of the twelve lines (in 18 bytes) for
cated CRT controller with a microproces- high address at 10 E4 (1064 + 80 = 10E4). ‘d’ are stored at consecutive locations,
sor, this is actually a hardware compo- If we have a look at the hex contents of starting with address 14B4, as stated ear-
nent, i.e. an EPROM. these two locations, we shall find: lier.
Addressing mode for character gen- Address Data Comments This indirect addressing scheme is
erator file scheme. Let us take letter ‘d’ 10 64 B4 LS Byte of Address used because it enables us to use differ-
in Hindi, which has the ASCII-equivalent 10 E4 04 MS Byte of Address ent types of fonts later, by just pointing
code of 64 hex. We need a high address Note: The page/location-wise hex to a different address table. Also, the ad-
and a low address as usual. Supposing contents of file containing these indi- dress table corresponds to the ASCII code,

122
 CONSTRUCTION

Hindi, English, and Tamil display is given

in BASIC language on page 49. This works
on an IBM PC with no restrictions of
memory, and can work directly from a
single floppy. This minimises the cost of
the computer system for the display. The
program given is based on Turbo BASIC
version 1.0, but the same is compatible
with Quick BASIC or other similar BA-
SIC interpreter-compilers working on the
PC.
The program first loads the file for
Fig. 2: Keyboard for English, Hindi, and Tamil languages characters for four languages. Then the
user is asked to enter F1 to F4 keys to
select the language and S or L (capital)
just as in ‘d’, 14 C5 FF FF for selecting small or large-size font. Any
with 64 being The table for each language will not time during typing text on screen, the
the code. The need more than 8 pages in an EPROM or function keys may be pressed to change
table low-ad- 2k bytes in a file. Thus in one 2764, it is the language, if desired.
dress is also possible to house the character generator F1 … Tamil
10 64 and the codes for four languages, say English and F2 … English
high address three other Indian languages. F3 … Tamil
equals 10 64 F4 … Fourth language
Fig. 3: Character code + 80, and so The character generator here is a file.
generation in 12x12 format
on. Further,
PC based design It contains the same set of codes that are
we need not even write these codes in In the PC based design, the software writ- used for the hardware based design
any order, because we are at liberty to ten in BASIC loads a table of codes from that follows. This is stored as file
write any address in the look-up table! a file. This file is having the same data ‘chtamil2’, which is read and saved in the
(That works really when we ask several as the EPROM in the dedicated micro- array ‘ad (lan%,I%)’ that stores the dots.
persons to prepare the font codes and mix processor based design. This array is used in the program
them together!) The software for the computer based throughout.
How exactly does one prepare the display is made simple enough to be used That makes it convenient to type sev-
table of dots? Take a graph sheet and with any PC, without the need for large eral sentences, up to 30 in a VGA moni-
make 12 x 12 rectangles. Paint the char- memory or disk space. It could work even tor screen on the computer, and then on
acter in this slot, as it would appear when with one floppy system, with just a 386 the next screen. For example, on one
printed. The dots must be darkened to based PC even. The C++ or other lan- screen, a Hindi poem could be typed to-
show up the character. Positioning is im- guages are more library oriented and re- gether with its English and Tamil trans-
portant; one has to make sure that hooks, quire a hard disk to work with. The C++ lations.
if appended to this character, will fall library already has different fonts and Printing a page is simply done using
within the space of 12 x 12 without cut- sizes for English and we use this library the ‘Graphics.com’ program, which comes
ting or merging. For example, ‘kra’ and to write varied size of text on screen in with DOS. This must be run prior to run-
‘ku’ and ‘koo’ writing must be possible by English. But, until the library for Indian ning BASIC as:
adding these respective hooks to the char- languages becomes similarly available, the A> Graphics
acter, if required. Then, looking at Fig. 3, C++ is of no use here. Software makers Then
for ‘ka’ (d), we read the dots (in nibbles) would have made fonts for several Indian A> BASIC
in complimentary form and write them languages, but they have not put them in After entering text on one page, it can
down as under: a library form as the promoters of the ‘C’ be printed using shift + print screen keys.
Line 1 … 000 Line 5 … 010 Line 9 … 1D6 language did it for English language. No This program is a simple version, and
Line 2 … 000 Line 6 … 1D6 Line 10 … 010 libraries for video display for Indian lan- other versions with file storage and print-
Line 3 … 000 Line 7 … 139 Line 11 … 000 guages are currently available exploiting ing facility can be prepared with extra
Line 4 … FFF Line 8 … 139 Line 12 … 000 the compactness of the C++. Until then, statements.
The values are complemented and we need to write code as and when we For the use of the typist, it is neces-
written as two nibbles at a location. want, and hence BASIC is better suited. sary to write the character strokes of the
Complementing is necessary to make FF Hence this program has been devel- respective language(s) on key tops of the
appear as blank on the screen. The table oped in BASIC rather than C++ or other IBM PC keyboard, at least during the ini-
thus obtained for ‘ka’ (d), occupying 18 Windows based software, for the simple tial typing stage.
bytes (36 nibbles), is shown below: reason that it could be used for education Note: The program in BASIC, to-
Address Code by institutes possessing even simple PC- gether with its compiled .EXE file, will
14 B4 FF FF FF FF F0 00 FE FE AT computers. be presented in Sept. 2000 EFY-CD. The
14 BC 29 EC 6E EE F0 1E FE FF The program for a computer based 8 kilo-byte ‘chtamil2’ file containing the

123
 CONSTRUCTION

TABLE I: ASCII Key Codes for English, Hindi, and Tamil languages

124
 CONSTRUCTION

Program in BASIC for Computer Based Display for English, Hindi, Tamil, etc Languages
dim C(3,2048),ad(3,257),d(12),q(8) if N= 123 then hook=1 :goto 23 x=S*12: y=Row*16+l
open “chtamil2” for random as #1 len=1 if N=43 then hook =1:goto 23 101 i=i+1
field #1, 1 as A$ if N= 59 then hook=1:goto 23 if i >= 12 then 201
cls hook=0 n=n\2
total%= LOf(1) end if goto 10
for lan%=1 to 3 if lang%=3 then gosub 400 201 s=s-1
for i%= 0 to 255 ‘total% ‘ if N= 8 then s=s-1 : goto 300: ‘hook=1: for j%=0 to 11
get #1 ‘get one byte goto 23 ‘pset(x,y),0
rem pick and store the address for all 256 ‘if n=28 then s=s+1:goto 300 if q(11-j%)=1 then pset(x,y),0
codes ‘if n=30 then row=row+1:goto 2 x=x+1
a= asc(a$) hook =0 next
‘ print a; 23 n1= ad(lang%,n) :n5=n1 ‘t$=input$(1)
ad(lan%,i%) = a n2=ad(lang%,n+128) return
rem low address in 00-7F and high add. in 80 n3=(n2-1)*256 +n1 500 rem language selection
-FF N1=(n3): lang%=1
n=n+1 j=0: for i1= 0 to 17 step 3 return
next i=i1 510 lang%=2:return
for i%= 3 to 1024*2 -254’total% -256 d(j) = 16*c(lang%,n1+i) + C(lang%,n1+i+1)\ 16 520 lang%=3:return
get #1 d(j+1) =256*(c(lang%,n1+i+1) mod 16) + REM HINDI HOOKs
‘? i%-3,asc(a$) c(lang%,n1+i+2) 400 if n=45 then hook=1:goto 630
c(lan%,i%-3)= asc(a$) j=j+2 if n=61 then hook=1:goto 23 ‘; The sanskrit
next next i1 :j=0 hook for word ends
next lan% for i = 0 to 11 if n=81 then hook=1: goto 23 ‘ ; The adjunct to
CLOSE #1 ‘?i; hex$(d(i)) “Pa” to make “PPa”
lang%=2 next :’ ?n,n5,n2 if n=113 then hook=1 :goto 610 ‘; The u hook
on key(1) gosub 500:key(1) on for l =0 to 11 as in Pushpa
on key(2) gosub 510:key(2) on n= d(l):i=0 :k%=15 if n=65 then hook=1 :goto 23 ‘; the “n” part of
on key(3) gosub 520:key(3) on gosub 10 ‘put pixels “Gend”
ON KEY(11) GOSUB 540: KEY(11) ON next l if n=83 then hook=1 : goto 23 ‘; the Ttha part
ON KEY(12) GOSUB 550: KEY(12) ON s=s+1 of kuttha
ON KEY(13) GOSUB 560: KEY(13) ON gosub cur if n=87 then hook=1: goto 23 ‘; The OOm
ON KEY(14) GOSUB 570: KEY(14) ON goto 2 symbol as in hoom
690 CLS: locate 10,15: ?”Type F1 key for ‘put cursor if n=90 then hook=1: goto 23 ‘;as in “rka”,
Tamil, F2 for English and F3 Hindi” cur: the top “rr”
? “Want small or large size font ? Press S or x=s*12:y=row*16+11 if n=119 then hook=1:goto 620 ‘; oo as in Koo
L” for jj%=1 to 10 if n=97 then hook=1: goto 23 ‘;dot top as in
ad$= input$(1) pset(x+jj%,y),15 :next “mm”
if ad$=”S” then screen 12 : goto 700 return if n=115 then hook=1:goto 23 ‘; The “Ey”
if ad$=”L” then screen 2: goto 700 end hook as in “Gend”
goto 690 rem given a number <256*8 put pixels if n=122 then hook=1: goto 23 ‘; “Pna” as in
700 cls: s=0:row=0 10 r = n mod 2 APna
i=0 ‘? r ; return
s=1:R=1:L=0 q(i)=r 540 gosub remcur:ROW=ROW-1 :RETURN
hook=0 x=S*12: y=Row*16+l 550 GOSUB REMCUR :S=S+1: RETURN
2 if lang%=2 then hook=0 100 i=i+1 560 GOSUB REMCUR: S=S-1:RETURN
if hook=1 then s=s-1 if i >= 12 then 200 570 GOSUB REMCUR: ROW=ROW+1:
if s<0 then row=row-1: s=40 n=n\2 RETURN
21 A$=inPUT$(1): ‘got a key goto 10 600 rem hindi 13th line hook points
N= ASC(A$) 200 for j%=0 to 11 610 x= s*12: y= row*16+12
‘locate 20,51 :print n if q(11-j%)=0 then pset(x,y),15 i =3
‘goto 2 x=x+1 pset(x+i,y),15: i=8:pset(x+i,y),15:goto 23
REM remove old cursor next 620 x=s*12: y=row*16+12
x=s*12:y=row*16+11 return i =12
for jj%=1 to 10 300 for l =0 to 12 pset(x+i,y),15
pset(x+jj%,y),0 :next x=s*12: y =row *16+l goto 23
if S>40 then s=0 :Row=Row+1 for j% = 1 to 12 630 x=s*12: y=row*16+12
if n=8 then s=s-1:gosub 300 ‘backspace ‘ n= 4096 : i=0 i=12:
if N=32 then s=s+1:gosub cur: goto 2 ‘space pset (x+j%,y),0 pset(x+i,y),15:goto 23
if N=10 then row = row + 1 :goto 2 ‘return ‘gosub 40 ‘put pixels REMCUR:
if N=13 then row=row +1:s=0: goto 2 ‘line feed next j% x=s*12:y=row*16+11
if lang%=1 then next l for jj%=1 to 10
REM This is for TAMIL HOOK characters goto 2 pset(x+jj%,y),0 :next
if N=80 then hook=1 :goto 23 40 r = n mod 2 RETURN
if N=112 then hook=1 :goto 23 ‘? r ;
if N=91 then hook=1 :goto 23 q(i)=r

dot patterns for the four languages is re- integrated single board within a cost of
quired to be present in the working di-
Dedicated display unit design Rs 2,000. The TV display of a 36cm (14-
rectory for the PC based program to work. A unit of this type is a low-cost solution inch) monitor costs less than Rs 1,000 to-
This file is also proposed to be issued for a public display. The circuits described day, and the same video signal can be
with Sept. 2000 EFY-CD. in this section can be assembled on an used for multiple positions.

125
 CONSTRUCTION

This involves a simple 8085 micropro- PARTS LIST The RAM chip 6264 (8k memory) is
cessor and an additional CRT controller. Semiconductors: used in the circuit. However, only 1k
The dedicated CRT controller chip 6845 IC1 - 8085 8-bit microprocessor (1000-13FF) of its address space is
has been popular ever since it was first IC2, IC21 - 74LS373 octal transparent utilised. So, its ‘high’ address pins A11
latch
used by the IBM in its display controller IC3, IC4 - 2764 8k byte EPROM and A12 are permanently made ‘high’.
cards. The circuit of this board is shown IC5 - 6264 8k byte RAM A chip-select 1 (CS1) is obtained from
in Figs 1(a) and 1(b). It comprises: IC6 - 74LS245 octal transceiver pin 6 of the 74156 IC, which covers 1400-
IC7 - 74LS156 dual 2-line to 4-line
1. Video generation circuitry includ- decoder 17FF address range. This goes to select
ing dot and character clocks. IC8 - 74LS365 8-line to 1-line the video RAM 62256. Though a 62256 of
2. Pixel or video RAM. multiplexer 32k memory is used, only 16k is actually
IC9 - 74LS75 4-bit latch
3. Character dot pattern EPROM for IC10, IC13 - 74LS02 quad NOR gate utilised. Its pin 1 is made permanent
four languages IC11 - 74LS04 hex inverter ‘high’. This chip select uses the address
4. 8085 firmware on EPROM for four IC12, IC14 - 74LS00 quad NAND gate lines A0 to A5 having an address range
IC15 - 74LS132 quad NAND
languages Schmitt trigger
of just 64 bytes, just the low order memory
5. 6845 CRT controller IC. IC16 - 6845 CRT controller of the video RAM.
Fig. 1(a) shows the 8085 microproces- IC17, IC18 - 74LS157 quad 2-line to 1-line A chip-select 2 (CS2) signal is used to
sor and its signals. Crystal of 4 MHz be- data selector select a 74LS373 latch used with the video
IC19 - 74LS244 octal bus buffer/
tween its pins 1 and 2 provides the clock driver RAM circuit. This is used to supply the
for the processor to tick and work. Reset IC20 - 62256, 32k byte static RAM high order addresses (A6 through A13) to
pin 36 is connected to get itself reset upon IC22 - 74LS165 parallel-in shift the video memory.
register
power on. Manual resetting is also pos- IC23 - 74LS190 synchronous decade An additional chip-select 3 (CS3) sig-
sible using reset switch S1. The address- counter nal is used for accessing the 6845 CRT
cum-data signal lines AD0-AD7 are con- T1 - BC148B npn transistor controller to program its mode of opera-
D1 - 1N4148 switching diode
nected to a 74LS373 latch to separate the LED1-LED4 - Red LEDs tion, so as to get a raster of 312 lines and
address signals A0-A7, using the ALE Resistors (all ¼-watt, ±5% carbon, unless 50 Hz frame frequency.
pulse from pin 30 of 8085. The data-bus stated otherwise): In the earlier design by the authors,
R1-R5 - 1-kilo-ohm
connects to all devices such as EPROMs, R11-R16,
an ASCII keyboard had been used. This
RAM, and the 74245 bidirectional trans- R6, R17 - 4.7-kilo-ohm ASCII keyboard used a dedicated key-
ceiver. Some of the data lines are also R7-R10, board controller IC, and the keys were
R22-R23 - 220-ohm
connected to output port (at I/O address R18, R19 - 10-kilo-ohm
wired in the fashion of the typewriter
80) using a 7475 IC for providing four R20 - 220-kilo-ohm keys, making use of switches fixed on to
bits of outputs (D0’ to D3’). The input R21 - 680-ohm a plain PCB and wiring the contacts to
port (also at I/O address 80) employing a VR1 - 470-ohm preset the IC as per its data sheet. There are
Capacitors:
74365 caters to six bits of input. The PC C1, C3 - 1 µF, 16V electrolytic ICs for making such an ASCII keyboard.
keyboard data and clock signals are con- C2 - 22 pF ceramic disk The AY3-5376 is one such IC. The ASCII
nected to data bus via two of its input Miscellaneous: code for the key pressed is output as a 7-
XTAL1 - 4 MHz crystal
lines. PCKBD - Keyboard interface connector bit code by this IC.
The Address decoder is a 74156, which In this new design, the authors have
has open collector outputs. It enables one four languages. This too is a 2764, and the used an IBM PC (AT) keyboard. The au-
or two of the chip select decoded signals to chip select signal ranges only 2k, but the thors have given such a PC keyboard for
be combined by just joining them (in wired- total 8k range is for storing four language their Home Computer Project (Refer EFY
OR fashion). Using the address lines A12, dot patterns, each in one 2k range. Thus Electronics Projects, Vol. 11). This was a
A11, and A10, the decoder provides eight the selection of the range/language is done keyboard of the older type, the XT key-
chip select signals for the address ranges by signals from the 7475-output port bits board, but now the freely available (for
as shown in the figure. Each output cov- D0’ and D1’, which are wired to A11 and Rs 300) AT keyboard has been employed
ers a 1k memory range. Thus pins 9 and A12 address lines of the 2764 character for the current design.
10 (shorted) serve as the chip select signal generator EPROM, which can be selected The keyboard is labeled with English,
for EPROM1 covering a 2k memory ad- using the function keys as explained be- Hindi, and Tamil characters, as per the
dress space. (Although we use 2764, an 8k low. standard typewriter format. The format
EPROM actually since now-a-days only The input port 80H, using 74365, is for Hindi and Tamil characters are shown
8k EPROM ICs are easily available and for reading the language selection made. in Fig. 3.
easily programmable while 2k capacity The language is selected by pressing keys The 8085 generates the control sig-
EPROMs are almost obsolete and difficult F1 through F4 on the PC’s keyboard. This nals IO/M, WR, RD (active low signals).
to program—we need 25V programming causes bits D0 and D1 to be output on These are used in conjunction with
pulse etc.) The address range for EPROM- the 7475 output ports to indicate the se- 74LS02 and 74LS00 gates shown in
1 is 0000-07FF. Similarly, pins 11 and 12 lection by two of the LEDs wired at its Fig. 2(a) to obtain separate read and write
are joined together to provide address output. Two other bits, D4 and D5 of this control signals for memory or input-out-
range from 0800-0FFF. This is the chip input port, are connected to the data and put, i.e. MR, MW, IOR, IOW for use in
select signal for the second ERPOM, which clock pins of the IBM PC keyboard con- the circuit.
stores the character dot patterns for the nector. To be continued next month

126
 CONSTRUCTION

8085 µP-KIT BASED pin ZIF socket and two hex buffer 7407
ICs. The +5V supply needed for the inter-
face circuit (and ground) is obtained from

SIMPLE IC TESTER
the kit’s power supply itself. The total
cost of the interface circuit would be less
RUPANJANA than Rs 300.
Both the 8255s have been configured
S. RAJKUMAR for mode ‘0’ operation (which is a basic
input/output mode) with registers A and
B as output and register C

A
ll electronic laboratories in engi- TABLE I (both upper and lower half)
neering colleges and other insti- Control Words as input. The required con-
tutions need a digital IC tester to S.No. Port A Port C Port B Port C Control Word trol word for the mentioned
verify the serviceability of frequently used (Upper) (Lower) (Hex) configuration is 89 hex. The
digital ICs, e.g., ICs 7400 (NAND), 7408 1 O O O O 80 characteristics of mode ‘0’
(AND), 7432 (OR), 7486 (EXOR), 7404 2 O O O I 81 operation of 8255 are:
(Hex Inverter), 7407 (Buffer) etc. The 3 O O I O 82 1. Two 8-bit ports
4 O O I I 83
truth tables of all such ICs are available 5 O I O O 88
referred to as registers A
in digital IC data books. Based on their 6 O I O I 89 and B respectively.
truth tables one can write suitable sub- 7 O I I O 8A 2. Two 4-bit ports
routines to test them using an 8085 mi- 8 O I I I 8B referred to as C register
croprocessor kit and a minimal of inter- 9 I O O O 90 (lower-comprising bits C0
10 I O O I 91
face circuitry. An 8085 microprocessor kit, 11 I O I O 92 through C3) and C register
having requisite peripheral devices, is nor- 12 I O I I 93 (upper–comprising bits C4
mally available in most electronic labs, 13 I I O O 98 through C7).
and as such one does not have to buy 14 I I O I 99 3. Ports configured as
15 I I I O 9A
costly IC testers for testing simple type 16 I I I I 9B
output have latched outputs
of ICs, as mentioned above. while input ports are not
Note: O = Output; I = Input
It is assumed that the kit has at least latched.
two 8255 PPI (programmable peripheral tion of the interface circuit required for 4. Any port can be made input or out-
interface) ICs whose input/output ports testing of the digital 14-pin ICs using 8085 put. There are 16 possible input/output
have been extended via suitable connec- microprocessor kit is shown in Fig. 1. The configurations. (Please refer Table I for a
tors, for external usage. The configura- interface circuit comprises simply a 14- summary of the configurations and the
control word required to be used during
initialisation of an 8255 for each configu-
ration.) Control word can also be formed
with the help of Fig. 2.
The hex buffer/driver IC 7407 has
open collector outputs. The outputs of ‘IC
under test,’ which is placed in the ZIF
socket, are combined with those of 7407
in a wired-OR (actually wired-AND) fash-
ion. To realise this function, a logic 1 is
always output on the 7407 gates connected
to output pins of ‘IC under test.’ All pos-
sible logic input combinations are given
to input pins of ‘IC under test’, while logic
1 is placed at all its output pins via 8255’s
registers A and B, through IC 7407 buff-
ers. For each input combination, the logic
state of the ZIF socket pins (as modified
by the ‘IC under test’) is read (after a
short delay) via ‘C’ registers of the two
8255s. The expected results for each com-
bination of inputs, for above-mentioned
ICs, are shown in Table II in hex digits.
Fig. 1: Circuit for interfacing IC under test to 8255 PPIs on 8085 microprocessor kit These are stored in memory, in consecu-

127
 CONSTRUCTION

IC Tester Program Environment

MEMORY MAP (MAY VARY FROM KIT TO KIT):
RAM LOCATIONS USED FOR PROGRAM : 9200H - 9450H
STACK POINTER INITIALISED : 9FFFH
PORTA (OUTPUT) OF A8255/B8255 : 08/10
PORTB (OUTPUT) OF A8255/B8255 : 09/11
PORTC (INPUT) OF A8255/B8255 : 0A/12
CONTROL WORD REGISTER OF A8255/B8255 : 0B/13
PROGRAM LISTING
Add. Opcode Label Mnemonics Comments
9200 31FF9F LXI SP,9FFFH
9203 21A093 LXI H,93A0H
9206 3E00 MVI A,00H
9208 0600 MVI B,00H
920A CD160B* CALL OUTPT ;(UTILITY SUBROUTINE IN THE KIT
; TO DISPLAY ACC CONTENT)
920D CD640A* CALL RDKBD ;(UTILITY SUBROUTINE IN THE KIT
; TO ACCEPT ONE HEX DIGIT FROM THE
; KEYBOARD AND STORE IN THE ACC)
9210 0E04 MVI C,04H
9212 07 A: RLC ; SHIFTED TO SECOND(TENS) PLACE Fig. 2: Control word logic diagram for mode
9213 0D DCR C
9214 C21292 JNZ A
9217 325094 STA 9450H tive locations for each IC, for every com-
921A CD640A CALL RDKBD ; (UTILITY SUBROUTINE IN THE KIT bination of inputs. If actual data read tal-
; TO ACCEPT ONE HEX DIGIT FROM lies with the stored data for all combina-
921D 215094 LXI H,9450H ; THE KEYBOARD AND STORE IN
; THE ACC)
tions of inputs, message ‘GOOD’ is dis-
9220 86 ADD M ; COMBINE TWO KEYBOARD ENTRIES played on the kit’s display. If any of the
9221 47 MOV B,A result fails, i.e. if any of the gates is not
9222 210093 LXI H,9300H working properly, message ‘BAD’ is dis-
9225 FE00 CPI 00H ; (NAND IC) played on the 8085 kit.
9227 CA5E92 JZ TYPE1
922A 211093 LXI H,9310H For convenience, the ICs having iden-
922D FE08 CPI 08H ; (AND IC) tical input/output pins and requiring iden-
922F CA5E92 JZ TYPE1 tical input combinations, have been
9232 212093 LXI H,9320H grouped under one type. (7400, 7408, 7432,
9235 FE32 CPI 32H ; (OR IC)
9237 CA5E92 JZ TYPE1
and 7486 have been grouped as ‘Type 1’,
923A 213093 LXI H,9330H while 7404 and 7407 have been grouped
923D FE86 CPI 86H ; (EXOR IC) as ‘Type 2’, and 7402 as ‘Type 3’.)
923F CA5E92 JZ TYPE1 When the software program (modified
9242 214093 LXI H,9340H at EFY for working on Dynalog’s Micro
9245 FE04 CPI 04H ; (NOT IC)
9247 CA7592 JZ TYPE2 Friend-ILC-V2 kit) is executed on the 8085
924A 215093 LXI H,9350H kit, the display shows ‘ICIC’. Now enter
924D FE07 CPI 07H ; (BUFFER IC) the last two digits of the IC number to be
924F CA7592 JZ TYPE2 tested (the last but one followed by the
9252 216093 LXI H,9360H
9255 FE02 CPI 02H ; (NOR IC)
last one, for instance, for IC 7404 enter 0
9257 CA9092 JZ TYPE3 followed by 4). Please take care to place
925A 76 HLT ;IN SOME 8085 KITS SUCH AS THAT FROM DYNALOG the IC in the ZIF socket with proper
; PROGRAM IS TERMINATED WITH ‘RST1’IN PLACE OF ‘HLT’ orientation and press ‘Next’. Depending
; NAND, AND, OR, EXOR GATE CHECK on performance of all the gates of ‘IC un-
925E 0E00 TYPE1: MVI C,00H ; SET GATE INPUTS der test’, the message ‘GOOD’ or ‘BAD’
9260 79 LP1: MOV A,C
9261 F604 ORI 04H ; SET GATE OUTPUT 1
will appear on its display.
9263 47 MOV B,A ;STORE GATE INPUTS FOR I/P & O/P PINS IN REG B For addressing peripheral devices
9264 CDB192 CALL PROCESS (8255, 8279), I/O mapped address scheme
9267 0C INR C ; NEXT INPUT COMBINATION has been employed. At EFY, the addresses
9268 79 MOV A,C have been modified in accordance with
9269 FE04 CPI 04H ; CHECK IF ALL INPUT COMBINATIONS ARE OVER
926B C26092 JNZ LP1 the Dynalog kit used for the purpose.
926E C3EB92 JMP GOOD ; OR JMP GOOD1 Other users would need to modify the pro-
;BUFFER, INVERTER CHECK gram address space as well as input-out-
9275 0E00 TYPE2: MVI C,00H ; SET GATE INPUT put addresses for the peripherals suitably,
9277 79 LP2: MOV A,C in accordance with the specific kit used
9278 F602 ORI 02H ; SET GATE OUTPUT 1 by them. Such opcodes which are input-
927A 47 MOV B,A ; STORE GATE INPUT FOR I/P & O/P PINS IN B
927B CDB192 CALL PROCESS output address dependent have been an-
notated with an asterisk mark. The al-

128
 CONSTRUCTION

927E 0C INR C ; NEXT INPUT COMBINATION

a portal dedicated to electronics enthusiasts

927F 79 MOV A,C
9280 FE02 CPI 02H ; CHECK IF ALL INPUT COMBINATIONS ARE OVER
9282 C27792 JNZ LP2

www.electronicsforu.com
9285 C3EB92 JMP GOOD ; OR JMP GOOD1
;NOR GATE CHECK
9290 0E00 TYPE3: MVI C,00H ; SET GATE INPUTS
9292 79 LP3: MOV A,C
9293 07 RLC
9294 F601 ORI 01H ; SET GATE OUTPUT 1
9296 47 MOV B,A
9297 CDB192 CALL PROCESS
929A 0C INR C ; NEXT INPUT COMBINATION
929B 79 MOV A,C
929C FE04 CPI 04H ; CHECK IF ALL INPUT COMBINATION ARE OVER
929E C29292 JNZ LP3
92A1 C3EB92 JMP GOOD ; OR JMP GOOD1
92B1 3E89 PROCESS: MVI A,89H ; (8255 CONTROL WORD FOR CONFIGURING REG.
; A & B AS O/P AND REG. C (LOWER 4 BITS &
92B3 D30B* OUT 0BH ; UPPER 4 BITS) AS I/P)
92B5 D313* OUT 13H
92B7 78 MOV A,B
92B8 D308* OUT 08H ;OUTPUT THE COMBINATION FROM PORT A(A8255)
92BA D309* OUT 09H ;OUTPUT THE COMBINATION FROM PORT B(A8255)
92BC D310* OUT 10H ;OUTPUT THE COMBINATION FROM PORT A(B8255)
92BE D311* OUT 11H ;OUTPUT THE COMBINATION FROM PORT B(B8255)
92C0 16FF MVI D,FFH ; DELAY
92C2 15 LP4: DCR D
92C3 C2C292 JNZ LP4
92C6 DB0A* IN 0AH ; READ DATA INTO PORT C OF A8255
92C8 E63F ANI 3FH ; DON’T CARE FOR BIT 7 & 8
92CA BE CMP M ; COMPARE RESULT WITH DATA IN MEMORY
92CB C2DA92 JNZ BAD ; OR JMP BAD1
92CE 23 INX H
92CF DB12* IN 12H ; READ DATA INTO PORT C OF B8255
92D1 E63F ANI 3FH ; DON’T CARE FOR BIT 7 & 8
92D3 BE CMP M ; COMPARE RESULT WITH DATA IN MEMORY
92D4 C2DA92 JNZ BAD ; OR JMP BAD1
92D7 23 INX H
92D8 C9 RET
;RESULT DISPLAY USING 8279(BAD)
92DA 3E04* BAD: MVI A,04H
92DC D301* OUT 01H
92DE 3E7F* MVI A,7FH ; 7 SEG CODE-B
92E0 D300* OUT 00H
92E2 3E77* MVI A,77H ; 7 SEG CODE-A
92E4 D300* OUT 00H
92E6 3E3F* MVI A,3FH ; 7 SEG CODE-D
92E8 D300* OUT 00H
92EA 76 HLT
;RESULT DISPLAY USING 8279(GOOD)
92EB 3E04* GOOD: MVI A,04H
92ED D301* OUT 01H
92EF 3E3D* MVI A,3DH ; 7 SEG CODE-G
92F1 D300* OUT 00H
92F3 3E5C* MVI A,5CH ; 7 SEG CODE-O
92F5 D300* OUT 00H
92F7 3E5C* MVI A,5CH ; 7 SEG CODE-O
92F9 D300* OUT 00H
92FB 3E3F* MVI A,3FH ; 7 SEG CODE-D
92FD D300* OUT 00H
92FE 76 HLT
@ ;RESULT DISPLAY USING UTILITY SUBROUTINE OF KIT AT EFY(BAD)
9370 31FF9F BAD1: LXI SP,9FFFH
9373 210094 LXI H,9400H
9376 3E00 MVI A,00H
9378 0600 MVI B,00H
937A CD160B CALL OUTPT ; (UTILITY SUBROUTINE IN THE KIT TO
; DISPLAY ACC CONTENT)
937D 76 HLT
@ ;RESULT DISPLAY USING UTILITY SUBROUTINE OF KIT AT EFY(GOOD)

129
 CONSTRUCTION

9380 31FF9F GOOD1: LXI SP,9FFFH

9383 211094 LXI H,9410H
9386 3E00 MVI A,00H
9388 0600 MVI B,00H
938A CD160B CALL OUTPT ; (UTILITY SUBROUTINE IN THE KIT TO
; DISPLAY ACC CONTENT)
938D 76 HLT
;DATA TABLE
;NAND ;AND ;OR ;EXOR ;NOT ;NOR
9300 24 9310 00 9320 00 9330 00 9340 2A 9360 09
9301 09 9311 00 9321 00 9331 00 9341 15 9361 26
9302 2D 9312 09 9322 2D 9332 2D 9342 15 9362 12
9303 2D 9313 24 9323 2D 9333 2D 9343 2A 9363 12
9304 36 9314 12 9324 36 9334 36 9364 24
9305 1B 9315 12 9325 1B 9335 1B ;BUFFER 9365 09
9306 1B 9316 3F 9326 3F 9336 1B 9350 00 9366 36
9307 36 9317 3F 9327 3F 9337 36 9351 00 9367 1B
9352 3F
;ICIC ;BADD ;GOOD 9353 3F
93A0 0C 9400 0D 9410 0D
93A1 01 9401 0D 9411 00
93A2 0C 9402 0A 9412 00
93A3 01 9403 0B 9413 0C
SYMBOL TABLE :
A 9212 TYPE1 925E LP1 9260 TYPE2 9275
LP2 9277 TYPE3 9290 LP3 9292 PROCESS 92B1
LP4 92C2 BAD 92E0 GOOD 92F5 BAD1 9370 Fig. 3: PCB layout for interface
GOOD1 9370
NOTE: 1. * INDICATES THAT OPCODE IS DEPENDENT ON I/O ADDRESS USED
IN THE SPECIFIC KIT
2. @ INDICATES THE ROUTINE MODIFIED BY EFY FOR DYNALOG KIT

TABLE II: LOGIC STATES OF 8255 PORTS

8255 (A) 8255 (B)
ZIF Socket Pin No. 6 5 4 3 2 1 13 12 11 10 9 8
Reg. C Ports C5 C4 C3 C2 C1 C0 HEX C5 C4 C3 C2 C1 C0 HEX
Reg. A/B Ports B2 B1 B0 A2 A1 A0 Eq. A0 A1 A2 B0 B1 B2 Eq.
IC Description O I 2 I 1 O I2 I 1 I1 I2 O I1 I2 O
1 0 0 1 0 0 24 0 0 1 0 0 1 09
NAND (7400) 1 0 1 1 0 1 2D 1 0 1 1 0 1 2D
(Type 1) 1 1 0 1 1 0 36 0 1 1 0 1 1 1B
0 1 1 0 1 1 1B 1 1 0 1 1 0 36
0 0 0 0 0 0 00 0 0 0 0 0 0 00
AND (7408) 0 0 1 0 0 1 09 1 0 0 1 0 0 24
(Type 1) 0 1 0 0 1 0 12 0 1 0 0 1 0 12
1 1 1 1 1 1 3F 1 1 1 1 1 1 3F
0 0 0 0 0 0 00 0 0 0 0 0 0 00
OR (7432) 1 0 1 1 0 1 2D 1 0 1 1 0 1 2D
(Type 1) 1 1 0 1 1 0 36 0 1 1 0 1 1 1B
1 1 1 1 1 1 3F 1 1 1 1 1 1 3F
0 0 0 0 0 0 00 0 0 0 0 0 0 00 Fig. 4: Component layout for PCB
Ex-OR (7486) 1 0 1 1 0 1 2D 1 0 1 1 0 1 2D
ternate result-indicating subroutines spe-
(Type 1) 1 1 0 1 1 0 36 0 1 1 0 1 1 1B
0 1 1 0 1 1 1B 1 1 0 1 1 0 36 cifically used at EFY lab during testing
are also included for benefit of the read-
O I O I O I I O I O I O
Invertor (7404) ers. The complete details of address space
1 0 1 0 1 0 2A 0 1 0 1 0 1 15
(Type 2) used for the program and peripheral de-
0 1 0 1 0 1 15 1 0 1 0 1 0 2A
Buffer (7407) 0 0 0 0 0 0 00 0 0 0 0 0 0 00
vices are given before the actual program.
(Type 2) 1 1 1 1 1 1 3F 1 1 1 1 1 1 3F The program is self-explanatory, with suit-
able comments added wherever required.
I2 I 1 O I2 I1 O O I2 I 1 O I2 I1
0 0 1 0 0 1 09 1 0 0 1 0 0 26 Although hardware interface circuit
NOR (7402) can be assembled easily on a general-pur-
0 1 0 0 1 0 12 0 1 0 0 1 0 12
(Type 3)
1 0 0 1 0 0 24 0 0 1 0 0 1 09 pose PCB, nevertheless an actual-size
1 1 0 1 1 0 36 0 1 1 0 1 1 1B single-sided PCB pattern for the same is
I = INPUT; O = OUTPUT; Hex Eq = Hex digits read via Reg. C shown in Fig. 3 and its component layout
Note:- Pin 7 of ZIF socket is connected to ground and pin 14 is connected to +5V. is given in Fig. 4.

130
 C I RC ICR U
CUIT IDEAS
IT IDEAS

LOW-COST PCO BILLING METER

the telephone exchange at suitable inter-
vals. This interval depends on the pulse
rate of the place called and also the time
of the day and whether it’s a working-day
or holiday. On receipt of 16kHz pulse, out-
S.C. DWIVEDI
DHURJATI SINHA put pin 8 of IC LM567 (which is tuned for
centre frequency of 16 kHz) goes ‘low’ for
the duration of the pulse. The output of

T
he circuit presented here can be pose may cost more than Rs 10,000 in the IC2 is coupled via transistor T3 to
used in PCOs for displaying the market. The comparative disadvantages optocoupler IC3. The output of this
actual bill. The overall cost of this of the presented circuit are as follows: optocoupler is used to bridge the ‘=’ but-
circuit is less than Rs 200 while a com- 1. The calculator used along with this ton on a calculator (such as Taksun
mercial equipment serving similar pur- circuit is required to be switched ‘on’ make), which has the effect of pressing
manually before making a call. the ‘=’ button of the calculator.
2. Certain manual entries have to Considering that pulse rate for a spe-
be made in the calculator; for example, cific town/time/day happens to be Rs 1.26
for a pulse rate of Rs 1.26, number 1.26 per pulse, then before maturity of the call
is to be entered after switching ‘on’ the one enters 1.26 followed by pressing of ‘+’
calculator followed by pressing of ‘+’ key twice. Now, if a total of ten billing
button twice. However, possibility ex- pulses have been received from exchange
ists for automating these two functions for the duration of the call, then on
by using additional circuitry. completion of the call, the calculator dis-
In telephony, on-hook condition is play would show 12.60. The telephone op-
represented by existance of 48V to 52V erator has to bill the customer Rs 14.60
across the line. Similarly, the off-hook (Rs 12.60 towards call charges plus Rs
condition is represented by the line volt- 2.00 towards service charges).
age dropping to a level of 8V to 10V For tuning of the PLL circuit around
(depending upon the length of the local IC2, lift the handset and inject 16kHz tone
lead line from telephone exchange to across the line input points. Tune IC2 to
the subscriber’s premises as well as upon centre frequency of 16 kHz with the help
the impedance of telephone instrument). of preset VR1. Proper tuning of the PLL
Handset is normally lifted either for will cause LED1 to glow even with a very
dialing or in response to a ring. low-amplitude 16kHz tone.
In the circuit shown in Fig. 1, when EFY Lab note. Arrangement used for
the handset is off-hook, the optocoupler simulating a 16kHz pulsed tone is shown
MCT2E (IC1) conducts and forward bi- in Fig. 2. Push-to-on switch is used for
ases transistor T1, which, in turn, for- generation of fixed-duration pulse for
ward biases transistor T2 and energises modulating and switching on a 16kHz os-
relay RL1. In energised condition of re- cillator.
lay, the upper set of relay contacts con- For more details regarding pulse rates,
nects the positive supply rail to PLL pulse codes, etc, readers are advised to go
(phase-locked loop) IC2 (LM567) pin 4, through the tariff rates and pulse code
while the lower set of relay contacts information given in the beginning pages
couples the positive telephone lead to of telephone directories, such as MTNL,
input pin 3 of LM567 via capacitor C1 Delhi directory, Vol. I. One may also dial
and resistor R3. 183 for getting more details.
The nega-
tive telephone
lead is perma-
nently capaci-
tively coupled
via capacitor
C2. As soon as
call matures,
16kHz tone
pulses would
be pumped
into the tele-
phone line by

131
 CIRCUIT IDEAS

AUTOMATIC MUTING CIRCUIT

FOR AUDIO SYSTEMS S.C. DWIVEDI

SUNISH P.

F
ig. 1 shows a muting circuit, which termines the ‘on’/‘off’ muting delay.
makes use of IC LB1403. Sig- Higher the value of this capacitor,
nal from any pre-
amplifier, such as HA1032,
LA3161, or LA3160, is con-
nected to the base of am-
plifier transistor T1. Vari-
able resistor VR1 is used
to control the gain of in-
put signal.
Comparator 2 output
at pin 2 of LB1403 is used
for generation of muting
signal at the emitter (point
A) of transistor T2, which
can be directly connected
to muting pin 4 of ampli-
fier employing IC LA4440.
As long as the audio input
to the circuit of Fig. 1 is
below a certain level (say,
150 mV peak to peak), the output at point greater will be the muting delay period. tive polarity voltage for muting. The addi-
A will be high (the value measured at Slight circuit modification will be tional circuit to be connected at point A in
EFY Lab was around 4.5V). Once the in- needed if this circuit is used with STK that case is shown in Fig. 2.
put crosses this threshold level, the out- series amplifiers, such as STK 4141, 4142,
put will be around 0V. Capacitor C4 de- 4152, and 4191, because they need nega-

2-LINE INTERCOM-CUM-TELEPHONE
LINE CHANGEOVER CIRCUIT
and then press switch S1. As a result,
buzzer PZ2 sounds. Simultaneously, the
S.C. DWIVEDI side tone is heard in the speaker of hand-
set of phone 1. The person at phone 2
J. SRINIVASAN could then lift the handset and start con-
versation. Similar procedure is to be fol-

T
he circuit presented here can be phone. This problem is obviated in the lowed for initiation of the conversation
used for connecting two telephones circuit presented here. from phone 2 using switch S2. In this
in parallel and also as a 2-line in- Under normal condition, two tele- mode of operation, a 3-pole, 2-way slide-
tercom. phones (telephone 1 and 2) can be used switch S3 is to be used as shown in the
Usually a single telephone is con- as intercom while telephone 3 is connected figure.
nected to a telephone line. If another tele- to the lines from exchange. In changeover In the changeover mode of operation,
phone is required at some distance, a par- mode, exchange line is disconnected from switch S3 is used to changeover the tele-
allel line is taken for connecting the other telephone 3 and gets connected to tele- phone line for use by telephone 2. The
telephone. In this simple parallel line op- phone 2. switch is normally in the intercom mode
eration, the main problem is loss of pri- For operation in intercom mode, one and telephone 3 is connected to the ex-
vacy besides interference from the other has to just lift the handset of phone 1 change line. Before changing over the ex-

132
 CIRCUIT IDEAS

change line to telephone

2, the person at tele-
phone 1 may inform the
person at telephone 2 (in
the intercom mode) that
he is going to
changeover the line for
use by him (the person
at telephone 2). As soon
as changeover switch S3
is flipped to the other
position, 12V supply is
cut off and telephones 1
and 3 do not get any
voltage or ring via the
ring-tone-sensing unit.
Once switch S3 is
flipped over for use of
exchange line by the person at telephone exchange lines will go to telephone 2 only the handset of telephone 3 is lifted, it is
2, and the same (switch S3) is not flipped and the ring-tone-sensing circuit will still found to be dead. To make telephone 3
back to normal position after a telephone work. This enables the person at phone 3 again active, switch S3 should be changed
call is over, the next telephone call via to know that a call has gone through. If over to its normal position.

GUARD FOR REFRIGERATORS building blocks. The ladder resistance-

trimpot configuration in conjunction with
modified bridge comparator ensures reli-

AND AIR-CONDITIONERS able sequential operations of boosting,

low-voltage cut-in, bucking, and high-volt-
age cut-off.
When the input line voltage is above
THOMAS SEBASTIAN S.C. DWIVEDI 140V, relay RL2 energises and the boosted
voltage appears at the N/O contact RL1(b)
of relay RL1. However, relay RL1 remains

A
myriad of circuits have appeared cuit blending three features, namely, un- de-energised under two conditions: first,
in EFY for protection of refrig- der-/over-voltage protection, switch ‘on’ if the input is below 170V threshold volt-
erators and air-conditioners delay, and regulation. age (being controlled by trimpot VR1), and
against voltage fluctuations and brown- The circuit with commonly available second, due to the initial shunting effect
outs. Here is a useful and economic cir- components is a combination of familiar of capacitor C6 at the base junction of

133
 CIRCUIT IDEAS

transistor T2. The transistor T2 will be bucking point. The output is isolated when tion of transistor T2, on resumption af-
enabled only when the charging capaci- the input reaches prohibitive voltage (say ter a power failure or an over-voltage
tor raises its base potential to overcome 270V), over-voltage sensing being con- condition, repeatability of on-delay is
the reverse bias voltage at its emitter. trolled by trimpot VR3 to saturate tran- taken care of.
Thus, capacitor C6 and resistor R6 deter- sistor T4, which, in turn, cuts off relay By selecting the current rating of re-
mine the duration of the on-delay, which RL1 via transistors T5 and T6. As a con- lay contacts (5A or 30A) and auto-trans-
is approximately three minutes for the sequence, no output is available from the former (500VA or 4000VA), the circuit can
given values. auto-transformer. be adapted suitably for a refrigerator or
As soon as relay RL1 energises due to The resistor R8 discharges the tim- air-conditioner to obtain a regulation of
the switching action of transistor T2, the ing capacitor C6 when RL1 energises. 200V to 240V for an input variation of
boosted voltage appears at the output. The This is done to ensure that when capaci- 170V to 270V.
adjustment of trimpot VR2 controls the tor C6 is connected back to the base junc-

RADIO-BAND-POSITION DISPLAY wired around transistors T1 and T2. A

small part of the audio signal from the
speaker terminals is applied to rectifier
M.K. CHANDRA MOULEESWARAN diode D16 and filter capacitor C1 to pro-
RUPANJANA duce a pulsating DC across preset VR1.
The sliding contact of preset VR1 is con-
nected to the base of emitter-follower

T
his circuit is an add-on unit for this arrangement of diodes, the need for stage comprising transistor T2. The out-
radio receivers that lack band-po- another decimal-to-BCD converter IC and put of transistor T2, as amplified by tran-
sition display. The circuit pre- associated parts is obviated. Switches S1 sistor T1, is connected to pin 4 of IC1.
sented here can show up to nine bands. through S9 are actually parts of existing Thus turning ‘on’/‘off’ of display is con-
It also incorporates a
novel feature to make
the display dance
(blink) with the audio
level from the receiver.
The power-supply for
the circuit can also be
derived from the radio-
set.
The conversion of
selected channel to
BCD format is
achieved using diodes
D1 through D15 in con-
junction with resistors
R4 to R7. The voltages
developed across these
resistors (R4 through
R7) serve as logic in-
puts to BCD inputs of
BCD to 7-segment de-
coder IC1 (CD4511).
When all switches are
in ‘off’ state, the volt-
age across resistors R4
through R7 is logic
zero, but when any of the switches S1 band-switch of the radio. Usually, one or trolled by the pulsating voltage developed
through S9 is slided to ‘on’ position, the two changeover contacts would be found from audio output of radio.
output across these resistors changes to extra in the modular pushbutton-type The power-supply regulator stage is
output proper BCD code to represent the band-switches of the radios. needed only when radio power-supply is
selected channel. This BCD code is con- IC1’s display blanking pin 4 is con- greater than 6V DC.
verted to 7-segment display by IC1. By nected to a display-blinker-control circuit

134
September

2000
 CONSTRUCTION

DISPLAY SCHEMES FOR INDIAN of CRT controller chip (6845). Therefore

the authors went in to design a separate

LANGUAGES—PART II
CRT controller circuit using discrete
CMOS ICs, which was successfully tested.
Later, at the behest of EFY (proposing
use of dedicated chips to make it a
(HARDWARE AND SOFTWARE) standalone compact project), the authors
developed the present modified circuit us-
ing the 6845 CRT controller itself.
K. PADMANABHAN, S. ANANTHI, K. CHANDRASEKHARAN, Once programmed, the 6845 CRTC
AND P. SWAMINATHAN generates the vertical and horizontal sync
signals for the raster at pins 39 and 40,

T
he 6845 is a programmable CRT dress line A0. When A0 and CS3 are low respectively. The 6845 also provides MA0-
controller, which can be pro- (selected), the program code accesses the MA13 signals for addressing the video
grammed so as to generate a ras- first register. If A0 is high and CS3 is low, memory. The video memory is used here
ter with the desired number of horizontal the second of the two registers is accessed. to store the dot patterns for the data dis-
and vertical raster lines [refer Fig. 1(b)]. In addition, the 6845 has 16 internal reg- played on the TV screen. The video
For detailed explanation of its program- isters. The selection of the internal regis- memory address lines and raster address
ming method for an application using ters for writing is done via the first regis- lines have been used as under:
6845 CRTC, you can refer chapter 16 of ter while the second register is written MA0-MA5 (6 lines) .. To choose one of
the book ‘Learn to Use Microprocessors’ with the data to be transferred into the 64 character slots in every character row.
published by EFY. selected register. RA0-RA3 (4 lines) .. To select one
There are two registers in the 6845, Here, we need 16 lines for a character among the 16 lines on each such row.
which are selected with the help of ad- slot. The width of each character slot is MA6-MA9 (4 lines) .. To select one of
only 8, be- the 16 character rows on screen.
cause that is During each character row, the 16 row
what the lines are selected using RA0-RA3 signals,
shift register which are sequentially incremented from
can handle. 0 to 15. This mode of wiring the CRT
But our mul- controller to the video memory is not the
tilingual usual one. It is unlike the one referred to
characters in chapter 16 of ‘Learn to Use Micropro-
themselves cessors’ book mentioned earlier. There,
are written the MA0, MA1, … lines address the video
in a font of RAM, but the video RAM data goes to the
size 12 x 16. character generator. The character gen-
Therefore erator gets the RA0-RA3, to let it know
the charac- which line of the character the data is to
ters classifi- be output at any instant—because there
cation for the are many lines of dots for each character.
6845 does Here the character generator is not used,
not really but the video RAM directly stores the dot
mean the ac- points of the display text. They are writ-
tual charac- ten by the program into the video RAM.
ters shown, Here RA0-RA3 are the four line-count sig-
because we nals L1 to L4 for the 16 lines, which are
have to use the heights of each Indian language char-
one-and-a- acter (here it includes English as well).
half charac- The four row-count signals MA6-MA9
ter slots for are used here for generating 16 rows of
each of the text per screen. At the end of the 64th
multilingual character byte (representing 43rd charac-
character. ter) display, the display enable signal is
This was blanked. This is to cater to the horizontal
the problem flyback period. The sync signal for the
faced earlier video output is obtained by combining the
while at- H-sync and V-sync outputs from pins 39
Fig. 4: Video RAM storage flowchart tempting use and 40 of CRTC via two resistors (of 10k

136
 CONSTRUCTION

74LS165 outputs the dot pattern. This is

combined with the sync signal at the col-
lector of transistor BC148B using a diode
and a series resistor. Composite video out-
put is available for connection to the TV
monitor from the collector of transistor
BC148B.
Video RAM. The 62256 is a 32k x 8-
bit static RAM; but only 16k address space
has been used here, which makes for a
raster of 512 x 256 pixels, or 128k pixels,
or 128/8=16kB. The RAM 62256 has
A0-A13 address lines for its 16k capacity.
The MA0-MA5, the character-count out-
puts, are given to its first six address pins
A0-A5. Either the 8085 or these charac-
ter-count signals can select these low-
order video memory addresses. A set of
quad 2-line to 1-line data selector ICs 7
and 8 (74157) is used under control of
CS1 (not CS1) to switch between them.
Normally, the MA0-MA5 lines have
access so as to continuously display
the video memory contents, but when
the 8085 writes fresh data, it switches to
A0-A5.
Memory access of the video RAM is
done on the basis of a high-order address
and a low-order address. The eight high-
order address values are written into
74LS373 latch (IC21) by the 8085 using
CS2. The output enable of this latch is
under control of CS1, so that the data
previously written into this latch can be
accessed when CS1 is enabled (active low).
The latched outputs of IC21 are for se-
lecting the A6 to A13 pins of the video
memory.
By this scheme of low-order and high-
order addressing, the memory group of
16k of video RAM is conveniently accessed
by just 2k space of the 8085’s memory
area. Further, it also facilitates software
writing. The high address data is that
of the row and line-select information.
These are decided by the software based
on what row of character and which line
of that row is to be filled from the charac-
ter code EPROM, as a specific key is
depressed. The character slot information
in any row is then written by a memory
write into the low-order address of the
RAM.
By using 74LS373, the data into the
Fig. 5: Actual-size, component-side track layout for the schematic diagram of Fig. 1 latch is written with its output in tri-state
condition (pin 1 high). When pin 1 of
each) and then coupling it to the base of obtained from the shift register IC 74LS373 is enabled (low), the RAM chip
transistor BC148B to invert the sync sig- 74LS165. This register is loaded at each is written with the character slot data by
nals at its collector. character-clock beginning. The shifting is the 8085 into its low-order address. Nor-
The video signal is the dot pattern accomplished by the dot clock. Pin 7 of IC mally, the lines RA0-RA3 and MA6-MA9

137
 CONSTRUCTION

a new key is typed.

The data bus lines are likewise con-
nected by a 74LS245 bidirectional buffer.
The pixel data for the typed-in character
must be written into the video RAM, after
reading the table of dots stored in the char-
acter code EPROM and writing the same
into the video RAM. The table of data (dots)
for each language occupies a 2k memory
area, and hence four languages can be se-
lected by address lines A11 and A12 of the
character generator EPROM. For each
character currently being entered, the set
of pixels are read byte-by-byte, stored as
nibbles temporarily in buffer memory by
the program, and then output into the
video RAM nibble-by-nibble.
If desired, four languages may be
typed on the same row using function keys
F1-F4 under software control. The se-
lected language is indicated by two of the
LEDs (LED1 and LED2) at the output of
7475. The same outputs are also wired to
the A11 and A12 address lines of the char-
acter EPROM. You may press F1 and
start typing in English, then press F2 and
start typing in Hindi, and so on.
The 74165 video shift register (com-
monly used with all CRT display-based
circuits) is used to shift the dot signals
loaded in parallel (8 bits) from the
memory into a serial form to get the ac-
tual video line signal.
In Fig. 1(b), the dot clock is generated
using a 74132 gate (N15) in conjunction
with a capacitor-resistor combination of
R23 (and preset VR1) and C2 to function
as an oscillator. The frequency is about
10 MHz, which is divided by 8 in 74190
divider/counter. This gives the character-
slot clock. The load command to the shift
register is obtained from pin 11/13
(shorted) of the 74190 IC which goes to
pin 2 of IC 74LS165. The 2764 EPROM
is filled with control program at its high-
est address range of 2k (i.e. 1800-1FFF),
because its pins A11 and A12 are pulled
high.

Basic principles
The basic principles of Indian language
display software are summarised below
while a flowchart for storage of pixel data
Fig. 6: Actual-size, solder-side track layout in the video RAM is given in Fig. 4.
1. Multiple language fonts are stored
are extended by buffer IC 74LS244 to the data to reach the address lines A6-A13 of in an 8k or bigger memory space, if nec-
RAM high address lines if CS1 is low. If the video RAM chip. In this way, the video essary. EPROM occupies 2k locations for
CS1 goes high, the buffer is tri-stated at RAM is addressable by both the CRTC each font of a language. Thus, four lan-
its output, allowing the latch (74LS373) 6845 circuitry as well as the 8085, when guage fonts can be stored using 8k

138
 CONSTRUCTION

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Fig. 7: Component layout for PCB

EPROM. English appears as an expanded font. The

2. Since 12 horizontal dots per char- hook characters in Hindi like ‘Hu’ and
acter are insufficient for an Indian lan- ‘hoo’ need one more dot—the 13th dot—
guage, a 12 x 12 matrix is chosen, though vertically. The hook characters are non-

139
 CONSTRUCTION

space-moving characters in the standard This can be written into an EEROM fixed on the board.
typewriters of the Indian languages. Par- (using any 8085 kit or the one published
ticularly in Hindi, there are multiple in Nov. ’99 issue of EFY) and is fixed into
hooks, such as in ‘hoom’. In the type- the board, and then the LEDs on the left
Conclusion
writer, the hook characters do not advance bottom of the board wired at the 7475 The two designs, the first one based on a
(move space) after they are typed. The (IC9) outputs would indicate the No. 5 as simple PC and the second one based on
program checks the code, and if it is a they glow. dedicated hardware/software using com-
hook code, it does not write immediately If this is not observed, one has to puter keyboard, for display of Indian lan-
the dots corresponding to that hook into check for proper connections from the guage text on a monitor and TV screen
the video memory, but waits for the suc- data lines to the 7475, connections to the respectively are illustrative of the tech-
ceeding keyboard stroke(s) for a non-hook 74156 address decoder, and the gate sig- niques of video display and software pro-
character to follow before shifting the cur- nals to pins 4.13 of the 7475 as per gramming for Indian languages. The
sor. Thereupon, the program combines the Fig. 1. former is useful in an industrial or office
dot pattern of the hook characters with Further, the connections to the video environment, while the latter can be used
that of the following main character, and RAM 62256 through the buffer IC 74244 in public display systems.
then places the net dot pattern into the and 74157 (pair of ICs 17 and 18) should The main intention of this article
video memory. be checked for their correctness. When is not merely to show the design of either
3. Since memory contains only 8 bits the CPU 8085 is writing to the video RAM, the dedicated display unit or the program
per location, one-and-a-half memory lo- the 74157 (pair) connects A0-A5 address on PC for typing multilingual text, but to
cations are assigned for each character lines of the 8085 to those of the video demonstrate the coding scheme for Indian
shown on screen, thus providing 12 dots RAM. Then, pin 1 of the 74157 ICs should languages with just 128 8-bit codes in-
per horizontal row in TV format. (This be pulsing low. stead of the currently talked about 16-bit
is more like the computer format.) In Thus, the following program to write codes. Further, the coding scheme sug-
this way, even characters start at a to 1800H in a loop would check for pulse gested here does not disturb existing typ-
memory byte and extend up to the next at pin 1 of 74157 and a high pulse at pins ists of the 11 Indian languages, for which
byte (its higher order nibble). Odd num- 1 and 19 of 74244. When the IC 74244 is typewriters already exist.
bered characters start at the right nibble passing the 6845 signals, the IC 74373 is The memory saving is a vital factor
(lower order nibble) of a byte and extend in tri-state condition because its pin 1 is when one uses such codes for the Indian
to the next complete byte (refer Fig. 4). then high. languages like English. Presently, all such
With 64 bytes on each horizontal row, P: MVI A,55 Indian text is treated on a computer or on
up to 43 characters can be shown per STA 1800H the Internet as graphic patterns only and
row. The hardware caters to a 64 x 16 LDA 1800H consumes large memory space. If 1k of
character display comprising 512 x 256 OUT 80H memory is taken for one page of screen
pixels. HLT with coding like this, it would take 8k in
The control software in the 8085 board Or, in place of HLT, a loop may be an ordinary graphics mode. When archives
for the entire unit does the job of reading executed as under: of text are to be kept in databases, the
the keyboard, selecting the language, writ- JMP P ASCII-like coding is the best.
ing the key code into video RAM, and The above short programs will enable With program PIXEL.bas or with the
doing minor editing as well. the checks to be made. dedicated display unit using IBM PC-
A double-sided PTH PCB is required 2. Another program to initialise compatible keyboard, one can type in
for assembling the circuit. The actual-size the 6845 as per the routine given in the three languages using the ASCII-like
component-side and solder-side track lay- listing is to be entered in the EEROM codes.
outs for the PCB are shown in Figs 5 and and then tested for proper H sync and Note: The following softwares pertain-
6, respectively. Fig. 7 shows the compo- V sync signals from pins 39 and 40 of ing to this project, which could not be
nent layout. 6845. issued with September EFY-CD due to
3. The video clock signals and the unavoidable circumstances, will now be
video output should be checked for proper included in October EFY-CD:
Testing the board random display raster. 1. Pixel6.BAS
The board may be tested by a sequence of 4. Another program for checking 2. Pixel6.EXE
small programs written into the control ERASE memory should be entered into 3. Chtamil2
EEROM. Verifications are done as per the the EEROM and then tested for the era- (The above files pertain to computer
guidelines given below: sure of clear screen of the raster. based display scheme).
1. The first thing to test is whether 5. The keyboard program should be 4. Tam.LST
the data bus and address lines are func- tested as per the KBD routine. 5. Tam.EPR
tional and the output port 80H is also Only after successful testing of 6. Chtamil3
functional. Here is a simple program for the board as per above-mentioned guide- (The files at sl. no. 4 and 5 pertain to
the same: lines, the full program as per the listing control program and its hex dump for con-
MVI A,55H given in Appendix 1 should be pro- trol EPROM while file at sl. no. 6 con-
OUT 80H grammed into control EPROM at its high- tains hex code for character generator
HLT est 2k address range (1800-1FFF) and EPROM.

140
 CONSTRUCTION

both 2764 ICs (IC3 and IC4) as 11 through 74LS165 (IC22) (i.e. pin 11/13 of IC23 to
Errata for Part I of the article 13 and 15 through 19. go to pin 2 while pin 14 of IC23 to go to
1. Refer Fig. 1(a). Please renumber data 2. Refer Fig. 1(b). Interchange con- pin 1 of IC22).
pins 9 through 11 and 13 through 17 of nections between pin numbers 1 and 2 of

(Appendix I) CONTROL PROGRAM LISTING

Addr. Code Label Mneumonics Remarks of “$”
0000 .ORG 0000H 00F6 16 00 MVI D,00
26 11 LINE_NUMB: EQU 1126H 00F8 21 00 11 LXI H,NIBLE_BUF ;BUFFER MEMORY STORING
28 11 ROW_NUMB: EQU 1128H NIBBLE BY NIBBLE
29 11 CHAR_NUMB: EQU 1129H 00FB 0A B2: LDAX B ;Get pixel code, one byte
25 11 NIB_FL: EQU 1125H 00FC 5F MOV E,A ;move into E
00 11 BUFFER_MEM: EQU 1100H 00FD 1F RAR ;Get first nibble of four dots
00 11 NIBLE_BUF: EQU 1100H 00FE 1F RAR
29 11 CHAR_NO: EQU 1129H 00FF 1F RAR
50 11 AUX_STORE: EQU 1150H 0100 1F RAR
27 11 CHAR_POS: EQU 1127H 0101 E6 0F ANI 0FH
05 00 F1KEY: EQU 05H 0103 77 MOV M,A ;store first nibble, left
D6 00 F2KEY: EQU D6H 0104 23 INX H ;to store at next address
04 00 F3KEY: EQU 04H 0105 14 INR D ;increment counter
DC 00 F4KEY: EQU DCH 0106 7B MOV A,E ;mov a,e
0000 31 FF 13 LXI SP,13FFH 0107 E6 0F ANI 0FH ;NEXT FOUR DOTS
0003 F3 DI 0109 77 MOV M,A ;Store it in buffer
0004 C3 80 00 JMP 0080H 010A 23 INX H
0080 .ORG 80H 010B 14 INR D
0080 CD E6 04 CALL CRTCON_INIT ;initialise c.r.t.c. 010C 7A MOV A,D ;check if all (12 lines x 3nibles =36)
0083 CD 0B 05 CALL CLEAR ;clear video memory 010D FE 24 CPI 24H ;compare if all 36 nibbles for $ saved
0086 3E 00 MVI A,00 010F CA 16 01 JZ EN
0088 D3 80 OUT 80H 0112 03 INX B
008A CD 12 04 CALL KBD ;CALL KEYBOARD 0113 C3 FB 00 JMP B2
008D 4F BEG: MOV C,A 0116 E1 EN: POP H
008E DB 80 IN 80H 0117 D1 POP D
0090 E6 03 ANI 03H 0118 C1 POP B
0092 FE 01 CPI 01 0119 C9 RET ;Data storage in 100-1123 buffer
0094 CA CA 00 JZ HINDI memory over
0097 FE 00 CPI 0 ;VIDEO RAM STORE ROUTINE
0099 CA A9 00 JZ ENGLISH ;ROW NO.AND CHARACTER NUMBER AT ENTRY, STORED IN 1128 AND 1127
009C FE 02 CPI 02H 011A 3A 27 11 VDUST: LDA CHAR_POS ;CHARACTER POSITION ON
009E CA BE 00 JZ TAMIL SCREEN
00A1 FE 03 FL: CPI 03H 011D CD 8A 01 CALL CH_NUMB ;CALCULATES CHAR. SLOT FROM
00A3 CA A6 00 JZ LANG3 CHAR.NO.
00A6 C3 8D 00 LANG3: JMP BEG ;YET UNDEFINED. 0120 5F MOV E,A
00A9 79 ENGLISH: MOV A,C 0121 16 14 MVI D,14H
00AA CD 98 01 E: CALL CL_CH_CK ;CONTROL CHARACTER CHECK 0123 3E FF MVI A,FFH
00AD D2 B6 00 JNC CURSORA 0125 32 26 11 STA LINE_NUMB ;LINE NO. STORED IN 1126
00B0 CD E5 00 CALL NIBST ;NIBBLE STORE 0128 21 00 11 LXI H,BUFFER_MEM ;POINT TO BUFFER MEMORY
00B3 CD 1A 01 CALL VDUST ;VdU STORE MEANS WRITE VdRAM 012B 3A 26 11 NXTLIN: LDA LINE_NUMB
00B6 CD 22 02 CURSORA: CALL INC_SP ;CURSOR NEXT 012E 3C INR A
00B9 C3 8D 00 JMP BEG 012F 32 26 11 STA LINE_NUMB ;lines 0 -11 decimal
00BC 00 NOP 0132 3A 28 11 LDA ROW_NUMB ;rows 0 -15 decimal
00BD 00 NOP 0135 17 RAL
00BE 79 TAMIL: MOV A,C 0136 17 RAL
00BF CD B4 02 CALL CHOOKT ;COMPARE HOOK CHARACTERS IN 0137 17 RAL
TAMIL 0138 17 RAL
00C2 DA D4 00 JC TAMHKFIL ;TAMIL HOOK FILLING 0139 E6 F0 ANI F0H
00C5 C3 AA 00 JMP E 013B 47 MOV B,A
00C8 00 NOP 013C 3A 26 11 LDA LINE_NUMB
00C9 00 NOP 013F B0 ORA B ;GET HIGH ADDRESS
00CA 79 HINDI: MOV A,C 0140 32 00 18 STA 1800H ;STORE IN VIDEO LATCH 74374
00CB CD D2 02 CALL HIHOCK ;COMPARE HOOK CHARACTER 0143 3A 26 11 LDA LINE_NUMB
HINDI 0146 FE 0C CPI 0CH ;CHECK FOR > 12 LINES
00CE DA DA 00 JC HINHK ;HINDI HOOK FILLING ROUTINE 0148 C2 4C 01 JNZ STORE
00D1 C3 AA 00 JMP E 014B C9 RET
00D4 CD 13 03 TAMHKFIL: CALL HIHKFIL ;CALL HOOK CHARACTER FILL 014C 3A 25 11 STORE: LDA NIB_FL ;1125 H IS USED FOR STORING
00D7 C3 B6 00 JMP CURSORA ODD/EVEN CHAR. IN D0 BIT
00DA F5 HINHK: PUSH PSW 014F 1F RAR
00DB CD 8A 03 CALL ROW13FIL ;CALL 13TH ROW FILL 0150 DA 73 01 JC LOAD_RT ;RIGHT HALF IS TO BE LOADED
00DE F1 POP PSW 0153 7E LEFT: MOV A,M ;TAKE BYTE (NIBBLE BUFFER)
00DF CD 48 03 CALL HI_HO_CHFIL ;CALL HINDI HOOK FILL 0154 17 RAL
00E2 C3 B6 00 JMP CURSORA 0155 17 RAL
;NIBBLE STORE ROUTINE (ASCI CODE IN ACC.for current character say $) 0156 17 RAL
00E5 C5 NIBST: PUSH B 0157 17 RAL
00E6 D5 PUSH D 0158 E6 F0 ANI F0H ;move nibble left
00E7 E5 PUSH H 015A 47 MOV B,A ;save in B
00E8 5F MOV E,A 015B 23 INX H ;point to next nibble buffer
00E9 16 08 MVI D,8 ;Start address of char.gen ROM 015C 7E MOV A,M
00EB 1A LDAX D ;GET LOW ADDRES OF 015D B0 ORA B ;join with left nibble
CHARACTER TABLE 015E 12 STAX D ;store in video ram
00EC 4F MOV C,A 015F 13 INX D
00ED 3E 80 MVI A,80H ;ADD 80H TO A 0160 23 INX H ;get address of next char.slot
00EF 83 ADD E 0161 7E MOV A,M ;Read from buffer
00F0 5F MOV E,A 0162 07 RLC ;Move left
00F1 1A LDAX D ;Get high address of cha. table 0163 07 RLC
00F2 C6 08 ADI 8 0164 07 RLC
00F4 47 MOV B,A 0165 07 RLC
00F5 0A LDAX B ;b-c contain start address of char.table 0166 E6 F0 ANI F0H

141
 CONSTRUCTION

0168 47 MOV B,A ;Save in B 01F2 37 P9: STC

0169 1A LDAX D ;Read video RAM 01F3 3F CMC
016A E6 0F ANI 0FH 01F4 C9 RET
016C B0 ORA B 01F5 37 P10: STC ;Not any control code!
016D 12 STAX D ;store in video RAM (only alter left 01F6 C9 RET
nibble) ;CURSOR ROUTINE
016E 23 INX H 01F7 0E 00 CUR_ROUT: MVI C,00
016F 1B DCX D 01F9 CD 07 02 CALL CUR_FILL
0170 C3 2B 01 JMP NXTLIN ;JUMP TO NEXT LINE 01FC CD 12 04 CALL KBD
0173 46 LOAD_RT: MOV B,M ;NIBBLE IN B 01FF F5 PUSH PSW
0174 1A LDAX D ;Get from video ram 0200 0E FF MVI C,FFH
0175 E6 F0 ANI F0H ;save left nibble 0202 CD 07 02 CALL CUR_FILL ;Erases cursor after key-entry
0177 B0 ORA B 0205 F1 POP PSW
0178 12 STAX D 0206 C9 RET
0179 23 INX H ;CURSOR FILL ROUTINE:
017A 7E MOV A,M ;get next nibble 0207 3A 28 11 CUR_FILL: LDA ROW_NUMB
017B 17 RAL 020A 17 RAL
017C 17 RAL 020B 17 RAL
017D 17 RAL 020C 17 RAL
017E 17 RAL 020D E6 F0 ANI F0H
017F 47 MOV B,A ;save in B, left part 020F 47 MOV B,A
0180 23 INX H 0210 3E 0C MVI A,0CH ;UNDERLINE,13TH LINE
0181 7E MOV A,M 0212 B0 ORA B
0182 B0 ORA B ;now a fullbyte 0213 32 00 18 STA 1800H ;SAVE IN VIDEO LATCH
0183 13 INX D 0216 16 14 MVI D,14H
0184 12 STAX D 0218 3A 27 11 LDA CHAR_POS ;
0185 1B DCX D 021B CD 29 11 CALL CHAR_NO
0186 23 INX H 021E 5F MOV E,A ;SAVE CHAR. NO. IN e
0187 C3 2B 01 JMP NXTLIN ;NEXT LINE 021F 79 MOV A,C
;CHARACTER NO. SUBROUTINE 0220 12 STAX D ;STORE UNDERLINE PIXELS
;A CONTAINS CHARACTER NUMBER IN THE ROW 0221 C9 RET
;a RETURNS SLOT NUMBER. 1125H STORES 0 OR 1 FLAG ;INCREMENT SPACE ROUTINE
;ACCORDING AS CHARACTER NUMBER GIVES EVEN OR ODD. 0222 3A 27 11 INC_SP: LDA 1127H ;Character no.
018A C5 CH_NUMB:PUSH B 0225 FE 2A CPI 2AH ;(42 characters/row)
018B 47 MOV B,A 0227 D2 34 02 JNC Q1
018C 1F RAR ;to divide by 2 022A 3C INR A ;Increment char.no.
018D 4F MOV C,A ;store in C 022B 32 27 11 STA 1127H ;store it
018E 3E 00 MVI A,0 022E CD F7 01 S1: CALL CUR_ROUT
0190 17 RAL 0231 37 STC ;carry flag to indicate main program
0191 32 25 11 STA NIB_FL ;Store in nibble flag 0232 3F CMC ;cleared and return
0194 79 MOV A,C 0233 C9 RET
0195 80 ADD B 0234 3A 28 11 Q1: LDA 1128H ;to increment row number
0196 C1 POP B 0237 FE 0F CPI 0FH
0197 C9 RET 0239 D2 40 02 JNC Q2
;CONTROL CHARACTERS CHECKING ROUTINE 023C 3C INR A
0198 FE 20 CL_CH_CK: CPI 20H ;space code? 023D 32 28 11 STA ROW_NUMB
019A C2 A3 01 JNZ P1 0240 3E 00 Q2: MVI A,00H
019D CD 22 02 CALL INC_SP ; 0242 32 27 11 STA 1127H ;clear character number -
01A0 37 STC ;carry flag cleared to ;first character, next row
01A1 3F CMC ;indicate main program that it was 0245 C3 2E 02 JMP S1
control code ;DECREMENT BACKSPACE
01A2 C9 RET ;ret 0248 3A 27 11 DECR_SP: LDA 1127H ;load char.no.
01A3 FE 08 P1: CPI 08H ;BACKSPACE CODE 024B 3D DCR A ;decrement
01A5 C2 AE 01 JNZ P2 024C DA 5E 02 JC Q4 ;check not first character
01A8 CD 48 02 CALL DECR_SP ; 024F 32 27 11 STA 1127H ;store one less
01AB 37 STC 0252 CD 61 02 CALL ERASE ;erase all 13 rows
01AC 3F CMC 0255 3A 27 11 LDA 1127H
01AD C9 RET 0258 3D DCR A
01AE FE 0A P2: CPI 0AH 0259 32 27 11 STA 1127H
01B0 C2 C2 01 JNZ P3 025C 37 STC
01B3 3A 28 11 LDA 1128H 025D C9 RET
01B6 3C INR A 025E 37 Q4: STC
01B7 FE 10 CPI 10H 025F 3F CMC
01B9 D2 BF 01 JNC P4 0260 C9 RET
01BC 32 28 11 STA 1128H ;ERASE CHARACTER:
01BF C3 C9 01 P4: JMP P5 0261 3A 29 11 ERASE: LDA CHAR_NUMB ;find char.slot No.
01C2 FE 0C P3: CPI 0CH ;(CTRL-L =CURSOR LINE LEFT) 0264 CD 29 11 CALL CHAR_NO
01C4 C2 CF 01 JNZ P6 0267 5F MOV E,A
01C7 3E 00 MVI A,0 0268 16 14 MVI D,14H ;video RAM high addr.
01C9 32 27 11 P5: STA 1127H 026A 3E FF MVI A,FFH ;ONE LESS THAN ZERO
01CC 37 STC 026C 32 26 11 STA LINE_NUMB
01CD 3F CMC 026F 3A 26 11 NXTL: LDA LINE_NUMB
01CE C9 RET 0272 3C INR A ;line no. increases from 0
01CF FE 0B P6: CPI 0BH (CURSOR UP control-K) 0273 32 26 11 STA LINE_NUMB
01D1 C2 E1 01 JNZ P7 0276 3A 28 11 LDA ROW_NUMB ;row no. is output on left nibble
01D4 3A 28 11 LDA 1128H 0279 17 RAL
01D7 3D DCR A 027A 17 RAL
01D8 DA DE 01 JC P8 027B 17 RAL
01DB 32 28 11 STA 1128H 027C 17 RAL
01DE 37 P8: STC 027D E6 F0 ANI F0H
01DF 3F CMC 027F 47 MOV B,A
01E0 C9 RET 0280 3A 26 11 LDA LINE_NUMB
01E1 FE 09 P7: CPI 09H ;Ctrl-I cursor goes down 0283 B0 ORA B ;line no. is output on right nibble
01E3 C2 F5 01 JNZ P10 0284 32 00 18 STA 1800H ;IN VIDEO LATCH
01E6 3A 28 11 LDA 1128H 0287 3A 26 11 LDA LINE_NUMB
01E9 3C INR A 028A FE 0D CPI 0DH ;is it the 14th line?
01EA FE 10 CPI 10H ;not greater than 16 rows 028C C2 90 02 JNZ STORE1 ;if between 0 and 13, save
01EC D2 F2 01 JNC P9 028F C9 RET
01EF 32 28 11 STA 1128H ;Stores 11, but the left L is not useful, 0290 3A 25 11 STORE1: LDA NIB_FL ;check for odd or even slot position
so becomes 01 0293 1F RAR

142
 CONSTRUCTION

0294 DA A5 02 JC RIG_NIB ;if flag set go to start writing from right 0336 2F CMA
nible 0337 B0 ORA B ;OR with ‘hook’ dots
;LEFT NIBBLE ROUTINE 0338 2F CMA
0297 3E FF LEFT_NIB: MVI A,FFH 0339 77 MOV M,A
0299 13 INX D 033A 23 INX H
029A 1A LDAX D 033B 13 INX D
029B E6 0F ANI 0FH 033C 7D MOV A,L
029D 06 F0 MVI B,F0H 033D FE 24 CPI 24H ;36 nibbles
029F B0 ORA B 033F C2 32 03 JNZ PB
02A0 12 STAX D 0342 CD 1A 01 CALL VDUST ;store it
02A1 1B DCX D 0345 37 STC
02A2 C3 6F 02 JMP NXTL 0346 3F CMC ;clear carry flag
;RIGHT NIBBLE 0347 C9 RET
02A5 1A RIG_NIB: LDAX D ;HINDI HOOK CHAR. FILL (MULTIPLE HOOKS)
02A6 E6 F0 ANI F0H 0348 CD E5 00 HI_HO_
02A8 06 0F MVI B,0FH CHFI: CALL NIBST
02AA B0 ORA B 034B 21 00 11 PQ1: LXI H,1100H
02AB 12 STAX D 034E 11 50 11 LXI D,1150H
02AC 13 INX D 0351 7E PP1: MOV A,M
02AD 3E FF MVI A,FFH 0352 12 STAX D
02AF 12 STAX D 0353 13 INX D
02B0 1B DCX D 0354 23 INX H
02B1 C3 6F 02 JMP NXTL 0355 7D MOV A,L
;COMPARE HOOK CHARACTER (TAMIL) 0356 FE 24 CPI 24H
02B4 FE 50 CHOOKT: CPI 50H ;HOOK CHARACTER( ) 0358 C2 51 03 JNZ PP1
02B6 CA D0 02 JZ NM ;JUMP- NON-MOVING CHARC. 035B CD 12 04 CALL KBD
02B9 FE 70 CPI 70H ;HOOK CHAR ( ) 035E F5 PUSH PSW
02BB CA D0 02 JZ NM 035F CD E5 00 CALL NIBST
02BE FE 5B CPI 5BH 0362 21 00 11 LXI H,1100H
02C0 CA D0 02 JZ NM 0365 11 50 11 LXI D,1150H
02C3 FE 7B CPI 7BH 0368 7E PP2: MOV A,M
02C5 CA D0 02 JZ NM 0369 2F CMA
02C8 FE 2B CPI 2BH 036A 47 MOV B,A
02CA CA D0 02 JZ NM 036B 1A LDAX D
02CD 37 STC 036C 2F CMA
02CE 3F CMC 036D B0 ORA B ;OR WITH HOOK DATA
02CF C9 RET 036E 2F CMA ;OF PREVIOUS KEY
02D0 37 NM: STC ;CARRY SET FOR HOOK 036F 77 MOV M,A
CHARACTER 0370 23 INX H
02D1 C9 RET 0371 13 INX D
;COMPARE HOOK CHARACTER FOR HINDI 0372 7D MOV A,L
02D2 FE 2D HIHOCK: CPI 2DH 0373 FE 24 CPI 24H
02D4 CA 11 03 JZ NH 0375 C2 68 03 JNZ PP2
02D7 FE 3D CPI 3DH 0378 F1 POP PSW
02D9 CA 11 03 JZ NH 0379 CD D2 02 CALL HIHOCK ;Hindi hook character check
02DC FE 51 CPI 51H 037C F5 PUSH PSW
02DE CA 11 03 JZ NH 037D CD 8A 03 CALL ROW13FIL ;For some characters 13th line has a
02E1 FE 71 CPI 71H few dots
02E3 CA 11 03 JZ NH 0380 F1 POP PSW
02E6 FE 41 CPI 41H 0381 DA 4B 03 JC PQ1
02E8 CA 11 03 JZ NH 0384 CD 1A 01 CALL VDUST
02EB FE 53 CPI 53H 0387 37 STC
02ED CA 11 03 JZ NH 0388 3F CMC
02F0 FE 57 CPI 57H 0389 C9 RET
02F2 CA 11 03 JZ NH ;13th LINE FILLING FOR SOME HINDI HOOKS
02F5 FE 77 CPI 77H 038A F5 ROW13FIL:PUSH PSW
02F7 CA 11 03 JZ NH 038B FE 71 CPI 71H ;HOOK CODE
02FA FE 5A CPI 5AH 038D CA 9C 03 JZ HOOKU
02FC CA 11 03 JZ NH 0390 FE 77 CPI 77H
02FF FE 61 CPI 61H 0392 CA AA 03 JZ HOOKV
0301 CA 11 03 JZ NH 0395 FE 2D CPI 2DH
0304 FE 73 CPI 73H 0397 CA B8 03 JZ HOOKW
0306 CA 11 03 JZ NH 039A F1 POP PSW
0309 FE 7A CPI 7AH 039B C9 RET
030B CA 11 03 JZ NH 039C 21 00 11 HOOKU: LXI H,1100H ;Fill hook data at 1100 -01
030E 37 STC ;NON-HOOK CHAR. 039F 3E E0 MVI A,E0H ;Hook dot for 13th line
030F 3F CMC ;CLEARS CARRY FLAG 03A1 77 MOV M,A
0310 C9 RET 03A2 23 INX H
0311 37 NH: STC ;SETS CARRY FLAG FOR 03A3 3E 7F MVI A,7FH
0312 C9 RET ; HOOK CHARACTER 03A5 77 MOV M,A
;HOOK CHARACTER FILL ROUTINE(OTHER THAN HINDI) 03A6 2B DCX H
0313 CD E5 00 HIHKFIL: CALL NIBST ;store nibbles of chra. code in 03A7 C3 C6 03 JMP K
;1100h - 1124h 03AA 21 00 11 HOOKV: LXI H,1100H
0316 21 50 11 QA: LXI H,1150H 03AD 3E FF MVI A,FFH ;FFEF, one dot
0319 11 50 11 LXI D,1150H ;Aux. store 03AF 77 MOV M,A ;for “Hoo”- hook
031C 7E PA: MOV A,M ;store all data in aux. store 03B0 23 INX H
031D 12 STAX D 03B1 3E EF MVI A,EFH
031E 23 INX H 03B3 77 MOV M,A
031F 13 INX D 03B4 2B DCX H
0320 7D MOV A,L 03B5 C3 C6 03 JMP K
0321 FE 24 CPI 24H 03B8 21 00 11 HOOKW: LXI H,1100H
0323 C2 1C 03 JNZ PA 03BB 3E FC MVI A,FCH ;FCFF, two dots
0326 CD 12 04 CALL KBD 03BD 77 MOV M,A
0329 CD E5 00 CALL NIBST ;get pixel data in 1100h - 1124h 03BE 23 INX H
032C 21 00 11 LXI H,1100H 03BF 3E FF MVI A,FFH
032F 11 50 11 LXI D,1150H 03C1 77 MOV M,A
0332 7E PB: MOV A,M 03C2 2B DCX H
0333 2F CMA ;compliment it as data 03C3 C3 C6 03 JMP K
0334 47 MOV B,A ;were entered like that 03C6 CD CA 03 K: CALL THIRL ;call thirteenth line fill
0335 1A LDAX D 03C9 F1 POP PSW

143
 CONSTRUCTION

03CA 3A 29 11 THIRL: LDA CHAR_NUMB 0456 C9 RET

03CD CD 29 11 CALL CHAR_NUMB 0457 16 01 SH_PRES: MVI D,01H
03D0 5F MOV E,A 0459 C3 28 04 JMP PK
03D1 16 14 MVI D,14H 045C 16 02 CONTROL: MVI D,02H
03D3 3A 28 11 LDA ROW_NUMB 045E C3 28 04 JMP PK
03D6 17 RAL 0461 79 LANGCH: MOV A,C
03D7 17 RAL 0462 FE 05 CPI F1KEY
03D8 17 RAL 0464 CA 77 04 JZ L1
03D9 17 RAL 0467 FE D6 CPI F2KEY
03DA E6 F0 ANI F0H 0469 CA 7C 04 JZ L2
03DC 47 MOV B,A 046C FE 04 CPI F3KEY
03DD 3E 0C MVI A,0CH 046E CA 81 04 JZ L3
03DF B0 ORA B 0471 FE DC CPI F4KEY
03E0 32 00 18 STA 1800H ;STORE IN VIDEO LATCH 0473 CA 86 04 JZ L4
03E3 3A 25 11 LDA NIB_FL 0476 C9 RET
03E6 1F RAR 0477 3E 00 L1: MVI A,0 ;OUTPUT 0 ON leds
03E7 DA F1 03 JC R 0479 D3 80 OUT 80H
03EA 7E MOV A,M ;LOAD FIRST ONE BYTE 047B C9 RET
03EB 12 STAX D 047C 3E 01 L2: MVI A,1 1
03EC 23 INX H 047E D3 80 OUT 80H
03ED 7E MOV A,M 0480 C9 RET
03EE 13 INX D 0481 3E 02 L3: MVI A,2 2
03EF 12 STAX D ;THEN NEXT BYTE 0483 D3 80 OUT 80H
03F0 C9 RET 0485 C9 RET
03F1 7E R: MOV A,M ;fills as for right nible store 0486 3E 03 L4: MVI A,3 3
03F2 0F RRC 0488 D3 80 OUT 80H
03F3 0F RRC 048A C9 RET
03F4 0F RRC 048B 7A ASCII_C
03F5 0F RRC ONV: MOV A,D
03F6 E6 0F ANI 0FH 048C E6 01 ANI 01H
03F8 47 MOV B,A 048E CA 9E 04 JZ SHIFT_CODE
03F9 1A LDAX D ;read video ram 0491 E6 02 ANI 02H
03FA E6 F0 ANI F0H ;DO NOT DISTURB LEFT NIBBLE 0493 CA A4 04 JZ CONT_CODE
03FC B0 ORA B 0496 21 00 07 LXI H,TABLE1 ;TABLE1 FOR LOWER CASE
03FD 12 STAX D ;COMBINE AND STORE NORMAL
03FE 13 INX D 0499 79 SA1: MOV A,C
03FF 7E MOV A,M ;NEXT BYTE NIBBLE BY NIBBLE 049A 85 ADD L
0400 07 RLC 049B 6F MOV L,A
0401 07 RLC 049C 7E MOV A,M
0402 07 RLC 049D C9 RET
0403 07 RLC 049E 21 80 07 SHIFT_
0404 E6 F0 ANI F0H CODE: LXI H,TABLE2 ;TABLE2 FOR SHIFT CODE
0406 47 MOV B,A 04A1 C3 99 04 JMP SA1
0407 23 INX H 04A4 21 00 07 CONT_
0408 7E MOV A,M CODE: LXI H,TABLE1 ;TABLE3 FOR CONTROL CODE
0409 0F RRC 04A7 79 MOV A,C
040A 0F RRC 04A8 85 ADD L
040B 0F RRC 04A9 6F MOV L,A
040C 0F RRC 04AA 7E MOV A,M
040D E6 0F ANI 0FH 04AB E6 3F ANI 3FH
040F B0 ORA B 04AD C9 RET
0410 12 STAX D ;STORE IN VIDEO RAM 04AE 06 08 PULSE_
0411 C9 RET READ: MVI B,08H
;KEYBOARD ROUTINE 04B0 0E 00 MVI C,00
0412 E5 KBD: PUSH H 04B2 DB 80 PP: IN 80H
0413 D5 PUSH D 04B4 E6 20 ANI 20H
0414 C5 PUSH B 04B6 C2 B2 04 JNZ PP
0415 CD AE 04 CALL PULSE_READ 04B9 DB 80 QQ: IN 80H
0418 79 MOV A,C 04BB E6 20 ANI 20H
0419 FE 12 CPI 12H 04BD CA B9 04 JZ QQ
041B CA 57 04 JZ SH_PRES 04C0 DB 80 PK1: IN 80H
041E FE 59 CPI 59H ;IS IT SHIFTT RIGHT KEY? 04C2 E6 20 ANI 20H
0420 CA 57 04 JZ SH_PRES 04C4 C2 C0 04 JNZ PK1
0423 FE 2D CPI 2DH ;IS IT CONTROL KEY ? 04C7 DB 80 IN 80H
0425 CA 5C 04 JZ CONTROL 04C9 17 RAL
0428 CD AE 04 PK: CALL PULSE_READ 04CA 17 RAL
042B 79 MOV A,C 04CB 17 RAL
042C FE F0 CPI F0H 04CC 17 RAL
042E C2 28 04 JNZ PK 04CD 79 MOV A,C
0431 CD AE 04 CALL PULSE_READ 04CE 1F RAR
0434 FE 12 CPI 12H 04CF 4F MOV C,A
0436 CC 4D 04 CZ SH_REL 04D0 DB 80 QQ1: IN 80H
0439 FE 59 CPI 59H 04D2 E6 20 ANI 20H
043B CC 4D 04 CZ SH_REL 04D4 CA D0 04 JZ QQ1
043E FE 2D CPI 2DH 04D7 05 DCR B
0440 CC 52 04 CZ CONT_REL 04D8 C2 C0 04 JNZ PK1
0443 CD 61 04 CALL LANGCH ;CHECK IF LANGUAGE CHANGING 04DB CD DF 04 CALL DELAY
F1.. KEYS PRESS’D 04DE C9 RET
0446 CD 8B 04 CALL ASCII_CONV 04DF 1E 20 DELAY: MVI E,20H
0449 C1 POP B 04E1 1D D1: DCR E
044A D1 POP D 04E2 C2 E1 04 JNZ D1
044B E1 POP H 04E5 C9 RET
044C C9 RET ;6845 INITIALISE ROUTINE
044D 7A SH_REL: MOV A,D 04E6 11 FB 04 CRTCON_
044E E6 FE ANI FEH INIT: LXI D,TABLEINIT
0450 57 MOV D,A 04E9 06 00 MVI B,0
0451 C9 RET 04EB 21 00 1C IP: LXI H,1C00H
0452 7A CONT_REL: MOV A,D 04EE 70 MOV M,B
0453 E6 FD ANI FDH 04EF 23 INX H
0455 57 MOV D,A 04F0 1A LDAX D

144
 CONSTRUCTION

04F1 77 MOV M,A 0750 FF FF 2C FF .DB FFH, FFH, 2CH, FFH, 5BH,2BH,FFH,FFH, FFH,
04F2 04 INR B FFH,0DH,5DH, FFH,21H,FFH,FFH
04F3 13 INX D 0754 5B 2B FF FF
04F4 78 MOV A,B 0758 FF FF 0D 5D
04F5 FE 10 CPI 10H 075C FF 21 FF FF
04F7 C2 EB 04 JNZ IP 0760 FF FF FF FF .DB FFH, FFH, FFH, FFH, FFH,FFH,08H,FFH, FFH,
04FA C9 RET 31H,FFH,34H, 37H,09H,FFH,FFH
04FB 55 40 46 09 TABL .DB 55H,40H,46H,09,12H,08H,10H,11H,0,10H,0,0BH, 0764 FF FF 08 FF
EINIT: 0,0,0,0 0768 FF 31 FF 34
04FF 12 08 10 11 076C 37 09 FF FF
0503 00 10 00 0B 0770 30 FF 32 35 .DB 30H, FFH, 32H, 35H, 36H,38H,FFH,FFH, FFH,
0507 00 00 00 00 FFH,33H,2DH, 2BH,39H,FFH,FFH
;CLEAR SCREEN ROUTINE 0774 36 38 FF FF
050B C5 CLEAR: PUSH B 0778 FF FF 33 2D
050C E5 PUSH H 077C 2B 39 FF FF
050D 0E 00 MVI C,00 0780 TABLE2:
050F 0D A1: DCR C 0780 FF FF FF FF .DB FFH,FFH,FFH,FFH,FFH,FFH,FFH,FFH
0510 CA 28 05 JZ A2 0784 FF FF FF FF
0513 26 14 MVI H,14H 0788 FF FF FF FF .DB FFH,FFH,FFH,FFH,FFH,FFH,FFH,FFH
0515 2E 00 MVI L,00 078C FF FF FF FF
0517 79 MOV A,C 0790 FF FF FF FF .DB FFH, FFH, FFH, FFH, FFH, 51H, 21H, FFH,FFH,
0518 32 00 18 STA 1800H FFH,5AH,53H,41H,57H,40H,FFH
051B 3E FF A3: MVI A,FFH 0794 FF 51 21 FF
051D 77 MOV M,A 0798 FF FF 5A 53
051E 2C INR L 079C 41 57 40 FF
051F 7D MOV A,L 07A0 FF 43 58 44 .DB FFH, 43H, 58H, 44H, 45H, 24H, 33H, FFH, FFH,
0520 FE 80 CPI 80H 20H, 56H, 46H, 5AH, 52H, 25H, FFH
0522 C2 1B 05 JNZ A3 07A4 45 24 33 FF
0525 C3 0F 05 JMP A1 07A8 FF 20 56 46
0528 E1 A2: POP H 07AC 5A 52 25 FF
0529 C1 POP B 07B0 FF 4E 42 48 .DB FFH, 4EH, 42H, 48H, FFH, 59H, 36H, FFH, FFH,
052A C9 RET FFH, 4DH, 4AH, 55H, 26H, 2AH,FFH
0700 .ORG 700H 07B4 FF 59 36 FF
0700 TABLE1: 07B8 FF FF 4D 4A
0700 FF FF FF FF .DB FFH,FFH,FFH,FFH,FFH,FFH,FFH,FFH 07BC 55 26 2A FF
0704 FF FF FF FF 07C0 FF 2C 2B 49 .DB FFH, 2CH, 2BH, 49H, 4FH,29H,28H,FFH, FFH,2EH,
0708 FF FF FF FF .DB FFH,FFH,FFH,FFH,FFH,FFH,FFH,FFH 2FH,FFH, 2BH,50H,5FH,FFH
070C FF FF FF FF 07C4 4F 29 28 FF
0710 FF FF FF FF .DB FFH,FFH,FFH,FFH, FFH,71H,31H,FFH,FFH,FFH, 07C8 FF 2E 2F FF
7AH,73H,61H,77H,32H,FFH 07CC 2B 50 5F FF
0714 FF 71 31 FF 07D0 FF FF 22 FF .DB FFH, FFH, 22H, FFH, 7BH,2BH,FFH,FFH, FFH,
0718 FF FF 7A 73 FFH,0D,5DH, FFH,21H,FFH,FFH
071C 61 77 32 FF 07D4 7B 2B FF FF
0720 FF 63 78 64 .DB FFH, 63H, 78H, 64H, 65H, 34H, 33H, FFH, FFH, 07D8 FF FF 00 5D
20H, 76H, 66H,7AH,72H,35H,FFH 07DC FF 21 FF FF
0724 65 34 33 FF 07E0 FF FF FF FF .DB FFH, FFH, FFH, FFH, FFH,FFH,08H,FFH, FFH,
0728 FF 20 76 66 31H,FFH,34H, 37H,09H,FFH,FFH
072C 7A 72 35 FF 07E4 FF FF 08 FF
764 0730 FF 6E 62 68 .DB FFH, 6EH, 62H, 68H, FFH, 79H, 36H, FFH, FFH, 07E8 FF 31 FF 34
FFH, 6DH, 6AH, 75H, 37H, 38H,FFH 07EC 37 09 FF FF
0734 FF 79 36 FF 07F0 30 FF 32 35 .DB 30H, FFH, 32H, 35H, 36H,38H,FFH,FFH, FFH,FFH,
0738 FF FF 6D 6A 33H,2DH, 2BH,39H,FFH,FFH
073C 75 37 38 FF 07F4 36 38 FF FF
0740 FF 3C 6B 69 .DB FFH, 3CH, 6BH, 69H, 6FH,30H,39H,FFH, FFH,3EH, 07F8 FF FF 33 2D
3FH,FFH, 3BH,70H,2DH,FFH 07FC 2B 39 FF FF
0744 6F 30 39 FF 0800
0748 FF 3E 3F FF END ❏
074C 3B 70 2D FF

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145
 CONSTRUCTION

SRAM 6116 is a volatile type memory.

Therefore battery backup is required to

DIGITAL CODE LOCK RUPANJANA

retain data during power failures. The cir-
cuit around transistor T1, comprising di-
odes D1 through D4, resistors R4 and R5,
capacitor C4, and a 4.5V battery pack
BISWAJIT GUPTA connected to pins 24 and 18 of IC5 (SRAM
6116), allows the changeover of the cir-
cuit to operate in power-down mode dur-

A
versatile digital code lock circuit ample, one can arrange to store an eight ing power failures. In this mode, the static
is presented here, which can have hex-digit secret code as first two digits in RAM chip retains data, while consuming
up to 32-digit long secret code. 1st page, next three digits in 8th page, very little power with as low a current as
The length of the secret code can be eas- next one digit in 3rd page, and the last 0.03 mA to 0.6 mA—depending upon the
ily varied by changing the position of two digits in 14th page. chip used. For example, HM611L-5 will
jumpers. The available options are to draw 0.03 mA at 2V Vdd (in power-down
PARTS LIST
make the code 2-, 4-, 8-, 16-, or 32-digit mode), as per databook. This gives a long
Semiconductors:
long. When the keyed-in code matches IC1 - 74C922 hexadecimal life to the battery.
with the stored secret code, a relay gets keyboard encoder Address counter. IC8 (74HC4040) is
energised. The contacts of the relay may IC2 - 74HC244 octal tri-state buffer a 12-stage binary counter, in which the
IC3 - 74HC688 8-bit comparator
be used appropriately to operate, lock, or five least significant address lines A0
IC4, IC7 - 74HC132 quad 2-input
unlock any device or appliance, as desired NAND gate with Schmitt through A4 (for addressing 32 locations)
by the user. trigger input are sequentially selected on receipt of
The circuit makes use of a RAM to IC5 - 6116 2k x 8-bit SRAM clock pulses. Selection for the required
IC6, IC8 - 74HC4040 12-stage binary
store and output the stored code to en- number of hex digits to be used as secret
counter
able in-situ coding and changing of the IC9 - 74LS32 quad 2-input OR gate code can be made by jumpering one of
code easily. To retain the contents of RAM IC10 - 74LS74 dual J-K Flip-Flop the output pins (7, 6, 5, 3, or 2) of IC8 to
in case of power failure and to save power, IC11 - 7805 regulator 5V pin 2 of IC9 (74LS32), using jumper JPN1
T1 - BS170 n-channel MOSFET
a 4.5V battery backup arrangement is pro- for obtaining 2-, 4-, 8-, 16-, or 32-digit
T2 - BC548B npn transistor
vided, so that the system may operate in D1, D2, D5 - 1N4148 switching diode long secret code, respectively.
power-down mode with the battery cater- D3, D4 - 5.1V, 0.25W zener diode Keyboard encoding. 16-key key-
ing to the retention of only the RAM’s D6 - 1N4001 rectifier diode board encoder IC1 74C922 from National
D7, D8 - 1N4007 rectifier diode
contents. Thus, the power supply to the Semiconductor is used in conjunction with
LED1 - Red LED
circuit can be switched off to minimise LED2 - Yellow LED a 16-digit keypad for encoding the pressed
the power consumption to about 0.6 mA. LED3 - Green LED key data. It comprises an internal oscilla-
Capacitors: tor for clock generation for its own use
C1, C3 - 1µF, 10V tantalum and an inbuilt key debounce circuitry. Ca-
The Circuit C2 - 100nF ceramic disk pacitors C2 and C3 connected to its pins
C4 - 470nF ceramic disk
Memory organisation. A 6116 static C5 - 10µF, 10V electrolytic
6 and 5 determine the key scanning fre-
RAM (2048 x 8-bit) IC5 is used in the C6 - 2200µF, 25V electrolytic quency and debounce period, respectively.
circuit with A9 and A10 address pins con- C7 - 100nF, ceramic disk This chip gives a 4-bit data output
nected to the ground. Thus, here we are Resistors (all ¼-watt, ±5% carbon, unless from pin 14 through 17, corresponding to
effectively using an address space of 512 stated otherwise): a pressed key. Whenever a key is pressed,
locations only. This address space of 512 R1 - 100-kilo-ohm DA (data available) output pin 12 goes to
R2, R3, R5,
locations is further divided into 16 pages R7, R10, R11- 10-kilo-ohm
logic 1, to indicate availability of fresh
of 32 locations each. Page selection is done R4 - 1.5-kilo-ohm data at its output pins (14 through 17).
using 4-way DIP switch S2 in the circuit. R6, R8, R9 - 470-ohm This pin 12 reverts to its logic low state
Thus, in each page, an address space of R12 - 27-ohm when the pressed key is released. The
R13 - 2.7-kilo-ohm
32 is available for storing the secret code. RN1 - 4x10-kilo-ohm resistor net-
data outputs of IC1 are tri-state. Its out-
Each digit of the code comprises a hex work (5-pin SIP) put enable (OE) pin 13 is grounded
digit, which can be stored as a nibble, Miscellaneous: through resistor R2 to keep this chip in
requiring only 4-bit data space. It is stored RL1 - 12V, 500-ohm relay, PCB enabled state. The DA output signal at
as data bits D4 through D7 in each loca- mountable its pin 12 is used for the following func-
tion. Data bits D0 through D3 are not S1 - SPDT switch tions via the gates of quad NAND Schmitt
S2 - 4-way DIP switch
used and the corresponding pins are S3 - Push-to-on switch
IC4 and IC7:
therefore pulled to ground via 10-kilo-ohm BZ1 - 12V DC buzzer with inbuilt (a) As a clock for 12-stage binary
resistor R3. Thus, maximum length of a oscillator counter IC8 (74HC4040) via Schmitt
code can be up to 32 hex digits. One can, X1 - 230V AC primary to 12V-0- NAND gates N1 and N8, which advances
12V, 500 mA secondary
however, keep one’s secret code spread transformer
the counter by one count for every clock.
over all the 16 pages randomly. For ex- (b) For sounding of buzzer BZ1 and

146
 CONSTRUCTION

quad 2-input OR-

gate chip, of which
only one gate is
used here. This gate
is wired as a reset
circuit (both for
auto and manual
reset operation) for
IC8 and IC6. One
can reset both the
counters (IC6 and
IC8) manually, by
pressing reset
switch S3.
Auto-reset func-
tion will take place
whenever preset
number of digits of
secret code has
been entered, either
for verification/op-
eration or for regis-
tration. In verifica-
tion mode, the se-
cret code would ei-
ther be right or
wrong. Basically,
the auto-reset func-
tion keeps the se-
cret code really se-
cret, and is smart
enough to confuse
an intruder.

Operational
mode control
circuitry
The R1-C1 combi-
nation around mode
switch S1 functions
as a bounce elimi-
nator. Switch S1 is
a secret code verifi-
cation and registra-
tion mode selector
switch.
Register mode.
When switch S1
is kept in register
mode, logic ‘0’
output of gate N4
enables second
section of octal 3-
state buffer IC2
Fig. 1: Schematic diagram of versatile digital code lock (74HC244) via pin
lighting of LED1 via Schmitt NAND gates responding to the pressed key has been 19 (OE2). At the same time, OE and WE
N7, N5, and N6 to provide audio-visual generated for further processing. pins of RAM are taken to logic 1 and logic
indication to the effect that the data cor- Auto-reset circuit. IC9 (74LS32) is a 0 states, respectively, to enable writing

147
 CONSTRUCTION

data corre-

a portal dedicated to electronics enthusiasts

sponding to
each depres-
sion of key is

www.electronicsforu.com
written into se-
quential loca-
tions of the se-
lected page/
pages
Operate/
Fig. 2: Power supply for the code lock verify mode.
In operate/
of data into the RAM, while 8-bit com- verify mode position of switch S1, the
parator IC3 is disabled. Thus, the key- state of OE2 (pin 19) of IC2, and OE*
board data (corresponding to a pressed and WE signals (at pin 20 and 21 of
key) at the output of IC1, buffered by IC2, RAM 6116) is reverse of that at register
is present at D4 through D7 pins of RAM mode. Thus, RAM is selected for reading
(IC5). This data gets stored at an address the data corresponding to the address se-
corresponding to the selected page, via 4- lected via counter IC8. At the same time,
way DIP switch S2, and its location is IC3 (74HC688), an 8-bit comparator (con-
determined by outputs Q1 through Q5 of figured here as a 5-bit comparator), is
12-bit counter IC8. enabled. It will compare the entered digit
If the first key-press operation occurs of secret code with the SRAM contents
soon after pressing reset switch S3, the at the location selected by counter IC8,
first data gets entered at address ‘0’ of assuming that before the start of verifi-
the selected page. On release of the key, cation operation, counter IC8 is reset with
the counter (IC8) increments by one (ad- the help of reset switch S3 so that first
dress also increments by one), as a result address selected is ‘0’.
of clock pulse applied to its pin 10. Hence, When data is entered via keypad for
the next key-pressed data will get writ- verification, i.e. to open or close the lock,
ten at the incremented address. Thus, address of SRAM (IC5) will be

Fig. 3: Actual-size, single-sided PCB for circuits shown in Figs 1 and 2

148
 CONSTRUCTION

can be assembled on a 12x10 cm single-sided, gen-

eral-purpose PCB, using a few wire jumpers. How-
ever, an actual-size, single-sided PCB for the com-
plete circuit shown in Fig. 1, and that of power sup-
ply in Fig. 2, is shown in Fig. 3. The component lay-
out for the PCB is shown in Fig. 4.
The total cost of construction of this circuit will
not exceed Rs 800. The use of IC bases for ICs will be
a good practice. MOSFET BS170 used in the circuit
is very sensitive to static electricity, so it needs to be
handledwithcare.A100nFbypasscapacitorshould
beusedwitheachchip.

Operation
1.Afterassemblingthecircuit,recheckalltheconnec-
tionsandapplypowerwithoutputtingtheICsintotheir
bases.Verifythesupplyandgroundpinvoltagesatall
theICbases.Thenplug-inallthechipsintotheirbases,
afterturning‘off’thepower.
2. Put switch S1 in ‘register mode’
position. Decide a secret code. Suppose it
is a 4-digit long code; select a page using
4-way DIP switch S2.
3. Use jumper JPN1 to extend pin 6
of IC8 to pin 2 of IC9 and jumper JPN2
to extend pin 6 of IC6 to pins 3/pin 11 of
Fig. 4: Component layout for the PCB IC10.
4. Turn ‘on’ power and press reset
incremented automatically whenever a entered digits correctly, IC6 will provide switch S3 momentarily. Now press the
pressed key is released (as during regis- a pulse at one of its output pins (i.e. 7, 6, keypad key corresponding to the first digit
ter operation). If the data entered via 5, 3, or 2), depending upon the selected of your secret code. LED1 will light up
keyboard is found equal on comparison secret code length. Pin 7 will give this and buzzer will sound briefly. Then enter
with stored data, the output (OA=B) pin pulse for 2-digit length, pin 6 for 4-digit the rest of the three digits of your secret
19 of magnitude comparator IC3 will go length, pin 5 for 8-digit length, pin 3 for code one-by-one in a similar way.
to logic low for the period the keypad 16-digit length, and pin 2 for 32-digit 5. Flip switch S1 to ‘operate/verify’
key is kept pressed. On release of the length of secret code. One of these out- position, since secret code registration is
key, pin 19 will come back to its previ- puts has to be jumpered to pins 3 and 11 over. You have to remember the switch
ous state (logic 1), thus creating a pulse. of IC10 using jumper JPN2. In fact, the S2 combination (i.e. page number) and
During logic 0 state at pin 19 of IC3, identical output pins of IC6 and IC8 have the secret code. To open or close the lock,
LED2 will glow to indicate correctness of to be connected to pins 3/11 (shorted) of make sure that switch S2 is in the same
the code entered. When this LED goes IC10 and pin 2 of IC9, respectively, position as used during secret code regis-
‘off’, you may enter the next digit of the through jumpers JPN2 and JPN1. tration. Now press reset switch S3 mo-
secret code. If LED2 does not flash, it IC10 (74LS74) is a dual J-K flip-flop mentarily and enter secret code digits
means that the digit you entered was chip, in which both the flip-flops are con- one-by-one. On entry of each secret code
not the right one. Now press reset switch figured to work in toggle mode. Both the digit correctly, you will get a confirma-
S3, and start entering the secret code flip-flops get same trigger input through tion signal through flashing of LED2. Af-
from the first digit onward again. This pins 3 and 11 respectively. One of the ter entering all digits, the lock will re-
kind of error and reset operation will, flip-flops drives LED3 connected to Q1 spond (relay will energise). If the code
however, not effect the lock status. (pin 5), while output Q2 at pin 9 con- entered was correct, then LED3 will light
Pin 19 of IC3 is connected to clock nected to the base of transistor T2, up. If secret code has not been entered
input pin 10 of IC6 (74HC4040). In verifi- through resistor R11, drives relay RL1, correctly, re-enter the same after press-
cation mode, whenever a correct digit of whose contacts may be used for switch- ing reset switch S3. Switch S1, along with
secret code is entered, LED2 will flash ing ‘on’/‘off’ supply to a lock or appliance. the whole circuit, must be kept hidden
and IC3 will generate a pulse at its pin One could even use it for locking/unlock- while in use, except for the keyboard and
19. This pulse will advance the counter ing of mains supply to any appliance. switches S2 and S3.
IC6, until the auto-reset function (depen- When the lock is in ‘open’ state (i.e. RL1
dent on position of jumper JPN1) is in- energised), LED3 will be ‘on’. LED3, when
voked by current count value of IC8. If ‘off’, will mean ‘closed’ state of the lock.
all the digits of secret code match the The whole circuit (excluding keypad)

149
 C I RC ICR CUUII TT I ID D
EAS
EAS

BINARY TO DOTMATRIX DISPLAY TABLE I

DECODER/DRIVER
Displayed Hex Displayed Hex
character input character input
RUPANJANA 0 00 L 15
1 01 M 16
2 02 N 17
JUNOMON ABRAHAM 3 03 O 18
4 04 P 19
5 05 Q 1A

D
otmatrix display is suitable for ter is that, for each character, a corre- 6 06 R 1B
displaying alphanumeric charac- sponding bit pattern is stored in an 7 07 S 1C
ters and symbols. Dedicated EPROM. When we supply a particular bi- 8 08 T 1D
9 09 U 1E
dotmatrix display driver ICs are available, nary number, corresponding to the input
A 0A V 1F
but these are costly and not easily avail- hex digits shown in Table I, bitmap of the B 0B W 20
able commercially. It would therefore be character shown against that number gets C 0C X 21
wise to make your own dotmatrix display, transferred to the dotmatrix display. For D 0D Y 22
using easily available common ICs. One example, for letter ‘Z’, you are required to E 0E Z 23
F 0F + 24
speciality of the circuit design presented enter hex 23 (referred as page address), G 10 – 25
here is that you can yourself decide the i.e. 010 on address lines A9 through A7, H 11 ÷ 26
size and shape of the characters. Further, and 0011 on address lines A6 through A3. I 12 x 27
you can design it for any language. Addresses A2 through A0 (location ad- J 13 = 28
K 14
The principle of displaying a charac- dresses) are supplied by oscillator-cum-

Fig. 1: Schematic diagram of binary to dotmatrix display decoder/driver

150
 CIRCUIT IDEAS

counter IC nected to a decoder (4028) to drive the lected letter are consecutively scanned.
CD4060, re- columns of the display. The rows are con- This process repeats itself at a fast rate.
petitively nected to the data outputs D0 through Due to persistence of vision, one sees a
outputting D7 of the EPROM. Thus, when a memory steady display of the corresponding
the required location is addressed, its data is output memory map.
bit pattern, on the corresponding column. The eight Table III shows the data needed to be
correspond- memory locations corresponding to the se- stored in specific EPROM locations. It ca-
ing to bit pat-
tern for ‘Z’ in TABLE III
Address Data Address Data Address Data Address Data Address Data Address Data
this case.
Fig. 2: LED pattern for letter ‘A’ [0] [7] [E] [L] [S] [Z]
Let us 000 3C 038 C1 070 FF 0A8 FF 0E0 62 118 81
001 42 039 82 071 91 0A9 01 0E1 91 119 83
TABLE II 002 81 03A 84 072 91 0AA 01 0E2 91 11A 85
Address

003 81 03B 98 073 91 0AB 01 0E3 91 11B 99

004 82 03C 90 074 91 0AC 01 0E4 91 11C A1
050
051
052
053
054

055

056

057

005 42 03D B0 075 81 0AD 01 0E5 91 11D C1

D7 0 0 0 1 0 0 0 X 006 3C 03E C0 076 81 0AE 01 0E6 4E 11E 81
D6 0 0 1 0 1 0 0 X 007 xx 03F xx 077 xx 0AF xx 0E7 xx 11F xx
Binary Data

D5 0 1 0 0 0 1 0 X [1] [8] [F] [M] [T] [+]

D4 1 0 0 0 0 0 1 X 008 00 040 6E 078 FF 0B0 FF 0E8 80 120 10
D3 1 1 1 1 1 1 1 X 009 00 041 91 079 90 0B1 40 0E9 80 121 10
D2 1 0 0 0 0 0 1 X 00A 41 042 91 07A 90 0B2 20 0EA 80 122 10
00B FF 043 91 07B 90 0B3 10 0EB FF 123
D1 1 0 0 0 0 0 1 X
00C 01 044 91 07C 90 0B4 20 0EC 80 FE
D0 1 0 0 0 0 0 1 X
00D 00 045 91 07D 80 0B5 40 0ED 80 124 10
28
48
88

48

XX
Hexdata

1F

1F
28

00E 00 046 6E 07E 80 0B6 FF 0EE 80 125 10

00F xx 047 xx 07F xx 0B7 xx 0EF xx 126 10
[2] [9] [G] [N] [U] 127 xx
010 61 048 64 080 3C 0B8 FF 0F0 FE [–]
see how the bitmap of a character is formed
011 83 049 92 081 42 0B9 40 0F1 01 128 10
to display any specific character. Here we 012 85 04A 91 082 81 0BA 20 0F2 01 129 10
have used an 8 (rows) x 7 (columns) LED 013 89 04B 91 083 8D 0BB 18 0F3 01 12A 10
display. We can use either a readymade 014 91 04C 91 084 89 0BC 04 0F4 01 12B 10
015 61 04D 92 085 4A 0BD 02 0F5 01 12C 10
LED matrix display or assemble one our- 016 00 04E 7C 086 2C 0BE FF 0F6 FE 12D 10
selves. Fig. 2 shows the LED pattern for 017 xx 04F xx 087 xx 0BF xx 0F7 xx 12E 10
letter ‘A’ whose corresponding bitmap in [3] [A] [H] [O] [V] 12F xx
memory is shown in Table II. Each 018 82 050 1F 088 FF 0C0 3C 0F8 F8 [÷]
019 81 051 28 089 10 0C1 42 0F9 04 130 10
memory location represents one column 01A 81 052 48 08A 10 0C2 81 0FA 02 131 10
of the display. Since seven columns are 01B 91 053 88 08B 10 0C3 81 0FB 01 132 10
used, we need seven locations (though 01C B1 054 48 08C 10 0C4 81 0FC 02 133 54
counter supplies eight locations/addresses) 01D D1 055 28 08D 10 0C5 42 0FD 04 134 10
01E 8E 056 1F 08E FF 0C6 3C 0FE F8 135 10
for each character. The bitmap of each 01F xx 057 xx 08F xx 0C7 xx 0FF xx 136 10
character is stored in one memory page [4] [B] [I] [P] [W] 137 xx
(segment) of eight locations (8th location is 020 08 058 FF 090 00 0C8 FF 100 FF [x]
not used). The data from the correspond- 021 18 059 91 091 00 0C9 90 101 02 138 00
022 28 05A 91 092 81 0CA 90 102 04 139 44
ing pages/locations are transferred to the 023 48 05B 91 093 FF 0CB 90 103 08 13A 28
display by scanning the memory locations 024 BF 05C 91 094 81 0CC 90 104 04 13B 10
and columns of the display simultaneously. 025 08 05D 91 095 00 0CD 90 105 02 13C 28
026 08 05E 6E 096 00 0CE 60 106 FF 13D 44
The EPROM used for the purpose is 027 xx 05F xx 097 xx 0CF xx 107 xx 13E 00
27C32, with a memory capacity of 4 kB. [5] [C] [J] [Q] [X] 13F xx
If you want to utilise its full capacity, you 028 E1 060 3C 098 86 0D0 3C 108 83 [=]
can store codes for up to 512 characters. 029 A1 061 42 099 81 0D1 42 109 44 140 28
02A A1 062 81 09A 81 0D2 81 10A 28 141 28
The circuit shown here uses 1 kB of 02B A1 063 81 09B 81 0D3 81 10B 10 142 28
memory space and can show up to 128 02C A1 064 81 09C FE 0D4 85 10C 28 143 28
characters. 02D 92 065 42 09D 80 0D5 42 10D 44 144 28
Each character bitmap is stored in a 02E 8C 066 24 09E 80 0D6 3D 10E 83 145 28
02F xx 067 xx 09F xx 0D7 xx 10F xx 146 28
memory page, and a particular memory [6] [D] [K] [R] [Y] 147 xx
page (character) is selected by giving 030 3C 068 FF 0A0 FF 0D8 FF 110 80 Note: xx =
its address. This page address is selected 031 4A 069 81 0A1 10 0D9 90 111 40 Don’t care
via DIP switches S0 through S7. Each 032 91 06A 81 0A2 10 0DA 90 112 20
033 91 06B 81 0A3 28 0DB 98 113 1F
page is scanned with the help of counter 034 91 06C 81 0A4 44 0DC 94 114 20
CD4060, which has an inbuilt oscillator, 035 4A 06D 42 0A5 82 0DD 92 115 40
whose outputs are connected to A0, A1, 036 24 06E 3C 0A6 81 0DE 61 116 80
037 xx 06F xx 0A7 xx 0DF xx 117 xx
and A2 lines. The same lines are con-

151
 CIRCUIT IDEAS

ters only to numerics, capital English let- display. You can also use this line for con- pages, their address being equal to the
ters, and some symbols. You are at lib- verting it into a blinking display by con- ASCII value of that character. Moreover,
erty to store bit patterns for any other necting it to a suitable output pin of it is possible to display characters of any
data, in any other style, in the EPROM. counter CD4060. language and, if needed, the size of the
The input ‘BI’ indicating blanking in- You can also adapt the circuit for re- display can also be modified by using some
put (actually this is the OE signal of sponding to ASCII input values by stor- additional hardware.
EPROM) can be used for blanking the ing the character bit pattern in memory

AUTOMATIC SPEED-CONTROLLER The first two outputs of IC3 (Q0 and

Q1) are connected (ORed) via diodes D1

FOR FANS AND COOLERS

and D2 to the base of transistor T1. Ini-
S.C. DWIVEDI tially output Q0 is high and therefore re-
lay RL1 is energised. It remains energised
when Q1 becomes high. The method of
PRADEEP VASUDEVA connecting the gadget to the fan/cooler is
given in Figs 3 and 4.

D
uring summer nights, the tem- after some time, and to slow later on. It can be seen that initially the fan
perature is initially quite high. After a period of about eight hours, the shall get AC supply directly, and so it
As time passes, the temperature fan/cooler is switched off. shall run at top speed. When output Q2
starts dropping. Also, after a person falls Fig. 1 shows the circuit diagram of becomes high and Q1 becomes low, relay
asleep, the metabolic rate of one’s body the system. IC1 (555) is used as an astable RL1 is turned ‘off’ and relay RL2 is
decreases. Thus, initially the fan/cooler multivibrator to generate clock pulses. switched ‘on’. The fan gets AC through a
needs to be run at full speed. As time The pulses are fed to decade dividers/ resistance and its speed drops to medium.
passes, one has to get up again and again counters formed by IC2 and IC3. These This continues until output Q4 is high.
When Q4 goes
low and Q5 goes
high, relay RL2 is
switched ‘off’ and
relay RL3 is acti-
vated. The fan
now runs at low
speed.
Throughout
the process, pin
11 of the IC is
low, so T4 is cut
off, thus keeping
T5 in saturation
and RL4 ‘on’. At
the end of the
cycle, when pin 11
(Q9) becomes
high, T4 gets
saturated and T5
to adjust the speed of the fan or the cooler. ICs act as divide-by-10 and divide-by-9 is cut off. RL4 is switched ‘off’, thus
The device presented here makes the counters, respectively. The values of ca- switching ‘off’ the fan/cooler.
fan run at full speed for a predetermined pacitor C1 and resistors R1 and R2 are so Using the circuit described above, the
time. The speed is decreased to medium adjusted that the final output of IC3 goes fan shall run at high speed for a com-
high after about eight hours. paratively lesser time when either of Q0
or Q1 output is high. At medium
speed, it will run for a moderate
time period when any of three out-
puts Q2 through Q4 is high, while
at low speed, it will run for a much
longer time period when any of the
four outputs Q5 through Q8 is high.
If one wishes, one can make the

152
 CIRCUIT IDEAS

fan run at the three speeds for an there are separate windings for separate
equal amount of time by connecting speeds. Such coolers do not use a rheo-
three decimal decoded outputs of IC3 stat type speed regulator. The method of
to each of the transistors T1 to T3. connection of this device to such coolers
One can also get more than three is given in Fig. 4.
speeds by using an additional relay, The resistors in Figs 2 and 3 are the
transistor, and associated compo- tapped resistors, similar to those used in
nents, and connecting one or more manually controlled fan-speed regulators.
outputs of IC3 to it. Alternatively, wire-wound resistors of suit-
In the motors used in certain coolers able wattage and resistance can be used.

BLOWN FUSE INDICATOR

used to trigger the siren. When the fuse
blows, red LED glows. Simultaneously it
S.C. DWIVEDI
switches ‘on’ the siren.
ASHUTOSH KUMAR SINHA In place of a bicolour LED, two LEDs

G
enerally, when an equipment in- arm it is only 2V. So
dicates no power, the cause may current flows through
be just a blown fuse. Here is a the second arm, i.e.
circuit that shows the condition of fuse through the green
through LEDs. This compact circuit is LED, causing it to
very useful and reliable. It uses very few glow; whereas the red
components, which makes it inexpensive LED remains off.
too. When the fuse
Under normal conditions (when fuse blows off, the supply
is alright), voltage drop in first arm is 2V to green LED gets
+ (2 x 0.7V) = 3.4V, whereas in second blocked, and because
only one
LED is
in the
circuit,
the red LED glows. In case of red and green colour can be used. Simi-
of power failure, both LEDs larly, only one diode in place of D1 and
remain ‘off’. D2 may be used. Two diodes are used to
This circuit can be easily increase the voltage drop, since the two
modified to produce a siren LEDs may produce different voltage
in fuse-blown condition (see drops.
Fig. 2). An optocoupler is

over-/under-voltage relay, in case the

OVER-/UNDER-VOLTAGE CUT-OFF mains voltage starts fluctuating in the vi-

cinity of under- or over-voltage preset
points. When the mains supply goes out of

WITH ON-TIME DELAY S.C. DWIVEDI

preset (over- or under-voltage) limits, the
relay/load is turned ‘off’ immediately, and
it is turned ‘on’ only when AC mains volt-
K. UDHAYA KUMARAN, VU3GTH age settles
within the pre-

H
ere is an inexpensive auto cut- as a standalone circuit between set limits for a
off circuit, which is fabricated the mains supply and the load, or period equal to
using transistors and other dis- it may be inserted between an ex- the ‘on’ time
crete components. It can be used to pro- isting automatic/manual stabiliser delay period.
tect loads such as refrigerator, TV, and and the load. The on-time
VCR from undesirable over and under line The on-time delay circuit not delay period is
voltages, as well as surges caused due to only protects the load from switch- presetable for 5
sudden failure/resumption of mains power ing surges but also from quick Fig. 1: Power seconds to 2
supply
supply. This circuit can be used directly changeover (off and on) effect of minutes dura-

153
 CIRCUIT IDEAS

base of T4 via ze-

ner D4 is con-
nected to capaci-
tor C1, which
was in dis-
charged condi-
tion. Thus, LED3
and relay RL1 or
load remain ‘off’.
Capacitor C1
starts charging
slowly towards
Fig. 2: Schematic diagram of over-/under-voltage cut-off with
+12V(A) rail via
on-time delay resistors R6 and
R7, and presets
tion, using presets VR3 and VR4. For elec- value of filtering capacitor C4 is so chosen VR3 and VR4. When the potential across
tronic loads such as TV and VCR, the on- that a fall in mains voltage may quickly capacitor C1 reaches 6.8V (after a delay
time delay may be set for 10 seconds to 20 activate under-voltage TABLE I
seconds. For refrigerators, the delay should sensing circuit, should Showing State of LEDs for Various Circuit Conditions
be preset for about 2 minutes duration, to the mains voltage reach Circuit condition LED1 LED2 LED3 Relay/Load
protect the compressor motor from fre- the low cut-off limit. Over or under voltage ON OFF OFF OFF
quently turning ‘on’ and ‘off’. In the sampling part cut-off in operation
In this circuit, the on-time and off- of the circuit, wired On-time delay in operation OFF ON OFF OFF
time delays depend on charging and dis- around transistor T1, AC voltage normal
charging time of capacitor C1. Here the presets VR1 and VR2 are after on-time delay OFF OFF ON ON
discharge time of capacitor C1 is quite less used for presetting over- or under-voltage termed as on-time delay) to breakdown
to suit our requirement. We want that on cut-off limits, respectively. The limits are zener D4, transistor T4, as also transis-
switching ‘off’ of the supply to the load, the set according to load voltage requirement, tor T5, gets forward biased, to switch ‘on’
circuit should immediately be ready to pro- as per manufacturer’s specifications. LED3 and relay RL1 or load, while LED2
vide the required on-time delay when AC Once the limits have been set, zener goes ‘off’. Should the mains supply go out
mains resumes after a brief interruption, D1 will conduct if upper limit has been of preset limits before completion of the
or when mains AC voltage is interrupted exceeded, resulting in cut-off of transis- on-time delay, capacitor C1 will immedi-
for a short period due to over-/under-volt- tor T2. The same condition can also re- ately discharge because of conduction of
age cut-off operation. This circuit is also sult when mains voltage falls below the transistor T3, and the cycle will repeat
useful against frequent power supply in- under-voltage setting, as zener D2 stops until mains supply stablises within pre-
terruptions resulting from loose electrical conducting. Thus, in either case, transis- set limits for the on-time delay period.
connections; be it at the pole or switch or tor T2 is cut-off and transistor T3 is for- The on-time delay is selected by ad-
relay contacts, or due to any other reason. ward biased via resistor R3. This causes justing presets VR3 and VR4, and resistor
Here supply for the over- and under- LED1 to be ‘on’. Simultaneously, capaci- R6. Zener diode D3 is used to obtain regu-
voltage sampling part of the circuit tor C2 quickly discharges via diode D5 lated 9.1 volts for timing capacitor C1, so
[marked +12V(B)] and that required for and transistor T3. As collector of transis- that preset on-time delay is more or less
the rest of the circuit [marked +12V(A)] tor T3 is pulled low, transistors T4 and independent of variation in input DC volt-
are derived separately from lower half and T5 are both cut-off, as also transistor T5. age to this circuit (which would vary ac-
upper half respectively of centre-tapped Thus, LED2 and LED3 are ‘off’ and the cording to the mains AC voltage). To switch
secondary of step-down transformer X1, relay is de-energised. ‘off’ the relay/load rapidly during undes-
as shown in Fig. 1. If we use common 12V Now, when the mains voltage comes ired mains condition, the timing capacitor
DC supply for both parts of the circuit, within the acceptable range, transistor T2 C1 is discharged rapidly to provide com-
then during relay ‘on’ operation, 12V DC conducts to cut-off transistor T3. LED1 plete control over turning ‘on’ or ‘off’ of
to this circuit would fall below preset low goes ‘off’. Transistor T5 gets forward bi- relay RL1 (or the load). The functioning of
cut-off voltage and thus affect the proper ased and LED2 becomes ‘on’. However, the LEDs and relay, depending on the cir-
operation of the sampling circuit. The transistors T4 and T5 are still ‘off’, since cuit condition, is summarised in Table I.

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154
 CIRCUIT IDEAS

ONE BUTTON FOR STEP, RUN,

be halted if the pushbutton is depressed
momentarily when the circuit is in the
run mode.

AND HALT COMMANDS

As shown in the figure, module A1
acts as an effective switch debouncer for
S.C. DWIVEDI the pushbutton. For a step command, pok-
ing the button quickly will cause ‘Q’ out-
(BASED ON MOTOROLA APPLICATION NOTE) put of A1 to go high and trigger module
A2 (the monostable for run-and-step op-

T
he logic signals to step, run, and tarily. The run command occurs if the but- erations). The Q output of A1 is also fed to
halt a computer or other appro- ton is held down for a time exceeding about ‘D’ input of module A3 (the run-and idle
priate digital devices or system 300 ms. latch). At the same time, the active low Q
may be generated by this circuit, which This time (300 ms) represents an ex- output of A1 triggers the step one-shot
is operated by just a single pushbutton. cellent compromise between circuit speed A4, yielding the step function.
The only active devices used are a dual and accuracy. If this duration is made The sequence of events discussed above
also describes
the initial por-
tion of the run
command,
whereby the
step pulse can
be used to
manually ad-
vance a
computer’s
program
counter by 1.
The run pulse
can be used to
instruct the
computer to
rapidly ex-
ecute succeed-
ing steps auto-
matically. The
Q* output of
A2 moves high
much shorter, the 300 ms after the pushbutton is depressed.
circuit may fail to The positive going (trailing) edge of this
differentiate be- pulse then clocks the state of the
tween the step and pushbutton (as detected by A1) into A3.
run commands, and If the circuit/computer is in run mode,
may generate the then pressing of the button will cause the
run command when circuit to halt the computer by clocking
the step command is in a logic ‘0’ (synchronously available at
desired, or vice data input pin) to the run-and-idle latch
versa. Also, repeat- A3. Note that the step pulse generated at
edly pressing the the start of the halt sequence, as shown
button rapidly to ini- in the timing diagram, is of no conse-
one-shot and a dual flip-flop ICs. tiate step functions will generate the run quence, since when the step is received,
The step command is generated each command if the duration is set for much the machine is already in the run mode
time the pushbutton is depressed momen- more than 300 ms. Finally, the device will and will override that command.

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155
October

2000
 CONSTRUCTION

equal to 100 Hz, and therefore preset PR1

MOSFET-BASED 50Hz
may need to be suitably adjusted.
The output of the astable
S.C. DWIVEDI
multivibrator is given to pin 5 of the

SINEWAVE UPS-CUM-EPS
bistable multivibrator wired around IC
PARTS LIST
Semiconductors:
IC1 - NE555 timer
IC2 - 7473 dual JK-flip-flop
R.V. DHEKALE AND S.D. PHADKE IC3 - 7812 regulator, 12V
IC4 - DB107 bridge rectifier, 1A
IC5 - TL062 dual op-amp

M
ost of the UPS (uninterrupted interruption in operation of a computer IC6, IC7 - µA741 op-amp
power supplies) available in or continuity of the play mode of a VCR D1,D2, D5,
the market internally use a fre- and TV is caused. The complete schematic D6, D7 - 1N4148 switching diode
D3, D3',
quency ranging from 100 Hz to 50 kHz. diagram of the circuit is shown in Fig. 2. D4, D4’ - 1N5408 rectifier diode, 3A
The regulation of output voltage is done When mains is present and is within D8 - Rectifier diode, 16A–(TO3)
using the pulse width modulation tech- the specified limits, the same is fed to the ZD1-ZD7 - 5.1V, 1W zener diode
T1-T3 - BEL187 npn transistor
nique, which produces a quasi-square load. At the same time, battery is charged. TR - BT136 triac
waveform output from the inverter trans- If mains voltage goes below 170 volts (or SCR1 - BT169 SCR
former. Such an output waveform produces mains power fails) or above 270 volts, sys- M1-M6 - IRF250 MOSFET
lots of noise, which is not desirable for a tem changes over from mains to back-up LED1-LED6 - 3mm LED
Resistors (all ¼-watt, ±5% carbon, unless
computer and other sensitive equipment. mode. In the back-up mode, battery volt- stated otherwise):
This voltage waveform can drive a com- age of 12V DC is converted into 230V AC RA - 220-ohm
puter, but not the tubelight, fan, EPBAX, and applied to the load within 1 milli- RC - 4.7-ohm, W/W 20W
R1, R3-R6, R8
TV, VCR, etc properly. The advantage of- second. R12-R15, R18
fered by a UPS is that its changeover pe- However, if battery voltage drops be- R20, R21 - 1-kilo-ohm
riod is quite low, so that the computer or low 10V DC, or output voltage goes below R2 - 100-ohm, 1W
- 4.7-kilo-ohm
any other sensitive load is not interrupted 225V AC, there will be a visual and au- R7 - 4.7-ohm
during the mains failure. dible indication of low-battery state. Dur- R9 - 220-ohm
EPS (emergency power supply) of vari- ing this warning period, one can save the R10, R11 - 68-kilo-ohm
ous brands, providing 50Hz squarewave data and switch off the computer safely. R16 - 100-ohm
R17 - 470-ohm
output, can drive the computer, tubelight, But during the low-battery indication, if R19, R23 - 1.2-kilo-ohm
TV, VCR, fan, etc, but considerable noise the computer or load is not switched off, R22 - 39-kilo-ohm
is produced from the EPS or the load. it remains on back-up mode. After the PR1 (RB)
PR2, PR3, - 22-kilo-ohm preset
Another drawback of an EPS is that its end of back-up time, system switches off PR6 - 10-kilo-ohm preset
changeover period is relatively high, so automatically, due to activation of PR4, PR5 - 1-Meg-ohm preset
the computer may get reset or continuity battery’s deep discharge cut-out circuit, Capacitors:
of the play mode of the VCR may get which reduces the power consumption C1 - 0.01µF ceramic disk
C2 - 3 x 0.47µF, 600V polyester
interrupted on mains failure. from the battery to a negligible value (only C3, C13 - 0.1µF ceramic disk
90 mA). C4-C7 - 1000µF, 16V electrolytic
Inverter control circuit. It uses the C8 - 100µF, 25V electrolytic
The circuit basic squarewave (astable multivibrator)
C9 - 2200µF, 40V electrolytic
C10 - 0.47µF, 25V electrolytic
A 50Hz sinewave offline UPS-cum-EPS oscillator employing IC 555, with 5.1V C11, C12 - 0.22µF polyester
circuit is presented here which produces supply voltage derived from 12V battery Miscellaneous:
F1 - 5A cartridge fuse
a sinewave output with very low noise by using 5.1V zener ZD3 in series with a F2 - 16A cartrige (slow-blow) fuse
level. It drives the equipment/load (< 250 resistance. Astable multivibrator is de- X1 - Primary 9-0-9V/20A
watts), which normally operates on 230V, signed for a frequency of 100 Hz, which Sec. 230V section (1A),
50Hz AC. Changeover period of this sys- can be varied above or below 100 Hz us- Sec. 600V section (300mA
used as L1) transformer
tem is less than 1 millisecond so that no ing preset PR1. The frequency ‘f’ of astable X2 - 230V AC primary to 16V-0-
multivibrator is given by the relation- 16V, 3A secondary trans-
ship: former.
X3 - 230V AC primary to 0-12V,
500mA secondary transformer
SW1 - DPDT switch, 5A
SW2 - SPDT slide switch
where RB = In-circuit resistance of pre- CB - MCCB 4A
set PR1. BZ1 - Piezo buzzer
L1 - 1 Henry (part of X1, 600V tap-
If RA=220 ohms and RB=15 kilo- ping)
ohms, then f=100 Hz. Due to the L2, L3 - 100 µH (20T, 22SWG, air-core,
tolarance of the component values, ob- 8mm dia.)
RLY - 57DP-12-2C2 O/E/N 12V, 150-
served frequency may not be exactly ohm (2-changeover) relay
Fig. 1: Proposed front and rear panal layouts

157
CONSTRUCTION

7473, which pro-

duces the two
50Hz square-
wave outputs at
its pins 8 and 9
with a phase dif-
ference of 180
degrees between
the two. One of
the outputs is
coupled to the
base of transis-
tor T1 through
diode D1 and se-
ries current-lim-
iting resistor R3,
while the second
output is given

Fig. 2: Schematic diagram of MOSFET-based sinewave inverter optional circuit of no-load/over-load protector (within dotted lines)
to the base of
transistor T2
through diode
D2 and series
resistor R4.
Transistors T1
and T2 act as
MOSEFT driv-
ers.
Power out-
put stage. The
collector of tran-
sistor T1 is con-
nected to the
gates of
MOSFETs M1
through M3 (re-
ferred to as
bank 1), while
that of transis-
tor T2 is con-
nected to the
gates of
MOSFETs M4
through M6
(referred to
as bank 2).
MOSFETs M1
through M3 are
connected in
parallel—gates
of MOSFETs M1
through M3 and
those of
MOSFETs M4
through M6 are
made common.
Similarly, drains
and sources of
MOSFETs in
each bank are
paralleled as

158
 CONSTRUCTION

the collector of transistor T2 is 0.7V.

Hence, MOSFETs of bank 2 are cut-
off while those of bank 1 conduct. This
results in a large DC current swing
through the other half of the inverter
transformer X1 primary. In this way,
two banks of the MOSFETs conduct
alternately to produce 230V AC, 50
Hz across the secondary of the in-
Fig. 3: Battery current vs load (squarewave O/P) Fig. 4: Battery current vs load (sinewave O/P) verter transformer X1. Inductance L1

shown in the circuit. Drains of

MOSEFTs of one bank are con-
nected to one extreme taping
of 9-volt primary of the in-
verter transformer X1, and
that of the MOSEFTs of the
second bank are connected to
the other extreme 9-volt tap-
ing of the same transformer.
Centre tap of the primary is
directly connected to the posi-
tive terminal of 12V, 7Ah bat-
tery. Capacitor C2 is connected
across the secondary of the in-
verter transformer, either di-
rectly or via inductor L1
(wound on the same core as ex-
tension of secondary winding),
using sine/square slide switch
SW2.
When mains power fails,
relay gets de-energised and
12V battery supply is fed to the
control circuit through top con-
tacts of the relay to produce
squarewave outputs at pin
Nos. 8 and 9 of IC 7473 with a
frequency of 50 Hz. At any in-
stant, if voltage at pin 8 of IC2
is +5V, the voltage at pin 9 of
IC2 is 0V, and vice versa.
Therefore, when transistor T1
conducts, transistor T2 is cut
off, and vice versa. When tran-
sistor T1 conducts, the voltage
at collector of transistor T1
drops to 0.7 V, and therefore
MOSFETs of bank 1 remain
cut off while collector of tran-
sistor T2 is at 5V. Thus,
MOSFETs of bank 2 conduct
and the current flows through
one-half of inverter trans-
former X1 primary. During the
next half cycle, the voltage at
pin 8 of IC2 is 0V and that at
pin 9 is +5V. As a result, the
voltage at the collector of tran-
sistor T1 is +5V and that at Fig. 5: Actual-size component-side track layout for the PCB

159
 CONSTRUCTION

When traic conducts, 16-0-

16V AC voltage is developed
across the secondary of X2. It
is converted into DC voltage by
the diodes D3 and D4, and the
rectified output is given to the
input of the 12V regulator 7812
(IC3). The output of the regu-
lator is connected across the
relay coil through series resis-
tor R7, which ensures that the
relay just operates when AC
mains is at 170 volts (or more).
When mains voltage is
within the range of 170-270
volts, relay activates. In this
mode, mains voltage is directly
routed to the load through
N/O contacts (lower) of relay
RLY and 4-amp rated contact
breaker (CB). LED2 indicates
that the system is on mains.
At the same time, the rectified
voltage from diodes D3' and D4'
is made available through N/O
contacts (upper) of relay RLY
for charging the battery via
charging resistance RC. If the
mains supply fails or goes out
of the range of 170-270 volts,
relay de-energises and the bat-
tery supply of 12V is connected
to the inverter circuit through
N/C contacts (upper). The volt-
age developed by the inverter
goes to the output socket of
UPS through the N/C contacts
(lower) via 4-amp CB.
Under-/over-voltage cut-
out. The 230V AC mains is
stepped down to 12V AC, us-
ing transformer X3. It is recti-
fied by the bridge rectifier and
filtered by two Pi (F) section
filters to reduce the level of
ripple voltage. The filtered DC
voltage is applied to dual op-
amp IC5 (used as dual com-
Fig. 6: Actual-size solder-side track layout for the PCB. parator). The reference voltage
for the comparators is devel-
and capacitor C2 on the secondary side of the transformer through triac BT136. oped across zener diode ZD4, which is con-
act as filter/resonant circuit (at 50 Hz) to The gate of the triac is connected to the nected to the filtered DC positive rail via
produce a waveform approaching a output of over-/under-voltage cut-off cir- resistor R9. Even if the AC mains voltage
sinewave. LED1, when ‘on’, indicates that cuit. As long as the mains voltage is be- varies between 170V and 270V, the volt-
the system is on back up. tween 170 and 270 volts, +5V is provided age across zener ZD4 remains constant
Charger circuit. This circuit com- to the gate of the triac and hence it con- at 5.1 volts. The cathode of zener diode
prises step-down transformer X2, followed ducts. If AC mains voltage goes out of the ZD4 is connected to the inverting input
by rectifier, regulator, and double- above-mentioned limits, the gate voltage of the comparator IC5(b) and non-invert-
changeover 12V relay RLY. Mains supply falls to 0.7 volt and the triac does not ing input of the comparator IC5(a).
of 230V AC is applied across the primary conduct. Preset PR2 can be used to vary the

160
 CONSTRUCTION

inverting terminal voltage of the compara- 225V AC. This enables the user to take

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tor IC5(a) above and below the reference timely action such as saving data (in case
voltage of 5.1V. Similarly, non-inverting load comprises a computer).
input of the comparator IC5(b) can also Battery deep-discharge cut-out. If

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be varied above and below the 5.1V refer- the UPS system keeps operating in the
ence voltage applied to the inverting in- inverter mode, the battery voltage will
put of IC5(b), using preset PR3. drop eventually to prohibitively low level
Preset PR2 is adjusted such that when (say, 5 volts). If such condition occurs fre-
AC mains voltage goes below 170 volts, quently, the life of the battery will be con-
the voltage at inverting input of compara- siderably reduced. To remove this draw-
tor IC5(a) goes below 5.1 volts, so that its back, it is necessary to use battery deep-
output goes high. As a result, transistor discharge cut-out circuit. If battery volt-
T3 conducts and its collector voltage (con- age goes below 9.5 volts, this circuit will
nected to the gate of triac TR) drops to cause the UPS to shut down, which pre-
0.7 volt, and hence the triac cuts off. This vents the battery from further discharge.
causes relay RLY to de-energise and the This circuit is also built around op-
system changes over to back-up mode of amp µA741 (IC7) working as a compara-
operation. Glowing of LED3 indicates the tor. Voltage at non-inverting input of IC7
under-voltage condition. is 5.1 volts, which is kept constant by ze-
Similarly, preset PR3 is adjusted such ner diode ZD6 and resistor R20. Preset
that when mains voltage goes above 270V PR5 is adjusted in such a way that if bat-
AC, the voltage at non-inverting input of tery voltage goes below 9.5 volts, IC7 out-
the conparator IC5(b) goes above 5.1 volts, put would go high to turn on SCR. Once
so that its output goes high to eventually SCR conducts, the supply voltage for con-
cut-off the triac, and the system again trol circuit drops to near 0V. As a result,
operates in the backup mode. The over- the control circuit is unable to produce gate
voltage indication is shown by glowing of drive pulses for the two MOSFET banks
LED4. and the inverter stops producing AC out-
This means that as long as the mains put.
voltage is within the range of 170V AC to Suppose the mains supply is not avail-
270 V AC, the voltage at the collector of able and you want to switch on the UPS
transistor T3 is 12 volts, and hence triac on load (say, computer). If battery deep-
TR conducts fully and relay RLY activates. discharge cut-out is set for a battery volt-
As a result, the system remains on mains age of 9.5 volts, this means that you want
mode. Diodes D6 and D7 act as 2-input to ‘cold’ start the UPS. On initial switch-
wired-OR gate for combining the outputs ing ‘on’ of the UPS, the starting current
from the two comparators and prevent requirement from the battery is quite high
the output of one comparator going into to cause a drop in battery voltage, due to
the output terminal of other comparator. which battery deep-discharge cut-out cir-
Zener diode ZD6 is used to limit the gate cuit would be activated and inverter is
voltage of the traic to 5.1 volts. not switched ‘on’. To overcome this prob-
Low-battery indicator. This circuit lem, 100µF capacitor C8 is connected
is wired around op-amp µA741 (IC6), across gate-source terminals of SCR. It
which functions as a comparator here. provides necessary delay for the battery
Battery voltage is applied across pins 7 current/voltage to settle down to its stable
and 4. Voltage at non-inverting input of value after switching on.
IC6 is maintained constant at 5.1 volts Reverse battery protection. A 16A
by zener diode ZD5 and series resistor to 20A diode (D8) in conjunction with fuse
R17. Voltage at the inverting input of IC6 F2 provides reverse battery protection, in
can be varied above and below 5.1 volts case battery is connected with reverse po-
using preset PR4. Preset PR4 is adjusted larity. In case of reverse polarity, fuse F2
in such a way that if battery voltage goes will blow and battery supply to the cir-
below 10V, the voltage at inverting input cuit will be immediately switched off.
goes below 5.1 volts, so that output volt- Protection against no-load. An op-
age at pin 6 of IC6 goes high (about 10 tional circuit for ‘no load‘ condition, dur-
V). Hence, LED5 glows and produces in- ing which the output voltage may shoot
termittent sound from the buzzer, indi- up to 290V AC or more, is shown in Fig. 2
cating low-battery status. (within dotted lines). The rectifier and fil-
At the beginning of the indication, the ter used are identical to that of under-
output voltage of inverter would be around voltage or over-voltage protection circuit,

161
 CONSTRUCTION

Back-up time. Using a

single battery of 12V, 7Ah with
a load (100 to 120W) compris-
ing computer along with colour
monitor, the back-up time is 10
to 15 minutes with squarewave
output (half with sinewave out-
put). With a battery of 12V,
180Ah, the back-up time is 4 to
5 hours with squarewave out-
put (2 to 2.5 hours with
sinewave output).
Charging resistance. For
12V/7Ah battery, charging re-
sistance RC should be 10 ohms/
20 watts so that the battery will
not be heated during charging.
Similarly, for 12V/90Ah bat-
tery, charging resistance Rc
should be 4.7 ohms/25 watts,
and for 12V/180Ah battery, 3.3
ohms/30 watts.
Square/sinewave output
selection. The selection of
sinewave or squarewave output
is done using slide switch SW2.
In squarewave position, capaci-
tor C2 is directly shunted
across 230V terminal of the sec-
ondary of transformer X1, while
in sinewave position, coil L1
(extension of 230V secondary,
marked 600V) is added in se-
ries with capacitor C2 to reso-
nate at 50 Hz.The power con-
sumption from the battery in-
creases in sinewave output po-
sition of switch SW2. The
graphs of supply (battery) cur-
rent versus the load for each
position of switch SW2, indicat-
ing the comparative values, are
shown in Figs 3 and 4. (Note.
The secondary winding current
rating for 230V section for
200W output may be chosen as
1 amp, and that for 600V ex-
tension forming inductor L1,
Fig. 7: Component layout for the PCB the current rating of the wind-
ing may be chosen as 300 mA.)
while the comparator circuit is identical the over-voltage (>270V) condition. If Output power. Using six MOSFETs
to over-voltage comparator. And hence, mains voltage spike goes above 270V AC, (three per bank) with proper heat sinks
no separate explanation is required to be gate voltage of triac TR becomes 0.7 volt, with inverter transformer of 16-ampere
included. The output of the circuit is con- and hence triac does not conduct. As volt- primary rating, the UPS-cum-EPS pro-
nected to the gate of SCR1 in Fig 2. age across the coil of relay RLY is zero, vides power up to 250 watts. With this
Spike suppression. Since triac TR is the relay is de-energised and system power, two computers with B&W moni-
connected in series with the primary of changes over to back-up mode during volt- tors, or one computer with colour moni-
charging transformer X2 and gate volt- age spike period. Thus the load is pro- tor and a small printer can be driven.
age is obtained from the under-/over-volt- tected from the voltage spikes in the Using the same circuit, if you use ten
age cut-out, a spike is treated on par with mains. MOSFETs (five per bank) and inverter

162
 CONSTRUCTION

nent-side and
solder-side
track layouts for
the PCB are
shown in Figs 5
and 6, respec-
tively. Fig. 7
shows the com-
ponent layout
scheme. The
wiring diagram
for the chassis
and panel-
mounted com-
ponents con-
nected to the
PCB via connec-
tors (and few di-
rectly to pads) is
shown in Fig. 8.
The pads for
a few compo-
nents are not
existing in the
PCB using ex-
isting pads/
tracks. The
same may have
to be mounted
externally using
the available
pads in accor-
Fig. 8: Wiring diagram of chasis/panel mounted components to the PCB dance with the

transformer of 32-amp primary rating, the MOSFETs in each bank.

power of the UPS-cum-EPS can be in- PCB and component
creased to 500 watts or 625 VA. layout. A double-sided PCB
The transformer ratings as mentioned is proposed for the circuit
above are applicable for squarewave out- of Fig. 2. Except the op-
put. The transformer primary rating will tional circuit of ‘no load pro-
be 25 per cent higher in case of sinewave tection’, all switches, fuse,
output. Also the number of MOSFETs per CB, LEDs, and transform-
bank should also be correspondingly ers are required to be
higher. Provision is made for mounting 5 mounted inside the cabinet
and front-/
back-panels
of the cabi-
net suitably Sinewave output waveform as seen on the oscilloscope
(refer Fig. 1
for the proposed front- and circuit diagram of Fig. 2. The affected com-
back-panel layouts). Large ponents are: (a) C9—across battery termi-
battery terminals may be nals, (b) D8—reverse palarity battery pro-
used for terminating the tection diode, (c) C11 and C12—capacitors
battery leads. The tracks across source and gates of bank 1 and
connecting drains and bank 2, (d) C2—across pole of
sources of MOSFETs may SW2 and neutral of transformer X1
be suitably strengthened secodary, (e) C8—positive end to junction
by depositing solder over of R22 and gate of SCR1 and negative end
the same. to ground.
Photograph of author’s prototype The actual-size compo-

163
 CONSTRUCTION

R-2R D/A CONVERTER-BASED quired for the output to stabilise, or

change from its previous value to the new
value corresponding to fresh digital input

FUNCTION GENERATOR USING word. For a given converter, the output

does not change instantaneously when a
change in the input occurs.

PIC16C84 MICROCONTROLLER For an ideal linear DAC, the transfer

curve is a linear function of input code
which produces a single analogue discrete
value and has a zero settling time
PRASANNA WAICHAL S.C. DWIVEDI
Basic classifications

D
igital to analogue conversion is a A DAC can be classified into one of the
process wherein the analogue code). D to A converters (DACs) find ex- following three types:
output voltage or current is a tensive application in analogue input-out- 1. Current output. Here the output
function of the digital input word (binary put (I/O) systems, waveform generators, is a current proportional to the input digi-
signal processors, motor- tal word.
speed-controllers, voice 2. Voltage output. Here the output
synthesisers, attenuators, is a voltage proportional to the input digi-
etc. tal word.
DACs are characteri- 3. Multiplying output. In this type
sed by the following two of DAC the output voltage or current is a
main performance criteria: function of input digital word multiplied
1. Resolution. It is de- by the reference input (i.e. the voltage
fined as the smallest in- applied or current fed into its reference
cremental change in the terminal).

Fig. 1: Binary weighted resistance DAC

output voltage
that can be re-
solved by a linear
DAC and is equal
to 1/2n (or 2-n) of
the full-scale
span of the DAC.
Here, ‘n’ repre-
sents the number
of bits the DAC
can process.
Resolution can
also be expressed
in percentage of Fig. 3: Input code versus output voltage transfer function of R-2R DAC
full-scale or
in bits.
Higher the
number of
bits that a
DAC can
process,
the better
will be its
resolution.
2. Set-
tling time.
It is the
Fig. 2: 8-bit R-2R DAC time re- Fig. 4: R-2R network used in conjunction with an op-amp for 3-bit application

164
 CONSTRUCTION

PARTS LIST
Semiconductor:
IC1 - PIC16C84, microcontroller
D1-D5 - 1N4148 switching diode
LED1-LED5 - 0.3-inch dia red LED
Resistors (all ¼-watt, ±5% carbon, unless
stated otherwise):
R1, R15-R23 - 10-kilo-ohm
R2-R6 - 560-ohm
R7-R14 - 20-kilo-ohm
Capacitors:
C1, C2 - 27pF ceramic disk
Miscellaneous:
XTAL - 3.575545MHz crystal
S1 - Push-to-on switch

its variants are used in most of the inte-

grating type DACs. While using inte-
grated-type DACs, the following knowl-
edge will come handy:
(a) Power supply. Single +5V to +15V
or double ±5V to ±15V
(b) Reference input. Varies from chip
to chip.
(c) An operational amplifier is needed
at the output to convert current into volt-
age.
(d) The cost increases drastically as
the number of bits (resolution) and/or the
Fig. 5: PIC16C84-based R-2R DAC speed increases.
(e) Sometimes it is not feasible to use
One of the basic DAC circuits, which and an op-amp for the conversion pro- a dual-supply converter for a single-po-
uses precision binary weighted resistors cess, is shown in Fig. 1. The requirement larity (usually positive) signal or in bat-
of precision resistors (from R through tery-powered systems.
TABLE I 2n-1 x R values) is the
Cost comparison between a dedicated 8-bit TABLE II
IC DAC and an 8-bit R-2R DAC main drawback of
this design. It is Important features of PIC16C84
Sl. Item *Cost (Rs.) *Cost (Rs.)
Architecture: RISC CPU
No. Dedicated IC R-2R (Fig.2) overcome in the R-
DAC DAC 2R ladder network Clock: 10MHz, 400ns instruction cycle
Instructions: 14-bit wide
1. Supplies 78.00 NIL type DAC. Such a Program memory: 1k x 14-bit (EEPROM).
±5V and DAC, as shown in RAM: 36 x 8-bit (SRAM)
+10V (ref.) Fig. 2, uses only two Data memory: 64 x 8-bit for user data
2. IC (DAC) 55.00 NIL
3. IC (opamp) 7.00 NIL values of resistors Supply voltages: 2.7V to 5.5V with very low current
4. Cermet (for for any combination consumption
reference of bits. I/O ports: 13 I/O lines with individual control hav-
adjustment) 16.00 NIL ing 25mA current sinking and 20mA cur-
In either of the rent-sourcing capability
5. Resistors 2.00 5.00
above two cases, the Timer: 8-bit timer/counter with 8-bit pre-scaler
Total cost 158.00 5.00
maximum output Watchdog timer with on-chip RC oscillator, and 8-level deep
*Note: Costs indicated are typical retail prices.
voltage Vout, with all hardware lock.
input bits at logic 1,
is given by the expression: Vout =
[(2n-1)/2n] x Vin, and the output volt-
age with only the LSB at logic 1
will be: Vout = 1/2n x Vin. Here, Vout
is the output voltage, n are the
number of bits, and Vin is the ref-
erence input voltage (usually, +5
volt in a logic system). For example,
an 8-bit DAC, with a reference volt-
age level of 5V, will have a range
from 19.53 mV (with only the LSB
at logic 1) to 4.98V (with all eight
Fig. 6: Actual-size single-sided PCB layout for bits at logic 1). Because of its sim-
the schematic diagram of Fig. 5 plicity, the R-2R ladder network or Fig. 7: Component layout for PCB of Fig. 6

165
 CONSTRUCTION

Application
A waveform generator using
R-2R and a low-power CMOS
microcontroller PIC16C84 (by
Microchip Technology Inc.,
USA) is presented here. All
standard waveforms such as
sine, square, tri-wave, forward
and reverse ramp are success-
fully generated using the R-
2R DAC, in conjunction with
the above-mentioned
microcontroller. Waveforms
other than sine are generated
quite easily. The sine wave,
however, needs a different ap-
proach, which makes use of
lookup-table technique.
The circuit of the function
generator is shown in Fig. 5.
The 8-bit data is sent to the
DAC by the microcontroller,
through one of its ports. The
desired function/waveform is
selected with the help of a
push-to-on switch. The selec-
tion is also indicated by a cor-
responding LED. To keep the
application as simple as pos-
sible, only fixed-frequency
waveform generation is de-
scribed in this article.
PIC16C84 microcont-
roller is a CMOS device from
Microchip, which is used here
in conjunction with an R-2R
Fig. 8: Software flowcharts for generation of various waveforms DAC to realise a function gen-
The low-cost R-2R ladder-type DAC hook it up to your parallel port and start erator, as stated earlier. The important
(Fig. 2) requires no power supply at all, working. features of this device are reproduced in
nor any active components such as buff- Fig. 3 shows the transfer function or Table II.
ers, op-amps, and storage registers. Its the linearity behaviour of the DAC of Fig. Besides this, the device has some code
linearity is very good. Just give the digi- 2, while Table I compares the cost of a protection bits which, once enabled, will
tal input and take the analogue output. typical low-cost, 8-bit integrated chip not allow access to the program memory.
It is incredible! At a cost of Rs 5 only for (along with power supply and other parts) These bits are actually programmed into
8-bit resolution or Re 1 only per bit above with that of R-2R, 8-bit DAC of Fig. 2. the program memory, but user access to
8 bits, you can practically implement any The R-2R DAC can be used for most of it is not available. (Note. For more infor-
application, which may otherwise require the applications. An R-2R network can mation on EEPROM programming of
an integrated circuit. You do not have to also be used in conjunction with an op- PIC16C84, datasheet DS30189D in PDF
bother about control signals, memory, or amp. A 3-bit application circuit of the format, available on Microchip Website,
I/O mapping of your micro-system. Just same is shown in Fig. 4. can be used.)

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166
 CONSTRUCTION

TABLE III called Mplab. It is available on Technical

a portal dedicated to electronics enthusiasts

Look-up table of sine values in decimal and Library CD-ROM offered (free, on request)
equivalent Hex values (within parenthesis) from its India Liaison Office, Bangalore.
at 10 degree interval The latest version of this software can

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100(64) 187(BB) 19(13) also be downloaded from the Microchip
117(75) 177(B1) 6(6)
134(86) 164(A4) 2(2) Website ‘microchip.com’.
150(96) 150(96) 0(0) The Mplab IDE comes with editor, as-
164(A4) 134(86) 2(2) sembler, and programmer software to sup-
177(B1) 117(75) 6(6)
187(BB) 100(64) 19(13) port Microchip’s device programmers and
194(C2) 88(58) 29(1D) a software simulator. It also supports pro-
198(C6) 71(47) 41(29) grams written in ‘C’ language.
208(D0) 55(37) 55(37)
198(C6) 41(29) 71(47)
For the present device (PIC 16C84),
194(C2) 29(1D) 88(58) the author has used Microchip PICSTART
PLUS development programmer. The soft-
The 8-bit port-B of this device has ware for the same, in PDF format, is also
been used as an output port, which is available on the Internet.
directly connected to the DAC. The 5-bit
port-A has been used both to input key-
press data and to output display data to Operation
the LEDs. Actually, the I/O pins on this As stated earlier, the present circuit can
port are time-shared/multiplexed between produce all standard waveforms. After
the keys and the LEDs. This means the power-up, by default the circuit produces
same lines are used at one time for read- squarewave signal. The LED marked
ing the keys and at another time for out- ‘square’ also lights up to indicate that
putting data to drive the LEDs directly. function. When the ‘select’ key is pressed
The time-sharing is so fast that the dis- once, the output changes to tri-wave. The
play through LEDs appears to be stable, waveforms are selected sequentially on
or any key closure is detected error-free. every depression of the ‘select’ switch and
The circuit works on 5V power supply, then repeated. Tested frequency range is
which can be derived from a 9V PP3 bat- 1 Hz to 100 Hz (all waveforms).
tery (or any other source capable of sup- Sinewave generation. For wave-
plying 7. 5V to 9V DC) by using commonly forms other than sinewave, the data to
available 7805 regulator. The current drain the DAC changes in binary ascending or
of the circuit is less than 10 mA. descending order. But since sine function
Although the circuit of Fig. 5 can be is not a linear function, each data is pre-
easily assembled using a general-purpose defined and a value table is used in this
PCB, a proper actual-size single-sided case. The value for each step of the
PCB for the same is given in Fig. 6 along sinewave is read and sent to the output
with its component layout in Fig. 7. port. The resolution depends upon the
number of steps. The higher the step-
count, the greater is the resolution, or
Software vice-a-versa. A simple look-up table (val-
The waveform generation technique is ues at 10o intervals), comprising 36 values
pretty easy and one can implement it
with any other microprocesor or TABLE IV
microcontroller system (e.g. 8085, Address Bank 0 Bank 1 Address
(Hex) registers registers (Hex)
8032, Z80, 6800, etc). The program 00 Indirect Indirect 80
flowcharts for generation of various 01 TMR0 Option 81
waveforms are shown in Fig. 8. One 02 PCL PCL 82
can write one’s software for the pur- 03 Status Status 83
04 FSR FSR 84
pose. However, source program for 05 Port Tris 85
generation of various waveforms us- 06 Port Tris 86
ing the circuit of Fig. 5, employing 07 — Not implemented — 87
08 EEdata Eecon1 88
PIC16C84 microcontroller, is given in 09 Eeaddr Eecon2 89
Appendix ‘A’. 0A Pclath Pclath 8A
For programming PIC 0B Intcon Intcon 8B
microcontroller, including the com- 0C General-purpose RAM 8C
| area starts |
plete development of a system, Mi- | Bank 1 RAM not implemented |
crochip offers an integrated develop- | |
ment environment (IDE) software 2F RAM ends AF

167
 CONSTRUCTION

APPENDIX ‘A’
Assembly language program for implementation of function generator using PIC16C84
ERRORLEVEL –302 MOVF FN_STATUS,W ; MOVWF TRISA ;
INCLUEDE <P16C84.INC> XORLW SQR ; BCF STATUS,RP0 ;
BTFSC STATUS,Z ; MOVF PORT_A,W ;
PCL equ 0x02 ; GOTO SQR_WAVE ; ANDLW 0x1C ;
STATUS equ 0x03 ; ; XORLW 0x1C ;
FSR equ 0x04 ; MOVF FN_STATUS,W ; BTFSC STATUS,Z ;
PORT_A equ 0x05 ; XORLW TRI ; RETLW 0 ;
PORT_B equ 0x06 ; BTFSC STATUS,Z ; ;
EEDATA equ 0x08 ; GOTO TRI_WAVE ; MOVF PORT_A,W ;
EEADDR equ 0x09 ; ; ANDLW 0x1C ;
PCLATH equ 0x0A ; MOVF FN_STATUS,W ; MOVWF KEY ;
INTCON equ 0x0B ; XORLW P_RAMP ; ;
INDF equ 0x00 ; BTFSC STATUS,Z ; KEY_LUP
OPTION_REG equ 0x81 ; GOTO PRAMP ; MOVF PORT_A,W ;
TRISA equ 0x85 ; ; ANDLW 0x1C ;
TRISB equ 0x86 ; MOVF FN_STATUS,W ; XORLW 0x1C ;
EECON1 equ 0x88 ; XORLW N_RAMP ; BTFSS STATUS,Z ;
EECON2 equ 0x89 ; BTFSC STATUS,Z ; GOTO KEY_LUP ;
; GOTO NRAMP ; ;
; RAM 0x0C TO 0x2F (36 BYTES) ; CHK_FN
; GOTO NORMAL ; MOVF KEY,W ;
RP0 equ 0x05 ; ; XORLW FN_KEY ;
FN_KEY equ 0x18 ; SQR_WAVE BTFSC STATUS,Z ;
SQR equ 0x01 ; MOVLW 0XFF ; GOTO FN_CHANGE ;
TRI equ 0x02 ; MOVWF PORT_B ; ;
P_RAMP equ 0x04 ; CALL DELAY_ON ; RETLW 0 ;
N_RAMP equ 0x08 ; CLRF PORT_B ; ;
FN_STATUS equ 0x0C ; CALL DELAY_OFF ; FN_CHANGE
KEY equ 0x0D ; GOTO NORMAL ; RLF FN_STATUS,F ;
TEMP1 equ 0x0E ; ; MOVF FN_STATUS,W ;
TEMP2 equ 0x0F ; TRI_WAVE BTFSS FN_STATUS,4 ;
FN_VAL equ 0x10 ; HI RETLW 0 ;
ON_DELAY equ 0x11 ; MOVF FN_VAL,W ; CLRF FN_STATUS ;
OFF_DELAY equ 0x12 ; MOVWF PORT_B ; INCF FN_STATUS,F ;
; XORLW 0xFF ; RETLW 0 ;
;——————————————————- ; BTFSC STATUS,Z ; ;
; ORG 0x00 ; GOTO LO ; ;———————————————————- ;
START INCF FN_VAL,F ; ;
CLRF STATUS ; GOTO HI ; DELAY_ON
CLRF INTCON ; LO ; BCF STATUS,RP0 ;
BSF STATUS, RP0 ; MOVF FN_VAL,W ; MOVLW 0x1F ;
MOVLW B’10000000’ ; MOVWF PORT_B ; MOVWF 0N_DELAY ;
MOVWF OPTION_REG ; XORLW 0 ; DL1
CLRF TRISB ; BTFSC STATUS,Z ; DECF ON_DELAY,F ;
BCF STATUS, RP0 ; GOTO NORMAL ; MOVF ON_DELAY,W ;
CLRF PORT_B ; DECF FN_VAL,F ; BTFSC STATUS,Z ;
CLRF PORT_A ; GOTO LO ; RETLW 0
CLRF EEDATA ; ; GOTO DL1 ;
CLRF EEADDR ; PRAMP ;
INCF FN_STATUS ; MOVF FN_VAL,W ; DELAY_OFF
CLRF FN_VAL ; MOVWF PORT_B ; BCF STATUS,RP0 ;
MOVLW 0Xff ; INCF FN_VAL,F ; MOVLW 0x1F ;
; GOTO NORMAL ; MOVWF OFF_DELAY ;
;——————————————————- ; ; DL2
; NRAMP DECF OFF_DELAY,F ;
NORMAL MOVF FN_VAL,W ; MOVF OFF_DELAY,W ;
CALL KEY_SEEK ; MOVWF PORT_B ; BTFSC STATUS,Z ;
; DECF FN_VAL,F ; RETLW 0 ;
SHOW_FN GOTO NORMAL ; GOTO DL2 ;
BSF STATUS, RP0 ; ; ;
CLRF TRISA ; ;———————————————————- ; ;———————————————————- ;
BCF STATUS, RP0 ; ; ;
MOVF FN_STATUS,W ; KEY_SEEK END ;
MOVWF PORT_A ; BSF STATUS,RP0 ; ;
; MOVLW 0x1F ; ;*************************************** ;

covering complete 360 o, is shown for for sinewave generation as shown in internal RAM area of microcontroller,
this purpose. The look-up table (Table III) Fig. 8. along with their addresses, are shown in
is to be implemented as per the flowchart Various registers implemented in the Table IV.

168
 C I RC ICR CUUII T
T I D E A S
IDEAS

SIMPLE SWITCH MODE

secondary (output). Ensure that each
winding is separated by an insulation
layer.

POWER SUPPLY
Two separate heat sinks are to be pro-
S.C. DWIVEDI
vided for the two transistors (BU208D).
The filter capacitor for mains should be
of at least 47µF, 350V rating. It is better
DEEPU P.A. to use a 100µF, 350V capacitor. If the
output is short-circuited by less than 8-

T
he SMPS described here is suit- age rating of capacitors C7 and C8 should ohm load, the SMPS would automatically
able for high-wattage stereos and be at least twice the secondary output of turn off because of the absence of base
other similar equipment. The cir- each secondary section. BY396 rectifier current.
cuit employs two high-voltage power tran- diodes shown on the secondary side can The hfemin (current amplification fac-
sistors (BU208D) which have built-in re- be used for a maximum load current of 3 tor) of BU208D is 2.5. Thus, sufficient
verse-connected di-
odes across their
collectors and emit-
ters. It can supply
about 250-watt out-
put.
The circuit
uses a ferrite core
transformer of
14mm width,
20mm height, and
42mm length of E-
E cores. An air gap
of 0.5 mm is re-
quired between E-
E junction. Good
insulation using
plastic-insulating
sheets (Mylar) is to
be maintained be-
tween each layer of
winding. amperes. base current is required for fully satu-
The number of primary turns required Two feedback windings (L1 and L2) rated operation, otherwise the transistors
is 90 with 26 SWG wire. The secondary using two turns each of 19 SWG wire are get over-heated.
winding employs 17 SWG wire (for 4A wound on the same core. These windings At times, due to use of very high value
load current). Each turn of the secondary are connected to transistors T1 and T2 of capacitors C7 and C8 (say 2200µF or
develops approximately 2 volts. The with a phase difference of 180o, as shown so) on the secondary side or due to low
reader can decide about the output volt- by the polarity dots in the figure. First load, the oscillations may cease on the
age and the corresponding secondary wind the primary winding (90 turns us- primary side. This can be rectified by in-
turns, which would work out to be half ing 26 SWG wire) on the former. Then creasing the value of capacitor C6 to
the desired secondary voltage. The volt- wind the two feedback windings over the 0.01µF.

TOILET INDICATOR S.C. DWIVEDI

the toilet is busy.
Those segments of the displays for
each letter that are common to both the
K.S. SANKAR display words ‘toiLEt’ and ‘bUSY’ are con-
nected through resistors to ground (indi-

T
he circuit shown here displays on the toilet door and operated using a cated by bold lines in the figure). These
the message ‘toiLEt’ or ‘bUSY’, reed switch and a ferrite magnet pair, segments are permanently lit. ‘A’ rail is
using just six 7-segment common- suitably fixed on toilet door and its frame, connected to segments that make up the
anode displays. Such a display can be fixed such that the reed switch is closed when word ‘toiLEt’ and ‘B’ rail for the word

169
 temporarily ground operated (or micro-switch operated) reed switch is
either rail ‘A’ or rail open and the display indicates ‘toiLEt’. Now to make
‘B’ (but not both), the message changeover to ‘bUSY’, when someone
and check whether goes inside and locks the door, the switch needs to
the display shows be closed on closure of the toilet door. One may also
‘bUSY’. The last two displays are not used in the ‘toiLET’ and ‘busy’. Use a 9V DC adapter use other methods to achieve the same results.
word ‘bUSY’. Rails ‘A’ and ‘B’ are active low for the as the power supply source and stabilise it
common-anode displays used here. Segments that are through a 7805 regulator.
to be always ‘off’ are left disconnected and are shown Normally, switch S1 is open and transistor T1
as hollow lines. Those segments which are either lit is forward biased. T1 conducts and thus rail ‘A’ goes
during ‘toiLEt’ display (pulled ‘low’ via bus ‘A’) or to near 0V, to display the word ‘toiLEt’. If switch S1
during ‘bUSY’ display (pulled ‘low‘ via bus ‘B’) are is closed, T1 switches ‘off’ and turns ‘on’ transistor
shown shaded in the figure. T2 to take point ‘B’ to near ground potential, and thus
Connect a +5V supply rail to the common anode the display changes over to indicate the word ‘bUSY’.
pin of all the displays. To test the circuit at this stage, Thus, when toilet door is open, the magnetically-

FEATHER-TOUCH
The switches are removed and the above-
mentioned wires (live, neutral, L1, L2,
L3, and L4) are connected to the circuit,

SWITCHES FOR MAINS

S.C. DWIVEDI as shown in the main diagram.
The circuit comprises four commonly
available ICs and four micro-relays, in ad-
dition to four micro-switches/membrane
D.K. KAUSHIK switches (push-to-on type) and a few other
passive components. IC 7805 is a 5-volt

A
n ordinary AC switchboard con- By momentary depression of a switch, the regulator used for supplying 5V to IC2
tains separate switches for switch electrical appliance will be ‘on’/‘off’, inde- and IC3 (7476 ICs). These ICs are dual J-
ing ‘on’/’off’ electric bulbs, pendently. K flip-flops. The four J-K flip-flops being
tubelights, fans, etc. A very simple, inter- To understand the principle and de- used in toggle mode toggle with each clock
esting circuit presented here describes a sign of the circuit, let us consider an ex- pulse. The clock pulses are generated by
feather-touch switchboard which may be isting switchboard consisting of four the push-to-on switches S1 through S4
used for switching ‘on’/‘off’ four or even switches. One live wire, one neutral wire, when these are momentarily depressed.
more devices. The membrane or micro- and four wires for four switches are con- When a switch is momentarily depressed,
switches (push-to-on type) may be used nected to the switchboard, as shown in its corresponding output changes its ex-
with this circuit, which look very elegant. the illustration below the circuit diagram. isting state (i.e. changes from ‘high’ to

170
 C I R C U I T I D E A S

‘low’ or tion with the four relay driver transistors an IC ULN 2004 which has an array of
v i c e SL100. The wires earlier removed are con- seven Darlingtons for driving the relays.
versa). nected to this circuit. On the switch panel So two more micro-switches and relays
The out- board, the micro-switches are connected, may be connected in a similar fashion.
puts of and under the board the connections are This circuit can be assembled on a
flip-flops wired as suggested above. general-purpose PCB and the total cost
drive the Relays RL1 though RL4 are 9V, SPST- should not exceed Rs 300. It is suggested
c o r r e - type micro-relays of proper contact rat- that the circuit, after assembly on a PCB,
sponding ings. may be housed in a box of proper size,
relays, in The circuit may be expanded for six which may be fitted on the wall in place
conjunc- switches by using one more IC 7476, and of a normal switchboard.

DIGITAL FAN REGULATOR

when the clock goes from high to low. Let
RUPANJANA us begin with the assumption that the
counter reads 000 at power on. The
C.K. SUNITH monoshot built around IC1 (NE 555) pro-
vides necessary pulses to trigger the

T
he circuit presented here is that 0 to 5) upon each successive clock edge
of a digital fan regulator, and is reset to 000 upon next clock. The
variable to provide five speed lev- count sequence of the counter has been
els as catered for in ordinary fan regula- summarised in Table I.
tors. The circuit makes use of easily avail- Each flip-flop is configured to toggle
able components. An optional 7-segment TABLE I
display with its associated circuitry has Displayed Counter IC4’s active Relay
been provided to display your choice of count count low output activated
fan speed. 0 000 Q0 NIL
The heart of the circuit is a modulo-6 1 001 Q1 RL1
2 010 Q2 RL2
binary counter, built around IC2 and IC3 3 011 Q3 RL3
(IC 7476) which are dual JK flip-flops. 4 100 Q4 RL4
The counter counts up in a straight bi- 5 101 Q5 RL5
0 000 Q0 NIL
nary progression from 000 to 101 (i.e. from

171
counter upon every depression of switch regulators with rotary speed regulation. sion of switch S1 up to the count 101.
S1. Upon the arrival of first clock edge, the The outputs of the counter also go to When switch S1 is depressed once again,
counter advances to 001. The outputs of IC6 (IC 7447), a BCD to 7-segment code normally the counter should read 110. But
the counter go to IC4 (IC 74138), which is converter, which, in turn, drives a 7-seg- the two most significant bits of the counter
a 3-line to 8-line decoder. When IC4 re- ment LED display. When switch S1 is de- force the output of NAND gate (IC7) to
ceives the input address 001, its output Q1 pressed once again, the counter advances go low to reset the counter to 000. The
goes low, while other outputs Q0 and Q2 to count 010. Now, the output Q2 of IC4 counter now begins to count through its
through Q7 stay high. The output Q1, af- goes low, while Q0, Q1 and Q3 through normal sequence all over again, upon ev-
ter inversion, drives transistor T1, which Q7 go high or remain high. This forces ery key depression.
actuates relay RL1. Now power is deliv- transistor T2 to saturation and actuates The circuit does not provide the facil-
ered to the fan through the N/O contact relay RL2. The display indicates the ity to memorise its previous setting once
RL1/1 of relay RL1 and the tapped resistor counter output in a 7-segment fashion. it is powered off or when there is a mains
RT. For the tapped resistor RT, one can use The counter proceeds through its nor- failure.
the resistance found in conventional fan mal count sequence upon every depres-

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172
 C I R C U I T I D E A S

TELEPHONE RINGER
for the ringing to start after the switch is
closed. The circuit used also has a provi-
sion for applying a drive voltage to the

USING TIMER ICs

circuit to start the ringing.
RUPANJANA Note that the circuit is not meant for
connecting to the telephone lines. Using
appropriate drive circuitry at the input
(across switch S1) one can use this circuit
PRABHASH K.P. with intercoms, etc. Since ringing pulses
are generated within the circuit, only a

U
sing modulated rectangular multivibrator starts generating pulses. If constant voltage is to be sent to the called
waves of different time periods, this switch is placed in the power supply party for ringing.
the circuit presented here pro- path, one has to wait for a longer time
duces ringing tones similar to those
produced by a telephone.
The circuit requires four astable
multivibrators for its working. There-
fore two 556 ICs are used here. The
IC 556 contains two timers (similar
to 555 ICs) in a single package. One
can also assemble this circuit using
four separate 555 ICs. The first
multivibrator produces a rectangular
waveform with 1-second ‘low’ dura-
tion and 2-second ‘high’ duration. This
waveform is used to control the next
multivibrator that produces another
rectangular waveform.
A resistor R7 is used at the col-
lector of transistor T2 to prevent ca-
pacitor C3 from fully discharging
when transistor T2 is conducting. Pre-
set VR1 must be set at such a value
that the two ringing tones are heard
in one second. The remaining two
multivibrators are used to produce
ringing tones corresponding to the
ringing pulses produced by the pre-
ceding multivibrator stages.
When switch S1 is closed, tran-
sistor T1 cuts off and thus the first

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173
November

2000
 CONSTRUCTION

PC-TO-PC COMMUNICATION ers the IR LEDs. Output pin 9 also drives

USING INFRARED/LASER BEAM an LED indicator (LED2) during the posi-

tive output at its pin 9. At logic ‘0’ output
at pin 9, LED2 goes ‘off’, but drives the
pnp transistor through a bias resistor of 1
RUPANJANA kilo-ohm (R5), to switch ‘on’ IRLED1 and
K.S. SANKAR
IRLED2 and also a visible LED3. Since
very low drive current is used, use of high-

S
erial communication between two dred metres, using a laser diode module efficiency visible LEDs, which light up at
PCs has been covered earlier too in place of infrared LEDs. 1 mA, is needed. The electrical pulses sent
in EFY. However, two separate ICs The laser module used is easily avail- by the COM port are now converted into
(1488 and 1489) were used in those able as laser pointer (having about 5 mW corresponding modulated pulses of IR
projects (for TTL to RS-232C and vice- power output). It is to be used with its light.
versa level conversion), using wireless ra- three battery cells removed and positive Receiver. The IR signals are detected
dio wave technology. This level conversion supply terminal soldered to the casing and by a photodiode (D1). (A photodiode is re-
required use of three different voltages, 0V point to the contact inside the laser verse biased and breaks down when IR
i.e. +12V, -12V and +5V. module. light falls on its junction.) The detected
Here is a novel circuit using MAXIM Assemble the two prototypes on PCBs TTL level (0/5V) signals are coupled to
Corporation’s IC MAX232, which needs or breadboards and connect them to COM- pin 10 of MAX 232 IC. These TTL levels
only a single power supply of 5V for 1 (or COM-2) port of each PC. Point the are converted to ±9V levels internally (as
level conversion. Fig. 1 shows the in- laser beam of one module to fall on the per Table 1) and output at pin 7.
ternal functional diagram of MAX232 photodiode of the module connected to the A visible LED1 at pin 7 of MAX232
IC. The communication over the short other PC, and vice versa. IC indicates that the signals are being
distance of 2 to 3 metres is established Load PROCOMM or TELIX serial com-
using infrared diodes, as shown in Fig. 2. munication software and set the port pa- TABLE I
The range could be increased up to hun- rameters to 9600 n 8 1 (here, 9600 refers Max 232 Conversion Levels
to the baud rate, n stands for TTL +5V to -9V RS 232
PARTS LIST parity-none, 8 represents bits per charac- TTL 0V to +9V RS 232
Semiconductors: RS 232 +9V to 0V TTL
ter, and 1 indicates number of stop bits) to
IC1 - MAX232A +5V powered RS 232 -9V to 5V TTL
multichannel RS232 establish the communication. File trans-
driver/receiver fer is also possible. The pro-
IC2 - NE555 timer totype was tested (by the
IC3 - IR RXR module; Siemens author) between speeds of
SFH-506-38 or Telefunken
TS0P-1838 1200 and 9600 bauds, in-
T1 - BC547 npn transistor cluding file transfer between
T2 - BC548 npn transistor the two PCs. The software
D1 - 1N4148 diode program for the purpose
LED1-LED3 - Red LED
was written in ‘C’ language.
IRLED1,
IRLED2 - Infrared light emitting The source code of the pro-
diode gram is given on page 49 for
Resistors (all ¼-watt, ±5% carbon, unless COM-1 port.
stated otherwise):
R1,R2 - 47-ohm
R3,R4 - 4.7-kilo-ohm Circuit
R5,R9 - 1-kilo-ohm
R6 - 1.2-kilo-ohm Transmitter. Data signals
R7 - 10-ohm transmitted through pin 3
R8 - 330-ohm of 9-pin (or pin 2 of 25-pin)
R10 - 2.2-kilo-ohm
R11 - 10-kilo-ohm
‘D’ connector of RS232 COM
VR1 - 4.7-kilo-ohm preset port are sent to pin 8 of
Capacitors: MAX232 and it converts
C1-C5 - 1µ, 25V electrolytic these EIA (Electronic In-
C6 - 470µ, 25V electrolytic dustry Association) RS232C
C7,C8 - 0.01µ ceramic disk compatible levels of +9V to
Miscellaneous: 0/5V TTL levels, as given in
- 9/25-pin ‘D’ connector
Table I. The output pin 9 of
(male/female)
MAX232 IC drives the pnp
Note: Parts List pertains to circuit in Fig. 3.
transistor SK100 and pow- Fig. 1: Internal functional diagram of IC MAX232

175
 CONSTRUCTION

and both PCs ‘think’ that there is a

null modem cable connected between
them. Table II shows the correspon-
dence between the various pins of a 9-
pin (or 25-pin) ‘D’ connector of serial
port of PC. In some PCs, the serial
port is terminated into a 9-pin ‘D’ con-
nector and in some others into a 25-
pin ‘D’ connector.

Testing
Assemble two transceiver modules and
connect each of them, using 3-core cables,
to Com-1 ports of the two PCs. Place
them 15 to 20 cms apart so that the IR
LEDs of each module face the photodiode
detector of the other.
Power ‘on’ both the circuits to oper-
Fig. 2: Communication between two PCs for a short range using IR diodes, or longer distance ate at stabilised 5V DC. You may alter-
using laser natively use a 7805 regulator IC with a
9V DC source to ob-
tain regulated 5V
supply.
Check if the
MAX232 IC is work-
ing properly by test-
ing pin 2 for 9 to 10V
positive supply and
pin 6 for
-9V supply. MAX232
(refer Fig. 1) uses
1µF, 25V capacitors
C1-C5 as a charge
pump to internally
generate ±9V from 5V
supply. Generally, de-
fective MAX232 ICs
will not show a volt-
age generation of +9V
and -9V at pins 2 and
6, respectively. Re-
place ICs, if required.
Although 1µF, 25V ca-
pacitors are recom-
mended in the
Fig. 3: Modified circuit diagram for PC-to-PC communication using 38kHz modulated pulses datasheet, the circuit
works well even with
received. Pin 7 is also connected to pin 2 (receiver pin) of 9-pin (or pin 3 of 25- 10µF, 25V capacitors, which are easily
pin) ‘D’ connec- available.
TABLE II tor used for the With both the PCs and supply to the
DB 9 Pin DB25 Pin Signal Direction Description serial port in the transceiver modules ‘on’, throw some light
1 8 In DCD (data carrier detect) PC, so that the
2 3 In RX (receiver data) data may be TABLE III
3 2 Out TX (transmit data) read. The optical Base Address for the Communication Ports
4 20 Out DTR (data terminal ready)
5 7 — GND (signal ground) signals received Communication Base address port
6 6 In DSR (data set ready) by the photo- COM1 03F8H
7 4 Out RTS (request to sent) diodes are in fact COM2 02F8H
8 5 In CTS (clear to send) converted to COM3 03F8H
9 22 In RI (ring indicator) COM4 02F8H
electrical pulses

176
 CONSTRUCTION

with the torch on the photodiode. LED1 ered ‘on’, use a short jumper wire from TABLE V
should flicker at the burst frequency rate +5V and touch it at pin 8 of MAX232 IC to AL Register Bits
of the transmitter. This proves that the IR simulate a positive pulse. LED2 should Bit
signals are being detected by photodiodes turn ‘off’ and IRLEDs and LED3 should 7 6 5 4 3 2 10 Use
and converted into RS232-compatible lev- turn ‘on’ if the wiring is correct. IRLEDs X X X • • • •• Baud-rate code
els by the MAX232 and output at pin 7 of would also be glowing, although one can- • • • X X • •• Parity code
MAX232 ICs is available for the PC to not see them glowing. Remove the link • • • • • X •• Stop-bit code
• • • • • • XX Character-size code
read the pulses. wire from +5V to pin 8 of MAX232 IC and
To test the transmitter side, discon- connect back the ‘D’ connector to PC’s TABLE VI
nect the module from COM-1 (or COM-2) COM-1 (or COM-2) port. Baud Rate
port of the PC, and with the device pow- Run a simple communication software Bit Bits per
like PROCOM 7 6 5 Value second
TABLE IV or TELIX. Set
0 0 0 0 110
8250 Registers: Offset from Base Address the baud rate, 0 0 1 1 150
Offset LCR Bit 7 Meaning Read/write parity, bits per 0 1 0 2 300
0 0 Transmitter holding register (THR) Write character, and 0 1 1 3 600
[when written to port] stop bits to 1 0 0 4 1200
0 0 Receiver data register (RDR) Read 1 0 1 5 2400
9600, n, 8, 1, 1 1 0 6 4800
[when read from port]
0 1 Baud rate divisor--low byte (BRDL) Read/write
respectively, 1 1 1 7 9600
1 0 Interrupt enable register (IER) Read/write and send a few
1 1 Baud rate divsior--high byte (BRDL) Read/write characters from TABLE VII
2 x Interrupt identification register (IIR) Read only the keyboard Parity
3 x Line control register (LCR) Read/write through COM-1
4 x Modem control register (MCR) Read/write Bit
5 x Line status register (LSR) Read only (or COM-2) 4 3 Value Meaning
6 x Modem status register (MSR) Read only port. You 0 0 0 None
should be able 0 1 1 Odd Parity
to see LED3 1 0 2 None
1 1 3 Even Parity
flickering for a
few seconds, in- current. If you
TABLE VIII
dicating data use a laser
Stop Bits
transmission. beam, as ex-
Connect Bit
plained earlier,
2 Value Meaning
both PCs to the remove the
circuits and set 0 0 One IRLEDs and the
0 1 Two
the software to device will
chat mode. You TABLE IX track up to 10
should be able Character Size metres with-
to transfer data Bit out any data
between the 1 0 Value Meaning loss.
PCs, as if a 0 0 0 Not used
cable was con- 0 1 1 Not used
nected. 1 0 2 7-bit* Hints
Fig. 4: Actual-size, single-sided PCB for the circuit in Fig. 3 1 1 3 8-bit
Depending 1. Aligning
on the sensitiv- the laser beam is a problem, but once it
ity setting and is aligned carefully and fixed, the data
power/angle of transmission and reception would be er-
IRLEDs, in- ror-free. Transmitter and receiver align-
crease the dis- ment routines have been included in this
tance to about software program to aid in the alignment
35 cms (12 process.
inches) and try 2. Ordinary clear photodiodes should
again for better be used for detector. If you use dark-red
distance. plastic-encapsulated diodes, you may have
For more problems, as these react only to very bright
power, use natural light or infrared light.
metal-can type EFY Lab Note. While testing, we did
IRLEDs and re- face problems with red plastic-encapsu-
duce the value lated diodes as well as clear Darlington
of resistor R7 detectors (GE’s L14F1), probably because
Fig. 5: Component layout for the PCB for more drive of various light sources in the room caus-

177
 CONSTRUCTION

Program Listing for PC-to-PC Communication in ‘C’

/* PROGRAM FOR LASER / IR COMMUNI- CATION”); {
CATION BETWEEN TWO PCs */ textcolor(142);gotoxy(36,9); st = inp(COM); /*Get character from
cprintf(“SEND MODE”); com1 port till */
/* by K.S.Sankar for EFY Nov/Dec’2000 */ textcolor(9);gotoxy(34,12);
cprintf(“A”);textcolor(7);cprintf(“lign de- printf(“%c”,st); /* key hit or end of
#include <stdio.h> /* Header Files */ vice”); transmission */
#include <dos.h> textcolor(11);gotoxy(34,15); goto loop;
#include <conio.h> cprintf(“T”);textcolor(7);cprintf(“ransfer }
#include<graphics.h> file”); else
#include<stdlib.h> textcolor(6);gotoxy(38,18); main(); /*Call main function if key hit */
#define DEL 25 /* Preprocessor - Delay Vari- cprintf(“Q”);textcolor(7);cprintf(“uit”); }
able */ chs = getch(); return;
#define COM 0X03f8 /*0x02f8 -com2,0x03f8- switch(toupper(chs)) }
com1 */ {
char gra=’Y’; /* Global Variables */ case ‘A’: salgn();break; /*Function for File Receive */
int flag=0; case ‘T’: f_snd();break;
union REGS inregs,outregs; /* Union declara- case ‘Q’: main(); f_rcv()
tion for registers */ default : clrscr(); {
FILE *fp; /* File declaration */ printf(“Wrong Key Pressed”); int flag=0,bytecount=0,count; /* Local Vari-
int status; goto S; ables */
char temp=’\n’,t2; } float ot = 0.00,nt = 0.00;
int t1=10; break; char ch,st[55000],fnm[30];
/* The Main Function */ case ‘E’: clrscr(); clrscr();
void main(void) textcolor(143); initial(); /*Calling Initialisation Routine */
{ gotoxy(35,13); ot = clock() / 18.2; /*Calculate exec time in
char ch,chr,chs; /* Local Variable */ cprintf(“GOOD BYE”); secs from start of program */
clrscr(); exit(1);
if(flag==0) default : clrscr(); gotoxy(2,2);
/* splash();*/ /* Calling Splash routine */ printf(“Wrong Key Pressed”); printf(“ FILE NAME ? : “);
flag++; main(); fp=fopen(gets(fnm),”wb”); /*Get file name in
textcolor(4);gotoxy(26,6); return ; write mode */
cprintf(“INFRARED/LASER COMMUNICA- gotoxy(26,10);
TION”); } printf(“(Ready for) RECEIVING DATA ....”);
gotoxy(34,9);textcolor(10); } gotoxy(50,24);
cprintf(“R”);textcolor(7);cprintf(“eceive mode”); textcolor(138);
textcolor(14);gotoxy(35,12); /* Function for receive (For Device Alignment) cprintf(“Don’t KEY IN may loss data”);
cprintf(“S”);textcolor(7);cprintf(“end mode”); */ loop: nt = clock()/18.2; /*Calculate exec time in
textcolor(6);gotoxy(37,15); secs from start of
cprintf(“E”);textcolor(7);cprintf(“xit”); ralgn(void) program */
ch = getch(); /* Select Mode */ { status = inp(0X3FD);/*Get character from
switch(toupper(ch)) char st = ‘ ‘; /* Local variables */ com1 port */
{ clrscr(); if((status & 0x01)==0x00) /* Check for Data
case ‘R’: R:clrscr(); gotoxy(30,2); Ready */
textcolor(4);gotoxy(26,6); textcolor(10); {
cprintf(“INFRARED/LASER COMMUNI- cprintf(“RECEIVE MODE :”); /* Check for no data reception for five seconds
CATION”); textcolor(9);cprintf(“ ALIGN DEVICE”); after
textcolor(138);gotoxy(33,9); printf(“\n”); start of reception if no data is received con-
cprintf(“RECEIVE MODE”); initial(); /* Call Initialisation routine */ tinue other process */
textcolor(9);gotoxy(33,12); loop:if(!kbhit()) if((bytecount>0) && (nt-ot)>5.0)
cprintf(“A”);textcolor(7);cprintf(“lign de- { {
vice”); if(st==0x04) /* Check for end of Transmis- clrscr();
textcolor(11);gotoxy(33,15); sion */ for(count=0;count<flag;count++)
cprintf(“F”);textcolor(7);cprintf(“ile receive”); { {
textcolor(6);gotoxy(36,18); clrscr(); gotoxy(26,10);
cprintf(“Q”);textcolor(7);cprintf(“uit”); textcolor(140); textcolor(11);
chr = getch(); gotoxy(30,12); cprintf(“ Saving data in”);
switch(toupper(chr)) cprintf(“ALIGNED PROPERLY”); gotoxy(43,10);
{ gotoxy(48,24); textcolor(12);
case ‘A’: ralgn();break; printf(“ Press any key to quit .”); cprintf(“ %s”,fnm);
case ‘F’: f_rcv();break; getch(); /*Dump the data received in a File */
case ‘Q’: main(); main(); /* Got to main function after aligning fprintf(fp,”%c”,st[count]);
default : clrscr(); properly */ }
printf(“Wrong Key Pressed”); } fclose(fp);
goto R; status = inp(0X3fd); /*Checking status at gotoxy(26,13);
} com1 port */ textcolor(11);
break; if((status & 0x01)==0x00) /* Check for Data cprintf(“ File %s of %d bytes created
case ‘S’: S:clrscr(); Ready */ “,fnm,count);
textcolor(4);gotoxy(26,6); goto loop; gotoxy(50,24);
cprintf(“INFRARED/LASER COMMUNI- else if(!kbhit()) textcolor(7);

178
 CONSTRUCTION

cprintf(“ Press any key to quit .”); printf(“\n”); {

getch(); flag=0; gotoxy(50,24);
main(); outport(COM,0X0D); printf(“ Press any key to exit !”);
} /* Send carriage return */ getch();
goto loop; delay(5); main(); /*Call main function */
} outport(COM,0X0A); /* Send carriage return }
else if(!kbhit()) */ else
{ delay(5); {
st[flag] = inp(COM);/*Get character from } outport(COM,st[flag]);/*Send each character
Com1 port */ else in the file*/
flag++; { printf(“\t%004x”,st[flag]);
bytecount++; outport(COM,st[flag]); /* Send character to flag++;
ot = clock()/18.2; /*Calculate exec time dur- com1 port*/ delay(DEL);
ing receiving */ printf(“%c”,st[flag]); }
goto loop; flag++; }
} delay(DEL); while(!kbhit()); /* Check for key hit */
else } }
{
/* If transmission is cut terminate abnormally } /*Initiialisation Function */
*/ if(kbhit()) /* Check key hit */ initial()
clrscr(); { {
for(count=0;count<flag;count++) delay(1); inregs.h.ah = 0; /*Initialisation of port */
{ outport(COM,0x04);/*Send End of inregs.h.al = 0X63; /* Baudrate , Parity ,
gotoxy(26,3); transmission */ Databits , Stopbit(s) */
textcolor(140); main(); inregs.x.dx = 0; /*Select port COM1 */
cprintf(“ TERMINATED ABNOR- } int86(0x14,&inregs,&outregs);/*Complete
MALLY “); } Communication service Interrupt*/
gotoxy(26,10); while(!kbhit()); }
textcolor(11); }
cprintf(“ Saving data in”); /*Function for Splash screen*/
textcolor(12); /*Function for file transfer*/ splash(void)
cprintf(“ %s”,fnm); f_snd() {
fprintf(fp,”%c”,st[count]); { int d=DETECT,m,j,i;
} int flag=0,count=0,fl; /* Local Variables */ struct palettetype pal; /* Structure for palette
fclose(fp); char ch,st[55000],fnm[20]; colours */
gotoxy(26,13); clrscr(); initgraph(&d,&m,””); /*Initialisation for splash
textcolor(11); initial(); /* Calling Initialisation Routine */ screen */
cprintf(“ File %s of %d bytes created gotoxy(2,2); getpalette(&pal); /*Get palette colours*/
“,fnm,count); printf(“FILE NAME ? : “); for(i=0;i<=pal.size;i++)
sleep(5); fp = fopen(gets(fnm),”rb”); /* Get file name to setrgbpalette(pal.colors[i],i*5,i*4,i*4);/*Combi-
main();/*Go to main after dumping in file */ be sent */ nation of RGB colours*/
} if(fp==NULL) setfillstyle(8,8);
return; { setcolor(15);
} clrscr(); settextstyle(1,0,4);
gotoxy(35,13); setbkcolor(4);
/* Function for send align ( for device align- printf(“ FILE NOT FOUND !”); for(i=0;i<17;i++) /* Writing text with RGB
ment) */ delay(1000); palette colors */
main(); {
salgn(void) } setcolor(i);
{ else outtextxy(45+i,200+i,”PC to PC Laser/IR
int flag=0; /* Local Variables */ { Communication”);
char st[127]; fl = filelength(5); /* Calculate file length */ }
clrscr(); gotoxy(23,20); sleep(1);
initial(); printf(“File being transferred has %u cleardevice();
textcolor(14); bytes”,fl); for(i=0;i<17;i++) /* Writing text with RGB
cprintf(“Type the sentence ( < 127 chars)”); do palette colors */
puts(“\n”); { {
gets(st); /* Get string to send */ ch = fgetc(fp); setcolor(i);
loop:status = inp(0X3FD); /* Get com1 port sta- st[count] = ch; outtextxy(175+i,200+i,”Mostek Electronics”);
tus */ count++; }
if((status & 0x20)==0x00) /* Check Trans- } sleep(1);
fer holding register empty */ while(count<=fl); cleardevice();
goto loop; } for(i=0;i<17;i++) /* Writing text with RGB
else fclose(fp); palette colors */
do {
{ loop: status = inp(0X3FD); /*Check com1 port setcolor(i);
if(!kbhit()) /* Check for key hit */ status */ outtextxy(160+i,175+i,”K.S.Sankar”);
{ if((status & 0x20)==0x00)/* Check Trans- }
outport(COM,0X0D); /* Send carriage return fer holding register empty */ sleep(1);
*/ goto loop; cleardevice();
outport(COM,0X0A); /* Send line feed */ else closegraph();
if(flag==strlen(st)) /* Check for length of do }
string*/ { /*——end———*/
{ if(flag==fl) /*Check for file length */

179
 CONSTRUCTION

TABLE X in Table III. The offset ad- Meaning of each of the bits of line status
Line Status Register Bits dress of the registers used register is given in Table X. Its bit 0 is
in serial communication is set when a byte is logged in the receiver
given in Table IV. buffer register and cleared when the byte
For serial port is read by the CPU. Its bit 6 is set when
initialisation, the program both the transmitter holding register and
makes use of BIOS interrupt the transmitter shift register are empty.
14H service 00H. It Presently, the software program is
initialises the serial port meant for COM-1 port initialised for 600
pointed to by the contents of bauds. It can be changed for 1200, or 2400,
ing corruption of the data. Finally, we dx register (0 for Com-1 and 1 for Com-2 or 4800, etc by changing the contents of
succeeded, after modification of the cir- port). The contents of ‘al’ register ‘al’ register in the initialisation function
cuit as shown in Fig. 3. We were able to initialise the specific communication port to 83H, or A3H, or C3H, etc in place of
flawlessly transfer files, from about 5- for baud rate, parity, stop-bit code, and 63H. Similarly, for using COM-2 port,
metre distance, between two 386-based character-size code as per Table V (and change all register addresses starting with
PCs. We included a 38kHz modulator in expanded in Tables VI through IX re- OX3f.. to OX2f.. etc in the program.
the transmitter section and used IR re- spectively). With the information included in the
ceiver module, which includes a bandpass The transmitter holding register tables and some knowledge of ‘C’ pro-
filter and demodulator for 38kHz carrier. (THR) and receiver data register (RDR) gramming, the readers would be able to
Please refer to the author’s circuit idea both at address Base+0 (the former be- understand the program with the help of
captioned ‘Proximity Detector’ in this is- ing write(only) and latter being read comments already included at various
sue for the working principle etc. For bet- (only)) act as buffers during transmis- places in the program. The executable file
ter understanding of the software pro- sion and reception, respectively, of a char- as well as the source code will also be
gram given by the author, we have in- acter. The other most important register, included in the CD available (optionally)
cluded certain additional information in which is referred to in the software pro- with EFY Dec. 2000 issue.
the succeeding paragraphs. gram frequently, is the line status regis- The source code as well as executable
The base addresses for the serial ter (LSR) at Base+5 (i.e. 03FDH for files are proposed to be included in next
communication ports in a PC are shown COM-1 port or 02FDH for COM-2 port). month’s EFY-CD. ❏

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180
 CONSTRUCTION

MULTI-EFFECT CHASER LIGHTS — 8-bit program status word (PSW).

USING 8051 MICROCONTROLLER

— 8-bit stack pointer.
— 128 bytes of internal RAM.
— No ROM for 8031, 4k ROM for
8051, and 4k EPROM for 8751.
— Two external and three internal
ADITYA U. RANE S.C. DWIVEDI
interrupt sources.
— Four programmable input-output

T
he 8051 microcontroller, first de- follows: ports/registers.
veloped by Intel, finds many ap- — 8-bit CPU with register A (accu- One of the important parts of the
plications in small development mulator) and register B. 8051 CPU is its oscillator section. The
systems such as speed control of DC — 16-bit program counter (PC). oscillator section is present on the chip
motors, timers, process-control applica- — 16-bit data pointer (DPTR). itself, only quartz crystal has to be con-
tions, and tem-
perature con-
trollers. One
of its simple
applications as
multi-effect
chaser lights is
described in
this project.
Here the
microcontroller
8051 controls
the switching
sequence of
eight triacs
(TR1 through
TR8) via the
buffer transis-
tors T1 through
T8, as shown
in the sche-
matic diagram
of Fig. 1. Each
triac, in turn,
may be used to
control a series
of bulbs (with a
total voltage
drop of 230V
AC and the cur-
rent drawn
through BT136
triacs not ex-
ceeding 4 amp).
Features
of 8051 micro-
controller. The
heart of the cir-
cuit is the 8051
microcontroller.
Some of the im-
portant fea-
tures of the
controller are as Fig. 1: Schematic diagram of multi-effect chaser lights

181
 CONSTRUCTION

TABLE I cussed relates to its input-out- P2. Port P2 happens to be the high-
Pins Use put (I/O) ports. The 8051 has order address lines, i.e. A8-A15. This port
P3.0 (RXD) Receive data serially a total of four 8-bit ports, can be used for interfacing I/O devices. It
P3.1 (TXD) Transmit data serially namely, P0, P1, P2, and P3. should be noted that port 2 is changed
P3.2 (INT0) External interrupt zero P0. The P0 port may be momentarily by the address signals when
P3.3 (INT1) External interrupt one
P3.4 (T0) I/P pin for timer 0 used as input, output, or as supplying the byte of a 16-bit address.
P3.5 (T1) I/P pin for timer1 combined low-order address P3. Port 3 functions in a fashion simi-
P3.6 (WR) External memory write pulse and a bidirectional data bus lar to that of port 1. Each pin of port P3
P3.7 (RD) External memory read pulse for external memory, which is performs different operations as shown
nected externally between pins 18 and 19. an alternate function. in Table I.
The crystal frequency should range be- P1. Port P1 does not have any alter-
tween 1 MHz and 16 MHz for proper func- nate function. It means that these pins
tioning of the controller. If this frequency are used for interfacing input-output de-
Hardware
is taken below 1 MHz, there is a chance vices like ADC, DAC, 7-segment displays, The controller is interfaced with the
of losing data of its internal RAM. LCD, keyboard, etc. external memory (EPROM) via the oc-
Pin 31 happens to
be the external access
pin for the controller.
If this particular pin
is grounded, 8051
fetches program from
the externally con-
nected ROM/EPROM.
And if it is connected
to Vcc, it starts execut-
ing the program from
the internal ROM that
has 4k address space
(0000H-0FFFH). For
8031, there is no inter-
nal ROM present, and
hence this pin has to
be grounded for its
proper operation.
When internal
ROM is used, and if the
program exceeds the 4k
Fig. 2: PCB layout for the circuit
internal ROM address
space, then after the
last address 0FFFH, it
starts executing the
program from exter-
nally connected ROM/
EPROM. The exter-
nally connected ROM/
EPROM can be in-
creased up to 64k, i.e.
0000H-FFFFH. In the
case of RAM, the same
can be extended up to
64k.
It should be noted
that the 8051 is
organised such that
data memory and pro-
gram memory can be
two entirely different
physical memory enti-
ties. Another impor-
tant aspect to be dis- Fig. 3: Component layout for the PCB

182
 CONSTRUCTION

tal ‘D’

a portal dedicated to electronics enthusiasts

latch
74LS373.
T h e

www.electronicsforu.com
Fig. 4: Output code format from Fig. 6: Hex code for Fig. 3
purpose
port P1
of using
74LS373
is to de-
multi-
Fig. 5: Output code format for Fig. 7: Hex code for setting P1.0 and P1.7 bit
setting only P1.0 plex the
address
lines and the data lines. Hence, after troller can read instruction byte from
de-multiplexing, AD0-AD7 forms two the program memory.
sets of lines—address lines A0-A7 and Under the program control, 8051
data lines D0-D7. The higher-order ad- provides the output to port P1, which
dress lines A8 to A15 are directly avail- is further coupled to the base of driver
able from 8051 pins. transistors T1 through T8 (BC547). A
During the memory access cycle, port logic 1 at any of the output pins of port
P0 first outputs lower bytes of 16-bit P1 will drive the corresponding LED as
memory address and then the same port well as the gate of the triac. The corre-
acts as bidirectional data bus to read a sponding triac therefore fires to drive
byte of memory, whereas port P2 provides the lamp/lamps connected between its
the higher byte of memory address dur- terminal A2 and the neutral line (N). If
ing the read cycle. It is further seen that you use, say, 12V lamps, you may con-
the lower-order address byte of port P0 nect about 20 lamps in series. If each
gets latched into external register of 74373 lamp is of 25-watt (passes about 2A
(IC2) to save the particular byte. The ALE current) rating, you may connect two
(Address latch enable) pulse provides the rows of 20 such bulbs across A2 termi-
precise timing to the 74LS373 for latch- nal of each triac and neutral line. The
ing the low-order address. software program determines the trig-
If the memory access is meant for gering sequence of the triacs to provide
the program memory, the PSEN signal the lighting effects.
goes low and enables the EPROM to
output the code on the data bus. The
purpose of using PSEN (program store
Software
enable) is that it provides the output As mentioned earlier, lighting of bulbs
signal for the program memory/code is controlled by port P1 output code
memory. When this signal goes low, con- format. During the execution of the pro-
gram, the code stored from memory lo-
PARTS LIST cation 0023H up 007CH (total locations
Semiconductors:
IC1 - 8051 microcontroller are thus 59H or 89 decimal) will get
IC2 - 74373 octal ‘D’ type latches loaded into the accumulator one by one
IC3 - 2764 EPROM 8-kbytes and will get transferred to port P1. If
IC4 - 7805 regulator +5V the format of these codes or their se-
T1-T8 - BC547 npn transistors
TR1-TR8 - BT 136, triac
quence is changed, the output too will
LED1-LED8 - Red LED get altered in same manner. Please note
Resistors (all ¼-watt, ±5% carbon, unless that outputting logic 1 from any pin
stated otherwise): (equivalent to setting a specific bit) will
R1-R16 - 560-ohm switch ‘on’ the corresponding triac (and
R17 - 47-ohm
R18 - 10-kilo-ohm the series of bulbs connected across its
Capacitors: terminals A2 and N), whereas output-
C1, C2 - 30pF ceramic disk ting logic 0 from the same pin of port
C3 - 100µF, 16V electrolytic P1 (equivalent to clearing/resetting the
C4, C5 - 10µF, 25V electrolytic
Miscellaneous:
specific bit) will switch it ‘off’. The out-
XTAL - 12MHz quartz crystal put code format from port P1 is shown
L1-L8 - L1 through L8 could each in Fig. 4.
be a series of bulbs with to- Example 1: If there is a requirement
tal voltage-drop of 230V AC to set only P1.0 bit, the output format
- Heat-sink
S1 - Push-to-on switch from port P1 will be as shown in Fig. 5.
For converting the above format to

183
 CONSTRUCTION

Program Listing For Multi-effect Chaser Lights

Add. Code Label Mnemonics Comments Add. Code Label Mnemonics Comments
ORG 0000H ;ROM starting address 003F 01 DB 01H
0000 E4 CLR A ;Clear contents of accumulator 0040 11 DB 11H
0001 759000 MOV P1,#00H ;Clear port 1 (off all LEDs) 0041 22 DB 22H
0004 900023 MOV DPTR,#0023H ;Moving immediate DPTR 0042 44 DB 44H
;with 0023 (starting address of 0043 88 DB 88H
;O/P codes) 0044 44 DB 44H
0007 7B00 LABEL2: MOV R3,#00H ;Clearing the contents of 0045 22 DB 22H
register R3 0046 11 DB 11H
0009 E4 LABEL1: CLR A ;Clear accumulator 0047 33 DB 33H
000A 2B ADD A,R3 ;Adding the contents of 0048 77 DB 77H
;accumulator and register R3 0049 FF DB FFH
000B 0B INC R3 ;Incrementing the contents of 004A 77 DB 77H
;register R3 by 1 004B 33 DB 33H
000C 93 MOVC A,@A+DPTR ;Copy the code byte, found at 004C 11 DB 11H
;ROM address formed by adding 004D 81 DB 81H
;A dn the DPTR, to A 004E 42 DB 42H
000D F590 MOV P1,A ;Move the content the contents 004F 24 DB 24H
;of accumulator to port 1 0050 18 DB 18H
000F 1116 ACALL DELAY ;Calling delay 0051 24 DB 24H
0011 BB59F5 CJNE R3,#59H, ;compare the contents of regis- 0052 42 DB 42H
LABEL1 ;ter R3 with 59H and jump to 0053 81 DB 81H
;labell if not equal else continue 0054 C3 DB C3H
0014 80F1 SJMP LABEL2 ;Short jump to label2 0055 E7 DB E7H
0016 7801 DELAY: MOV R0,#01H ;Move immediate register R0 0056 FF DB FFH
;with 01H 0057 E7 DB E7H
0018 7900 LABEL5:MOV R1,#00H ;Move immediate register R1 0058 C3 DB C3H
;with 00H 0059 81 DB 81H
001A 7A00 LABEL4:MOV R2,#00 ;Move immediate register R2 005A 01 DB 01H
;with 00H 005B 02 DB 02H
001C DAFE LABEL3:DJNZ R2,LABEL3 ;Decrement the content of 005C 04 DB 04H
;register R2 till it becomes zero 005D 08 DB 08H
001E D9FA DJNZ R1,LABEL4 ;Decrement R1 till zero 005E 10 DB 10H
0020 D8F6 DJNZ R0,LABEL5 ;Decrement R0 till zero 005F 20 DB 20H
0022 22 RET ;Return 0060 40 DB 40H
0023 01 DB 01H ;DB(Define Byte) is 0061 80 DB 80H
0024 02 DB 02H ;the assembler directive 0062 40 DB 40H
0025 04 DB 04H 0063 20 DB 20H
0026 08 DB 08H 0064 10 DB 10H
0027 10 DB 10H 0065 08 DB 08H
0028 20 DB 20H 0066 04 DB 04H
0029 40 DB 40H 0067 02 DB 02H
002A 80 DB 80H 0068 01 DB 01H
002B 40 DB 40H 0069 03 DB 03H
002C 20 DB 20H 006A 0C DB 0CH
002D 10 DB 10H 006B 30 DB 30H
002E 08 DB 08H 006C C0 DB C0H
002F 04 DB 04H 006D 30 DB 30H
0030 02 DB 02H 006E 0C DB 0CH
0031 01 DB 01H 006F 03 DB 03H
0032 03 DB 03H 0070 0F DB 0FH
0033 07 DB 07H 0071 F0 DB F0H
0034 0F DB 0FH 0072 FF DB FFH
0035 1F DB 1FH 0073 00 DB 00H
0036 3F DB 3FH 0074 FF DB FFH
0037 7F DB 7FH 0075 00 DB 00H
0038 FF DB FFH 0076 FF DB FFH
0039 7F DB 7FH 0077 AA DB AAH
003A 3F DB 3FH 0078 55 DB 55H
003B 1F DB 1FH 0079 AA DB AAH
003C 0F DB 0FH 007A 55 DB 55H
003D 07 DB 07H 007B AA DB AAH
003E 03 DB 03H 007C 55 DB 55H

normal hex level, you have to apply 8421 maximum count is restricted to FFH lighting effect. The complete program
logic (Fig. 6) and you get 01H. (255 decimal). Since we are comparing listing is given in the box above.
Example 2: To set P1.0 and P1.7, the contents of register R3 with 59H, An actual-size, single-sided PCB for
you have to output 81H from port P1 when register R3 reaches that count, the circuit in Fig. 1 is shown in Fig. 2
(Fig. 7). the compare instruction gets satisfied and its component layout is shown in
In the software program, total codes and it jumps to label 2 (in the program). Fig. 3. It is important that neutral and
to be displayed are 007CH–0023H = In case you wish to extend the codes to phase (live) lines of 230V AC are not
0059H, as mentioned earlier, and hence be output from port P1, the loaded count interchanged, because only the neutral
59H is loaded in the main program at at memory location 0012H has to be al- line is required to be grounded to PCB
memory location 0012H. Further, reg- tered correspondingly. The program, common ground and not the live line.
ister R3 being an 8-bit register, the when run, produces an eye-catching ❏

184
 C I RC ICR CUUII T
T I D E A S
IDEAS

AUTOMATIC BATTERY CHARGER

ing input terminal of IC1 is used for
reference input derived from the output
of IC2 (7806), using the potentiometer
arrangement of resistors R3 (18 kilo-
S.C. DWIVEDI ohm) and R4 (1 kilo-ohm).
YASH DEEP LED1 is connected across relay to
indicate fast charging mode. Diodes D3

N
ormally, chargers available in avoid relay chattering. It is designed for and D6 in the common leads of IC2 and
the market do not have any a window of about 1V. During charging, IC3 respectively provide added protec-
sort of control except for a ro- when the battery voltage increases be- tion to the regulators.
tary switch that can select different tap- yond 13.64V, the relay cuts off and the The float charging section, compris-
pings on a rheostat, to vary the charg- float charging section continues to work. ing regulator 7812, transistors T3 and
ing current. This type of control is not When battery voltage goes below 11.66V, T4, and few other discrete components,
adequate because of the irregular fluc- the relay is turned on and direct (fast) becomes active when the battery volt-
tuations in the mains supply, rendering charging of the battery takes place at age goes above 13.64V (such that the
the control ineffective. around 3A. relay RL1 is de-energised). In the
A simple circuit intended for auto- In the Schmitt trigger circuit, resis- energised state of the relay, the emit-
matic charging of lead-acid batteries is tors R1 and R2 are used as a simple ter and collector of transistor T4 remain
presented here. It is flexible enough to voltage divider (divide-by-2) to provide shorted, and hence the float charger is
be used for large-capacity inverter bat- battery voltage sample to the inverting ineffective and direct charging of bat-
teries. Only the rating of transformer input terminal of IC1. The non-invert- tery takes place.
and power
transistor
needs to
be in-
creased.
T h e
circuit has
been basi-
cally de-
signed for
a car bat-
t e r y
(about 40
Ah rat-
i n g ) ,
w h i c h
could be
used for
lighting
two 40W
tubelights.
The circuit
includes
Schmitt
trigger re-
lay driver,
f l o a t
charger,
and bat-
tery volt-
age moni-
tor sec-
tions.
T h e
Schmitt
trigger is
incorpo-
rated to

185
 C I R C U I T I D E A S

The reference terminal of regulator cause of a drop in diode D7 you effec- age level in bar graph like fashion.
(IC3) is kept at 3.9V using LED2, LED3, tively get 13.8V at the positive terminal Regulator 7805 is used for generating
and diode D6 in the common lead of IC3 of the battery. When Schmitt trigger reference voltage. Preset VR1 (20 kilo-
to obtain the required regulated output switches ‘on’ relay RL1, charging is at ohm) can be used to adjust voltage lev-
(15.9V), in excess of its rated output, high current rate (boost mode). The fast els as indicated in the circuit. Here also
which is needed for proper operation of charging path, starting from transformer a potmeter arrangement using resistors
the circuit. This output voltage is fed to X2, comprises diode D5, N/O contacts of R7, R8, and R9 is used as ‘divide by 3’
the base of transistor T3 (BC548), which relay RL1, and diode D7. circuit to sample the battery voltage.
along with transistor T4 (2N3055) forms The circuit built around IC4 and IC5 When voltage is below 10V, the buzzer
a Darlington pair. You get 14.5V output is the voltage monitoring section that sounds to indicate that the safe dis-
at the emitter of transistor T4, but be- provides visual display of battery volt- charge limit has been exceeded.

TEMPERATURE MEASUREMENT
enough.
A simple way to make a TH1 Cu
thermistor is to take a 1meg-ohm, 2W

INSTRUMENT
resistor as a former and wind 2 metres
of 46 SWG enameled copper (Cu) wire
(5.91ohm/metre) over it. This gives a 12-
S.C. DWIVEDI
ohm value. Terminate wire ends on re-
ANANTHA NARAYAN sistor leads.
For calibration, you will need a DMM/

I
f wires of two dissimilar metals are resistors (MFRs) of 1 per cent tolerance, DPM and a millivolt source (as shown in
joined at both the ends and the jun- as this is an instrumentation applica- the figure below). First connect source
ction formed at one of the ends is tion. Power supply should be a stable between terminals TC+ and TC–, then
heated more than the other junction, a +5V, -5V supply, for which one can use set source to 0.00 mV (verify with DMM
current flows in the circuit due to See- 7805 and 7905 regulators. for zero). The output across +out and –
beck thermal emf. This effect is used in out termi-
thermocouple (TC) temperature sensors. nals must
The Peltier effect is converse of the be in mV
Seebeck effect, which means that if a (use DMM),
current is forced through junctions of represent-
dissimilar metals, one junction starts ing the
getting hot while the other starts get- room tem-
ting cold, depending on direction of the perature
applied emf. This effect is used to make (RT). For
small portable refrigerators. example, if
It is known that one of the junc- RT is 30 oC
tions is the sensing or hot junction (Tmes) (use a glass
and the other junction is the terminat- thermom-
ing or cold junction (Tref). The voltage eter), +out
between terminals ‘a’ and ‘b’ is propor- should be
tional to Tmes - Tref (as given in the Table The input terminals TC+ and TC– 30mV. At
I). The formula being Vab = a(Tmes-Tref), should go to a 4-way barrier terminal 0mV in-
where a is the Seebeck coefficient of block. Two extra terminals are used to put, adjust
the thermocouple. mount TH1 Cu thermistor. This forms VR1 till
In the circuit, use only metal film an isothermal block, which is good 30mV is
Table I read at
+out ter-
MV Thermocouple Temperature in oC Remarks minal.
0 0 As cold junction is not zero but is at room This is
2.585 50 temperature (RT), add RT to temperature.
5.268 100
10.777 200
16.325 300
21.846 400 Example
27.338 500 Feed 10.777mV between the TC+ and TC-
33.096 600 terminals. If RT is 30oC, reading on 2V DPM
Reference junction or cold junction at 0oC. will be 230 counts i.e. 230mV.

186
 C I R C U I T I D E A S

‘zero cal’. Now increase mV input to 21.85 line atmosphere. Gain Av = (Rf+Ri)/Ri. Here Rf is R7
(corresponding to 400oC). Then vary VR2 6. It corrodes/rusts in acidic and and Ri = R5+R6+VR2 (in circuit-value).
till +out terminal is at 430mV (temp. oxidising atmosphere. Design of TH1 cold junction com-
+RT). This is ‘gain cal’. Now, as VR1 and 7. Colour codes of wires are negative- pensation copper thermistor
VR2 are interdependent, you may have red and positive-white. 1. J Type TC output changes by
to repeat ‘zero cal’ and ‘gain cal’ a few 8. J type is popular because of low 0.052mV per oC as per Table I. Copper
times till you get the above values. price and high mV output. has a temperature coefficient of 0.0042
Properties of J thermocouple and 9. J type TC is used in rubber/plas- ohm per ohm/oC. For example, for a cop-
design aspects of gain block used in the tic forming and for general purpose. per wire of 12 ohms, it is 12x0.0042=0.05
temperature measurement instrument ohm/oC.
are summarised below: Design of gain block 2. For R1 of 5k, current through TH1=
J Thermocouple (ANSI Symbol ‘J’) 1. Minimum input from thermo- 5V/5k=1mA. Change of voltage across
1. J is a thermocouple made of iron couple is as low as 1 to 2 mV. Hence TH1 with temperature is 0.05x1mA =
(positive) and constantan (negative). ultra-low offset (<100µV) op-amp OP07 0.05 mV/deg.
2. Constantan is an alloy of copper is used. 3. This rate is the same as that of J
and nickel. 2. Inputs may be subjected to wrong type thermocouple and hence it simu-
3. Full range of use is from – 200oC connections or high voltage. Use of resis- lates cold junction.
to +700oC. tor R2 limits current and zener ZD1 Lab Note. During lab testing the
4. It is practical to use it only from clamps voltage to a safe level. value of VR1 had to be very much in-
0oC to 400oC. 3. Gain required is 400mV/21.8mV, creased. However, as per author, it
5. It is useful in reducing and alka- which is approximately 18 at 400ºC. should be kept at 1 kilo-ohm only.

VOICE BELL S.C. DWIVEDI

introduced by EFY Lab in the path of
Vcc pin 6, during actual testing, helps
in noise reduction and limits the power
MUKESH KUMAR SONI dissipation in IC2.)
Transistor T1 is normally conduct-

T
his circuit consists of two parts low-power (1.2-watt) audio amplifier ing due to its base pulled to the posi-
as shown in the figure. The up- TBA820M, which after amplification is tive supply rails via resistors R3, R5,
per circuit should be assembled fed into a 4-ohm loudspeaker. (The com- and R4. Therefore collector of transis-
in a box along with regulated 9V power bination of resistor R9 and capacitor C7 tor T1 is at near ground potential, and
supply (not shown in figure), while lower
circuit may be assembled on a small gen-
eral-purpose PCB and fixed inside the
doorbell switch enclosure. Connect points
A and B of one module to the similar
points of the other, using a simple 2-
core electric cable. The polarity need not
be adhered to, because the bridge recti-
fier used inside the switch circuit auto-
matically ensures proper polarity.
In the normal condition, any voice
or sound in the vicinity of the door,
where the lower circuit (module 2) is
installed, will be heard on module 1
inside your home. However, as soon as
the door bell switch is pressed by some-
one, a distinct bell sound will be heard
in the loudspeaker, inside the house.
With switch S1 in open condition,
module 2, which is a simple condenser
mic amplifier, amplifies the sound/au-
dio in its vicinity and the audio output
is available across points A and B. In
module 1, this audio is developed across
preset VR1, which acts as a volume
control. The audio from the wiper of
the preset is coupled to the input of

187
 C I R C U I T I D E A S

hence the melody generator UM66 (IC1) its collector high. The voltage at collec- that if there are strangers outside the
does not get any power supply and is tor of transistor T1, after limiting by door, conversing before gaining entry
thus off. zener ZD1 to 3V, serves as power sup- by pressing the bell switch, you can
When bell switch S1 is pushed ply for melody generator UM66. The eavesdrop and hear their conversation
(closed), the audio output from output of melody generator is directly to guess their intentions.
module 1 is shorted to ground and at coupled to the input of audio amplifier Lab Note. This circuit can be easily
the same time transistor T1 base is and hence only melody is reproduced in modified to act as door-phone cum door-
pulled to ground via resistor R3. As a the speaker, when switch S1 is pushed. bell. So try it out!
result, transistor T1 is cut off, to pull The main advantage of this bell is

MOVING CURTAIN DISPLAY S.C. DWIVEDI

gates N1 and N2 form an oscillator
whose period can be controlled using
preset VR1. Oscillator’s output is fed to
K.P. VISWANATHAN clock input pin 14 of IC1 (CD4017),
which is a decade counter.

S
everal circuits have been pub- five. Effects like ‘curtain opening and Initially when output Q0 of IC1 is
lished in earlier issues of EFY closing’ and ‘peacock feathers spreading high, the output of flip-flop formed by
for producing eye-catching light- and closing’ can be produced. Wiring of NOR gates N3 and N4 goes high, thus
ing effects, such as lighting up of char- the same is shown in separate figures. triggering triac-1 through driving tran-
acters one-by-one and their going off Each line is lit up by 6-volt or 12-volt sistor T1. In the same way, when Q1 to
one-by-one in same direction, i.e. first bulbs connected in series for 230V AC Q4 outputs go high sequentially, corre-
character goes off first and so on (first- operation and controlled via triacs. LEDs sponding triacs get triggered and all the
in first-out, or FIFO). In the present cir- can also be used with proper driving five groups of bulbs light up. The first
cuit, an attempt is made for changing circuits. (Please ensure that sum of volt- part of the sequence is over.
this sequence, i.e. the first character to age drop across the series-connected When output Q5 of IC1 become high,
go off last (last-in first-out, or LIFO). bulbs is equal to around 230V.) the flip-flop formed by NOR gates N11
Easily available ICs are used and Flip-flops formed by NOR gates are and N12 is toggled and the output
the number of characters is limited to used for controlling the sequence. NOR is pulled to logic 0, removing the neces-

188
 C I R C U I T I D E A S

sary drive
given to triac-
5. Similarly,
when outputs
Q6 through
Q9 become
high, triac-4
through triac-
1 go off one
by one and
the earlier lit
up bulbs go
off last. The
second part
of the se-
quence is also cycle repeats itself endlessly.
over and then the

PROXIMITY DETECTOR
T1 that shorts the charging capacitor
as long as the output from IR receiver
RUPANJANA module is available (active low).
This setup can be used to detect
K.S. SANKAR proximity of an object moving by. Both
transmitter and receiver can be

T
his proximity detector is con- mains ‘on’ as long as the infrared sig- mounted on a single breadboard/PCB,
structed using an infrared diode nals are being received. but care should be taken that infrared
detector. Infrared detector can When no more signals are received, receiver is behind the infrared LED, so
be used in various equipment such as the mono goes ‘off’ after a few seconds that the problem due to infrared leak-
burglar alarms, touch-free proximity (the delay depends on timing resistor- age is obviated.
switches for turning on a light, and sole- capacitor combination of R7-C5). The de- An object moving nearby actually
noid-controlled valves for operating a wa- lay obtained using 470kilo-ohm resistor reflects the infrared rays from the in-
ter tap. Briefly, the circuit consists of and 4.7µF capacitor is about 3 seconds. frared LED. As the infrared receiver
an infrared transmitter and an infra- Unlike an ordinary mono, the capacitor has a sensitivity angle of 60o, the IR
red receiver (such as Siemens SFH506- in this mono is allowed to charge only rays are sensed within this lobe and
38 used in TV sets). when the reception of the signal has the mono in the receiver section is trig-
The transmitter part consists of two stopped, because of the pnp transistor gered. This principle can be used to
555 timers (IC1 and IC2) turn ‘on’ the light, using
wired in astable mode, as a relay, when a person
shown in the figure, for comes nearby. The same
driving an infrared LED. automatically turns ‘off’
A burst output of 38 kHz, after some time, as the
modulated at 100 Hz, is re- person moves away.
quired for the infrared de- The sensitivity de-
tector to sense the trans- pends on the current-lim-
mission; hence the set-up iting resistor in series with
as shown is required. To the infrared LED. It is ob-
save power, the duty cycle served that with in-circuit
of the 38kHz astable resistance of preset VR1
multivibrator is main- set at 20 ohms, the object
tained at 10 per cent. at a distance of about 25
The receiver part has cms can be sensed.
an infrared detector com- This circuit can be used
prising IC 555 (IC3), wired for burglar alarms based
for operation in on beam interruption, with
monostable mode, followed the added advantage that
by pnp transistor T1. Upon the transmitter and re-
reception of infrared sig- ceiver are housed in the
nals, the 555 timer (mono) same enclosure, avoiding
is turned ‘on’ and it re- any wiring problems.

189
December

2000
 CONSTRUCTION

ELECTRONIC BELL tervals drive transistor T4 (see Fig. 2)

into saturation for a few seconds
(the exact duration being decided by the

SYSTEM S.C. DWIVEDI delay circuit comprising 56-kilo-ohm re-

sistor R47, 100µF capacitor C4, and di-
ode D7). When the transistor goes into
saturation, relay RL2 is energised and
Dr D.K. KAUSHIK the bell sounds for a few seconds.
Any electronic horn/siren using an
audio power

I
n this innovative project, a simple
amplifier of de-
electronic bell system using com-
monly available ICs is presented for sired wattage
may be used for
use in educational institutes. This
simple and easy-to-fabricate project has the bell. In the
prototype, the
the following features:
• It sounds the bell automatically author used an
audio tape re-
after every period of 40 minutes.
• It displays in digital form the cur- corded with the
usual sound of
rent time and period number of the class
going on. brass bell, with
tape recorder/
• The system automatically switches
off after the last period (11th period). The player of 150
digital clock showing the current time, watts rating,
driving four 20-
watt speaker
PARTS LIST units. It was
Semiconductors: found adequate
IC1 - 7805 +5V regulator
IC2 - 7474 dual ‘D’ flip-flop
for the campus
IC3 - MM5369 oscillator/driver of any educa-
IC4 - MM5387/LM8361 clock chip tional institute.
or equivalent The readers
IC5, IC6 - CD4026 decimal up-counter
may, however,
with 7-segment driver
IC7-IC10 - CD4017 decade counter use any other
T1, T2 - BC107 npn transistor sound system
T3, T4 - 2N2222 npn switching according to
transistor Fig. 1: Block diagram of the electronic bell system their require-
D1-D8 - 1N4001 rectifier diode
LED1, LED2 - Red LED ments.
Resistors (all ¼-watt, ±5% carbon, unless
however, continues working as usual. Part III consists of the period counter
stated otherwise): and display. It displays the current pe-
R1, R2 - 2.2-kilo-ohm riod in progress. The number of pulses
R3, R44, R50 - 1.5-kilo-ohm The principle received at 40-minute intervals are
R4 - 4.7-kilo-ohm
Fig. 1 shows the block diagram of the counted by this counter circuit and the
R5, R6, R45
R46, R48 - 10-kilo-ohm system, which has three parts. Part I display unit displays the period number.
R7-R43 - 330-ohms has the usual digital clock comprising One additional relay circuit is used
R47 - 56-kilo-ohm quartz crystal oscillator cum frequency so that the power supply given to parts
R49 - 20-mega-ohm divider IC MM5369, clock chip MM5387, II and III of the system is automati-
Capacitors: and 7-segment common-cathode displays. cally interrupted at the end of the elev-
C1, C4 - 100µF, 25V electrolytic
C2 - 30pF ceramic disk
The 1Hz pulse (i.e. one pulse per enth period. Next day the system has
C3 - 30pF trimmer sec.) is taken from the digital clock and to be reset, and the cycle repeats.
Miscellaneous: used in part II of the circuit. The accu-
S1-S4 - Tactile switch (SPST) racy of the system depends on this 1Hz
S5 - Tactile switch (DPDT) pulse, obtained from the standard digi- The circuit
XTAL - 3.57945MHz crystal tal clock circuit. In part II of the sys- Fig. 2 shows the detailed circuit diagram.
RL1-RL2 - 12V, 200-ohm relay (SPST)
DIS.1-DIS.6 - LT543 common-cathode tem, the 1Hz pulse is used to obtain The clock circuit of part I of the system is
7-segment display one pulse after every 40 minutes, by designed using 3.58MHz quartz crystal,
- Power amplifier with employing a four-stage counter circuit. MM5369 crystal oscillator and divider
loudspeaker The pulses obtained at 40-minute in- (IC3), MM5387 clock chip (IC4), four com-

191
CONSTRUCTION

mon-cathode 7-segment displays,

and a few passive components. For
more details of the digital clock, the
readers may consult ‘Car Clock
Module’ project in September 1986
issue or Electronics Projects (Vol.
7) published by EFY. Push-to-on
switches S1 and S2 (slow and fast
time set) may be used to set the
time of the digital clock.
(Note. For ready reference, pin
configurations of ICs MM5369 and
MM5387/LM8361 are reproduced
here in Figs 3 and 4, respectively.)
The standard 1Hz pulse is
taken from pin 39 of IC4 and con-
nected to clock input pin 14 of de-
cade counter IC7 (CD4017). The
carry pin 12 of IC7 outputs a pulse
every 10 seconds, which is con-
nected to clock pin 14 of the next
CD4017 decade counter (IC8). The
reset terminal (pin 15) of IC8 is
connected to pin 5 (output No. 6)
of the same IC. This IC thus di-
vides the signal by a factor of 6
and its pin 12 (carry pin) gives an
output of one pulse every minute.
This pulse is applied to IC9
(CD4017), where it is further di-
vided by a factor of 10 to produce
an output pulse at every 10-minute
interval. Finally, a pulse at every
40-minute interval is obtained from
IC10 (CD4017), which is configured
as divide-by-four counter, since its
reset pin 15 is shorted to Q4 out-
put pin 10 of IC10.
The output pulse at pin 3 of
IC10 remains high for ten minutes
Fig. 2: Schematic diagram of electronic bell system for institutes

and low for 30 minutes. This out-

put pulse (every 40 minutes) is con-
nected to the base of transistor T4
through a combination of capacitor
C4 and resistance R47, to energise
the relay and sound the bell. The
capacitor-resistor combination of
C4-R47 acts as a differentiator cir-
cuit, while diode D7 clips off the
negative going portion of the pulse.
The delay time may be adjusted by
choosing proper C4-R47 combina-
tion values.
After the preset time delay of a
few seconds, the transistor goes
into cut-off and the relay gets de-
energised, to switch off the bell.
However, the clock circuit of part I
around IC4 and divider circuit
formed by IC7 through IC10 con-

192
 CONSTRUCTION

tinue to The ‘Q’ output of this flip-

work as flop drives relay RL1 through
usual and transistor T3, and thus
hence the switches off the supply to
accuracy parts II and III of the sys-
of the pe- tem, just at the beginning of
Fig. 3: Pin configuration of riods is 12th period (i.e. at the end of
MM5369 not af- 11th period). Resumption of
fected by the supply may take place
the ‘on’ and ‘off’ times of transistor T4. the next day after momen-
To count and display the current pe- tarily pressing switch S3. For
riod, a two-digit counter is designed us- power supply, a 12V car bat-
ing two CMOS decade counter cum 7- tery with charging facility is
segment decoder/driver CD4026 ICs recommended.
(IC5 and IC6) and two 7-segment com- An actual-size, single-
mon-cathode displays (LT543). The pulse sided PCB for the circuit
obtained every 40 minutes from pin 3 (Fig. 2) is shown in Fig. 5 and
of IC10 is also connected to the input of the component layout for the
this two-digit counter. This counter PCB in Fig. 6. The total cost
counts these pulses and displays them of the system, excluding cost
via the LT543 (showing the current pe- of audio amplifier, tape re-
riod number in progress). The two-digit corder, horn, etc, is about Rs
counter counts and displays the period 1,000.
number up to 11.
The segment ‘d’ output for most sig-
nificant digit (MSD) and segment ‘c’ out-
Operation
put for least significant digit (LSD) from Fig. 4: Pin configuration of IC MM5387/LM8361 After completing the circuit,
IC5 and IC6 are connected to the bases test the circuit according to
of transistors T1 and T2 respectively, mon collector voltage of transistors T1 circuit description, as discussed above.
via 2.2-kilo-ohm resistors R1 and R2. and T2) goes high. This output is also For operation of the circuit, switch S3 is
The collectors of the two transistors are connected to clock pin 3 of IC2 (IC 7474), momentarily pressed for resumption of
connected together, working as a NOR which is a dual ‘D’ flip-flop. the supply to parts II and III of the
gate. When ‘d’ and ‘c’ segment driving Only one of the two flip-flops is used circuit, as relay RL1 is energised. Pe-
outputs from IC5 and IC6 respectively, here in toggle mode by connecting its riod-displaying 7-segment displays DIS.5
go low simultaneously (just at the be- Q pin 6 to data (D) pin 2. The and DIS.6 will display any random num-
ginning of 12th period), the output (com- flip-flop toggles after every clock pulse. ber, which is reset to 00 by momentary
depression of
switch S4.
Further,
switch S5
(DPDT) is
pressed and
then released
exactly at the
time when
the first pe-
riod is to
start. This re-
sets IC7
through IC10.
The output
Q0 at pin 3 of
IC10 will go
high, to
energise the
relay and
thus switch
on the bell for
a few seconds
Fig. 5: PCB layout and advance

193
 CONSTRUCTION

circuit gets auto-

matically
switched off.
Though the
ringing of bell
and display of
periods dis-
continue, the
digital clock
continues to
work as
usual. Next
morning, the
above opera-
tion needs to
be repeated.
This sys-
tem was suc-
cessfully
d e m o n -
strated by
the author in
Fig. 6: Component layout a science and
technology
the period display from 00 to 01 (indicat- secondsafterevery40minutes.Intheevening,after exhibition where it was appreciated and
ing that the first period has started). theeleventhperiodisoverandtheinstituteistobe liked by most of the visitors—especially
Hereafter, the circuit works auto- closed, the power supply to parts II and III of the those from the educational institutes.
matically, sounding the bell for a few o

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a portal dedicated to electronics enthusiasts

194
 CONSTRUCTION

SIMPLE TELEPHONE RECORDING/ handset) carry 50V DC. However, dur-

ing ringing, the lines carry 133Hz,

ANSWERING MACHINE
80V AC (modulated pulses), as shown
in Fig 5.
S.C. DWIVEDI Ring detection circuit comprises an
input sensing section followed by
monostable multivibrator and decade
B.B. MANOHAR
counter. In the input sensing section,
capacitor C1 is used for DC blocking

T
his project is intended to provide the recorder and player. The ‘on’ time while 1N4007 diode D1 is used to rec-
you with a simple recording and can be set as per length of the message tify the AC ringing voltage. The poten-
answering machine, which in the to be recorded/played; say, two to three tiometer formed by resistors R2 and
absence of the subscriber/owner of the minutes. R3 (shunted by base-to-emitter resis-
telephone instrument, responds to the 4. Simulate off-
incoming calls and also records them hook state of the tele-
automatically. phone, which is ini-
tially in on-hook con-
dition.
Description The schematic dia-
To understand the overall working of gram incorporating
the system, refer to its block diagram the control circuitry,
shown in Fig. 1. The incoming telephone including power supply
line pair is terminated into the ring de- and relays, is shown in
tection unit comprising a monostable Fig. 2. The line dia-
flip-flop followed by a ring counter to gram, including all ac-
detect the incoming calls. After count- cessories used in the
ing a predetermined number of rings, it system, is shown in
triggers a timer (another monostable Fig. 3.
flip-flop) via an inverter. The output of Normally, the tele-
the timer is used for energisation of a phone lines (in on-
set of relays, which initiate the follow- hook position of the Fig. 1: Block diagram of telephone recording/answering machine
ing actions:
1. Switch
on AC power
to the tape re-
corder.
2. Switch
on DC voltage
to the tape
player.
3. Reset
the ring
counter in the
ring detector
section to
make it ready
for the next in-
coming call/
ring. However,
any fresh call/
ring will be ig-
nored as long
as the timer
output stays
‘high’. The
timer output
also controls
the ‘on’ time of Fig. 2: Circuit diagram of telephone recording/answering machine

195
 CONSTRUCTION

transistor T1 is pulled ‘low’. This low-

going pulse is coupled to trigger pin 2
of timer NE555 (IC1) configured as
monostable (retriggerable). The output
pulse width of IC1 is given by the re-
lationship
Pulse width = 1.1 R4 x C3 … seconds
where R4 is in ohms and C3 in Farads.
With the component values shown,
the pulse width will be roughly 0.36
seconds. This will ensure that the mono
pulse does not end during the pause
period (0.2 sec.) between two successive
rings, so that only one pulse is gener-
ated at the output of IC1 for each pair
of ring signals separated by 0.2 sec-
onds.
The output of IC1 is coupled to
clock input pin 14 of the decade counter
Fig. 3: Line diagram of telephone recording/answering machine showing interconnection
IC 4017 (IC2), which is used for
amongst accessories used in the system counting the rings. From the decade
counter one can select any output from
tance of transistor T1) acts as voltage/ of the ringing voltage at the base Q0 through Q9. But in this project,
current limiting network for transistor of transistor T1, it is driven into satu- we take the output from Q3, which
T1. During the positive incursions ration. As a result, the collector of goes high at the beginning of third ring
(so you will
hear only two
rings properly).
The Q3 out-
put at pin 7 of
IC2 is inverted
by N1 inverter
gate of IC3 to
trigger timer
IC4 (configured
as monostable),
whose pulse
width can be ad-
justed with the
help of preset
VR1. The pulse
width should be
so adjusted that
the tape player
could replay the
required mes-
sage and the re-
corder could
record the re-
sponse from the
far-end sub-
scriber within
the set pulse
width period. As
stated earlier,
timer IC4, when
triggered, ini-
tiates four dif-
ferent func-
Fig. 4: Telephone circuit diagram using single Motorola IC MC34010/MC34011 tions. These are

196
 CONSTRUCTION

microprocessor interface; oth- IC4 via relays. If we use C90 cassette

erwise both chips are identi- tapes for the incoming calls, and as-
cal.) suming that pulse width of timer IC4
is set for 3 minutes, we can record/
answer 15 incoming calls, since we can
Fig. 5: Ringing tone timing waveform
Important points use only one side of the tape in this
Normally, the player and re- set-up and hence we can play/record
accomplished via relays RL1 - RL3 as corder buttons are always in the the messages for 45 minutes only. How-
follows: pressed or ‘on’ condition, so that these ever, one may use each 3-minute dura-
1. The output of timer IC4 energises are automatically switched ‘on’ by timer tion for message answering(playing) for
relay RL1. On energisation, con-
tacts RL1(a) of this relay extend
+12V to the coils of RL2 and RL3,
thereby energising both of them
(RL2 and RL3). RL1(b) contacts
of relay RL1 (on energisation)
switch on the DC supply to the
record player, whose play button
is supposed to be already de-
pressed. (Please note that DC
power supply for the player is not
catered to in the circuit. The sup-
ply voltage will depend on the
‘make’ of the player, and may
vary from one player to the other.
In many cases, battery supply
(provided inside the player itself)
could be routed via RL2(a) con-
tacts.) Thus, it will start playing
the prerecorded message, which
would get coupled to the telephone
lines, since the hook switch would
also be in the released state,
simultaneously via relay RL3
(energised) contacts, as described Fig. 6: Actual-size, single-sided PCB for the circuit in Fig. 2
later.
2. RL2(a) contacts of relay RL2,
on energisation, extend +12V to
reset pin 15 of counter IC2. Thus
the counter remains reset until
IC4 timer’s output goes low again.
RL2(b) contacts of relay RL2, on
energisation, switch on 230V AC
supply to the tape recorder and
thus it can record the message re-
ceived in the earpiece of the tele-
phone.
3. Relay RL3 performs the
functions of cradle switch for the
telephone in absence of the sub-
scriber (or even during his pres-
ence, if he fails to lift his handset
off the cradle during ringing).
Its contacts RL3(a) and RL3(b)
are wired in parallel with the
hook switch, as shown in Fig. 4.
(This application circuit is based
on Motorola single-chip telephone
set IC MC34010 or MC34011.
The latter chip does not provide Fig. 7: Component layout for the PCB

197
 CONSTRUCTION

PARTS LIST (Fig. 2) a minute, with the remaining two min-

Semiconductors: utes reserved for recording other-end
IC1, IC4 - NE555 timer subscriber’s message (i.e. the tape in
IC2 - CD4017 decade counter the player will run blank for these two
IC3 - CD40106 inverter minutes). During these two minutes, if
IC5 - 7812 regulator (+12V)
other-end subscriber is relaying any
T1 - BC547 npn transistor
D1-D7 - 1N4007 rectifier diode message, then the same will be recorded
LED1, LED2 - Red LED automatically in the tape recorder that
Resistors (all ¼-watt, ±5% carbon, unless is already ‘on’.
stated otherwise): Whenever the subscriber (owner) in-
R1 - 100-kilo-ohm tends going out of station, he will have
R2, R7 - 4.7-kilo-ohm
to rewind the player and press the play
R3, R4, R8 - 10-kilo-ohm
R5 - 33-kilo-ohm button ‘on’. Similarly, he has to rewind
R6 - 2.2-ohms the recorder for recording the 15 in-
R9, R10 - 1-kilo-ohm coming messages and also ensure that
VR1 - 1-mega-ohm preset the recording button is in ‘on’ (pressed)
Capacitors: condition. Both the recorder and the
C1, C2, C4, C5 - 0.1µF, 25V ceramic disk
player will be automatically switched
C3 - 10µF, 25V electrolytic
C6 - 470µF, 16V electrolytic ‘on’ for the preset duration whenever
C7, C8 - 1000µF, 35V electrolytic three rings are received, as explained
Miscellaneous: already.
X1 - 230V AC primary to An actual-size PCB for the circuit
12V-0-12V, 500mA sec. in Fig. 2 is shown in Fig. 6 and its
transformer
RL1-RL3 - 12V, 150-ohm, 2C/o relay
component layout is shown in Fig. 7.
- Tape player with DC supply ❏
source
- Tape recorder The author is proprietor/technical director of
- Telephone instrument VEPCO, Madurai.

www.electronicsforu.com
a portal dedicated to electronics enthusiasts

198
 C I R C U I T I D E A S

MULTICHANNEL CONTROL is applied to the base of transistor

USING SOFT SWITCHES

T1 through diode D9 to turn it on,
S.C. DWIVEDI
and RL1 is activated. LED1 also
glows to indicate that channel 1 is
‘on’. The other channels can also be
P. SABARINATHAN switched on, as desired, in a similar
manner.

T
his circuit uses only one octal D- junction of D0 and Q0 (marked ‘A’ in To switch off channel 1, ‘off’ switch
type latch, IC 74LS373, and some the figures) at low level, even after S9 of channel 1 is pressed to apply
associated circuitry to control releasing ‘on’ switch S1. This low level logic high to point ‘A’. Because
eight different gadgets. To control more
devices, identical circuits, in multiples,
can be used. The circuit incorporates
the following features:
(a) Individual ‘on/off’ control for all
channels.
(b) Emergency ‘off’ control for all
channels.
(c) Immediate ‘on’ control for all
channels.
(d) LED indication for ‘on’ channels.
(e) Optional push-to-on buttons or
tactile switches.
When one presses the ‘on’ switch
(S1) of channel 1, a logic low is applied
to data input pin D0. The same level
appears on the data output pin Q0,
because latch-enable pin LE (active
high) is connected to Vcc, and the out-
put-enable OE (active low) is pulled
down using resistor R9. At the same
time, Q0 output is fed back to D0
input, which thus keeps the common

199
 C I R C U I T I D E A S

of the feedback from Q0 to D0, point emergency off switch S17 to disable all If all the channels are to be switched
‘A’ remains high even after releasing the outputs of IC1. In this state, the on simultaneously, a ‘low’ logic level
the ‘off’ switch. As a result, relay outputs of IC1 are in high impedance is applied via diodes D17 through
RL1 is deactivated and LED1 also goes state, and as all transistor bases are D24, to data inputs D0 to D7, by
off. almost ‘open’, all the relays get deacti- pressing switch S18 to activate all the
In case of emergency, press the vated. relays.

AN EXCLUSIVE SINEWAVE The circuit shown here uses five

GENERATOR
ICs. The squarewave signal is fed at
RUPANJANA pin 1 of IC1 (CD 4024). IC1 is a 7-bit
counter, but here only 6 bits are made
use of. The first four bits are fed as a
J. CHOUDHURY signal bus to IC3 (CD4066) quad bilat-
eral switch through IC2 (CD4077B) that

M
any electronic devices depend case of static squarewave-to-sinewave contains four exclusive NOR gates. It
upon the shape of the signals. converter, in low frequency range, we converts the 4-bit signal bus to ‘up
It is very easy to produce can get accurate sine wave, but in high mode’ and ‘down mode’ hexadecimal sig-
squarewave signals from sine wave, frequency range the shape will not be a nals, simultaneously. The converted sig-
but reproducing sinewave signals from true sine wave. Here is a solution to nal bus switches on and off the ladder
the square wave is quite difficult. In that problem. switches inside CD4066. As a result,
the net resistance of lad-
der varies. This varying re-
sistance varies the charg-
ing and discharging cur-
rent of capacitor C1 in the
feedback path of IC5
(LM741).
The charging and dis-
charging mode is controlled
by IC4 (CD4011). In fact,
capacitor C1 works as an
integrator. The sinewave
producing circuit needs 64-
bit squarewave pulse for
360o sine wave. A missing
pulse in this 64-bit se-
quence produces ramp.
In this circuit, all ICs
except IC5 are CMOS ICs
and hence the current con-
sumption is very low.
The value of capacitor
C1 may be calculated from
the relationship: C1 = 0.27/
f0 µF. The value shown in
the circuit is for 50Hz out-
put frequency. The shape
of the sinewave output
may be corrected using
presets VR1 and VR2.
(EFY Lab note. Spikes
were noticed in the output
waveform while operating
with higher frequencies in
the kilohertz range.)

200
 C I R C U I T I D E A S

TTL THREE-STATE LOGIC PROBE for use with microcontrollers, micropro-

cessors, EEPROMs, SRAMs etc.
Some points to be noted are:
• Use IC1 of type HD74LS00 only.
T. SURESH S.C. DWIVEDI • If any other type of IC (e.g.
74HCT00 or 74LS00) is used, diodes D2-

A
TTL logic probe is an indispens- D3-D4 should be added or deleted as
able tool for digital circuit level. At power-on,
troubleshooting. Various meth- the output of
ods can be used to design a logic probe. NAND gate N2
The most common designs employ op- goes low. This is
amps, logic (OR, NOT, XOR) gates, and the default state of
transistors. the gate. The out-
The circuit presented here uses put of gate N2 goes
NAND logic gates of Hitachi HD series low (indicated by
IC HD74LS00, which is a quad-NAND glowing of LED2)
IC. Special technique has been employed during the follow-
to obtain three-state operation using ing situations:
just a single IC. 1. Power to the
Gate N1 is wired such that when the probe is switched
output of gate N1 is at logic ‘0’ (i.e. when ‘on’.
its input is at logic ‘1’), LED1 will glow, 2. The probe’s
to indicate high state of the point being tip is floating, i.e.
when it is neither
S. No. TIP level Output in contact with a
1. Ground/logic 0 LED3 ON point at logic ‘0’ nor at logic ‘1’ state. necessary; for example, when using
2. Vcc/logic 1 LED1 ON 3. The probe tip is in contact with a HD74LS00, one diode D2 is required.
3. Floating/or connected TTL output that is in high impedance • Use another diode in series with
to high impedance LED2 ON
state. D2 if the LED indication overlaps the
The LED indications for various tip float indicator.
probed. Gate N3 is wired to light LED3 levels are summarised in the accompa- (EFY Lab note. The probe was
when the output of gate N3 is high or nying table. found to work properly only with
when the point being tested is at logic ‘0’ This logic probe is very well suited HD74LS00.)

AM DSB TRANSMITTER The carrier is generated using crys-

tal oscillator wired around BC548 tran-

FOR HAMS
sistor T2. The carrier is further amplified
by transistor T1, which also acts as a
S.C. DWIVEDI buffer between the carrier oscillator and
the balanced modulator. The working
YUJIN BOBY VU3PRX frequency of the transmitter can be
changed by using crystals of different

T
his circuit of AM transmitter is In this transmitter we remove the frequencies. For multi-frequency opera-
designed to transmit AM (am- carrier and transmit only the two side tion, selection of different crystals can be
plitude modulated) DSB (double bands. The effective output of the cir- made using a selector switch. The level of
sideband) signals. A modulated AM sig- cuit is three times that of an equivalent the carrier coupled to the DBM can be
nal consists of a carrier and two sym- AM transmitter. adjusted with the help of preset VR2.
metrically spaced side bands. The two Opamp IC 741 is used here as a The output of the DBM contains only
side bands have the same amplitude microphone amplifier to amplify the the product (of audio and carrier) fre-
and carry the same information. In fact, voice picked up by the condenser mi- quencies. The DBM suppresses both the
the carrier itself conveys or carries no crophone. The output of opamp is fed input signals and produces double side
information. In a 100% modulated AM to the double balanced modulator band suppressed carrier (DSBSC) at its
signal 2/3rd of the power is wasted in (DBM) built around four 1N4148 diodes. output. However, since the diodes used
the carrier and only 1/6th of the power The modulation level can be adjusted in the balanced modulator are not fully
is contained in each side band. with the help of preset VR1. matched, the output of the DBM does

201
 C I R C U I T I D E A S

contain some residual carrier. This is sets VR1 and VR2. using 24SWG enameled copper wire.
known as carrier leakage. By adjusting The DSBSC signal available at the Proper heat-sink should be provided for
the 100-ohm preset (VR2) and trimmer output of the balanced modulator is am- SL100B transistor used as final power
(C7) you can anull the scarier leakage. plified by two stages of RF linear am- amplifier.
To receive DSB signals you need a plifiers. Transistor 2N2222A (T3) is used Range of the order of a few
beat frequency oscillator to reinsert the as an RF amplifier, which provides kilometres can be easily achieved by
missing carrier. If you don’t have a beat enough signal amplification to drive the proper choice of site, type of antenna
frequency oscillator, or want to trans- final power amplifier around transistor (such as a resonant half-wave dipole of
mit only AM signal, adjust preset VR2 SL100B. The output of the final power length 20 metres for 7.05 MHz fre-
to leak some carrier so that you can amplifier is connected to the antenna. quency) and proper matching of trans-
receive the signals on any ordinary ra- All coils are to be wound on ferrite mitter to the antanna. Use good-qual-
dio receiver. In AM mode 100% modu- balun core (same as used in TV balun ity shielded wire of short length to con-
lation can be attained by adjusting pre- transformer of size 1.4 cm x 0.6 cm) nect the crystals.

GROUND CONDUCTIVITY industrial sheds or housing. With a

little ingenuity and experimentation,

MEASUREMENT S.C. DWIVEDI one can even predict the availability of

underground water at a site. It should
be noted that geologists employ a simi-
PRASAD J. lar probe, but in place of 50Hz AC
mains used here, they employ RF for

T
he circuit presented here pro- this, radio hobbyists can choose a suit- this purpose.
vides the simplest way to mea- able site for the erection of antennae Though electronics hobbyists hav-
sure earth conductivity. Using that require good grounding; for ex- ing a flair for gardening can measure
ample, a the salinity or the fertility of soil to be
vertical an- used for their special plants, using the
tenna that method described here, it however
uses radial needs a lot of experimentation and
g r o u n d study.
plane. This The circuit presented here employs
circuit is a simple AC measurement technique.
also useful The efficiency of the circuit and results
for selecting improve as the frequency of AC in-
a suitable creases. With regular mains voltage
site to carry source of 230 volts, 5-amp current ca-
out the pacity, and 50Hz frequency available,
earthing of the measurements result in 25 per cent

202
 C I R C U I T I D E A S

accuracy, which is quite reasonable and thor used copper probes.) Conductivity = 21xV1/V2 millimhos/
adequate for some practical applications. The ends of the probes are connected metre (m /m)
The bulb (which is 230V, 100W, fila- securely to the wires by means of bat- Please note:
ment type) shown in the figure is tery terminal lugs (generally • For poor soil with very little
mounted on a wooden box with a bulb used in automobiles) or power supply moisture and bio-fertility, the conduc-
holder. Connection to the mains supply terminals (used in UPS, DC-AC tivity ranges from 1 to 8 millimhos per
is obtained using long wires, which are converters, etc). The probes P2 and metre.
terminated into a 3-pin power plug that P3 can be fixed on hylam strips • For average soil, the values range
ensures non-reversibility of live and measuring 75cm(20-inch)x5cm(2-inch)x from 10 to 20 millimhos per metre.
neutral leads. The bulb drops the volt- 5mm(0.2-inch). Hylam strips are gener- • For fertile and good conductive
age to a safer level at the terminating ally available from switchboard dealers. soil, the conductivity ranges from 80 to
probe. Resistor R1 limits the current. To measure the conductivity ( ), 100 millimhos per metre.
Voltage V1 is measured across resistor the probes are driven into the ground, • For very saline soil, or salt water
R1 using AC voltmeter. as shown in the figure, and the circuit with very good conductivity, the
The probes, which are equidistant is powered with adequate safety mea- values might be as high as 5,000
from each other (about 45.7 cm, or 18- sures against any electric hazard. Volt- millimhos per metre.
inches, apart) have a height (below ages V1 across resistor R1 and V2 Caution. It should be noted that
ground level) of about 30.5 cm (12 across probes P2 and P3 are measured the polarity of the AC (phase and
inches) and a diameter of 1.25 cm (or and noted. neutral) leads should never be reversed,
½-inch). The probes may be made of The earth conductivity is then cal- to prevent any dangers to human/ani-
iron, stainless steel, or copper. (The au- culated as: mal lives.

STEPPER MOTOR CONTROL computer to communicate with the out-

side world.

VIA PARALLEL PORT

The parallel port is generally used to
S.C. DWIVEDI
interface printers, but we have used it to
interface the stepper motor. The parallel
port consists of 25 pins, but it can only
SHOBHAN KUMAR DUTTA transmit 8 bits of data at a time. The
reason for the large number of pins is

T
o better understand the circuit, The circuit can be easily assembled that every data pin has its own ground
one needs to have some knowl- on a breadboard. It is very important return pin. There are other pins for vari-
edge of electronics, computer that you work with the smallest stepper ous other functions. We have used only
programming, and the computer’s par- motor available in the market, such as four data pins and a ground pin.
allel port. the one used in
You will of course need a computer, a floppy drive.
12-volt power supply (preferably a bat- If you go in for
tery eliminator), stepper motor, ULN2003 the large ones
chip, and some connecting wires. used in CNC
machines,
there is a
chance of dam-
aging the PC’s
parallel port.
The second
thing to men-
tion is that the
colours of the
wires of the
stepper motor
are non-stan-
dard.
The paral-
lel port of the
PC is the most
flexible way of
getting the

203
 C I R C U I T I D E A S

The functions of the various pins are the step resolution of the TABLE I
given in Table I. Pins 2 through 9 are motor. On continuous appli-
Pin No Signal Direction Register Hardware
data pins. Here, we will use data pins 2 cation of the same signal, (D-type 25) In/Out Inverted
to 5, corresponding to data bits D0 the shaft stays in the same 1 Strobe In/Out Control Yes
through D3 of port 378(hex) for LPT1 position. Rotation occurs 2 D0
or 278(hex) for LPT2. Also, pin 25 is only when the signal is thru thru Out Data —
used as the ground pin. changed in a proper se- 9 D7
The PC’s parallel port cannot sink quence. There are three 10 Ack In Status
much current. At the most, it can modes of operation of a step- 11 Busy In Status Yes
handle a few milliamperes. So, if the per motor, namely, single- 12 PE In Status —
parallel port is connected directly to an coil excitation mode, dual- 13 Select In Status —
electrical device, it will damage the par- coil excitation mode, and
14 AFeed Out Control Yes
allel port. Thus, we need a current am- half-step modes.
15 Error In Status —
plifier in between the parallel port and • Single-coil excita-
16 Initialise Out Control —
the electrical device. The ULN2003, tion. Each coil is energised
used precisely for this purpose, has an successively in a rotary 17 SLCT Out Control Yes
(Printer)
array of Darlington transistor pairs. A fashion. If the four coils are
18 thru 25 Ground — — —
Darlington configuration is a way of assumed to be in a horizon-
connecting two transistors in order to tal plane, the bit pattern will be 0001, stepper motor coils involved measuring
amplify current to many times the in- 0010, 0100, 1000, and 0001. the windings’ resistance as well as their
put current value. • Dual-coil excitation. Here, two continuity in ohmsx1 scale, using any
The stepper motor has various ad- adjacent coils are energised successively good multimeter. The resistance of in-
vantages over other motors, as far as in a rotary fashion. The bit pattern will dividual coils with respect to the middle
controlling by a computer is concerned. be 0011, 0110, 1100, 1001, and 0011. points will roughly be half the resistance
It includes high precision of angular • Half-step mode. Here, the step- of the combined coil pairs (L1 and L2
movement, speed of rotation, and high per motor operates at half the given or L3 and L4 in the figure). After hav-
moving and holding torque. It comes in step resolution. The bit pattern is 0001, ing identified the coils in this fashion,
various flavours. We are dealing with 0011, 0010, 0110, 0100, 1100, 1000, 1001, connect them to the circuit as shown in
unipolar permanent magnet stepper and 0001. the figure. Now, if the sequence of input
motor that has four coils arranged as Two software control programs, one to the coils happens to be wrong, the
follows: for DOS and another for Linux, are in- shaft, instead of moving (clockwise or
Terminals 1 and 2 are common ter- cluded here. The program for DOS can anti-clockwise), will only vibrate. This
minals (connected to ground or the posi- be used to run the motor in full- or can be corrected by trial and error, by
tive supply) and the other four termi- half-step mode, or in single-coil or interchanging connection to the coils.
nals are fed to the appropriate signals. double-coil excitation mode. The output waveforms for full-step
When a proper signal is applied, the (EFY Lab note. The method used single-coil mode, as seen on the oscillo-
shaft turns by a specific angle, called at EFY for correct identification of the scope, are shown in the figure.)

DOS PROGRAM
#include <conio.h> unsigned int i=0; outportb(0x378,halfstep_val[i%sizeof(halfstep_val)]);
#include <dos.h> while(!kbhit()) #endif
#define FULLSTEP_SINGLECOIL { delay(10);
//#define FULLSTEP_DOUBLECOIL #ifdef FULLSTEP_SINGLECOIL i++;
//#define HALFSTEP outportb(0x378,fullstep_singlecoil_val[i%sizeof if(i==65535u) i=0;
unsigned char fullstep_singlecoil_val[]={1,2,4,8}; (fullstep_singlecoil_val)]); }
unsigned char fullstep_doublecoil_val[]={3,6,12, #elif defined(FULLSTEP_DOUBLECOIL) outportb(0x378,0);
9}; outportb(0x378,fullstep_doublecoil_val[i%sizeof }
unsigned char halfstep_val[]={8,12,4,6,2,3,9}; (fullstep_doublecoil_val)]); Compile and run the program under any com-
void main() #elif defined(HALFSTEP) piler like turboc for dos or Borland C++.
{

LINUX PROGRAM
#include <sys/io.h> unsigned int i=0; #endif
#include <unistd.h> if(ioperm(0x378,1,1)==-1) exit(1); usleep(5000);
#include <stdlib.h> while(1) i++;
//#define FULLSTEP_SINGLECOIL { if(i==65535u) i=0;
//#define FULLSTEP_DOUBLECOIL #ifdef FULLSTEP_SINGLECOIL }
#define HALFSTEP outb(fullstep_singlecoil_val[i%sizeof(fullstep_ outb(0,0x378);
unsigned char fullstep_singlecoil_val[]={1,2,4,8}; singlecoil_val)],0x378); }
unsigned char fullstep_doublecoil_val[]={3,6,12, #elif defined(FULLSTEP_DOUBLECOIL) Compile and run the program as follows:
9}; outb(fullstep_doublecoil_val[i%sizeof(fullstep_ #gcc – O6 – o motor motor.c
unsigned char halfstep_val[]={8,12,4,6,2,3,9}; doublecoil_val)],0x378); #./motor
void main() #elif defined(HALFSTEP) The – O6 flag is necessary for using the ‘outb’
{ outb(halfstep_val[i%sizeof(halfstep_val)],0x378); function.

204
The End