TC4467/TC4468/TC4469

Logic-Input CMOS Quad Drivers

Features General Description
• High Peak Output Current: 1.2 A The TC4467/TC4468/TC4469 devices are a family of
• Wide Operating Range: four-output CMOS buffers/MOSFET drivers with 1.2 A
- 4.5 V to 18 V peak drive capability. Unlike other MOSFET drivers,
these devices have two inputs for each output. The
• Symmetrical Rise/Fall Times: 25 nsec
inputs are configured as logic gates: NAND (TC4467),
• Short, Equal Delay Times: 75 nsec AND (TC4468) and AND/INV (TC4469).
• Latch-proof. Will Withstand 500 mA Inductive
The TC4467/TC4468/TC4469 drivers can continuously
Kickback
source up to 250 mA into ground referenced loads.
• 3 Input Logic Choices: These devices are ideal for direct driving low current
- AND / NAND / AND + Inv motors or driving MOSFETs in a H-bridge configuration
• ESD Protection on All Pins: 2 kV for higher current motor drive (see Section 5.0 for
details). Having the logic gates onboard the driver can
Applications help to reduce component count in many designs.
• General Purpose CMOS Logic Buffer The TC4467/TC4468/TC4469 devices are very robust
and highly latch-up resistant. They can tolerate up to
• Driving All Four MOSFETs in an H-Bridge
5 V of noise spiking on the ground line and can handle
• Direct Small Motor Driver up to 0.5 A of reverse current on the driver outputs.
• Relay or Peripheral Drivers
The TC4467/4468/4469 devices are available in
• CCD Driver commercial, industrial and military temperature ranges.
• Pin-Switching Network Driver

Package Types
14-Pin PDIP/CERDIP
1A 1 14 VDD
1B 2 13 1Y
2A 3 TC4467 12 2Y
2B 4 TC4468 11 3Y
TC4469
3A 5 10 4Y
3B 6 9 4B
GND 7 8 4A

16-Pin SOIC (Wide)

1A 1 16 VDD
1B 2 15 VDD
2A 3 14 1Y
TC4467
2B 4 13 2Y
TC4468
3A 5 TC4469 12 3Y
3B 6 11 4Y
GND 7 10 4B
GND 8 9 4A

 2001-2012 Microchip Technology Inc. DS21425C-page 1

TC4467/TC4468/TC4469
Logic Diagrams

TC4467 TC4468 TC4469 TC446X

VDD VDD VDD
VDD
14 14 14
1A 1
13 1Y 1A 1 13 1Y 1A 1 13 1Y
1B 2 1B 2 1B 2
2A 3
12 2Y 2A 3 12 2Y 2A 3 12 2Y Output
2B 4 2B 4 2B 4
3A 5
11 3Y 3A 5 11 3Y 3A 5 11 3Y
3B 6 3B 6 3B 6
4A 8
10 4Y 4A 8 10 4Y 4A 8 10 4Y
4B 9 4B 9 4B 9
7 7 7
GND GND GND

DS21425C-page 2  2001-2012 Microchip Technology Inc.

 TC4467/TC4468/TC4469
1.0 ELECTRICAL †Notice: Stresses above those listed under "Maximum
Ratings" may cause permanent damage to the device. This is
CHARACTERISTICS a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
Absolute Maximum Ratings† operation listings of this specification is not implied. Exposure
to maximum rating conditions for extended periods may affect
Supply Voltage ...............................................................+20 V
device reliability.
Input Voltage ............................. (GND – 5 V) to (VDD + 0.3 V)
Package Power Dissipation: (TA 70°C)
PDIP...................................................................800 mW
CERDIP .............................................................840 mW
SOIC ..................................................................760 mW
Package Thermal Resistance:
CERDIP RJ-A ...................................................100°C/W
CERDIP RJ-C .....................................................23°C/W
PDIP RJ-A ..........................................................80°C/W
PDIP RJ-C ..........................................................35°C/W
SOIC RJ-A ..........................................................95°C/W
SOIC RJ-C ..........................................................28°C/W
Operating Temperature Range:
C Version ................................................... 0°C to +70°C
E Version.................................................-40°C to +85°C
M Version ..............................................-55°C to +125°C
Maximum Chip Temperature ....................................... +150°C
Storage Temperature Range .........................-65°C to +150°C

ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise noted, TA = +25°C, with 4.5 V VDD18 V.
Parameters Sym Min Typ Max Units Conditions
Input
Logic 1, High Input Voltage VIH 2.4 — VDD V Note 3
Logic 0, Low Input Voltage VIL — — 0.8 V Note 3
Input Current IIN -1.0 — +1.0 µA 0 VVINVDD
Output
High Output Voltage VOH VDD – 0.025 — — V ILOAD = 100 µA (Note 1)
Low Output Voltage VOL — — 0.15 V ILOAD = 10 mA (Note 1)
Output Resistance RO — 10 15  IOUT = 10 mA, VDD = 18 V
Peak Output Current IPK — 1.2 — A
Continuous Output Current IDC — — 300 mA Single Output
— — 500 Total Package
Latch-Up Protection Withstand I — 500 — mA 4.5 VVDD 16 V
Reverse Current
Switching Time (Note 1)
Rise Time tR — 15 25 nsec Figure 4-1
Fall Time tF — 15 25 nsec Figure 4-1
Delay Time tD1 — 40 75 nsec Figure 4-1
Delay Time tD2 — 40 75 nsec Figure 4-1
Power Supply
Power Supply Current IS — 1.5 4 mA
Power Supply Voltage VDD 4.5 — 18 V Note 2
Note 1: Totem pole outputs should not be paralleled because the propagation delay differences from one to the other could cause one driver to
drive high a few nanoseconds before another. The resulting current spike, although short, may decrease the life of the device. Switching
times are ensured by design.
2: When driving all four outputs simultaneously in the same direction, VDD will be limited to 16 V. This reduces the chance that internal dv/dt
will cause high-power dissipation in the device.
3: The input threshold has approximately 50 mV of hysteresis centered at approximately 1.5 V. Input rise times should be kept below 5 µsec
to avoid high internal peak currents during input transitions. Static input levels should also be maintained above the maximum, or below
the minimum, input levels specified in the "Electrical Characteristics" to avoid increased power dissipation in the device.

 2001-2012 Microchip Technology Inc. DS21425C-page 3

TC4467/TC4468/TC4469
ELECTRICAL SPECIFICATIONS (OPERATING TEMPERATURES)
Electrical Characteristics: Unless otherwise noted, over operating temperature range with 4.5 V VDD18 V.
Parameters Sym Min Typ Max Units Conditions
Input
Logic 1, High Input Voltage VIH 2.4 — — V Note 3
Logic 0, Low Input Voltage VIL — — 0.8 V Note 3
Input Current IIN -10 — 10 µA 0 VVINVDD
Output
High Output Voltage VOH VDD – 0.025 — — V ILOAD = 100 µA (Note 1)
Low Output Voltage VOL — — 0.30 V ILOAD = 10 mA (Note 1)
Output Resistance RO — 20 30  IOUT = 10 mA, VDD = 18 V
Peak Output Current IPK — 1.2 — A
Continuous Output Current IDC — — 300 mA Single Output
— — 500 Total Package
Latch-Up Protection Withstand I — 500 — mA 4.5 VVDD 16 V
Reverse Current
Switching Time (Note 1)
Rise Time tR — 15 50 nsec Figure 4-1
Fall Time tF — 15 50 nsec Figure 4-1
Delay Time tD1 — 40 100 nsec Figure 4-1
Delay Time tD2 — 40 100 nsec Figure 4-1
Power Supply
Power Supply Current IS — — 8 mA
Power Supply Voltage VDD 4.5 — 18 V Note 2
Note 1: Totem pole outputs should not be paralleled because the propagation delay differences from one to the other could cause one driver to
drive high a few nanoseconds before another. The resulting current spike, although short, may decrease the life of the device. Switching
times are ensured by design.
2: When driving all four outputs simultaneously in the same direction, VDD will be limited to 16 V. This reduces the chance that internal dv/dt
will cause high-power dissipation in the device.
3: The input threshold has approximately 50 mV of hysteresis centered at approximately 1.5 V. Input rise times should be kept below 5 µsec
to avoid high internal peak currents during input transitions. Static input levels should also be maintained above the maximum, or below
the minimum, input levels specified in the "Electrical Characteristics" to avoid increased power dissipation in the device.

TRUTH TABLE
Part No. TC4467 NAND TC4468 AND TC4469 AND/INV
Inputs A H H L L H H L L H H L L
Inputs B H L H L H L H L H L H L
Outputs TC446X L H H H H L L L L H L L
Legend: H = High L = Low

DS21425C-page 4  2001-2012 Microchip Technology Inc.

 TC4467/TC4468/TC4469
2.0 TYPICAL PERFORMANCE CURVES
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein are
not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: TA = +25°C, with 4.5 V VDD18 V.

140 140
2200
0 pF
p
120 120 2200 pF

100 1600 pF
p 100 1500 pF

tFALL (nsec)
tRISE (nsec)

80 1000 pF 80
1000 pF
60 60

40 470 pF 40 470 pF

20 100 pF 20 100 pF
p

0 0
3 5 7 9 11 13 15 17 19 3 5 7 9 11 13 15 17 19
VSUPPLY (V) VSUPPLY (V)

FIGURE 2-1: Rise Time vs. Supply FIGURE 2-4: Fall Time vs. Supply
Voltage. Voltage.

140 140

120 5V 120 5V

100 100
tFALL (nsec)
tRISE (nsec)

80 80
10 V 10 V
60 15 V 60 15 V

40 40

20 20

0 0
100 1000 10,000 100 1000 10,000
CLOAD (pF) CLOAD (pF)

FIGURE 2-2: Rise Time vs. Capacitive FIGURE 2-5: Fall Time vs. Capacitive
Load. Load.

25 80
VSUPPLY = 17.5 V
CLOAD = 470 pF CLOAD = 4
470 pF
20
DELAY TIME (nsec)

tFALL 60
TIME (nsec)

tD1
15
tRISE
40
10 tD2
20
5

0 0
-50 -25 0 25 50 75 100 125 4 6 8 10 12 14 16 18
TEMPERATURE (°C) VSUPPLY (V)

FIGURE 2-3: Rise/Fall Times vs. FIGURE 2-6: Propagation Delay Time vs.
Temperature. Supply Voltage.

 2001-2012 Microchip Technology Inc. DS21425C-page 5

TC4467/TC4468/TC4469
2.0 TYPICAL PERFORMANCE CURVES (CONTINUED)
Note: TA = +25°C, with 4.5 V VDD18 V.

140 70
VDD = 12 V
VDD = 17.5 V
120
= 470 pF
DELAY TIME (nsec)

INPUT RISING

DELAY TIME (nsec)

60 tD1
100 VIN

80 tD2 50
tD2
60
40
tD1
INPUT FALLING
40
30
20

0 20
1 2 3 4 5 6 7 8 9 10 -60 -40 -20 0 20 40 60 80 100 120
VDRIVE (V) °C)

FIGURE 2-7: Input Amplitude vs. Delay FIGURE 2-10: Propagation Delay Times
Times. vs. Temperatures.

2.5 3.5
VDD = 17.5 V
3.0
2.0
IQUIESCENT (mA)

IQUIESCENT (mA)

2.5

1.5 OUTPUTS = 0 2.0 OUTPUTS = 0

1.5
1.0
OUTPUTS = 1
1.0
0.5 OUTPUTS = 1
0.5

0 0
4 6 8 10 12 14 16 18 -60 -40 -20 0 20 40 60 80 100 120
VSUPPLY (V) TJUNCTION (°C)

FIGURE 2-8: Quiescent Supply Current FIGURE 2-11: Quiescent Supply Current
vs. Supply Voltage. vs. Temperature.

35 35

30 30

25 TJ = +150°C 25
RDS(ON) (Ω)

RDS(ON) (Ω)

20 20
TJ = +150°C
15 TJ = +25°C
15

10 10
TJ = +25°C
5 5

0 0
4 6 8 10 12 14 16 18 4 6 8 10 12 14 16 18
V SUPPLY (V) V SUPPLY (V)

FIGURE 2-9: High-State Output FIGURE 2-12: Low-State Output

Resistance. Resistance.

DS21425C-page 6  2001-2012 Microchip Technology Inc.

 TC4467/TC4468/TC4469
2.0 TYPICAL PERFORMANCE CURVES (CONTINUED)
Note: (Load on single output only).

60 60
VDD = 18 V VDD = 18 V
2 MH
Hz 2200 pF
50 1 MH
MHz 50
1000 pF
ISUPPLY (mA)

40 40

ISUPPLY (mA)
30 30
50
00 kHz
20 20
100 pF
p
10 200 kHz 10
20 kHz
0 0
100 1000 10,000 10 100 1000 10,000
CLOAD (pF) FREQUENCY (kHz)

FIGURE 2-13: Supply Current vs. FIGURE 2-16: Supply Current vs.
Capacitive Load. Frequency.

60 60
VDD = 12 V 2 MHz VDD = 12 V 2200 pF
50 50

40 40
ISUPPLY (mA)

ISUPPLY (mA)

1 MHz 1000 pF
p
30 30

20 20
500 kHz

10 100 pF
200 kHz 10
20 kHz
0 0
100 1000 10,000 10 100 1000 10,000
CLOAD (pF) FREQUENCY (kHz)

FIGURE 2-14: Supply Current vs. FIGURE 2-17: Supply Current vs.
Capacitive Load. Frequency.

60 60
VDD = 6 V VDD = 6 V
50 50

40
ISUPPLY (mA)

40
ISUPPLY (mA)

2200 pF
30 2 MHz 30

20 20
1 MHz 1000 pF

10 500 kHz 10
200 kHz 100 pF
20 kHz
0 0
100 1000 10,000 10 100 1000 10,000
CLOAD (pF) FREQUENCY (kHz)

FIGURE 2-15: Supply Current vs. FIGURE 2-18: Supply Current vs.
Capacitive Load. Frequency.

 2001-2012 Microchip Technology Inc. DS21425C-page 7

TC4467/TC4468/TC4469
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLE

14-Pin PDIP, 16-Pin SOIC
CERDIP (Wide) Description
Symbol Symbol
1A 1A Input A for Driver 1, TTL/CMOS Compatible Input
1B 1B Input B for Driver 1, TTL/CMOS Compatible Input
2A 2A Input A for Driver 2, TTL/CMOS Compatible Input
2B 2B Input B for Driver 2, TTL/CMOS Compatible Input
3A 3A Input A for Driver 3, TTL/CMOS Compatible Input
3B 3B Input B for Driver 3, TTL/CMOS Compatible Input
GND GND Ground
— GND Ground
4A 4A Input A for Driver 4, TTL/CMOS Compatible Input
4B 4B Input B for Driver 4, TTL/CMOS Compatible Input
4Y 4Y Output for Driver 4, CMOS Push-Pull Output
3Y 3Y Output for Driver 3, CMOS Push-Pull Output
2Y 2Y Output for Driver 2, CMOS Push-Pull Output
1Y 1Y Output for Driver 1, CMOS Push-Pull Output
VDD VDD Supply Input, 4.5 V to 18 V
— VDD Supply Input, 4.5 V to 18 V

DS21425C-page 8  2001-2012 Microchip Technology Inc.

 TC4467/TC4468/TC4469
4.0 DETAILED DESCRIPTION 4.4 Power Dissipation
The supply current versus frequency and supply
4.1 Supply Bypassing
current versus capacitive load characteristic curves will
Large currents are required to charge and discharge aid in determining power dissipation calculations.
large capacitive loads quickly. For example, charging a Microchip Technology's CMOS drivers have greatly
1000 pF load to 18 V in 25 nsec requires 0.72 A from reduced quiescent DC power consumption.
the device's power supply. Input signal duty cycle, power supply voltage and load
To ensure low supply impedance over a wide frequency type influence package power dissipation. Given power
range, a 1 µF film capacitor in parallel with one or two dissipation and package thermal resistance, the maxi-
low-inductance, 0.1 µF ceramic disk capacitors with mum ambient operating temperature is easily
short lead lengths (<0.5 in.) normally provide adequate calculated. The 14-pin plastic package junction-to-
bypassing. ambient thermal resistance is 83.3°C/W. At +70°C, the
package is rated at 800 mW maximum dissipation.
4.2 Grounding Maximum allowable chip temperature is +150°C.
The TC4467 and TC4469 contain inverting drivers. Three components make up total package power
Potential drops developed in common ground dissipation:
impedances from input to output will appear as 1. Load-caused dissipation (PL).
negative feedback and degrade switching speed 2. Quiescent power (PQ).
characteristics. Instead, individual ground returns for
3. Transition power (PT).
input and output circuits, or a ground plane, should be
used. A capacitive-load-caused dissipation (driving MOSFET
gates), is a direct function of frequency, capacitive load
4.3 Input Stage and supply voltage. The power dissipation is:

The input voltage level changes the no-load or

EQUATION
quiescent supply current. The N-channel MOSFET
input stage transistor drives a 2.5 mA current source 2
P L = fCVS
load. With logic “0” outputs, maximum quiescent supply
current is 4 mA. Logic “1” output level signals reduce f = Switching Frequency
quiescent current to 1.4 mA, maximum. Unused driver C = Capacitive Load
inputs must be connected to VDD or VSS. Minimum V S = Supply Voltage
power dissipation occurs for logic “1” outputs.
The drivers are designed with 50 mV of hysteresis, A resistive-load-caused dissipation for ground-
which provides clean transitions and minimizes output referenced loads is a function of duty cycle, load
stage current spiking when changing states. Input volt- current and load voltage. The power dissipation is:
age thresholds are approximately 1.5 V, making any
voltage greater than 1.5 V, up to VDD, a logic “1” input. EQUATION
Input current is less than 1 µA over this range.
P L = D  V S – VL I L

D = Duty Cycle
V S = Supply Voltage
V L = Load Voltage
I L = Load Current

 2001-2012 Microchip Technology Inc. DS21425C-page 9

TC4467/TC4468/TC4469
A resistive-load-caused dissipation for supply- EQUATION
referenced loads is a function of duty cycle, load
–9
current and output voltage. The power dissipation is P T = fV s  10  10 

EQUATION C = 1000 pF Capacitive Load

V S = 15 V
PL = DV O IL D = 50%
f = 200 kHz
D = Duty Cycle
V O = Device Output Voltage PD = Package Power Dissipation
I L = Load Current = P L + PQ + P T
= 45mW + 35mW + 30mW
Quiescent power dissipation depends on input signal = 110mW
duty cycle. Logic HIGH outputs result in a lower power
dissipation mode, with only 0.6 mA total current drain
Package power dissipation is the sum of load,
(all devices driven). Logic LOW outputs raise the
quiescent and transition power dissipations. An
current to 4 mA maximum. The quiescent power
example shows the relative magnitude for each term:
dissipation is:
Maximum operating temperature is:
EQUATION
EQUATION
PQ = V S  D  I H  +  1 – D IL 
T J –  JA  P D  = 141C
I H = Quiescent Current with all outputs LOW
T J = Maximum allowable junction temperature
(4 mA max.)
(+150C 
I L = Quiescent Current with all outputs HIGH
 JA = Junction-to-ambient thernal resistance
(0.6 mA max.)
(83.3C/W) 14-pin plastic package
D = Duty Cycle
V S = Supply Voltage
Note: Ambient operating temperature should not
exceed +85°C for "EJD" device or +125°C
Transition power dissipation arises in the complimen- for "MJD" device.
tary configuration (TC446X) because the output stage
N-channel and P-channel MOS transistors are ON
simultaneously for a very short period when the output
changes. The transition power dissipation is
approximately:

VDD
Input: 100 kHz,
square wave,
1 µF Film 0.1 µF Ceramic tRISE = tFALL  10 nsec
14
1 +5 V
1A 13 VOUT 90%
2
1B
470 pF Input
3 (A, B)
2A 12
4 10%
2B 0V
5 VDD
3A 11 90% 90%
6 tD1 tD2
3B
Output tR tF
8
4A 10
9 10% 10%
4B 0V
7

FIGURE 4-1: Switching Time Test Circuit.

DS21425C-page 10  2001-2012 Microchip Technology Inc.

 TC4467/TC4468/TC4469
5.0 APPLICATIONS INFORMATION

+12 V

14
Airpax
TC4469
#M82102-P2
1
13 Red 7.5/Step
2
Motor
3
12
4
A Gray

5
B 11 Yel
6

8
10 Blk
9

FIGURE 5-1: Stepper Motor Drive.

+5 V to +15 V

14
18 V
TC4469
1
13
Direction 2
3
Rev 12
Fwd 4
5
PWM Speed 11 M Motor
6
8
10
9

FIGURE 5-2: Quad Driver For H-bridge Motor Control.

 2001-2012 Microchip Technology Inc. DS21425C-page 11

TC4467/TC4468/TC4469
6.0 PACKAGING INFORMATION
6.1 Package Marking Information

14-Lead PDIP (300 mil) Example:

XXXXXXXXXXXXXX TC4467CPD
XXXXXXXXXXXXXX
YYWWNNN YYWWNNN

14-Lead CERDIP (300 mil) Example:

XXXXXXXXXXXXXX TC4468EJD
XXXXXXXXXXXXXX
YYWWNNN YYWWNNN

16-Lead SOIC (300 mil) Example:

XXXXXXXXXXX TC4469COE
XXXXXXXXXXX YYWWNNN
XXXXXXXXXXX
YYWWNNN

Legend: XX...X Customer-specific information

Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
e3 Pb-free JEDEC designator for Matte Tin (Sn)
* This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.

Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.

DS21425C-page 12  2001-2012 Microchip Technology Inc.

 TC4467/TC4468/TC4469
14-Lead Plastic Dual In-line (P) – 300 mil (PDIP)

Note: For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging

E1

n 1


A A2

c L

A1
 B1
eB
B p

Units INCHES* MILLIMETERS

Dimension Limits MIN NOM MAX MIN NOM MAX
Number of Pins n 14 14
Pitch p .100 2.54
Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32
Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68
Base to Seating Plane A1 .015 0.38
Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26
Molded Package Width E1 .240 .250 .260 6.10 6.35 6.60
Overall Length D .740 .750 .760 18.80 19.05 19.30
Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43
Lead Thickness c .008 .012 .015 0.20 0.29 0.38
Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78
Lower Lead Width B .014 .018 .022 0.36 0.46 0.56
Overall Row Spacing § eB .310 .370 .430 7.87 9.40 10.92
Mold Draft Angle Top  5 10 15 5 10 15
Mold Draft Angle Bottom  5 10 15 5 10 15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-005

 2001-2012 Microchip Technology Inc. DS21425C-page 13

TC4467/TC4468/TC4469
14-Lead Ceramic Dual In-line – 300 mil (CERDIP)

Note: For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging

14-Pin CERDIP (Narrow)

PIN 1

.300 (7.62)
.230 (5.84)

.098 (2.49) MAX. .030 (0.76) MIN.

.780 (19.81) .320 (8.13)

.740 (18.80) .290 (7.37)
.040 (1.02)
.200 (5.08) .020 (0.51)
.160 (4.06)
.015 (0.38) 3° MIN.
.200 (5.08) .150 (3.81) .008 (0.20)
.125 (3.18) MIN.

.400 (10.16)
.320 (8.13)
.020 (0.51)
.110 (2.79) .065 (1.65) .016 (0.41)
.090 (2.29) .045 (1.14)
Dimensions: inches (mm)

DS21425C-page 14  2001-2012 Microchip Technology Inc.

 TC4467/TC4468/TC4469
16-Lead Plastic Small Outline (SO) – Wide, 300 mil (SOIC)

Note: For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging

E
p
E1

2
n 1
B

h


45

c
A A2


 L A1

Units INCHES* MILLIMETERS

Dimension Limits MIN NOM MAX MIN NOM MAX
Number of Pins n 16 16
Pitch p .050 1.27
Overall Height A .093 .099 .104 2.36 2.50 2.64
Molded Package Thickness A2 .088 .091 .094 2.24 2.31 2.39
Standoff § A1 .004 .008 .012 0.10 0.20 0.30
Overall Width E .394 .407 .420 10.01 10.34 10.67
Molded Package Width E1 .291 .295 .299 7.39 7.49 7.59
Overall Length D .398 .406 .413 10.10 10.30 10.49
Chamfer Distance h .010 .020 .029 0.25 0.50 0.74
Foot Length L .016 .033 .050 0.41 0.84 1.27
Foot Angle  0 4 8 0 4 8
Lead Thickness c .009 .011 .013 0.23 0.28 0.33
Lead Width B .014 .017 .020 0.36 0.42 0.51
Mold Draft Angle Top  0 12 15 0 12 15
Mold Draft Angle Bottom  0 12 15 0 12 15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-013
Drawing No. C04-102

 2001-2012 Microchip Technology Inc. DS21425C-page 15

TC4467/TC4468/TC4469
7.0 REVISION HISTORY
Revision C (December 2012)
Added a note to each package outline drawing.

DS21425C-page 16  2001-2012 Microchip Technology Inc.

 TC4467/4468/4469
THE MICROCHIP WEB SITE CUSTOMER SUPPORT
Microchip provides online support via our WWW site at Users of Microchip products can receive assistance
www.microchip.com. This web site is used as a means through several channels:
to make files and information easily available to • Distributor or Representative
customers. Accessible by using your favorite Internet
• Local Sales Office
browser, the web site contains the following
information: • Field Application Engineer (FAE)
• Technical Support
• Product Support – Data sheets and errata,
application notes and sample programs, design Customers should contact their distributor,
resources, user’s guides and hardware support representative or field application engineer (FAE) for
documents, latest software releases and archived support. Local sales offices are also available to help
software customers. A listing of sales offices and locations is
• General Technical Support – Frequently Asked included in the back of this document.
Questions (FAQ), technical support requests, Technical support is available through the web site
online discussion groups, Microchip consultant at: http://microchip.com/support
program member listing
• Business of Microchip – Product selector and
ordering guides, latest Microchip press releases,
listing of seminars and events, listings of
Microchip sales offices, distributors and factory
representatives

CUSTOMER CHANGE NOTIFICATION

SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specified product family or development tool of interest.
To register, access the Microchip web site at
www.microchip.com. Under “Support”, click on
“Customer Change Notification” and follow the
registration instructions.

 2001-2012 Microchip Technology Inc. DS21425C-page 17

TC4467/4468/4469
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip
product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our
documentation can better serve you, please FAX your comments to the Technical Publications Manager at
(480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.

TO: Technical Publications Manager Total Pages Sent ________

RE: Reader Response

From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________ FAX: (______) _________ - _________
Application (optional):
Would you like a reply? Y N

Device: TC4467/4468/4469 Literature Number: DS21425C

Questions:

1. What are the best features of this document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this document easy to follow? If not, why?

4. What additions to the document do you think would enhance the structure and subject?

5. What deletions from the document could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

DS21425C-page 18  2001-2012 Microchip Technology Inc.

 TC4467/TC4468/TC4469
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

PART NO. X XX Examples:

a) TC4467COE: Commerical Temperature,
Device Temperature Package SOIC package.
Range b) TC4467CPD: Commercial Temperature,
PDIP package.
c) TC4467MJD: Military Temperature,
Device: TC4467: 1.2A Quad MOSFET Driver, NAND Ceramic DIP package.
TC4468: 1.2A Quad MOSFET Driver, AND
TC4469: 1.2A Quad MOSFET Driver, AND/INV a) TC4468COE713: Tape and Reel,
Commerical Temp., SOIC package.
b) TC4468CPD: Commercial Temperature,
Temperature Range: C = 0C to +70C PDIP package.
E = -40C to +85C (CERDIP only)
M = -55C to +125C (CERDIP only) a) TC4469COE: Commercial Temperature,
SOIC package.
b) TC4469CPD: Commercial Temperature,
Package: PD = Plastic DIP, (300 mil body), 14-lead PDIP package.
JD = Ceramic DIP, (300 mil body), 14-lead
OE = SOIC (Wide), 16-lead
OE713 = SOIC (Wide), 16-lead (Tape and Reel)

Sales and Support

Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:

1. Your local Microchip sales office

2. The Microchip Worldwide Site (www.microchip.com)

Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.

New Customer Notification System

Register on our web site (www.microchip.com/cn) to receive the most current information on our products.

 2001-2012 Microchip Technology Inc. DS21425C-page19

TC4467/TC4468/TC4469
NOTES:

DS21425C-page 20  2001-2012 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device Trademarks

applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, dsPIC,
and may be superseded by updates. It is your responsibility to
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
ensure that your application meets with your specifications.
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
MICROCHIP MAKES NO REPRESENTATIONS OR and UNI/O are registered trademarks of Microchip Technology
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
Incorporated in the U.S.A. and other countries.
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION, FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
INCLUDING BUT NOT LIMITED TO ITS CONDITION, MTP, SEEVAL and The Embedded Control Solutions
QUALITY, PERFORMANCE, MERCHANTABILITY OR Company are registered trademarks of Microchip Technology
FITNESS FOR PURPOSE. Microchip disclaims all liability Incorporated in the U.S.A.
arising from this information and its use. Use of Microchip Silicon Storage Technology is a registered trademark of
devices in life support and/or safety applications is entirely at Microchip Technology Inc. in other countries.
the buyer’s risk, and the buyer agrees to defend, indemnify and
Analog-for-the-Digital Age, Application Maestro, BodyCom,
hold harmless Microchip from any and all damages, claims,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
suits, or expenses resulting from such use. No licenses are
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
conveyed, implicitly or otherwise, under any Microchip
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
intellectual property rights.
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2001-2012, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620767993

QUALITY MANAGEMENT SYSTEM Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
CERTIFIED BY DNV Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures

== ISO/TS 16949 ==
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.

 2001-2012 Microchip Technology Inc. DS21425C-page 21

 Worldwide Sales and Service
AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE
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China - Zhuhai
Tel: 86-756-3210040
11/27/12
Fax: 86-756-3210049

DS21425C-page 22  2001-2012 Microchip Technology Inc.