Digital Logic Design - Midterm: Department of Computer Science and Engineering National Taiwan Ocean University
Digital Logic Design - Midterm: Department of Computer Science and Engineering National Taiwan Ocean University
Name: ID:
1. [10%] A limited number system uses base 12. Suppose there are at most four integer digits. The weights of the
digits are 123 , 122 , 121 , and 1. Special names are given to the weights as follows: 12 = 1 dozen, 122 = 1 gross, and
123 = 1 great gross.
(a) How many beverage cans are in 6 great gross + 8 gross + 7 dozen + 4?
(b) Find the representation in base 12 for 756910 beverage cans.
Note: available digits are: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B.
Ans:
(a) 6 × 123 + 8 × 122 + 7 × 12 + 4 = 11608
(b) 7569 ÷ 12 = 630 . . . . . . 9
630 ÷ 12 = 52 . . . . . . 6
52 ÷ 12 = 4 . . . . . . 4
4 ÷ 12 = 0 . . . . . . 4
⇒ 756910 = 446912
2. [10%] Perform the binary multiplications: 1010 × 1101
Ans:
3. [10%] Show the bit configuration that represents the decimal number 387 in (a) binary, (b) BCD, (c) ASCII, (d)
ASCII with even parity. Hint: The ASCII code of zero (0) is 3016 .
Ans:
(a) 110000011
(b) 0011, 1000, 0111
(c) 00110011, 00111000, 00110111
(d) 001100110, 001110001, 001101111
1
4. [10%] Use DeMorgan’s theorem, express the function
F = ABC + AC + AB
(A + C) · (A + B) · (B + C) = B · C
Ans:
(A + C) · (A + B) · (B + C)
= (AA + AB + AC + BC) · (B + C) ; AA = 0
= ABB + ABC + ABC + ACC + BBC + BCC
= AB + ABC + ABC + AC + BC ; A·B =0
= ABC + AC + BC = AC(1 + B) + BC ; 1+B =1
= AC + BC = C · (A + B) = C · (A + B) · 1
= C · (A + B) · (A + B) ; A+B =1
= C · (AA + AB + AB + B)
= C · B · (A + A + 1)
=B·C
6. [10%] Optimize the Boolean expression ABCD + ACD + ABC + CD using a map.
Ans:
ABCD + ACD + ABC + CD
= ABCD + A(B + B)CD + ABC(D + D) + (A + A)(B + B)CD
= ABCD + ABCD + ABCD + ABCD + ABCD + ABCD + AB CD + ABCD + A B CD
=m P13 + m14 + m10 + m11 + m10 + m13 + m9 + m5 + m1
= m(1, 5, 9, 10, 11, 13, 14)
Optimize the above function using a map, we can choose one of the following two choices: From the left figure, we
will have the optimized equation ACD + ABC + CD; From the right figure, we will have ACD + ABD + CD.
C C
0 1 3 2 0 1 3 2
4 5 7 6 4 5 7 6
12 13 15 14
B 12 13 15 14
B
A 8 9 11 10
A 8 9 11 10
D D
2
7. [10%] Optimize thePBoolean function F together with thePdon’t-care conditions d.
F (P, Q, R, S) = m(0, 1, 7, 13, 15), d(P, Q, R, S) = m(2, 6, 8, 9, 10).
Ans: By filling the map, we are able to optimize the function to ABD + BCD + B C.
C
0 1 3 2
4 5 7 6
12 13 15 14
B
A 8 9 11 10
8. [10%] Prove that the dual of the exclusive-OR (XOR) is also its complement.
Ans: Since X ⊕ Y = XY + XY , the dual of X ⊕ Y is equal to the dual of XY + XY . By interchanging AND
and OR operator, the dual of X ⊕ Y is
(X + Y ) · (X + Y ). (1)
On the other hand, the complement of X ⊕ Y is equal to the complement of XY + XY . Therefore,
XY + XY = XY · XY
(2)
= (X + Y ) · (X + Y ) = (X + Y ) · (X + Y )
As equation (1) is the same as equation (2), we have shown that the dual of the exclusive-OR is also its complement.
Y
X H
Z
3
10. [10%] Describe or draw the rules to replace primitive gates with universal gates.
(a) Replace AND and OR gates with NAND gates.
(b) Replace AND and OR gates with NOR gates.
Ans:
(a) Replace AND and OR gates with NAND gates:
NAND replaces AND
NAND replaces OR
NOR replaces OR
11. [10%] Find a function to detect an error in the representation of a decimal digit in BCD. In other words, write an
equation with value 1 when the inputs are any one of the six unused bit combinations in the BCD code, and value
0 otherwise. Based on your equation, please also implement it with only NAND gates and inverters.
Ans: We can solve the problem by following the procedures: 1) draw the truth table; 2) optimize the equation with
a map; and 3) implement the circuit with NANDs
1) The truth table: 2) By the following map, we can obtain the optimized
equation E = AB + AC.
A B C D E
0 0 0 0 0 C
0 0 0 0 0
0 1 3 2
.. ..
. .
1 0 0 1 0
4 5 7 6
1 0 1 0 1
.. ..
. . 12 13 15 14
B
1 1 1 1 1
A 8 9 11 10
D
3) The left figure implements the circuit with AND and OR gates. We can then replace these primitive gates all
with the NAND gates, as shown in the right fiture.
A A
B B
E E
C C