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Application Report
C2000™ Position Manager PTO API Reference Guide

Ozino Odharo, Subrahmanya Bharathi and Lori Heustess

ABSTRACT
Pulse-train output (PTO) is a generic name for describing various forms of pulse outputs. The APIs assist in
generating various outputs of QEP, CwCCW, pulse and direction, and more.

Table of Contents
1 Introduction.............................................................................................................................................................................2
2 PTO – PulseGen...................................................................................................................................................................... 3
3 PTO – QepDiv.......................................................................................................................................................................... 5
4 PTO – Abs2Qep.....................................................................................................................................................................10
5 PTO Example Projects..........................................................................................................................................................21
6 PTO Library Source and Projects........................................................................................................................................25
7 Using the PTO Reference APIs in Projects........................................................................................................................ 34
8 References............................................................................................................................................................................ 37
Revision History.......................................................................................................................................................................37

List of Figures
Figure 2-1. PulseGen Output Diagram........................................................................................................................................ 3
Figure 2-2. PulseGen Implementation Diagram.......................................................................................................................... 3
Figure 2-3. PulseGen CLB Tile Diagram..................................................................................................................................... 4
Figure 3-1. QepDiv Input and Output Diagram............................................................................................................................ 5
Figure 3-2. QepDiv Interconnect Diagram................................................................................................................................... 6
Figure 3-3. Implementation Diagram........................................................................................................................................... 6
Figure 3-4. QepDiv CLB Tile Diagram......................................................................................................................................... 7
Figure 4-1. Abs2Qep Implementation Diagram......................................................................................................................... 10
Figure 4-2. Absolute Position Encoder...................................................................................................................................... 10
Figure 4-3. Incremental Position Encoder..................................................................................................................................11
Figure 4-4. Abs2Qep Zero-Cross in the Forward Direction....................................................................................................... 14
Figure 4-5. Abs2Qep Zero-Cross in the Reverse Direction....................................................................................................... 14
Figure 4-6. Abs2Qep Example System Waveform.................................................................................................................... 15
Figure 4-7. Abs2Qep CLB Tile Block Diagram.......................................................................................................................... 16
Figure 4-8. Abs2Qep PTO State Diagrams............................................................................................................................... 18
Figure 4-9. Simulation QEP-A and QEP-B Generation............................................................................................................. 19
Figure 4-10. Simulation of Halt Latch........................................................................................................................................ 20
Figure 6-1. Abs2Qep Translate Function...................................................................................................................................33
Figure 7-1. Compiler Include Options for Projects Using PTO Reference APIs........................................................................ 35
Figure 7-2. C2000™ Linker Options – PulseGen....................................................................................................................... 35
Figure 7-3. C2000 Linker Options – QepDiv..............................................................................................................................36

List of Tables
Table 2-1. PulseGen CLB Tile 1...................................................................................................................................................4
Table 3-1. QepDiv CLB Tile 1...................................................................................................................................................... 8
Table 3-2. QepDiv CLB Tile 2...................................................................................................................................................... 9
Table 4-1. Abs2Qep Relationship Between Lines and QCLK (Forward Direction).................................................................... 11
Table 4-2. Abs2Qep Example Calculations............................................................................................................................... 13
Table 4-3. Abs2Qep CLB Tile 1................................................................................................................................................. 16
Table 4-4. QEP-A (s0) Signal Generation Karnaugh Maps ...................................................................................................... 18
Table 4-5. QEP-B (s1) Signal Generation Karnaugh Maps ...................................................................................................... 18
Table 4-6. RUN/HALT Output.....................................................................................................................................................19

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Table 4-7. HALT_LATCH Karnaugh Map .................................................................................................................................. 19

Table 4-8. Abs2Qep HLC Register Usage................................................................................................................................. 20
Table 4-9. Abs2Qep HLC Programs.......................................................................................................................................... 20
Table 5-1. Location of PTO Example Solutions......................................................................................................................... 21
Table 5-2. Hardware ................................................................................................................................................................. 21
Table 5-3. PulseGen Output Signal to GPIO Mapping...............................................................................................................22
Table 5-4. QepDiv Example Input/Output Signal Routing..........................................................................................................22
Table 5-5. F28004x, F2837x and F2838x QepDiv Output GPIO Mapping................................................................................ 23
Table 5-6. QepDiv Test Input Connections................................................................................................................................ 23
Table 5-7. Abs2Qep Output Signal Routing...............................................................................................................................24
Table 5-8. F2838xD Abs2Qep Output GPIO Mapping...............................................................................................................24
Table 5-9. F2837xD Abs2Qep Output GPIO Mapping...............................................................................................................24
Table 5-10. F280049C Abs2Qep Output GPIO Mapping...........................................................................................................24
Table 6-1. Location of PTO Libraries......................................................................................................................................... 25
Table 6-2. PTO-PulseGen API Functions.................................................................................................................................. 26
Table 6-3. PTO-QepDiv API Functions...................................................................................................................................... 29
Table 6-4. PTO-Abs2Qep API Functions................................................................................................................................... 31

Trademarks
Code Composer Studio™ and C2000™ are trademarks of Texas Instruments.
All trademarks are the property of their respective owners.
1 Introduction
The C2000 Real-Time MCU Pulse Train Output (PTO) APIs assist in generating various pulse patterns. These
APIs leverage the Configurable Logic Block (CLB), Type 1 or later, to generate the specified PTO.
This document describes the implementation and associated software for each PTO module.
The patterns included are:
PulseGen: Output a simple pulse and a direction-indication signal.
QepDiv: Scale Quadrature Encoded Pulse inputs (QEP-A, QEP-B and QEP-Index) to output reduced frequency
PTO signals.
Abs2Qep: Translate a change in absolute position into equivalent QEP-A/B and QEP-I signals.
There are two categories of software provided:
Example Application Projects: Small applications which configure a C2000 Real-Time MCU, incorporates the
appropriate reference library, and demonstrates the PTO functionality. Section 5 describes how to access the
source code, import the project into CCS, and then build and run the example.
PTO Reference API Libraries: Software implementation of the PTO. Section 6 includes a description of each
API, how to access the source code, and how to rebuild the libraries. Section 7 explains how to incorporate the
API into your own project.

Note
You will need the appropriate development tools installed to build the CLB-based projects. For more
information, see the CLB Tool User’s Guide.

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2 PTO – PulseGen
The PTO-PulseGen function can be used to generate pulse and direction outputs as required by the application.
Figure 2-1 shows the PulseGen output and Figure 2-2 shows the implementation diagram.

Pulse
(Output)

PulseGen

Direction
(Output)

Figure 2-1. PulseGen Output Diagram

GPIO14
Pulse - Output

CLB

OUTPUT GPIO15
Direction - Output
XBAR

C28xCPU

TMS320F28379D

Figure 2-2. PulseGen Implementation Diagram

Note
Interconnect between the CLB and the MCU boundary may differ between devices or between
examples. For specific interconnect routing information, see Section 5.

2.1 PulseGen Implementation Overview

This section provides an overview of how the PTO-PulseGen interface is implemented. This interface is
achieved by the following components:
• C28x CPU
– Initializes the PulseGen interface, configures the CLB, XBARs, and GPIOs.
– Provides the number of pulses and the duration of each pulse to the CLB.
• Configurable Logic Block (CLB) Type 1 or later
– Generates the pulses and direction as defined by the software interface function.
• Device Interconnect (XBARs)
– Configured for output-signal routing to and from the CLB, as required.
2.2 PulseGen Limitations
The PTO-PulseGen operation has the following usage limitations:
• The minimum number of cycles must be 1000 cycles for the PTO period (at 200-MHz system clock, this
corresponds to 10 µs [for example, 100 KHz]).
• The number of cycles must be between 40% to 60% of the PTO period for the interrupt time to avoid conflicts
with PTO updates.
• The maximum frequency of the PTO-PulseGen output is 5 MHz at a 200-MHz CPU CLK. See the example
provided in C2000Ware MotorControl SDK.

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2.3 PulseGen CLB Configuration

The following resources are used inside the CLB tile to achieve the desired function detailed in Section 2.1.
squareWave
out i0
TILE1_OUTLUT_4
Period = 200000, Duty = 100000 i1 out
e0 TILE1_FSM_0 out = i0 & i1
i2
e1 s0
s0 = ((~s0) & (e0 & (~e1))) | (s0& (~e1))
xe0 s1 = s1 s1 TILE1_BOUNDARY
squareWave
TILE1_BOUNDARY out = xe0 | xe1 | e1
out xe1 out out0
Period = 10000, Duty = 5000 in0 : reset zero
out1
in1 9 event TILE1_COUNTER_0 match1
out2
in2 : mode0 evAction = None match2
i0 out3
squareWave in3 : i0 mode1
i1 TILE1_LUT_0 out out4
out
Period = 10000, Duty = 5000 in4 : i1 TILE1_LUT_1 out i2 out = i0 & (i1 | i2) out5
in5 : i2 out = i0 & i1 i3 out6
in6 : i3 out7
squareWave in7 : reset zero
out
Period = 50000, Duty = 25000 event TILE1_COUNTER_1 match1 e0 TILE1_FSM_1
mode0 evAction = None match2 e1 s0
s0 = ((~s0)&(e0 & (~e1))) | ((s0) & (~e1))
mode1 xe0 s1 = s0 s1 e0
xe1 out = s0 | s1 out e1
TILE1_HLC
e2
e3
reset zero
event TILE1_COUNTER_2 match1
mode0 evAction = None match2
1 mode1
i0
TILE1_OUTLUT_5
i1 out
out = i0
i2

e0 TILE1_FSM_2
e1 s0
s0 = ((~s0) & (e0 & e1)) | (s0 & (e0 | (~e1)))
xe0 s1 = s1 s1
xe1 out = s0 out

Figure 2-3. PulseGen CLB Tile Diagram

Note
Section 6 describes how to build the library project in Code Composer Studio™. By building the
project, CCS will regenerate the CLB tile diagram (clb.svg or clb.html). and object (.lib). The CLB tile
diagram will be located in the RELEASE/syscfg directory.

Implementation is described in Table 2-1 and visualized in Figure 2-3.

Table 2-1. PulseGen CLB Tile 1
Resource Function Notes
Inputs
In0 On/Off Control via GPREG Enable CLB
In1 Rising Edge Detect Via EPWM1A
In2 On/Off Control via GPREG Run signal (start/stop of PTO)
In3 Not used Not used
In4 On/Off Control via GPREG Sets the PTO direction
In5 Not used Not used
In6 Not used Not used
In7 Not used Not used
Outputs
Out0 Not used Not used
Out1 Not used Not used
Out2 Not used Not used
Out3 Not used Not used
Out4 Transmit Enable Via OUTPUT XBar; PTO pulse output
Out5 Transmit Enable Via OUTPUT XBar; PTO direction output
Out6 Not used Not used
Out7 Not used Not used
Logic Resources
LUT0 Input for Event0 in HLC Edge detection on encoder input with either in1 or CNT1 match value. Triggers
event in HLC to load new values into HLC registers
LUT1 Mode0 input for CNTs 1,2,3 Logic to determine the selected modes for CNT1, CNT2, and CNT3. Starts all
three counters.
LUT2 Not used Not used
FSM0 Pulse width generation This state machine together with CNT0 will generate a number of hi and low
pulse widths. The output sets the reset value of CNT0.

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Table 2-1. PulseGen CLB Tile 1 (continued)

Resource Function Notes
FSM1 Active and Full Period generation Sets the values for the active and full period based on match1 and match2
outputs of CNT1. Outputs number of pulses in active period duration and none
in between the difference of the full and active periods
FSM2 PTO output direction generation Generates the PTO output direction. The output direction is held until the end
of the full period set by FSM1.
CNT0 Pulse width generation Counter Match1 and Match2 values determine triggers for hi and low pulse
widths. The match values are loaded to FSM0 inputs, e0 and e1.
CNT1 Active and Full Period Clock generation Generates inputs needed for FSM1 and FSM2. Match1 determines trigger for
active period. Match2 determines trigger for full period. Match events are used
by FSM1 to generate active and full periods. Match2 is used as extra external
input in FSM0 to determine how long to hold PTO output direction.
CNT2 Counter for full period Match1 event used to trigger interrupt in HLC. Counter is reset when full period
of signal is reached
High Level Controller
HLC Event0 used to trigger taskEvent1 used to Event0 used to load new options for the PTO from C28 core into CLBEvent1
trigger interrupt used to generate an interrupt based on match1 event of CNT2, which
corresponds to the full period. New PTO options take effect after this event.

2.4 PulseGen Input and Output Signals

Chip-level inputs to the PTO-PulseGen interface: none.
Chip-level outputs from the PTO-PulseGen interface: Pulse Output and Direction. In the examples provided,
these outputs are routed through to GPIOs as described in Section 5.
3 PTO – QepDiv
The QepDiv PTO function can be used to generate a divided pulse stream from QEP inputs. Figure 3-1 shows
the QepDiv input and output diagram.
QEPA QEPA
(Input) (Output)

QEPB QEPB
(Input) (Output)
QepDiv

QEPI QEPI
(Input) (Output)

Figure 3-1. QepDiv Input and Output Diagram

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Figure 3-2 shows the CLB interconnect diagram.

CLB1 CLB2 OUT4: WR
IN0:6: RQ/off GPIO
IN0:6: RQ/off Via O/P-XBAR
Bypass Logic
QCLK IN1:4(3$ ,QSXW
(OUTPUTLUT) OUT0 (QEPA):
IN1:4(3$ ,QSXW Determine
IN2:4(3$ ,QSXW EPWM2A
Direction
Edges only
IN2:4(3$ ,QSXW (FSM0/FSM1)
Edges only LUT1
OUT2 (QEPB):
QEB Output
OUT4: WR &/%2 EPWM2A
Generation
IN4:4(3% ,QSXW Via CLB-XBAR (FSM1/CNT0)
IN7:'LUHFWLRQ And LUT1
IN5:4(3% ,QSXW
Edges only

Index Pulse IN4:4(3% ,QSXW

Edges Only QEB Output
Generation
Generation
FSM2/CNT2
(FSM2/CNT0)
And LUT2

IN7:,QGH[ ,QSXW
Pos Edge detect

OUT5: WR *3,2
Via O/P-XBAR

Figure 3-2. QepDiv Interconnect Diagram

Figure 3-3 shows the implementation diagram of the QepDiv interface.

GPIO2
QEPA - Output

GPIO3
QEPB - Output

OUTPUT GPIO14
QEPI - Output
XBAR
OUTPUT3

CLB

Input 4 INPUT GPIO10

QEPA - Input
XBAR

Input 5 INPUT GPIO11

XBAR QEPB - Input

Input 6 INPUT GPIO9

QEPI - Input
XBAR

C28xCPU

TMS320F28379D

Figure 3-3. Implementation Diagram

Note
Interconnect between the CLB and the MCU boundary may differ between devices or between
examples. For specific interconnect routing information, see Section 5.

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3.1 QepDiv Implementation Overview

This section provides an overview of how the PTO QepDiv interface is implemented. This interface is primarily
achieved by using the following components:
• C28x CPU
– The CPU initializes the function and configuration of the CLB, XBARs, and GPIOs as applicable.
• Configurable logic block (CLB) Type 1 or later
– Monitors input signals, QEP-A, QEP-B, and QEP-I, connected to the GPIO
– Detects the direction of the motion and any changes in direction
– Detects the edges of the input signals
– Implements the division function and generates the scaled outputs: PTO-QEP-A, PTO-QEP-B, and PTO-
QEP-I.
• Device interconnect (XBARs)
– Input and output XBARs are used to route signals to and from the CLB as applicable.
3.2 QepDiv Limitations
The PTO-QepDiv operation has the following usage limitations:
• The QepDiv interface implements division factors of /1, /2, /4, /8, ….. up to /1024 and /2048.
• The maximum frequency of the input signals (QEP-A and QEP-B) is limited to 5 MHz.
• The index pulse is generated on the index output when a rising edge is detected on the index input signal.
• The width of the index pulse can be user defined. See the pto_qepdiv_config function and the
corresponding example provided in C2000Ware MotorControl SDK.
• The divider values work as follows:
– The frequency of the output QEP-A or QEP-B = frequency of input QEP-A or QEP-B / (2 × divider)
3.3 QepDiv Divider Settings and Initialization
Divider initialization is done via the function below:
• COUNTER_0 in CLB2 is used for divider*4 for match2 value of the counter.
• COUNTER_0 in CLB2 is used for divider*2 for match1 value of the counter.
Index pulse width is controlled using COUNTER_2 in CLB1 for match1 value setting.

uint16_t
pto_qepdiv_config(uint16_t divider, uint16_t indexWidth)
{
CLB_writeInterface(CLB2_BASE, CLB_ADDR_COUNTER_0_MATCH2, divider * 4);
CLB_writeInterface(CLB2_BASE, CLB_ADDR_COUNTER_0_MATCH1, divider * 2);
CLB_writeInterface(CLB1_BASE, CLB_ADDR_COUNTER_2_MATCH1, indexWidth - 1);
return(divider);
}

3.4 QepDiv CLB Configuration

The PTO API implementation source files are located under [C2000Ware_MotorControl_SDK]
\libraries\position_sensing\pto\source.
The following resources are used inside the CLB tile to achieve the desired function detailed in Section 3.1.
squareWave
out
Period = 500, Duty = 250

TILE2_BOUNDARY i0
TILE2_OUTLUT_4
squareWave in0 : i1 out
out i0 out = i0
squareWave in1 : i2
Period = 500, Duty = 250
out in2 = i1 TILE2_LUT_0 out
Period = 500, Duty = 250
in3 : i2 out = i0 & (i1 | i2)
in4 = i3
squareWave
squareWave TILE1_BOUNDARY out in5 :
Period = 500, Duty = 250
out in0 : in6 :
Period = 500, Duty = 250
in1 : in7 :
e0 TILE1_FSM_0 i0
in2 =
e1 s0 i1 TILE1_LUT_1 out TILE1_BOUNDARY
squareWave in3 : s0 = e0
xe0 s1 = e1 s1 i2 out = (((~i0) & (~i1)) & i3) | (((~i0) & i1) & i2) | ((i0 & (~i1)) & i2) | ((i0 & i1) & i3) out0
out in4 : e0 TILE1_FSM_1 e0 TILE2_FSM_0
Period = 500, Duty = 250 xe1 out = s0 | s1 out i3 out1
in5 = e1 s0 i0 e1 s0
s0 = ((~s0) & e0 & e1) | (s0 & (~e1) | e0) TILE1_OUTLUT_4 out2
xe0 s1 i1 out s0 = e0
in6 : s1 = s1 xe0 s1 = s1 s1
out = s0 & s1 out = i0 & i1 out3 i0
in7 9 xe1 out i2 xe1 out = (~s0) & e0 out
squareWave out4 i1 TILE2_LUT_1 out e0
out TILE2_FSM_1
out5 reset zero TILE2_BOUNDARY
Period = 500, Duty = 250 i2 out = (i2 & i1) | ((~i2) & i0) e1 s0 i0
event TILE2_COUNTER_0 match1 s0 = ((~s0) & (e0)) | (s0 & (~e0)) TILE2_OUTLUT_0
out6 i3 xe0 s1 i1 out out0
s1 = s0
i0 out7 mode0 evAction = None match2 out = s0 | s1 out = i0
TILE1_OUTLUT_5 xe1 out i2 out1
e0 TILE1_FSM_2 i1 out mode1
squareWave out2
e1 s0 out = i0
out i2
Period = 3000, Duty = 1500 s0 = ((~s0) & e0) | (s0 & (~e1)) i0 out3
xe0 s1 = s1 s1 TILE2_LUT_2
out = ~s0 i1 out e0 TILE2_FSM_2 out4
reset zero xe1 out i0
i2 out = (i2 & i0) | ((~i2) & i1) e1 s0 TILE2_OUTLUT_2 out5
event TILE1_COUNTER_2 match1 s0 = ((~s0) & (e0)) | (s0 & (~e0)) i1 out
i3 xe0 s1 = s1 s1 out = i0 out6
mode0 evAction = None match2 out = s0 i2
xe1 out out7
mode1

reset zero
event TILE1_COUNTER_0 match1
mode0 evAction = None match2
1
mode1

reset zero
event TILE1_COUNTER_1 match1
mode0 evAction = None match2
mode1

Figure 3-4. QepDiv CLB Tile Diagram

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Note
You can import and build the QepDiv API reference project for each respective device, located
in [C2000Ware_MotorControl_SDK]\libraries\position_sensing\pto\ccs. By rebuilding
the compiled object, it will regenerate the CLB tile diagram (clb.svg or clb.html). and object (.lib) The
CLB tile diagram will be located in the RELEASE/syscfg directory.

Implementation is described in detail, below and visualized in Figure 3-4.

Table 3-1. QepDiv CLB Tile 1
Resource Function Notes
Inputs
In0 On/Off Control via GPREG Enable CLB
In1 On/Off Control via GPREG QEPA via EPWM4A
In2 Edge Detect QEPA via EPWM4A
In3 Not used Not used
In4 On/Off Control via GPREG QEPB via EPWM5A
In5 Edge Detect QEPB via EPWM5A
In6 Not used Not used
In7 Edge Detect QEPI via EPWM4B
Outputs
Out0 Not used Not used
Out1 Not used Not used
Out2 Not used Not used
Out3 Not used Not used
Out4 Transmit Enable PTO Direction Via OUTPUT XBar; Input for CLB 2
Out5 Transmit Enable QEPI output via OUTPUTXBAR3
Out6 Not used Not used
Out7 Not used Not used
Logic Resources
LUT0 Not used Not used
LUT1 Determines QCLK direction in combo Provides input to FSM1 for external input 0
with FSM0 and FSM1
LUT2 Not used Not used
FSM0 Alternate inputs between QEPA and This state machine checks the QEP signals and alternates between the
QEPB different signals
FSM1 Set QCLK direction Uses output of LUT1 and FSM0 to set up the QCLK, which in turn sets the
direction. The output will be routed to CLB2 as the input direction
FSM2 Index pulse generation Takes the QEPI input and uses CNT2 Match2 value to set the QEPI output
period and duty cycle.
CNT0 Set index pulse width value Load indexWidth-1 value set via CLB_writeInterface function
CNT1 Set divider value Load divider*4 value set via CLB_writeInterface function
CNT2 Set divide value Load divider*2 value set via CLB_writeInterface function
High Level Controller
HLC Not used Not used

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Table 3-2. QepDiv CLB Tile 2

Resource Function Notes
Inputs
In0 On/Off Control via GPREG Enable CLB
In1 On/Off Control via GPREG QEPA via EPWM4A
In2 Edge Detect QEPA via EPWM4A
In3 Not used Not used
In4 Edge Detect QEPB via EPWM5A
In5 Not used Not used
In6 Not used Not used
In7 On/Off Control via GPREG PTO direction routed from CLB1 out4
Outputs
Out0 Transmit Enable QEPA Output via EPWM2A
Out1 Not used Not used
Out2 Transmit Enable QEPB Output via EPWM2B
Out3 Not used Not used
Out4 Transmit Enable Bypass Logic
Out5 Not used Not used
Out6 Not used Not used
Out7 Not used Not used
Logic Resources
LUT0 QEPA/QEPB signal input When the tile is on, send the selected QEP signal to CNT0 as mode0 input
LUT1 Generate high and low values for Alternate between high and low
LUT2 Not used Not used
FSM0 QEP Pulse width generation This state machine together with CNT0 will generate a number of hi and low
pulse widths for LUT1 and LUT2.
FSM1 QEPA signal generation Generates QEPA output using CNT0 and LUT1.
FSM2 QEPB signal generation Generates QEPB output using CNT0 and LUT2.
CNT0 Counter for output QEP signal generation Counter Match1 value is the external input for FSM0. Match2 value is the reset
value for the counter. The match2 value is passed to LUT1 and LUT2 .
CNT1 Not used Not used
CNT2 Not used Not used
High Level Controller
HLC Not used Not used

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4 PTO – Abs2Qep
The PTO-Abs2Qep function translates a change in absolute position into a quadrature encoder pulse train
output. Figure 4-1 shows the implementation diagram of the PTO-Abs2Qep interface.

C28x CPU
PTO-QEPA

CLB PTO-QEPB
Absolute Position
Encoder
PTO-QEPI

eQEP

Loop-back to eQEP
for testing only

Figure 4-1. Abs2Qep Implementation Diagram

4.1 Abs2Qep Chip resources

The Abs2Qep implementation uses the following C2000 resources:
• C28x CPU
– Initializes the Abs2Qep interface, configures the CLB, input/output XBARS and GPIOs.
– Translates the change in absolute position into the equivalent QEP-A/QEP-B and QEP-I pulses.
– Configures the CLB to generate the pulse train output.
• Configurable Logic Block (CLB) type 1 or later
– Generates the PTO-QEP-A/B and QEP-I pulses as defined by the C28x.
– Indicates the pulse train is complete by setting a CLB interrupt tag.
• Device interconnect (XBARs)
– Input and output XBARs are used to route signals to and from the CLB as applicable.
4.2 Abs2Qep Theory of Operation
Encoder Resolution:
Qmax = Q17, Q20 etc..
0
Forward
Incrementing
Reverse Position
Decrementing
Position Communication Packet
including Absolute Position
Absolute
Posi
on Encoder

Figure 4-2. Absolute Position Encoder

An absolute encoder output represents the exact position of a rotating shaft. If Qmax is the resolution of a single
rotation, then the position will range from 0 to Qmax. Resolutions in the range Q17 = 217 or Q20 = 2 20 are
common. The absolute position increases when the direction is forward (clockwise) and decreases when the
direction is reverse (counter-clockwise).

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Forward Reverse
Lines per
Revolution Forward QEP-A
0 QEP-A Leads
Reverse QEP-B
QEP-A Lags
QEP-B QEP-B
Index

QEP-I
Incremental
Encoder Disk
QCLK
(Internal
Each Line Signal)
Generates 2 Edges:
One on QEP-A and
One on QEP-B

Figure 4-3. Incremental Position Encoder

An incremental encoder output is a quadrature encoder pulse (QEP). This pulse train consists of the following
outputs: QEP-A, QEP-B and QEP-I with the following characteristics:
• The phase between QEP-A and QEP-B indicates the direction of movement. If QEP-A leads by 90°, then
the direction is forward (clockwise). If QEP-A lags by 90° degrees, then the direction is reverse (counter-
clockwise).
• The QEP-A/B frequency is proportional to the disk's velocity.
• The index signal, QEP-I, indicates crossing over absolute zero.
The resolution of the incremental encoder is specified by the number of lines around the disk. As each line
passes a sensor, an edge (falling or rising) is generated on QEP-A as shown in Figure 4-3. A second channel
can be added by second ring of lines, inside and offset from the outer ring. In such a case, this inner ring of lines
generates QEP-B. For example, a 1024 line encoder would have 1024 QEP-A lines and 1024 QEP-B lines for a
total of 2048 QEP state changes in a full rotation.
In Abs2Qep, a configurable parameter in the header file defines how many QEP state transitions are generated
per line. The QEP state transition is controlled by an internal CLB signal called QCLK as shown in Figure 4-3.
The default setting is each line corresponds to two QCLK pulses.
The example in Table 4-1 further clarifies this point.
Table 4-1. Abs2Qep Relationship Between Lines and QCLK (Forward Direction)
Line QCLK QEP-A QEP-B
Line 1 Outer Ring QCLK 1 Rising Edge
Line 1 Inner Ring QCLK 2 Rising Edge
Line 2 Outer Ring QCLK 3 Falling Edge
Line 2 Inner Ring QCLK 4 Falling Edge

4.2.1 Abs2Qep Translation Equations

All of the Abs2Qep translation calculations are handled by the C28x. Based on the results, the CLB tile is then
configured to generate the specific QEP signals. The CLB configuration is detailed in Section 4.3.

Note
The parameters used in the translation equations are configurable in the Abs2Qep library header file.
This includes: absolute encoder resolution, incremental encoder lines per revolution, drive maximum
revolutions per minute.

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The Abs2Qep translation uses the ratio ABS_TO_INCR to map a change in absolute position to a corresponding
number of QEP edges. Any fraction of an edge is tracked. If the fractional edge accumulation reaches 1, then an
additional edge is generated.

QCLK_PER_LINE x LINES_PER_REV QCLK_PER_REVOLUTION

ABS_TO_INCR = = (1)
ABS_MAX_POSITION ABS_MAX_POSITION

where
• LINES_PER_REV is the incremental encoder resolution.
• QCLK_PER_LINE is typically 2. One for QEP-A and one for QEP-B.
• ABS_MAX_POSITION = 2ABS_ENCODER_RESOLUTION. For example 220.
The number of QCLKs, or QEP edges, that represent a change in position is:

QCLK = ABS_TO_INCR x DELTA_ABS_POSITION (2)

where:
• DELTA_ABS_POSITION = ABS_POSITION(n) - ABS_POSITION(n-1) the change in absolute position
between the current sample (n) and the previous sample (n-1).
• QCLK is the total number of QEP-A + QEP-B edges required to represent the change in position.

Note
This simple translation in Equation 2 assumes absolute zero was not crossed. For zero-cross
detection, see Section 4.2.3

For a given position change, the frequency of QCLK is such that the edges are equally divided across the
position sampling period. This frequency is expressed in terms of CLB clock cycles.
4.2.2 Abs2Qep Translation Example
Given the following parameters:
• CLB clock = 10 nanoseconds
• Position sampling period = 100 microseconds or 10,000 CLB clocks
• Absolute encoder resolution = ABS_MAX_POSITION = Q20 = 1048576
• Incremental encoder resolution = 1024 lines. Therefore QCLK_PER_REV = 2 x 1024 = 2048
The ABS_TO_INCR ratio is:

2 x Lines 2048
ABS_TO_INCR = = = .00195313 (3)
Qmax 1048576

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Table 4-2 shows example translations from a change in absolute position to QCLKs generated.
Notice at sample 2 and sample 3, the fractional edge accumulation is greater than 1. When this occurs, an
additional QCLK is generated and one is subtracted from the fractional edge accumulation.

Note
The absolute position samples shown are for illustration only. Actual position change values may be
much larger than shown or may be in the reverse direction.

Table 4-2. Abs2Qep Example Calculations

QCLKs CLB Clocks per
Sample Position Delta Position (1) QCLKs Fractional Edges Generated QCLK (2)
0 0 0 0 0 0 0
1 24000 24000 46.875 .875 46 217
2 53000 29000 56.6406 .875 + .6406 = 56+1 (3) 175
1.515 → .515 (3)
3 62000 9000 17.5781 .515 +.5781 = 17+1 (3) 555
1.09375 → .09375
(3)

(1) Position(n) - Position(n-1). In this example all changes are in the forward direction and zero is not crossed. If this value were negative,
the direction would be reverse.
(2) Number of CLB clocks betweeen each QCLK pulse. This is based on the sampling frequency expressed in CLB clocks. For this
example: 10,000 CLB clocks / QCLKs generated
(3) An additional QCLK is generated and the fractional portion is adjusted by 1.

4.2.3 Abs2Qep Zero Cross Detection

Abs2Qep supports generation of QEP-I to indicate crossing absolute zero. Detection of the zero cross relies
on knowing the maximum revolutions-per-minute (RPM) of the absolute encoder. The RPM combined with the
position sampling frequency determines the maximum possible delta change. If the delta change is larger than
the absolute value of the maximum, then absolute zero has been crossed.
Consider the following example:
• Motor MAX_RPM = 30,000 revolutions per minute = 500 revolutions per second
• Position Sampling Frequency = 100 microseconds
• Absolute encoder resolution = ABS_MAX_POSITION = Q20 = 220= 1048576
The maximum position change is:

revolutions microseconds revolutions

500 x 100 = .05 (4)
second sample sample

Therefore any position change where the magnitude is greater than .05 x Qmax is assumed to be a zero
crossing.

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Figure 4-4 illustrates crossing zero in the forward direction. Position(n) is a relatively small number and
Position(n-1) is a very large number. Position(n) - Position(n-1) is, therefore, a negative number with a
magnitude greater than ABS_MAX_POSITION.
In this case, Abs2Qep uses the sum of two measurements to determine the equivalent QEP pulses:
• (A) delta between Position(n-1) and Qmax
• (B) delta between 0 and Position(n)

A+B

A B
Qmax - Posi
on(n-1) Posi on(n)

PTO-QEP-A

Qmax 0
A B PTO-QEP-B
Qmax – Posion(n-1) Posion(n)

A+B
Position(n-1) PTO-QEP-I
Position(n)

Absolute Encoder Position Change Corresponding Incremental Encoder QEP

Figure 4-4. Abs2Qep Zero-Cross in the Forward Direction

Figure 4-5 illustrates zero crossed in the reverse direction. Position(n) is a large value and Position(n-1)
is relatively small. Therefore Position(n) - Position(n-1) will be positive and have a magnitude >
ABS_MAX_POSITION.
In this case, Abs2Qep uses the sum of measurements:
• (A) delta between Position(n-1) and zero
• (B) delta between Qmax and Position(n)
Notice, in the resulting PTO, QEP-B leads by 90° indicating a reverse direction.

A+B

A B
Posi
on(n-1) Qmax - Posi on(n)

PTO-QEP-A

Qmax 0
PTO-QEP-B
B A
Qmax – Posion(n) Posion(n-1)

A+B
PTO-QEP-I
Position(n) Position(n-1)

Absolute Encoder Position Change Corresponding Incremental Encoder QEP

Figure 4-5. Abs2Qep Zero-Cross in the Reverse Direction

4.3 Abs2Qep CLB Configuration

After translating the absolute position into QCLK pulses as described in Section 4.2, the C28x loads the PTO
parameters into the HLC's FIFO. When it is time to start the PTO, a command via the GPREG bits will signal
the HLC to pull the parameters from the FIFO, to load them into the counters, and then to start the PTO. Once
started, the CLB generates the PTO-QEP waveform independently.
Once the PTO is complete, the HLC will set a CLB interrupt tag. The C28x can use this to flag to check if the
PTO is complete before loading a new configuration.

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Figure 4-6 shows PTO-QEP waveforms and their tie to CLB components. In this example, the position sampling
period is controlled by an ePWM ISR on the C28x.
PTO for: Movement from Position (0) to Position (1) Position (1) to Position (2)
...

PTO-QEP-A (FSM_0) ... ...

PTO-QEP-B (FSM_0) ... ...

PTO-QEP-I (FSM_2) ...

QEP-I Control match2

match1
(COUNTER 2) ...

RUN / HALT ...

(FSM1) HLC load event clears the halt latch

PTO_DONE PTO_DONE total edges sent

...
(COUNTER 1 match2) PTO HALT is latched (FSM_1)
HLC sets INTR tag 2

PTO-QCLK Edge
(COUNTER 0 match1) *
... ...

Time Between Edges in CLB CLKs

COUNTER 0 match2 **

...
Position Sampling Period 1 Position Sampling Period 2 etc...

C28x Code ISR 1 ISR 2 ISR 3

ePWM ISR Assume: P(0) == 0 Start PTO: Previous translation (P0 to P(1)) Start PTO: Previous translation
Running at the Sample: P(1) Sample: P(2) Sample: P(3)
Position Translate: Position change P(0) to P(1) *** Translate: P(1) to P(2) Translate: P(2) to P(3)
Sampling Rate

A. Counter 0 match 1 is initialized to a fixed value and is not changed. This match generates the QCLK pulse. This places QCLK toggle at
the beginning of the count, reducing the time between the previous PTO halt and the next PTO start.
B. The time between QCLK pulses is controlled by the COUNTER 0 match 2. This match resets COUNTER 0.
C. P(n) stands for Absolute Position at sample n.

Figure 4-6. Abs2Qep Example System Waveform

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The CLB Tile block diagram is shown in Figure 4-7 and Table 4-3 describes the functionality of each CLB
component in detail.
out0 For Testing Only

DIRECTION
0: Reverse
WIDTH_CONTROL in1 (GPREG) 1: Forward

reset TILE1_COUNTER_0 zero e0 s0 PTO-QEP-A out4

Pulse Width Control QCLK TILE1_FSM_0

event match1 e1 s1 PTO-QEP-B
0: HALT out5
1: RUN Count CLB Clocks QEP-A/QEP-B Signal
mode0 match2 xe0 out
Between QEP Edges Generation
1 mode1 Count Up xe1

PTO_DONE

PTO_DONE reset zero

e0 s0 TILE1_COUNTER_1
TILE1_FSM_1 QCLK
HALT / CLEAR LATCH * event match1
e1 s1 Detect end of PTO
Latch HALT State Count Sent Edges in0 (GPREG)
mode0 match2
xe0 When PTO is out
Complete 0: HALT Add 1 on Event
1: RUN LOAD
mode1 e0
xe1
e1
HALT / CLEAR LATCH * TILE1_HLC
PTO_DONE
e2
Set INTR
PTO_DONE Tag == 2 e3

PTO_DONE
reset zero
TILE1_COUNTER_2
QCLK PTO_QEP-I_HIGH PTO_QEP-I
event match1 e0 s0 out2
QEP-I Control
Count Sent Edges PTO_QEP-I_LOW TILE1_FSM_2
mode0 match2 e1 s1
Add 1 on Event QEP-I Generation
mode1 xe0 out

xe1

A. HALT/CLEAR LATCH is controlled directly by HLC during a LOAD event.

B. PTO_DONE is controlled by the COUNTER 1 incrementing and directly by the HLC during a LOAD event.

Figure 4-7. Abs2Qep CLB Tile Block Diagram

Table 4-3. Abs2Qep CLB Tile 1

Resource Function Notes
Inputs
In0 LOAD control Rising edge: Connected to GPREG bit 0.
Loads new PTO configuration (HLC). Before loading a new configuration, check that the last PTO is complete
(INTR tag == 2)
In1 DIRECTION control Connected to GPREG bit 1.
1: clockwise (forward) Change only when the last PTO is complete (Intr Tag 2)
0: counter-clockwise (backward)
In2 Not used Not used
In3 Not used Not used
In4 Not used Not used
In5 Not used Not used
In6 Not used Not used
In7 Not used Not used
Outputs
Out0 Not used Not used
Out1 Not used Not used

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Table 4-3. Abs2Qep CLB Tile 1 (continued)

Resource Function Notes
Out2 PTO_QEP-I The index output signal.
The index transiton from 0 to 1 indicates the
absolute zero position has been crossed.
Out3 Not used Not used
Out4 PTO_QEP-A PTO quadrature output A
Out5 PTO_QEP-B PTO quadrature output B
Out6 Not used Not used
Out7 Not used Not used
Logic Resources
LUT0 Not used Not used
LUT1 Not used Not used
LUT2 Not used Not used
FSM0 Generate PTO_QEP-A and PTO-QEP-B Generate 1 edge on each QCLK input. The lead/lag of QEP-A/B is
based on the current state and the DIRECTION input signal.
FSM1 Generate HALT/RUN signal Halt the PTO output if either of these conditions is true:
• The PTO completes. This halt is latched and the PTO will remain
halted until the latch is cleared via the HALT/RUN control input
• The HALT/RUN control input is high.

FSM2 Generate PTO_QEP-I signal Force PTO_QEP-I high and low based on the QEP-I control. Enables
the user to configure QEP-I to stay high for more than one QCLK if
desired.
CNT0 Generate QCLK (PTO width control) signal Counts up by 1 each CLB clock.
• match1: fixed value. Generates the QCLK signal near the start of
the count. This placement reduces the time between the last PTO
halt and the next PTO start.
• match2: number of CLB clocks between QEP edges. The counter
is reset every match2 event.

CNT1 PTO edge-count control Increments by 1 every QCLK event to count the total QEP-A + QEP-B
edges sent during a PTO.
• match1: manipulated by the HLC in order to clear a halt latch
condition and start the PTO.
• match2: number of edges to be sent. Once reached, the
PTO_DONE signal is asserted. This latches a halt state and resets
the edge count and resets QEP-I control.

CNT2 PTO_QEP-I control Increments by 1 every QCLK event to count the total QEP-A + QEP-B
edges sent during a PTO.
• match1: Edge where PTO_QEP-I will go high
• match2: Edge where PTO_QEP-I will go low

Note
If PTO-QEP-I should remain low for the whole PTO, then
configure match1 and match2 to be a large number to
avoid a match. (i.e. 0xFFFFFFFF).

High Level Controller

HLC Event 1: LOAD new PTO configuration. Responds to a rising edge on the LOAD input from the C28x. This will
configure and start a new PTO. For all of the steps, refer to the program
description in Section 4.3.3
Event 2: Signal PTO is complete. Responds to the completion of PTO signal by setting Interrupt Tag 2. At
this point, it is safe to load a new PTO counter configuration.

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4.3.1 Abs2Qep QEP-A/B Pulse Train Generation

The QEP-A and QEP-B signal are generated by a finite state machine (FSM). The state diagrams are shown in
Figure 4-8 and have the following characteristics:
• A state transition occurs when QCLK = 1.
• The state remains the same when QCLK = 0
• Only one QEP signal changes at a time
• Which signal transitions first depends on the direction input from the C28x.
QCLK = 0 QCLK = 0

0,0 QCLK = 1 QCLK = 1 0,0 QCLK = 1

QCLK = 1

1,0 QCLK = 0 1,0 QCLK = 0

QCLK = 0 0,1 QCLK = 0 0,1

QCLK = 1 QCLK = 1 QCLK = 1 QCLK = 1

1,1 1,1

State == QEP-A, QEP-B

QCLK = 0 QCLK = 0

Direction: Forward Direction: Reverse

Figure 4-8. Abs2Qep PTO State Diagrams

Table 4-4 and Table 4-5 are the corresponding Karnaugh Maps. The resulting equations are determined by
inspecting each "1" within the map or by using a Karnaugh Map solver. x is used to indicate states which are
not valid. Note that there is no need to further simplify the equations; they can be entered into the CLB tool
as shown. Use the OR operator to build up the full equation from the parts as shown in the simulation results
(Figure 4-9).
Table 4-4. QEP-A (s0) Signal Generation Karnaugh Maps
DIRECTION (e0) = 1 (Forward) DIRECTION (e0) = 0 (Reverse)
Next State Next State
QCLK, QEP-B (e1, s1) QCLK, QEP-B (e1, s1)
00 01 11 10 00 01 11 10
00 0 0 x (2) 1 (2) 00 0 0 0 x
Current State

Current State
(QEP-A, B)

(QEP-A, B)

01 0 0 x 0 01 0 0 1 (3) x (3)
s0, s1

s0, s1

11 1 (1) 1 (1) 0 x 11 1 (1) 1 (1) x (3) 1 (3)

10 1 (1) 1 (1) 1(2) x (2) 10 1 (1) 1 (1) x 0

(1) s0_1 = (e0 & s0 & !e1) | (!e0 & s0 & !e1) = s0 & !e1
(2) s0_2 = e0 & !s1 & e1
(3) s0_3 = !e0 & s1 & e1

Table 4-5. QEP-B (s1) Signal Generation Karnaugh Maps

DIRECTION (e0) = 1 (Forward) DIRECTION (e0) = 0 (Reverse)
Next State Next State
QCLK, QEP-A (e1, s0) QCLK, QEP-A (e1, s0)
00 01 11 10 00 01 11 10
00 0 0 0 x 00 0 0 x (3) 1 (3)
Current State

Current State
(QEP-A, B)

(QEP-A, B)

01 1 (1) 1 (1) x 0 01 1 (1) 1 (1) 1 (3) x (3)

s0, s1

s0, s1

11 1 (1) 1 (1) x (2) 1 (2) 11 1 (1) 1 (1) 0 x

10 0 0 1 (2) x (2) 10 0 0 x 0

(1) s1_1 = (e0 & s1 & !e1) | (!e0 & s1 & e1) = s1 & !e1
(2) s1_2 = e0 & s0 & e1
(3) s1_3 = !e0 & !s0 & e1

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Figure 4-9 shows the SystemC simulation results.

Figure 4-9. Simulation QEP-A and QEP-B Generation

4.3.2 Abs2Qep Halt Latch

The HALT_LATCH and RUN/HALT output is implemented using a finite state machine. The output signal is
connected to the mode0 input of the counter which generates QCLK. The RUN/HALT output depends only on
the current state of the latch and the HALT signal from the CPU. If the HALT signal is low, and the latch is not
set, then QCLK will be generated (COUNTER mode0 = out = 1). In all other cases QCLK will not be generated
(COUNTER mode0 = out = 0). This is expressed as out = !(s0 | e1).
Table 4-6. RUN/HALT Output
s0 e1
(LATCH) (HALT/CLEAR LATCH) out = !(s0|e1) QCLK Generation
0 0 1 Run
0 1 0 Halt
1 0 0 Halt
1 1 0 Halt

HALT_LATCH is set on the rising edge of PTO_DONE. It will remain set until cleared by a a rising edge on the
HALT/CLEAR_LATCH signal from the CPU.
Table 4-7. HALT_LATCH Karnaugh Map
PTO_DONE, CLEAR_LATCH (e0, e1)
00 01 11 10
0 0 0 0 1 (2)
(LATCH)
s0

1 1 (1) 0 0 1 (1),(2)

(1) s0_1 = s0 & !e1

(2) s0_2 = e0 & !e1

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The Halt Latch SystemC simulation is shown in Figure 4-10.

Figure 4-10. Simulation of Halt Latch

4.3.3 Abs2Qep High Level Controller (HLC)

The high level controller is programmed to:
• Start the PTO signal generation
• Modify the HALT / CLEAR_LATCH and PTO_DONE signals
• Load the counter match values required to generate a PTO
• Tag an end of PTO state
Table 4-8. Abs2Qep HLC Register Usage
R0 and R1 Used to PULL data from the FIFO.
R2 Initialized to zero during CLB configuration. Used to load zero to a
match reference in order to manipulate a given signal to a high state.
R3 Initalized to 0xFFFFFFFF during CLB configuration. Used to load
a large value to a match reference in order to manipulate a given
signal to a low state.

Table 4-9. Abs2Qep HLC Programs

LOAD: Event 0, Event 1
Instruction # Opcode(s) Description
Program0: 0 MOV_T1 R2, C1 Assert HALT/CLEAR_LATCH. COUNTER 1
has been reset by PTO_DONE (count == 0).
Loading a match1 reference of zero will force
a rising edge on HALT/CLEAR_LATCH.
Program0: 1 MOV_T2 R3, C1 Force the PTO_DONE signal low.
Program0: 2, 3 PULL R0 Load the number of QCLKs to be generated.
MOV_T2 R0, C1 Note: for a case of zero QCLKs: since
COUNTER_1 count == 0, a QCLK value of
zero will force PTO_DONE back to a high
state.
Program0: 4, 5 PULL R1 Load the number of CLB clocks between
MOV_T2 R0, C0 two QCLKs. When the counter reaches this
value, it will be reset to zero.
Program0: 6, 7 PULL R0 Configure which QCLK edge will force PTO-
Program1: 0, 1 MOV_T1 R0, C2 QEP-I high and low. A large value will
PULL R0 be passed through the FIFO if PTO-QEP-I
MOV_T2 R0, C2 should remain low.
Program1: 2 MOV R1, C0 Set COUNTER_0 to zero. This prevents the
counter from incrementing by 1 when a zero
pulse configuration is loaded.

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Table 4-9. Abs2Qep HLC Programs (continued)

LOAD: Event 0, Event 1
Instruction # Opcode(s) Description
Program1: 3 INTR 1 Tag indicates Event 0 plus Event 1 complete.
This is placed next to the last instruction
to keep it from being back-to-back with the
INTR instruction in Event 2.
Program1: 4 MOV_T1 R3, C1 Force the HALT / CLEAR_LATCH signal low.
This will start PTO signal generation if the
PTO_DONE signal is low. If PTO_DONE is
high, then the HALT_LATCH will be set.
PTO_DONE: Event 2
Instruction # Opcode(s) Description
Program2: 0 INTR 2 Tag to indicate Event 2 is complete or that the
PTO has finished.

4.4 Abs2Qep Input and Output Signals

Chip-level inputs to the Abs2Qep interface: For the examples, a simulated absolute position is generated by
a test function and no external input is required. If an absolute encoder is used, then connect it as described in
the absolute encoder interface documentation.
Chip-level outputs from the Abs2Qep interface: The output signals are PTO-QEP-A, PTO-QEP-B and PTO-
QEP-I signals. In the examples provided, these outputs are mapped to GPIOs as described in Section 5
5 PTO Example Projects
The PTO example projects can be found in the directory shown in Table 5-1. The example projects use the API
library projects that are described in Section 6.
Table 5-1. Location of PTO Example Solutions
C:\ti\c2000\C2000Ware_MotorControl_SDK_[version]\ Default install location for the SDK. ([SDK])
[SDK]\solutions\boostxl_posmgr\ Device-specific PTO solutions base install directory ([pto_base])
[pto_base]\shared\source Source code that is device independent and used across different
device examples.
[pto_base]\[device]\source Source code for the example projects. Includes both .c and .syscfg
files.
[pto_base]\[device]\include Example-specific header files.
[pto_base]\[device]\ccs\[pto_ example] Code Composer Studio (CCS) projectspec files. Used to import the
project into your CCS workspace.
[pto_base]\[device]\cmd Example project linker command files (.cmd).

5.1 Hardware Requirements

Table 5-2 describes the hardware used to run and test the PTO examples.
Table 5-2. Hardware
Device Hardware
TMS320F28388D F28388D controlCARD evaluation module (TMDSCNCD28388D)and
docking station (TMDSHSECDOCK)
TMS320F28379D F28379D LaunchPad development kit (LAUNCHXL-F28379D)
TMS320F280049 F280049C LaunchPad development kit (LAUNCHXL-F280049C)

5.2 Installing Code Composer Studio and C2000WARE-MOTORCONTROL-SDK™

Install required software to build and run the PTO examples:
1. Install Code Composer Studio v9.2.0 or later, if it is not already installed on the PC
2. Install C2000WARE-MOTORCONTROL-SDK v3.02.00.00 or later, if it is not already installed on the PC

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Note
To build the examples, only the above software is required. To re-build the CLB-based libraries,
the CLB Tool is also required. This tool is included in Code Composer Studio (sysconfig) and the
C2000Ware sub-component of the SDK (support utilities). To run CLB-based simulations requires
installation of additional tools which are documented in the CLB Tool User's Guide.

5.3 Import and Run Example Project

1. In CCS v9.2 or higher: click 'Project -> Import CCS Projects…'.
2. Navigate to the device-specific PTO solutions CCS directory. The path is shown in Table 5-1.
3. Select the projectspec of choice and click 'Finish'.
4. Build the project:
a. Right-click on the project name in the project manager window
b. Select 'Rebuild Project'
c. Observe the Console window for any errors or successful completion of the build.
5. Once the build completes, without errors, execute the project by selecting 'Run –>Debug'.
6. Run the code by pressing the Run button.
7. Monitor the signals and variables as described in the following, example-specific, sections.
5.4 PulseGen Example
Verify and monitor the output waveform signals. The GPO mapping used is shown in Table 5-3:
Table 5-3. PulseGen Output Signal to GPIO Mapping
Direction Pulse Output
Device (Routed though OUTPUTXBAR4) (Routed through OUTPUTXBAR3)
TMS320F280049C GPIO15 GPIO26
TMS320F28379D GPIO15 GPIO14
TMS320F28388D GPIO15 GPIO26

5.5 QepDiv Example

The test inputs and the PTO outputs are routed internally as shown in the mapping tables. The code that routes
the signals can be found in the functions listed in Table 5-4.
Table 5-4. QepDiv Example Input/Output Signal Routing
Function Location Notes

Input Signal Routing: GPIO to CLB

pto_qepdiv_setup_GPIO() Example application Connect input GPIO to an INPUTXBAR.
pto_qepdiv_initCLBXBAR() Library Route INPUTXBARs to the global CLB
AUXSIGx signals.
pto_qepdiv_setupPeriph() Library Connect tile inputs to the CLB global MUX,
CLB local MUX or the tile's GPREG.

Output Routing: CLB to GPIO

Function Location Notes

pto_qepdiv_initCLBXBAR Library Connect tile's out4 or out5 to OUTPUTXBAR
pto_qepdiv_startOperation() Library Enable CLB output to override peripheral
signals via setOutputMask()

pto_qepdiv_setup_GPIO() Example application Connect GPIO output to a peripheral or an

OUTPUTXBAR

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Table 5-5. F28004x, F2837x and F2838x QepDiv Output GPIO Mapping
QepDiv Input QepDiv Output
Input Signal Connect to for Routing to CLB Output Signal Routing From the GPIO Pin
Demo (1) CLB
QEP-A: GPIO10 EPWM4A/GPIO6 INPUTXBAR4 → PTO_QEP-A Override PWM2A GPIO2
or External Signal AUXSIG0 →
Tile1 in1, in2 and
Tile2 in1, in2
QEP-B: GPIO11 EPWM5A/GPIO8 INPUTXBAR5 → PTO_QEP-B Override PWM2B GPIO3
or External Signal AUXSIG1 →
Tile1 in4, in5 and
Tile2 in4
QEP-I: GPIO9 EPWM4B/GPIO7 INPUTXBAR6 → PTO_QEP-I Tile1 out5 → GPIO5
or External Signal AUXSIG2 → OUTPUTXBAR3
Tile1 in7

(1) In the example, spare EPWMs are used to provide QEP inputs. These are for test purposes and do not correspond to real-time usage.
You can choose to connect these EPWM outputs to the QepDiv input signals or you can choose to connect other external signals.

Table 5-6 lists the connections that need to be made to use the EPWMs as inputs to QepDiv.
Table 5-6. QepDiv Test Input Connections
Board EPWM4A to QEP-A EPWM5A to QEP-B EPWM4B to QEP-I
LAUNCHXL-F280049C 78 to 40 38 to 39 77 to 37
LAUNCHXL-F28379D 80 to 76 78 to 75 79 to 77
TMDSCNCD28388D 54 to 61 57 to 63 56 to 59

5.6 Abs2Qep Example

The example uses a PWM timer to simulate the position sampling rate. The absolute position value is provided
by a test function. The pass/fail criteria assumes the output from the PTO is connected externally to a eQEP
peripheral.
5.6.1 Watch Variables
The following watch variables provide pass/fail information:
• passCount
• failCount
• deltaMax
• EQep1Regs.QPOSCNT
The angle of the absolute position is compared to the angle corresponding to the eQEP position counter
(QPOSCNT). If the difference is less than a specified threshold, then passCount is incremented. If not, then
failCount is incremented. The maximum difference is logged in deltaMax.
5.6.2 Test Signals
Two test signals are provided to aid in viewing waveforms:
• Test signal 1: Toggles at the start of each PWM ISR. Remains high if the PTO direction is forward. Remains
low if the PTO direction is reverse.
• Test signal 2: The HALT/RUN signal internal to Abs2Qep. This signal can be used to visualize exactly where
the PTO halts and when it restarts with respect to the ISR toggle of test signal 1.

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5.6.3 Pin Usage and Test Connections

The output from the PTO is internally routed to GPIOs via the OUTPUTXBARs and by overriding PWM1-B. The
code that routes the signals can be found in the functions listed in Table 5-7.
Table 5-7. Abs2Qep Output Signal Routing
Function Location Notes
pto_abs2qep_initCLBXBAR Library Tie Tile out4/5 to OUTPUTXBARs
pto_abs2qep_setupPeriph Library Enable output to override peripheral.
pto_setupGPIO Example application Connect OUTPUTXBARs to GPIO outputs

Table 5-8. F2838xD Abs2Qep Output GPIO Mapping

Abs2Qep Output Test Connections
Abs2Qep Signal Routing From CLB to GPIO GPIO / TMDSHSECDOCK Pin Connect Abs2Qep Output to:
PTO-QEP-A Tile1 out4 to OUTPUTXBAR7 GPIO16 / Pin 67 GPIO20_EQEP1A / Pin 68
PTO-QEP-B Tile1 out5 to OUTPUTXBAR2 GPIO3 / Pin 55 GPIO21_EQEP1B / Pin 70
PTO-QEP-I Tile1 out2, override PWM1-B GPIO1 / Pin 51 GPIO99_EQEP1I / Pin 96
Test signal 1: System PWM ISR / None GPIO32 / Pin 85 Monitor with Oscilloscope
Direction
Test signal 2: Internal HALT/RUN Tile1 out0, override PWM1-A GPIO0 / Pin 49 Monitor with Oscilloscope

Table 5-9. F2837xD Abs2Qep Output GPIO Mapping

Abs2Qep Output Test Connections
GPIO / LAUNCHXL-F28379D
Abs2Qep Signal Routing From CLB to GPIO Pin Connect Abs2Qep Output to:
PTO-QEP-A Tile1 OUT4 to OUTPUTXBAR7 GPIO16 / J4-33 GPIO20_EQEP1A / J14-1
PTO-QEP-B Tile1 OUT5 to OUTPUTXBAR2 GPIO3 / J4-37 GPIO21_EQEP1B / J14-2
PTO-QEP-I Tile1 OUT2, override PWM1-B GPIO1 / J4-39 GPIO99_EQEP1I / J14-3
Test signal 1: System PWM ISR / None GPIO32 / J1-2 Monitor with Oscilloscope
Direction
Test signal 2: Internal HALT/RUN Tile1 OUT0, override PWM1-A GPIO0 / J4-40 Monitor with Oscilloscope

Table 5-10. F280049C Abs2Qep Output GPIO Mapping

Abs2Qep Output Test Connections
GPIO / LAUNCHXL-F28049C
Abs2Qep Signal Routing From CLB to GPIO Pin (1) Connect Abs2Qep Output to:
PTO-QEP-A Tile1 OUT4 to OUTPUTXBAR1 GPIO24 / J8-55 GPIO10_EQEP1A / J4-40
PTO-QEP-B Tile1 OUT5 to OUTPUTXBAR2 GPIO3 / J6-75 GPIO11_EQEP1A / J4-39
PTO-QEP-I Tile1 OUT2, override PWM1-B GPIO1 / J6-79 GPIO9_EQEPI / J4-37
Test signal 1: PWM ISR / - GPIO13 / J1-3 Monitor with Oscilloscope.
Direction
Test signal 2: HALT/RUN Tile1 OUT0, override PWM1-A GPIO0 / J6-80 Monitor with Oscilloscope.

(1) J8 and J6 are swapped on the silkscreen of RevA F28004x LaunchPad. J8 and J6 Pin numbers in this table refer to the silkscreen on
Rev A. To confirm whether this applies to your board, see the "known issues" in the revision section of C2000™ Piccolo™ F28004x
Series LaunchPad™ Development Kit.

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6 PTO Library Source and Projects

This section describes how to import and rebuild the libraries and provides a description of each API function.
Each Code Composer Studio library project includes configuration information for the Configurable Logic Block
(CLB). To learn how to modify the CLB's configuration, see the CLB Tool User's Guide.
6.1 Locating the Library Source Code
The PTO APIs and source code can be found in the location shown in Table 6-1.
Table 6-1. Location of PTO Libraries
C:\ti\c2000\C2000Ware_MotorControl_SDK_[version] Default install location for the SDK. ([SDK])
[SDK]\libraries\position_sensing\pto Library base install directory ([lib_base])
[lib_base]\ccs\[device] Code Composer projectspec file for the reference library. Use these
projects to re-build the library for each device.
[lib_base]\lib Generated library object files (.lib)
[lib_base]\source Library source code (.c) and CLB configuration (.syscfg) files.
[lib_base]\include Library header file. #include this file in the application project that
calls the library.
[lib_build_dir]\RELEASE\syscfg Location of the CLB Tile Diagram. By rebuilding the compiled object,
CCS it will regenerate the CLB tile diagram (clb.svg or clb.html). and
object (.lib). You can access the .svg or html file through CCS Project
Explorer.

6.2 Import and Build the Library Project

To rebuild the API library object, follow this procedure:
1. If not already done, install the required software tools described in Section 5.2.
2. In CCS v9.2 or higher, click 'Project -> Import CCS Projects…'.
3. Navigate to the Code Composer Studio (CCS) projectspec directory for your device, see Table 6-1.
4. Select the library project of choice and click 'Finish'.
5. In the CCS Project Explorer window, expand the selected project and open the file corresponding SysConfig
file (for example, “pto_pulsegen.syscfg”).
6. Inspect the configuration of the tile(s) and observe the logical expressions in the LUTs and FSMs, and output
LUTs.
7. From the CCS menu, select 'Project -> Build Project'.
8. At this point, an output object (.lib) is generated and located in the [lib_base]\lib folder. This file will be
included in PTO example projects. This object is a compiled object of the PTO source files.
9. [Optional] – for instructions on how to run a simulation of the CLB based project, see the Running the
Simulation section in the CLB Tool User’s Guide.

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6.3 PTO - PulseGen API

This section details the PulseGen Library functions. For information on locating the source code and rebuilding
the library, see Section 6.
PulseGen include file: pto_pulsegen.h
Table 6-2. PTO-PulseGen API Functions
Name Description Type
pto_pulsegen_reset Used to reset the pulsegen parameters set by earlier configuration and start a fresh setup. This Initialization
function needs to be called in case the pulse generation needs to be reset and started again at time
a later stage.
pto_pulsegen Setup for CLB and other interconnect XBARs is performed with this function during system Initialization
_setupPeriph initialization. This function needed to be called after every system reset. No transactions will be time
performed until the setup peripheral function is called.
pto_pulsegen This function will initiate the pulse generation on the interface. To be called after Run time
_startOperation pto_pulsegen_setupPeriph. Performs the transaction set up by earlier function. Note that the
setup up and start operation are separate function calls. You can setup the peripherals when
needed and start the actual pulse generation using this function call, as needed, at a different
time.
pto_pulsegen A runtime function to be called periodically for dynamically configuring and changing the Run time
_runPulseGen pulse generation requirements as needed by the application. This function needs to be called
periodically with appropriate parameters like the number of pulses, period, duration, and so
forth. Details in the later section.

6.3.1 pto_pulsegen_runPulseGen
Description
A runtime function to be called periodically for dynamically configuring and changing the pulse generation
requirements as required by the application. This function must be called periodically with appropriate
parameters like the number of pulses, period, duration, and more.
Definition

uint16_t pto_pulsegen_runPulseGen(
uint32_t pulseLo,
uint32_t pulseHi,
uint32_t ptoActivePeriod,
uint32_t ptoFullPeriod,
uint32_t ptoInterruptTime,
uint16_t ptoDirection,
uint16_t run
);

Parameters
Input:
• pulseLo – Low pulse width
• pulseHi – High pulse width
• ptoActivePeriod – Period the pulses are sent out; less than ptoFullPeriod
• ptoFullPeriod – Full PTO period
• ptoInterruptTime – Time when that the interrupt is generated to the CPU
• ptoDirection – Direction output; latched as it is on direction output at the beginning of new period
• run – Value indicting 1-run and 0-stop. Sampled at the beginning of the new period to determine to continue
or halt the pulse generation
Return:
• Val – If the function is executed successfully, the function will return ptoFullPeriod as the return value

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Usage
In pto_pulsegen.c, a sample configuration function called pto_setOptions is provided as an example to assist
with the pto_pulsegen_runPulseGen function and to perform the intermediate calculations. See the following
code sample calculation that illustrates how various parameters for this function can be generated. For more
details, see the pto_pulsegen.c and pto_pulsegen.h files.

uint32_t pto_setOptions(
uint32_t numPulses, //number of pulses needed to be generated in next period
uint32_t Period, // PTO period in clock cycles
uint32_t ptoInterruptTime, // Interrupt generation time
uint16_t ptoDirection, // Direction output
uint16_t run) //run-stop condition.
{
uint32_t pulseFreq, reminder;
uint32_t pulseLo;
uint32_t pulseHi;
uint32_t ptoActivePeriod;
uint32_t ptoFullPeriod;
pulseFreq = Period / numPulses;
reminder = Period - (pulseFreq * numPulses);
pulseLo = (pulseFreq/2 );
pulseHi = pulseFreq;
ptoActivePeriod = (pulseFreq * numPulses);
ptoFullPeriod = Period;
pto_pulsegen_runPulseGen(
pulseLo,
pulseHi,
ptoActivePeriod,
ptoFullPeriod,
ptoInterruptTime,
ptoDirection,
run);
return(reminder);
}

6.3.2 pto_startOperation
Description
This function initiates the pulse generation. This function must be called after pto_pulsegen_setupPeriph. Hence,
the pto_pulsegen_startOperation kick starts the pulse generation that was set up earlier.

Note
The setup and start operations are separate function calls. Users can set up the transfer and start the
pulse generation by using this function call, as required, at a different time.

Definition

void pto_pulsegen_startOperation(void);

Parameters
Input: none
Return: none
Usage
Example code:

pto_initPulsegen ();
SysCtl_delay (800L);
pto_pulsegen_startOperation ();
retval1 = pto_pulsegen_runPulseGen (7, 15, 960, 990, 500, 1, 1);

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6.3.3 pto_pulsegen_setupPeriph
Description
This function performs the setup for the CLB and other interconnect XBARs during system initialization. This
function must be called after every system reset. No transactions will be performed until the setup peripheral
function is called.
Definition

void pto_pulsegen_setupPeriph (void);

Parameters
Input: none
Return: none
Usage
Example code:

pto_pulsegen_setupPeriph();

6.3.4 pto_pulsegen_reset
Description
This function resets the pulsegen parameters set by the earlier configuration (PulseGen function calls) and starts
a new setup. This function must be called in case the pulse generation must be reset and started again at a later
stage.
Definition

void pto_pulsegen_reset (void);

Parameters
Input: none
Return: none
Usage
Example code:

pto_pulsegen_reset();

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6.4 PTO - QepDiv API

This section details the QepDiv Library functions. For information on locating the source code and rebuilding the
library, see Section 6.
PulseGen include file: pto_qepdiv.h
Table 6-3. PTO-QepDiv API Functions
Name Description Type
pto_qepdiv_reset Used to reset the qepdiv parameters set by earlier configuration and start a fresh setup. This Initialization
function needs to be called in case the pulse generation needs to be reset and started again at time
a later stage.
pto_qepdiv Setup for CLB and other interconnect XBARs is performed with this function during system Initialization
_setupPeriph initialization. This function needed to be called after every system reset. No transactions will be time
performed until the setup peripheral function is called.
pto_qepdiv This function will initiate the pulse generation on the interface. To be called after Run time
_startOperation pto_qepdiv_setupPeriph. Performs the transaction set up by earlier function. Note that the
setup up and start operation are separate function calls. User can setup the peripherals when
needed and start the actual pulse generation using this function call, as needed, at a different
time.
pto_qepdiv_config This function configures the divider, the divider value cannot be changed dynamically. User Run time
needs to reset the module using pto_qepdiv_reset before reconfiguring the functionality.

6.4.1 pto_qepdiv_config
Description
This function configures the divider. The divider value cannot be changed dynamically. Users must reset the
module using pto_qepdiv_reset before reconfiguring the functionality.
Definition

pto_qepdiv_config(uint16_t divider, uint16_t indexWidth);

Parameters
Input:
• Divider – Value of the divider
• Index width – Number of cycles for which the index pulse output is kept on
Return:
• Val – If the function is executed successfully, it will return ptoFullPeriod as the return value
Usage
Example code:

retval1 = pto_qepdiv_config(4, 10);

pto_qepdiv_startOperation(1);

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6.4.2 pto_startOperation
Description
This function initiates the pulse generation. This function must only be called after pto_qepdiv_setupPeriph.
Hence, the pto_qepdiv_startOperation function kick starts the pulse generation that was set up earlier.

Note
The setup and start operations are separate function calls. Users can set up the transfer and start the
pulse generation by using this function call, as required, at a different time.

Definition

void pto_qepdiv_startOperation(uint16_t run);

Parameters
Input (parameters to be passed to start or stop the function):
• Start = 1
• Stop = 0
Return: none
Usage
Example code:

retval1 = pto_qepdiv_config(4, 10);

pto_qepdiv_startOperation(1);

6.4.3 pto_qepdiv_setupPeriph
Description
Setup for the CLB and other interconnect XBARs is performed with the pto_qepdiv_setupPeriph function during
system initialization. This function must be called after every system reset. No transactions will be performed
until the setup peripheral function is called.
Definition

void pto_qepdiv_setupPeriph (void);

Parameters
Input: none
Return: none
Usage
Example code:

pto_qepdiv_setupPeriph();

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6.4.4 pto_qepdiv_reset
Description
Used to reset the qepdiv parameters set by earlier configurations and to begin a fresh setup. This function must
be called in case the pulse generation must be reset and started again at a later stage.
Definition

void pto_qepdiv_reset (void);

Parameters
Input: none
Return: none
Usage
Example code:

pto_qepdiv_reset();

6.5 PTO - Abs2Qep API

This section details the Abs2Qep Library functions. For information on locating the source code and rebuilding
the library, see Section 6.
PulseGen include file: pto_abs2qep.h
Table 6-4. PTO-Abs2Qep API Functions
Name Description Type
pto_abs2eqep Setup for CLB and other interconnect XBARs is performed with this function during system Initialization
_setupPeriph initialization. This function to be called after every system reset. No transactions will be time
performed until the setup peripheral function is called.
pto_abs2qep Translates a change in absolute position into an equivalent change in incremental position. Run Time
_translatePosition This function configures the CLB to generate: the number of QCLKs, the QCLK frequency,
and the QEP-I pulse. The parameters used for the translation can be configured in the library
header file. This function loads the configuration into the HLC FIFO.
pto_abs2qep This function will initiate the pulse generation on the interface. To be called after Run Time
_runPulseGen pto_abs2qep_translatePosition has setup the CLB HLC FIFO. Note that the setup up and start
operation are separate function calls.

6.5.1 Abs2Qep API Configuration

The library header file, pto_abs2qep.h, contains parameters which can be modified to configure the library for
different encoders and position sample rates. Parameters include:
• Position sampling period
• Maximum motor revolutions per minute (RPM)
• Absolute encoder resolution
• Incremental encoder lines per revolution

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6.5.2 pto_abs2qep_runPulseGen
Description
Function called during runtime to start a new PTO. This function checks that the previous PTO has completed
before starting a new PTO.

Note
The setup and start operations are separate function calls. The setup (pto_abs2qep_translatePosition)
must be called before this function. You can set up the transfer and start the pulse generation by using
this function call, as required, at a different time.

Definition

void
pto_abs2qep_runPulseGen(
uint16_t ptoDirection
);

Parameters
Input:
• ptoDirection: Direction of the PTO. This determines which signal leads QEP-A or QEP-B.
Return: none
Usage

// Call to sample a new absolute position

....
// Translate change from previous position to PTO configuration
ptoDirection = pto_abs2qep_translatePosition(absolutePosition);
....
// Start the last configuration
pto_abs2qep_runPulseGen(ptoDirection);

6.5.3 pto_abs2qep_setupPeriph
Description
This function performs the setup for the CLB and XBAR interconnect during system initialization. This function
must be called after every system reset. No transactions will be performed until the setup peripheral function is
called.
Definition

void pto_abs2qep_setupPeriph(void);

Parameters
Input: none
Return: none
Usage

pto_abs2qep_setupPeriph();
...
//
// GPIO and other system peripheral configuration
//

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6.5.4 pto_abs2qep_translatePosition
Description
This function translates a change in absolute position into an equivalent PTO configuration to be loaded into the
CLB FIFO. The information includes:
• Number of QCLKs required to generate the QEP-A and QEP-B pulses
• If crossing zero, the QCLK edge where QEP-I should be driven high and low
• The number of CLB clocks between each QCLK
• The direction of the position change.

Archive previous Zero-Cross detection details can be

absolute posi
on found in the theory of operation section

Yes Calculate posi on change

Calculate new posion Yes
Zero-cross? Reverse direcon? and index high edge for
change
reverse zero-cross

No No

Set index high edge to a Calculate posion change

large value and index high edge for
(prevents a match) forward zero-cross

Set index low edge

(high edge + 1)

Calculate QCLK edges to

send

Total
Determine total
fraconal QCLK Yes Adjust QCLK edges to be Adjust the fraconal carry-
accumulated fraconal
>= 1 sent by 1 over by 1
QCLK pulses to carry over
or <= -1?

No

Calculate the pulseWidth No Yes Zero movement detected

(me between each QCLK QCLK to send == 0? Set pulseWidth to a large
edge in CLB clocks) value (prevents a match)

Configuration includes QCLKs to send, pulseWidth

Write the con gura
on to
and Index high/low edge.
the HLC PULL FIFO
These values will be loaded by the HLC when the
pto_abs2qep_runPulseGen function is called.
Return the direcon of the
posion change

Figure 6-1. Abs2Qep Translate Function

Definition

uint16_t
pto_abs2qep_translatePosition(
uint32_t positionNew
);

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Parameters
Input:
• positionNew - The new absolute position as sampled by the system. The translate function compares this
value to the previous sample to determine the change in position.
Return: ptoDirection - Indicates the direction of the PTO.
• PTO_ABS2QEP_CLOCKWISE_PTO
• PTO_ABS2QEP_COUNTERCLOCKWISE_PTO

Note
This function loads the PTO configuration directly into the HLC PULL FIFO.

Usage

// Call to sample a new absolute position

....
// Translate change from previous position to PTO configuration
ptoDirection = pto_abs2qep_translatePosition(absolutePosition);
....
// Start the last configuration
pto_abs2qep_runPulseGen(ptoDirection);

7 Using the PTO Reference APIs in Projects

The following sections describe the steps required to include one or more of the PTO libraries into your project.
These include:
• Adding the library header file
• Updating Code Composer Studio options to link in the library
• Modification of the internal routing to, or from, the CLB
• Initialization steps required to invoke the functionality of the API
7.1 Adding PTO Support to a Project
Use the following instructions to add the PTO APIs to a project.

Note
The exact location may vary depending on where C2000Ware_MotorControl_SDK is installed and
which other libraries the project is using.

1. Include the PTO header file in the application i.e. {ProjectName}.h.

#include "pto_pulsegen.h"
#include "pto_qepdiv.h"
#include "pto_abs2qep.h"

2. In Code Composer Studio (CCS), right click on the project and navigate to Project Properties → Build →
C2000 Compiler → Include Options
a. Add the header file directory to the '#include search path' (see Figure 7-1)
The path for PTO header files is ${SDK_ROOT}\libraries\position_sensing\pto\include.

Note
${SDK_ROOT} is a varaible used by CCS to indicate the install location of the SDK. Its
definition can be viewed under Project Properties → Resource → Linked Resources.

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Figure 7-1. Compiler Include Options for Projects Using PTO Reference APIs
3. Add the compiled library file to the project:
a. Right click on the project name in the Project Explorer window
b. Navigate to 'Project Properties → Build → C2000 Linker → File Search Path'
c. Add the library directory to the 'library search path'
d. Add the name of the library to the 'Include library file'
e. Click 'Apply and Close'
The PTO compiled library object files are located at: [C2000Ware_MotorControl_SDK]
\libraries\position_sensing\pto\lib.
An example is shown in Figure 7-2 and Figure 7-3 show the changes to the linker options that are required to
include the PTO APIs compiled object file.

Figure 7-2. C2000™ Linker Options – PulseGen

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Figure 7-3. C2000 Linker Options – QepDiv

Note
The exact location may vary depending on where C2000Ware_MotorControl_SDK is installed and
which other libraries the project is using.

7.2 Routing To and From the CLB

The next step is to understand the routing to/from the CLB and how it will integrate into your project's
requirements.
The provided examples route signals between the CLB and specific GPIO pins. The input/output routing is
described in the Section 5 Your application may, however, require routing signals to different pins or a different
XBAR or a different peripheral. The specific modifications differ from case-to-case.
In some cases, a simple change to the application code is all that is required.
The routing is through INPUTXBARx to the CLB AUXSIGx global MUX. You want to change the input to a
different GPIO. This can be accomplished by changing which GPIO is connected to INPUTXBARx.
In other cases, the CLB library may need to be changed or the design moved to another tile. For example:
If a Tile output is not able to use the OUTPUTXBAR it may instead override a peripheral output. Which
peripherals are available to each tile differs. For example ePWM1 can be overridden by Tile 1, ePWM2 by Tile2,
and so forth. A change here may require routing the output to a different OUTLUT or to a different tile.
7.3 Initialization Steps
The following section describes the specific initialization steps required to use the PTO library. The examples
should be used as a reference.
7.3.1 PTO-PulseGen API Initalization
The following steps are required for initialization and proper function of the PTO PulseGen API functions.
1. Initialize and set up the peripheral configuration by calling the pto_pulsegen_setupPeriph() function.
2. Set up the GPIOs required for configuration. For more information, see pto_setupGPIO.
3. To set the pulse generation configuration, see the pto_setOptions function.
4. ptoISR is used as the primary interrupt service routine (ISR). To see how to update the PTO configuration,
see this ISR.

36 C2000™ Position Manager PTO API Reference Guide SPRAC77C – MARCH 2020 – REVISED MAY 2021
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7.3.2 PTO-QepDiv API Initialization

The following steps are required for initialization and proper function of the PTO QepDiv API functions.
1. Initialize and set up the peripheral configuration by calling the pto_qepdiv_setupPeriph() function.
2. Set up the GPIOs required for configuration.
3. To set the configuration, see the pto_qepdiv_config() function.
4. Call pto_qepdiv_startOperation() to start the QepDiv configuration.
7.3.3 PTO-Abs2Qep API Initialization
The following steps are required to initialize and configure the PTO Abs2Qep API functions.
1. Review the library headerfile, pto_abs2qep.h, and update any configuration information required to match
your system. If modifications are made, then rebuild the library as described in Section 6. The configuration
includes:
a. Resolution of the drive
b. Max RPM of the drive
c. Lines per revolution of the incremental encoder
d. Position sampling rate
2. Setup the GPIO and routing to/from the CLB as described in Section 7.2.
3. Setup the CLB, see pto_abs2qep_setupPeriph(). Note at the end of this function, a call is made to
setup the CLB with position 0.

pto_abs2qep_translatePosition(0);
pto_abs2qep_runPulseGen(PTO_ABS2QEP_CLOCKWISE_PTO);

4. Configure a timer to start an ISR when the absolute position is to be sampled. The example uses ePWM3.
5. In the sampling ISR do the following (see pto_EPWM3ISR):
a. Start the previous PTO translation: pto_abs2qep_runPulseGen(ptoDirection)
b. Sample a new absolute position AbsolutePositionNext = <application dependent
function>()
c. Translate the next PTO. ptoDirection =
pto_abs2qep_translatePosition(absolutePositionNext) This translation will be run the next
time the ISR is run.
8 References
• Texas Instruments: CLB Tool User’s Guide
• Texas Instruments: C2000™ Piccolo™ F28004x Series LaunchPad™ Development Kit

Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (March 2020) to Revision C (May 2021) Page
• Updated the numbering format for tables, figures and cross-references throughout the document. .................2
• Added new Section 4........................................................................................................................................10
• Added Abs2Qep information to Section 5 ........................................................................................................21
• Added Abs2Qep information to the Section 6...................................................................................................25

SPRAC77C – MARCH 2020 – REVISED MAY 2021 C2000™ Position Manager PTO API Reference Guide 37
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