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D Flipflop

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0% found this document useful (0 votes)
24 views1 page

D Flipflop

Uploaded by

akshay
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Inputs Outputs

D C
0 0 1

1 0

2 XO
5
x

Clock (C) (b)

=D R

D Q D

4 b
D
(a) (c)
Figure 6.18 Positive-edge-triggered D ip-flop. (a) Logic diagram.(b) Function table where denotes the
Output Q in response to the inputs. (c) Two logic symbols.

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