Natural Computing

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Universal logic elements constructed on the Turing Tumble

Takahiro Tomita1 • Jia Lee2 • Teijiro Isokawa1 • Ferdinand Peper3 • Takayuki Yumoto1 •

Naotake Kamiura1

Ó Springer Nature B.V. 2019

Abstract
This paper presents a mathematical model for a mechanical computer called the Turing Tumble. We show that our model
called Turing Tumble Model (TTM) is computationally universal under the assumptions that a configuration of TTM is
sufficiently large and that local interactions between elements can be transferred without limitations. The Turing Tumble
has a strict constraint, based on gravity, since signals can only move from top to bottom. We introduce a uniform
scheme that takes into account this restriction in directionality to construct universal machines in the TTM based on
directed acyclic graphs. This model may be useful for implementing computers that exploit mechanical interactions in
nature, especially those on micrometer-scales.

Keywords Mechanical computer  Sequential machine  Computational universality

1 Introduction Utilizing mechanical properties of micro-scaled struc-

tures will be an alternative candidate for molecular-sized
Computation on micrometer-sized devices will be impor- devices, and there have been many mechanical imple-
tant for constructing molecular robots (Murata et al. 2013), mentations based on so-called Micro Electro Mechanical
in which chemical reactions or mechanical interactions Systems (MEMS) technologies.
between biomolecules and DNA molecules are used for Recently, a game called Turing Tumble has been
operations. Several constructions for such computing sys- released on the market (Turing Tumble—build marble-
tems have been proposed, such as molecular switch ele- powered computers. https://www.turingtumble.com/) for
ments (Rondelez 2012) and Gellular Automata (Hagiya educational purposes to aid the understanding of the
et al. 2014). Their operations are based on chemical reac- mechanisms underlying computation. This game consists
tions, which is efficient for energy consumption, though of various mechanical components that are configured on a
their reaction speeds tend to be low. two-dimensional board, as well as balls that are used as
signals to drive these components. A ball injected from the
top of the board flows along the configuration, while being
operated on by the components. The potential energy in a
A short version of this paper was presented at
ball is consumed through the computation process in this
AUTOMATA2018 (Tomita et al. 2018).
game, thus allowing gravitation-driven computation to be
& Takahiro Tomita conducted.
[email protected] The creator of this computer has mentioned that it is
Teijiro Isokawa Turing-complete, i.e., it has the capability of universal
[email protected] computation, but a proof of this claim has not been pro-
1 vided. One way to show universal computation is to con-
Graduate School of Engineering, University of Hyogo,
Himeji, Hyogo, Japan struct a Sequential Machine (SM), which is then used as the
2 basic component in a chain of SMs implementing a Turing
College of Computer Science, Chongqing University,
Chongqing, China Machine.
3
This paper presents a formalization of a mathematical
Center for Information and Neural Networks, National
Institute of Information and Communications Technology, model for the Turing Tumble computer, called Turing
and Osaka University, Osaka, Japan Tumble Model (TTM), and shows that our proposed TTM is

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computationally universal. The capability of computational

universality is shown by demonstrating that a reversible
sequential machine can be constructed by a circuit of
components defined in the TTM and that signal routing for
any pair of components can be realized in the framework of
TTM.
Our scheme is advantageous for designing computations
in the TTM: a circuit can be constructed in a uniform and
straightforward way starting with the specification of a
given sequential machine. In other words, it is useful to
provide a uniform scheme for constructing circuits on this
computer, in order to facilitate implementations for this
type of computers on micrometer- or molecular-sized
devices.
This paper is organized as follows. Section 2 describes
the Turing Tumble, as well as the logic elements used in
the TTM, and a method to construct circuits from them.
The TTM is introduced in Sect. 3, and the implementation
of logic elements on it in Sect. 4. We finish this paper with
Fig. 1 Example of a computer built on the Turing Tumble (https://
a discussion and conclusions in Sect. 5. www.turingtumble.com/)

2 Preliminaries

2.1 Turing Tumble

Turing Tumble is a kind of mechanical computer with a

two-dimensional board, a set of mechanical components,
such as rails, gears, flipflops, and balls that are operated by
these components. Users of this computer configure this
computer by placing mechanical components on the board,
and then they start computation by injecting a ball in the
top of the board. Figure 1 shows a configuration of the
Turing Tumble (https://www.turingtumble.com/). There
are two injection devices for balls, located at the top left
corner and top right corner, and each of them is activated Fig. 2 Elements of the Turing Tumble (https://www.turingtumble.
by pushing either flipper at the bottom of the board. A ball com/): a ramp, b bit, c crossover, d interceptor, e gear-bit, and f gear
from the top left (resp. right) corner is released by pushing
the flipper at the left (resp. right) bottom. The injected ball incoming balls to the lower right. A bit (Fig. 2b) is a kind
flows along the board, may change its direction by the of flip-flop representing a 1-bit memory by the direction of
operations at mechanical components, and is finally col- an arrow (upper left or upper right) attached to it. A ball
lected at the bottom of the board while pushing the left or from the upper left or upper right always flips the memory
right flipper. The final process by the ball results in of the bit, and the ball is redirected to the lower right (resp.
releasing another ball from the top left or top right, thus the left) when the bit is pointing left (resp. right) before flip-
computation process in this computer can continue. ping. A crossover (Fig. 2c) is used for crossing balls; the
There are several types of mechanical components ball from the upper left (resp. right) flows to the lower right
available for this computer, as shown in Fig. 2. A ramp (resp. left). An interceptor (Fig. 2d) holds an incoming ball
(Fig. 2a) is responsible for routing a ball from the upper in this component. It is used for representing the end of a
left or upper right toward a particular direction, i.e., the computation. A gear-bit (Fig. 2e) acts as a bit but its
lower left or lower right. This component determines the switching can be transferred to another gear-bit by using
direction for routing balls; the ramp in Fig. 2a redirects neighboring gear-bits or gears (Fig. 2f).

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Many kinds of computations can be conducted by

appropriate configurations of these elements, such as
summation of two digits, pattern formation by the color of
balls, and so on. This computer is claimed to be Turing-
complete by its creator. In the following sections, we show
that this computer has indeed the capability of universal
computation under the assumptions that the size of the
board is large enough and a ball in the Turing Tumble can
rotate an arbitrary number of connected gear-bits. (a)

2.2 Sequential machines and universal logic

elements

A sequential machine (SM) is a finite state machine and an

SM M is defined as
M ¼ ðQ; R; C; q0 ; dÞ; ð1Þ

where Q is a finite state of states and q0 2 Q is the initial (b)

state of M. R and C ðR \ C 6¼ /Þ are non-empty finite sets
of input and output symbols, respectively. A function d : Fig. 3 a RT and b IRT with their transition functions
R  Q ! C  Q is called a transition function. Let
dðr; pÞ ¼ ðc; qÞ with p; q 2 Q; r 2 R and c 2 C be the appears on input line T when RT is in state 0 (resp. 1), then
transition. This transition means that if the input symbol r it updates the state to 1 (resp. 0) and moves the token to
is given when M is in state p, it updates the state to q and output line T0 (resp. T1 ). If the token appears on input line
outputs the symbol c. A reversible sequential machine R when RT is in state 0 (resp. 1), then the state of RT does
(RSM) is an SM of which the transition function is bijec- not change and the token is transferred to output line T0
tive. In this case, an RSM satisfies jRj ¼ jCj. The con- (resp. T1 ). IRT is the inverse element of RT. If a token
structions in this paper are based on the reversible version appears on input line T1 (resp. T0 ) when IRT is in state 0
of sequential machines, because we have reversible logic (resp. 1), then the state of IRT changes to 1 (resp. 0) and
elements available that are easy to implement in the TTM the token is transferred to output line T. Also, if a token
due to their simplicity. appears on input line T0 (resp. T1 ), then the state of IRT
A reversible logic element (RLE) is an element with does not change and the token is transferred to output line
finite input and output lines. An RLE E is defined as: R. It is shown that any RLE can be implemented using only
RT and IRT elements (Tang et al. 2015), thus the set of RT
E ¼ ðM; I; O; q; .; WÞ; ð2Þ and IRT is universal.
where M is an RSM defined by Eq. (1), I and O
(I \ O 6¼ /) are a finite set of input and output lines, 2.3 General method for constructing any RLE
respectively, and q : I ! R and . : O ! C are injective
mappings to convert the input line to the input symbol and A method for constructing an arbitrary RLE has been
the output line to the output symbol, respectively. W  proposed in Tang et al. (2015). In this method, an arbitrary
I  Q  O  Q is a set of operations. For each a 2 I; b 2 O RLE is configured by the mechanism shown in Fig. 4.
and p; q 2 Q, the following condition is satisfied: Logic elements called [n, s]-Convertor ([n, s]-CR), [n, s]-
Inverse Convertor ([n, s]-ICR), s-Coding Decoding (s-CD)
a; p ! b; q 2 W ¼) dðqðaÞ; pÞ ¼ ð.ðbÞ; qÞ: ð3Þ are connected as shown in this figure, and output lines of an
This means that a token appears on the input line a when [n, s]-CR are connected to input lines of an [n, s]-ICR. The
M is in state p, after which the token is transferred to the connections from [n, s]-CR to [n, s]-ICR determine the
output line b and M updates its state to q. The state of RLE transition functions in the RLE. An s-CD is an element for
E is defined as the state in M. It has been shown that storing the state, and the state of s-CD represents the state
Reversible Turing Machines (RTM) can be implemented of an RLE. An operation of RLE is performed in the fol-
by using only RLEs (Lee et al. 2012). lowing. First, a signal is injected to the input line Ii of [n,
Figure 3 shows two important RLEs called Reading s]-CR, which means an input to the RLE, after which [n, s]-
Toggle (RT) and Inverse Reading Toggle (IRT). If a token CR changes its state to i. Subsequently, the signal moves to
the input line D of the s-CD, and the s-CD reads the state of

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A token is the fundamental element in TTM and cor-

responds to a ball in the Turing Tumble. Token-lines are
paths for tokens, and the direction of a token on the line is
represented by an arrow attached to the line. The logic
elements in a circuit are connected by token-lines, and they
operate on the tokens. Five logic elements are defined in
TTM, as shown in Fig. 5.
A generator (Fig. 5a) produces one token when a
regenerator (Fig. 5b) accepts one token. A token from a
generator with the label ‘B’ (resp. ‘R’) is generated by the
token on a regenerator with the label ‘b’ (resp. ‘r’). These
elements correspond to the flippers and ball release devices
attached to the board in the Turing Tumble.
A bit (Fig. 5c) acts as a bit in the Turing Tumble, and
the state transition for a bit is shown in Fig. 6. It has one
input line (T), two output lines (T0 and T1 ), and is in one of
two states (0 and 1). A bit in the 0 (resp. 1) state redirects a
token on T to the T1 (resp. T0 ) output line and flips its state.
A merger (Fig. 5d) is responsible for merging two input
Fig. 4 Framework for constructing any RLE lines into one output line. A token on either input lines
flows to the output line. This can be implemented by an
array of ramp elements in the Turing Tumble.
the RLE. When the state is x, the signal moves to the input An interceptor (Fig. 5e) corresponds to an interceptor in
line Rx of the [n, s]-CR, this signal exits from the output the Turing Tumble. A token accepted by this element
line Ti;x , which depends on the state i in [n,s]-CR and the indicates that the computation in TTM halts.
output x from the s-CD. Then the signal moves to an input Other than the token-lines that are used for routing
line of the [n, s]-ICR according to the transition function, tokens, there is another type of lines, called gear-lines. The
and the signal is injected to the input line Tj;y of the [n, s]- gear-lines are used for connecting bits distributed over the
ICR. The [n, s]-ICR stores the output symbol j as its state, configuration of circuits. The states of bits connected by
and the signal moves to the input line Cx of the s-CD to set gear-lines can be simultaneously flipped by a token that is
the new state y. The state of s-CD is then updated to y, and accepted by one of these connected bits. In TTM, the gear-
the token moves to the input line W of the [n, s]-ICR. lines are represented by dotted lines, and token-lines are
Finally the token moves to the output line Oj . The logic denoted by solid lines.
elements [n, s]-CR, [n, s]-ICR, s-CD, which are necessary We assume that there is at most one token at a time in a
for this mechanism, can be constructed with only the logic circuit composed of elements in TTM and that the opera-
elements RT and IRT (for the detailed constructions of [n, tions for the logic elements and token-lines are conducted
s]-CR, [n, s]-ICR, and s-CD by using only RTs and IRTs, with a finite delay. Because a ball can move only down-
see Tang et al. (2015). In conclusion, it is possible to wards in the Turing Tumble, the ball cannot pass an ele-
construct an arbitrary RLE according to a general method ment in the Turing Tumble more than once. This condition
using only RT and IRT elements. corresponds to a graph with components as nodes and
token-lines as edges that has no directed cycles in TTM. In
other words, TTM has a constraint claiming that logic
3 Turing Tumble Model circuits must be a directed acyclic graph.

3.1 Definition of Turing Tumble Model

We define the computational model for the TTM based on

the operations conducted in the original Turing Tumble.
This model contains tokens, logic elements for operating
tokens, and two type of signal lines called token-lines and
(a) (b) (c) (d) (e)
gear-lines.
Fig. 5 Components of TTM: a generator, b regenerator, c bit,
d merger, e interceptor

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has one input line, two output lines, and two states. By
using mergers, a bit in TTM can have two or more inputs.
The operation of a bit in the original Turing Tumble is
the same as the operation of a gear-bit in the original
Turing Tumble, and the only difference is whether it can be
connected with a gear or not. Thus, by definition we
assume that TTM does not distinguish these.

4 Implementing logic elements

Fig. 6 Definition of a bit and its transition function on the Turing Tumble Model

3.2 Comparison of Turing Tumble Model 4.1 Constructions for RT and IRT
with original Turing Tumble
We first construct RT and IRT on the TTM. Figure 7 shows
The elements in the original Turing Tumble correspond to a construction of RT in the state 0. An arrow with a gray
the components in TTM as shown in Table 1. The ramp of solid line represents a token-line where a token never
the original Turing Tumble corresponds to a token-line in appears. Trajectories of signals from the input lines R and
TTM. While users create a moving path of balls using a T are shown in Fig. 8a, b in state 0 and state 1, respectively,
series of ramps in the original Turing Tumble, TTM rep- of the implemented RT. If a token appears on the input line
resents a moving path of a token by connecting compo- R, this token crosses the bits twice and consequently the
nents with a token-line. The crossover, which has the role states of bits do not change. In the other case, a token
of crossing two moving paths in the original Turing appears on the input line T, and this crosses the bits once
Tumble, corresponds to the intersection of two token-lines (See Fig. 8a) or three times (See Fig. 8b), thus the state of
in TTM. Gears in the original Turing Tumble correspond to the bits is flipped.
gear-lines in TTM. A group of gears and gear-bits in the Figure 9 shows a construction of IRT in state 0. Its
original Turing Tumble is represented by gear-lines in operations are similar to the RT.
TTM. Turning a gear (or a gear-bit) in the group implies
that all gears and gear-bits will turn simultaneously. In 4.2 A general structure for simulating any RLE
TTM the event for turning a gear or a gear-bit in the ele- on TTM
ment will be transferred to all elements connected by gear-
lines. An interceptor in the original Turing Tumble corre- We now show that any RLE can be simulated on the TTM,
sponds to an interceptor in TTM. by using useful RLEs called Distributor, Allocator, and
In TTM, bits have the same role as gear-bits in the Feedback System, shown in Fig. 10.
original Turing Tumble. A bit in the original Turing Distributor (Fig. 10a) is an n-state element with the
Tumble has two inputs. However, which output line the following transition function
ball goes out from is determined by the state of the bit, not
by which input line the signal enters. Hence, these input Fig. 7 Implementation of an RT
by the elements in TTM. The
lines are regarded as identical in TTM, so the bit in TTM state of this RT is set to 0

Table 1 Comparison of TTM with the elements in original Turing

Tumble
Turing Tumble TTM

Ball Token
Ramp Token-line
Crossover Intersection of token-lines
Gear Gear-line
Gear-bit Bit
Bit Bit (not connected by gear-line)
Interceptor Interceptor

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(a) (b)

(a) (b)

Fig. 8 Path of a token in an RT: a in state 0, b in state 1

Fig. 9 Implementation of an
IRT by the elements in TTM.
The state of this IRT is set to 0

(c) (d)

Fig. 10 a Distributor, b Allocator, c Feedback System, d RLE

This system contains a Distributor at the upper part of the

system and an Allocator at the lower part of the system.
Both the Distributor and Allocator have the same number
of states, say k, and these states are always synchronized. If
fD; x ! Dx ; 1 j x 2 f1; 2; . . .; ngg: ð4Þ
a signal enters from the input port Cx in the Feedback
When a signal is present on the input port D, this signal System, the state of the system (both the states of
exits from the output port according to the state of the Distributor and Allocator) is set to state x, and the signal
element, i.e., the signal exits from the output port Dx if the exits from the output port C. Then, when the signal enters
element is in the state x. The state of the element is set to 1 from input port D, this signal exits from output port Dx and
after the signal exits from the element. the state of the system is set to state 1.
Allocator (Fig. 10b) is an n-state element and its tran- An RLE defined in Eq. (2) is shown in Fig. 10d. It has
sition function is defined as n input lines, n output lines, and s states. An arbitrary RLE
can be constructed using only RT and IRT according to the
fCx ; 1 ! C; x j x 2 f1; 2; . . .; ngg: ð5Þ
method shown in Sect. 2.3. RT and IRT can be constructed
This element is responsible for storing the information as shown in Figs. 7 and 9, respectively, on TTM. There-
from which input port the signal enters. When a signal fore, an arbitrary RLE can be constructed on TTM
enters this element from the input port Cx , the signal exits according to the general method.
from the output port C while changing the state of the By adopting the above elements, an arbitrary RLE can
element to the state x. be simulated by the system shown in Fig. 11. This system
Feedback System (Fig. 10c) is a k-state, ðk þ 1Þ-input is constructed by connecting the generator B to the
and ðk þ 1Þ-output element and its transition function is Distributor’s input line D, the Distributor’s output line Dx
defined as to the RLE’s input line Ix , the RLE’s output line Ox to the
fD; x ! Dx ; 1 j x 2 f1; 2; . . .; kgg [ Allocator’s input line Cx , and Allocator’s output line C to
ð6Þ the interceptor. The location for the first token to be
fCx ; 1 ! C; x j x 2 f1; 2; . . .; kgg: injected into the machine is always fixed, thus we use the
Distributor to select an input line to the RLE. In order to

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Universal logic elements constructed on the Turing Tumble

n; . . .; 1Þ and being connected to the neighboring pair of

bits. If a bit-pair is in state 1 (see Fig. 6), the input signal
exits towards the neighboring bit-pair without changing the
state of the bit-pair. On the other hand, if the state of the i-
th bit-pair is the state 0, the signal exits from output port Di
and the state of this bit-pair changes to state 1.
An Allocator can be constructed as shown in Fig. 13.
When all bits in are in state 1, this configuration represents
state 1 and when only the ðx  1Þ-th bit from the bottom is in
state 1, it represents state x. This element is simply imple-
mented by an array of bits. The i-th bit has as its input port
Ci ði ¼ 1; . . .; nÞ and if the input signal is present on the input
port Ci , then the corresponding bit will change its state to
state 0. The signal eventually exits from output port C.
A Feedback System can be constructed as shown in
Fig. 14. When the bits from Di ði ¼ 1; . . .; nÞ to Dn are in
state 1, and the bits from D1 to Di1 are in state 0, the
Fig. 11 General structure for simulating any RLE on TTM system is defined to be in state i. This system is composed
of Allocator and Distributor, where each of the bits in the
inject a token to the input line Ix , we set the internal state of Allocator is connected to each of the bit-pairs in the
the Distributor to x. Furthermore, it is necessary to add Distributor. This is used to update the state of the Feedback
interconnections between the RLE and the Feedback Sys- System by injecting a signal from the input ports D, and
tem in order to remove directed cycles from the circuit. Ci ði ¼ 1; . . .; nÞ.
We show constructions for these elements on the TTM.
A Distributor can be constructed as shown in Fig. 12. A 4.3 Removing directed cycles using a Feedback
gray arrow is a token-line where a token never arrives. System
When all bits in this configuration are in state 1, a
Distributor for this configuration is in state 1. When only A straightforward construction of RLEs may contain
the ð2ðx  1Þ  1Þ-th bit and the 2ðx  1Þ-th bit from the directed cycles in token-lines in the circuit. Due to the
bottom are in the state 0, this configuration corresponds to constraint for the TTM that a logical circuit does not have
state x. A signal at input port D passes through the pairs of directed cycles for token-lines, we have to remove directed
connected bits, each pair having as its output port Di ði ¼ cycles from the circuit. For this purpose, we propose an
algorithm described as Algorithm 1. Figure 15 shows an
example for removing directed cycles by using Algo-
rithm 1. The circuit in Fig. 15 contains two directed cycles.
The edges with labels (1) and (2) correspond to back edges
in the depth-first search tree. After these edges are
removed, the edges with labels (1a) and (2a) are attached
by the process in line #5 in Algorithm 1. Finally, the edges
with label (1b) and (2b) are attached by the process in line
#6.

Fig. 12 Construction of Distributor Fig. 13 Construction of Allocator

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 T. Tomita et al.

Fig. 14 Construction of Feedback System

Fig. 15 Example of removing cycles by Algorithm 1

Inverse Reading Toggle, are constructed by networks of the

elements in the TTM based on the mechanical primitives of
the Turing Tumble. Any reversible logic element (RLE)
can be constructed with these elements. The TTM has the
constraint that logic circuits in this model must be directed
acyclic graphs, due to the balls in the Turing Tumble
always going downwards on the board. We provide a
uniform scheme to construct any sequential machine by
directed acyclic graph structures. This is implemented in
5 Discussion and conclusions the framework of the TTM through an algorithm for
removing directed cycles in the graph corresponding to a
This paper presents a computational model for the Turing circuit. In order to make the circuit function without
Tumble mechanical computer, called Turing Tumble directed cycles we propose three types of elements, i.e.,
Model (TTM), and shows that any reversible sequential Distributor, Allocator, and Feedback System. We construct
machine can be constructed on this model. Several types of these elements by the basic elements in the TTM.
logic elements, token, token-line, and connections of logic Our designs use reversible logic elements to prove
elements (gear-line) are defined in this model. Two universality, but the main advantage of these elements is
reversible logic elements, called Reading Toggle and that they are simple, and lend themselves to efficient

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Universal logic elements constructed on the Turing Tumble

implementations of circuits on the TTM. Reversibility of the 13th international conference on unconventional computa-
these elements is only used to aid in the construction of tion and natural computation, pp 177–189
Lee J, Yang RL, Morita K (2012) Design of 1-tape 2-symbol
reversible sequential machines, whereby we rely on the reversible Turing machines based on reversible logic elements.
known result that every sequential machine is equivalent to Theor Comput Sci 460:78–88. https://doi.org/10.1016/j.tcs.2012.
a reversible sequential machine. 07.027
We assume that a ball in a Turing Tumble can rotate an Murata S, Konagaya A, Kobayashi S, Saito H, Hagiya M (2013)
Molecular robotics: a new paradigm for artifacts. New Gener
arbitrary number of connected gear-bits in the TTM. This Comput 31(1):27–45. https://doi.org/10.1007/s00354-012-0121-
implies that flipping of bits is possible in an indefinite z
series of gears, but this assumption is not feasible for the Rondelez Y (2012) Competition for catalytic resources alters
implementation of the Turing Tumble in actual devices. biological network dynamics. Phys Rev Lett 108(1):018102
Tang MX, Lee J, Morita K (2015) General design of reversible
Constructions with elements or gear-lines with a limited sequential machines based on reversible logic elements. Theor
number of gears are topic for our future work. Comput Sci 568:19–27. https://doi.org/10.1016/j.tcs.2014.11.
If we need to construct more complex systems with 032
many RLEs, it is important to connect RLEs to each other, Tomita T, Lee J, Isokawa T, Peper F, Yumoto T, Kamiura N (2018)
Constructing reversible logic elements on Turing Tumble model.
where a signal can travel among them. Currently, we have In: Proceedings of 24th IFIP WG 1.5 international workshop on
to transfer an output symbol from one RLE to another RLE cellular automata and discrete complex systems (AUTO-
as its input symbol in a manual manner. This can be MATA2018), pp 33–40
resolved by extending the functions for generators and re-
generators. Publisher’s Note Springer Nature remains neutral with regard to
jurisdictional claims in published maps and institutional affiliations.
Acknowledgements We would like to thank the anonymous review-
ers for their useful comments. This work was partially supported by
the National Key R&D Program of China 2018YFD1100300.

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