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Module 1

Introduction to Microprocessor and its organization

 General concept of microprocessor and architecture
 Bus organization, Memory concepts
 8085 microprocessor
 Instruction execution and timings
 Instruction Set
 Interfacing I/O devices
 Addressing modes
 8085 interrupts

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 Module 1

Introduction to Microprocessor and its organization

Lecture 4

8085 Microprocessor Instruction Set

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 8085 microprocessor

 Data Transfer Group

 Arithmetic Group
 Logic Group
 Branch Group
 Rotating Group
 Stack Operations
 Input/Output
 Machine Control Group

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 8085 microprocessor

 MOV rd, rs Move destination, source

o This instruction copies from the source register into destination register.
o The rs and rd are general purpose registers such as A, B, C, D, E, H and L.
o The contents of the source register remain unchanged after execution of the instruction.
o Ex MOV A, B, MOV B, C.
o Assume register B contains 72 H and register C contains 9F H. Transfer the contents of register
C to register B.
MOV B, C
Before After
B 72 9F C B 9F 9F C

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 MOV m, rs Move memory, source

o Copies data from the source register into a memory location pointed by HL register pair.
o rs – A, B, C, D, E, H and L
 MOV rd, m Move destination, memory
o Copies data from memory location into a destination register.
o Assume the contents of registers HL are 20 H and 50 H, respectively. Memory location
2050 H contains 9F H. Transfer the contents of the memory location to register B.
o MOV B, M
Before Memory content After
B XX XX C 2050 9F B 9F XX C
H 20 50 L H 20 50 L

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 8085 microprocessor

 MVI r, 8 – bit data Move Immediate data to register

o This instruction directly loads a specified register with an 8 – bit data given within
the instructions.
o r – A, B, C, D, E, H and L.
 MVI m, data (8 bit) Move Immediate data to memory
o Copies data from memory location into a destination register.
o Assume registers H and L contain 20 H and 50 H respectively. Load 3A H in memory
location 2050 H.
o MVI M, 3A H

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 LXI rp, 16 – bit data Load Immediate data to register pair

o This instruction loads 16 – bit data in the register pair.
o Ex – Load the 16 – bit data 2050H in register pair BC.
LXI B, 2050H
 STA 16-bit address Store Accumulator Direct.
o The contents of the accumulator are copied to a memory location specified by the
operand.
o Ex – Assume the accumulator contains 9F H. Load the accumulator contents into
memory location 2050H.
STA 2050H

Before Memory content after

A 9F 2050 9F
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 8085 microprocessor

 LDA 16-bit address Load accumulator direct

o The contents of a memory location, specified by 16-bit address in the operand, are
copied to the accumulator.
o Ex – Assume memory location 2050H contains F8H. Load the accumulator with the
contents of location 2050H.
LDA 2050H

Before Memory content After

A XX 2050 F8 A F8

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 SHLD 16-bit address Store H and L registers direct

o The content of register L is stored in the memory location specified by the 16-bit
address in the operand, and the contents of H register is stored in the memory location
by incrementing the operand.
o Ex – Assume the H and L registers contain 01H and FFH respectively. Store the
contents at memory location 2050H and 2051H.
SHLD 2050H
Before Memory content after
H 01 FF L 2050 F8
2051 01

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 8085 microprocessor

 LHLD 16-bit address Load H and L registers direct

o The instruction copies the contents of the memory location pointed out by the 16-bit
address in register L and copies the content of the next memory location in register
H.
o Ex – Assume memory location 2050H contains 90H and 2051H contains 01H.
Transfer memory contents to registers HL.
LHLD 2050H
Before After
2050 90H H 01 90 L
2051 01H

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 STAX rp (B or D) Store accumulator indirect

o The contents of the accumulator are copied into the memory location specified by the
contents of the operand (register pair).
o Ex – Assume the content of the accumulator is F9H and the contents of registers B and
C are 20H and 50H, respectively. Store the accumulator contents in memory location
2050H.
STAX B

Before After
A F9 2050 F9
B 20 50 C

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 8085 microprocessor

 LDAX rp (B or D) Store accumulator indirect

o The contents of the designated register pair point to a memory location.
o This instruction copies the contents of that memory location into the accumulator.
o Ex – Assume the contents of the register B = 20H, C = 50H and memory location 2050
= 9FH. Transfer the contents of the memory location 2050H to the accumulator.
LDAX B

Before Memory After

A XX 2050 9F A 9F
B 20 50 C B 20 50 C

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 XCHG Exchange H and L with D and E

o The contents of the register H and L are exchanged with the contents of register D
and E respectively.
o Ex – Assume the contents of the register H = 20H, L = 50H and D = 10H and E =
30H. Exchange the contents of H and L with D and E.
XCHG

Before After
D 10 30 E D 20 50 E
H 20 50 L H 10 30 L

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 Module 1

Introduction to Microprocessor and its organization

Lecture 5

8085 Microprocessor Instruction Set

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 8085 microprocessor

 ADD reg. or mem.

o The contents of the operand (register or memory) are added to the contents of the
accumulator and the result is stored in the accumulator.
o Ex – Register B has 51H and the accumulator has 47H. Add the contents of register
B to the contents of accumulator.
ADD B

Before After
A 47 XX A 98
B 51 XX C B 51 XX C

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 ADI 8-bit data Add immediate to accumulator

o The 8-bit data are added to the content of the accumulator and the result is stored in
the accumulator.
o Ex – The accumulator contains 4AH. Add the data byte 59H to the content of the
accumulator.
ADI 59H
o Flags S = 1, Z = 0, AC = 1, P = 1, CY = 0

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 ADC reg. or mem

o Add register to accumulator with carry
o The contents of the register or memory and the carry are added to the contents of the
accumulator and the result is placed in the accumulator.
 ACI 8-bit data
o Add immediate to accumulator with carry.
o The 8-bit data and the carry flag are added to the contents of the accumulator and the
result is stored in the accumulator.

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 8085 microprocessor

 DAD rp
o Add register pair to H and L registers.
o The 16-bit contents of the specified register pair are added to the contents of the HL
register and the sum is saved in the HL register.
o Ex – Assume register pair HL contains 0242H. Multiply the contents by 2.
DAD H

Before After
H 02 42 L H 04 84 L

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 SUB reg. or mem.

o Subtract registers or memory from accumulator.
o A = A – r or m
 SUI 8-bit data
o A = A – 8 bit data
 SBB reg. or mem
o Subtract the contents of register or memory and the borrow from the contents of the
accumulator and the result is stored in the accumulator
o A = A – r or m – CY
 SBI 8-bit data
o A = A – 8 bit data – CY

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 DAA
o Decimal Adjust Accumulator
o The contents of the accumulator are changed to binary coded decimal (BCD)
o Instruction work as follows:
• If the value of the low order four bits (D3 – D0) in the accumulator is greater than 9 or if the AC flag is set, the
instruction adds 6 (06) to the low – order four bits.
• If the value of the higher order bits (D7 – D4) in the accumulator is greater than 9 or if the carry flag is set, the
instruction adds 6 (60) to the high order four bits.

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 DAA
o Ex – If A = 0011 1001 = 39BCD
C = 0001 0010 = 12BCD
ADD C A = 0100 1011 = 4B H
DAA ; adds (06H)0000 0110 because 1011>9
Now A = 0100 1011 + 0000 0110 = 51BCD

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 8085 microprocessor

 INR reg. or mem

o Increment contents of register or memory by 1.
 INX rp
o Increment the contents of register pair by 1
 DCR reg. or mem
o Decrement contents of register or memory by 1.
 DCX rp
o Decrement the contents of register pair by 1.

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 JUMP 16-bit address; Jump unconditionally

 JC 16-bit address; Jump on carry
 JNC 16-bit address; Jump on no carry
 JZ 16-bit address; Jump on zero
 JNZ 16-bit address; Jump on no zero
 PCHL ; Load Program Counter with HL contents

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 8085 microprocessor

 ANA reg. or mem; Logical AND with accumulator

 ANI 16-bit address; Jump on carry
 JNC 16-bit address; Jump on no carry
 JZ 16-bit address; Jump on zero
 JNZ 16-bit address; Jump on no zero
 PCHL ; Load Program Counter with HL contents

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