Scribd
Upload
88 views3 pages

Logic Gates: Structural Modelling

This document describes different modeling approaches - data flow, behavioral, and structural - for designing basic digital logic circuits like half adders, full adders, half subtractors, and full subtractors in Verilog. It provides code examples to model each circuit using the different approaches, showing how logic gates can be connected in structural models or operations can be described mathematically in data flow and behavioral models.

Uploaded by

Divya
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
88 views3 pages

Logic Gates: Structural Modelling

This document describes different modeling approaches - data flow, behavioral, and structural - for designing basic digital logic circuits like half adders, full adders, half subtractors, and full subtractors in Verilog. It provides code examples to model each circuit using the different approaches, showing how logic gates can be connected in structural models or operations can be described mathematically in data flow and behavioral models.

Uploaded by

Divya
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 3

Logic gates

Structural Modelling:
module asdf(a,b,c,d,e,f,g,h,i);
input a,b; output c,d,e,f,g,h,i;
and(c,a,b); or(d,a,b); nor(e,a,b); nand(f,a,b); xor(g,a,b); xnor(h,a,b); not(i,a);
endmodule
Half adder
Data Flow Modelling:
module HA(a,b,sum,carry);
input a,b; output sum,carry;
assign sum=a^b; assign carry=a&b;
endmodule
Behavioural Modelling:
module HA(a,b,sum,carry);
input a,b;
output sum,carry;
always@ (a or b) begin
sum=a^b;
carry=a&b;
end
endmodule
Structural Modelling:
module HA(a,b,sum,carry);
input a,b;
output sum,carry;
xor(sum,a,b);
and(carry,a,b);
endmodule
Full adder
Data Flow Modelling:
module FA(sum,carry,a,b,c);
input a,b,c;
output sum,carry;
assign sum=a^b^c;
assign carry=(a&b)|(b&c)|(c&a);
endmodule
Behavioural Modelling:
module FA(sum,carry,a,b,c);
input a,b,c;
output sum,carry; regsum,carry;
always@ (a or b or c) begin
sum=a^b^c;
carry=(a&b)|(b&c)|(c&a);
end
endmodule
Structural Modelling:
module FA(sum,carry,a,b,c);
input a,b,c;
output sum,carry;
wire c1,c2,c3;
xor(sum,a,b,c);
and(c1,a,b);
and(c2,b,c);
and (c3,c,a);
or(carry,c1,c2,c3);
endmodule
Half subtractor
Data Flow Modelling:
module HS(diff,borrow,a,b);
input a,b;
output diff,borrow;
assign diff=a^b;
assign borrow=!a&b;
endmodule
Behavioural Modelling:
module HS(diff,borrow,a,b);
input a,b;
output diff,borrow;
reg diff,borrow;
always@(a or b) begin
diff=a^b;
borrow=!a&b;
end
endmodule
Structural Modelling:
module HS(diff,borrow,a,b);
input a,b;
output diff,borrow;
xor x1(diff,a,b);
and a1(borrow,!a,b);
endmodule
Full subtractor
Data Flow Modelling:
module FS(diff,borrow,a,b,c);
input a,b,c;
output diff,borrow;
assign diff=a^b^c;
assign borrow=(!a&b)|(!a&c)|(b&c);
endmodule
Behavioural Modelling:
module FS(diff,borrow,a,b,c);
input a,b,c;
output diff,borrow;
always@(a or b or c) begin
diff=a^b^c;
borrow=(!a&b)|(!a&c)|(b&c);
end
endmodule
Structural Modelling:
module FS(diff,borrow,a,b,c);
input a,b,c;
output diff,borrow;
wire b1,b2,b3;
xor x1(diff,a,b,c);
and a1(b1,!a,b);
and a2(b2,!a,c);
and a3(b3,b,c);
or o1(borrow,b1,b2,b3);
endmodule

You might also like