Dr. N.G.P.INSTITUTE OF TECHNOLOGY, COIMBATORE-641048.

Department of Electronics & Communication Engineering

KEYWORDS

EC8791 – EMBEDDED AND REAL TIME SYSTEMS

YEAR / SEM : IV / 07

Prepared by,

Mr.U.Vinothkumar, AP/ECE, Dr.N.G.P.IT

Dr.J.Chitra, Asso.P/ECE, Dr.N.G.P.IT

Prepared by
Mr.U.Vinothkumar, AP/ECE, Dr NGPIT.
Dr.J.Chitra, Asso.P/ECE, Dr NGPIT Page 1
 UNITI - INTRODUCTION TO EMBEDDED SYSTEM DESIGN

Embedded system

A combination of computer hardware and software, and perhaps additional mechanical or other
parts, designed to perform a dedicated function. In some cases, embedded systems are part of a
larger system or product, as in the case of an antilock braking system in a car.

ARM

A 32-bit RISC processor widely used in low-power embedded applications. Short for Advanced
RISC Machine.

Endianness

The attribute of a hardware or software architecture that indicates how multibyte values are
represented and stored. The two possibilities are called big-endian and little-endian.

Big-endian

A data representation for a multibyte value that has the most significant byte stored at the lowest
memory address. Note that only the bytes are reordered, never the nibbles or bits that comprise
them. Every processor stores its data in either big-endian or little-endian format. Sun's SPARC,
Motorola's 68k, and the PowerPC families are all big-endian. The Java virtual machine is big-
endian as well. Similarly, every communications protocol must define the byte order of its
multibyte values. TCP/IP uses big-endian representation.

Little-endian

A data representation for a multibyte value that has the least significant byte stored at the lowest
memory address. Note that only the bytes are reordered, never the nibbles or bits that comprise
them. Every processor stores its data in either big-endian or little-endian format. Intel's 80x86
family is little-endian.

Deadline

In a real-time system, the time at which a particular set of computations or data transfers must be
completed. There are typically consequences associated with missing a deadline. If the deadline
absolutely, positively must be met every time or else, it is called a hard deadline. Hard deadlines
have dire consequences when missed. Other deadlines are said to be soft deadlines.

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Complex instruction set computer

Describes the architecture of a processor family. Abbreviated CISC. So-called CISC processors
generally feature variable-length instructions and multiple addressing formats and have a small
number of general-purpose registers. Intel's 80x86 family is the quintessential example of CISC.

Context switch

The process of switching from one task to another in a multitasking operating system. A context
switch involves saving the context of the running task and restoring the previously saved context
of the other. The piece of code that does this is necessarily processor specific.

general-purpose computer

A combination of computer hardware and software that serves as a general-purpose computing

platform. PCs, Macs, and Unix workstations are the most popular modern examples. Contrast
with embedded system.

General-purpose I/O

Customizable input/output pins on a microcontroller. Abbreviated GPIO. By wiring the hardware

appropriately and configuring the GPIO port in software, one pin can be used as input to read a
switch, another as an output to control a status LED, and a pair to serve as clock and data for a
serial EEPROM.

Interrupt

An asynchronous electrical signal from a peripheral to the processor. When the peripheral asserts
this signal, an interrupt is said to occur. When an interrupt occurs, the current context is saved
and an interrupt service routine is executed. When the interrupt service routine exits, control of
the processor is returned to whatever part of the software was previously running.

Interrupt latency

The amount of time between the assertion of an interrupt signal and the start of the
associated interrupt service routine. Factors that affect interrupt latency include the length of
time that interrupts are disabled during normal program execution, processor speed, and
preemption of the processor by higher priority interrupts.

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Interrupt service routine

A small piece of software executed in response to a particular interrupt. Abbreviated ISR.

Unified Modeling Language

A standardized visual notation for communication about system specifications and design
details. Abbreviated UML.

Nonmaskable interrupt

An interrupt that cannot be disabled. Abbreviated NMI. Known as a trap (on some Intel
processors), as a level 7 interrupt (Motorola), or by other names.

Peripheral

A piece of hardware other than the processor, usually an I/O device. A peripheral can reside
within the same chip as the processor; in which case, it can be called an integrated or on-chip
peripheral.

preemptive

An operating system is said to be preemptive if it allows the running task to be suspended when a
task of higher priority becomes ready (or a task of equal priority is granted a turn).
Nonpreemptive schedulers are easier to implement but less appropriate for embedded systems,
which must be responsive to external events

Real-time system

Any computer system, embedded or otherwise, that has timeliness requirements.

Trap

An interruption of a program that is triggered by the processor own internal hardware. For
example, the processor might trap if an illegal opcode is found within the program.

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 UNIT II - ARM PROCESSOR AND PERIPHERALS

Assembler

A software development tool that translates human-readable assembly language programs into
machine-readable code that the target processor can understand and execute.

High-level language

A language, such as C, C++, Ada, or Java, that is processor independent. Abbreviated HLL.
When programming in a high-level language, it is possible to concentrate on algorithms and
applications without worrying about the details of a particular processor.

Aliasing

Allowing one memory location or register to be accessible at more than one address. Aliasing is
a result of address decoding and often happens with peripheral control and status registers. For
example, if an I/O device has just four byte-wide registers but is mapped into a 256-byte region
of memory, aliasing will occur. In this case, the same four registers can be read or written at any
of 64 different locations within that region.

firmware

Executable software that is stored within a ROM.

Flash memory

A RAM-ROM hybrid that can be erased and rewritten under software control. Abbreviated flash.
Flash is an in-circuit programmable nonvolatile memory segmented into blocks called sectors.
Each sector can be individually erased, then the data within it rewritten. Flash memory is
common in systems that require nonvolatile data storage at very low cost. In some cases, a large
flash device can be used instead of a disk drive. Although there is a theoretical limit to the
number of times a flash memory can be erased and rewritten successfully, this limit is seldom
reached in practice.

Average-case execution time

The average amount of time to execute a section of code. It may be helpful to define the jitter
and standard deviation along the average-case execution time might be interesting in some
applications, the worst-case execution time is typically of far more interest, particularly in real-
time systems.

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 UNIT III - EMBEDDED PROGRAMMING

Aperiodic

Lacking periodicity; random. The term is most often used in the embedded context when
scheduling periodic tasks via RMA. The issue of what to do about aperiodic tasks and interrupts
inevitably arises in real-world systems. Aperiodic tasks become ready to run on the occurrence
of unpredictable events.

EXAMPLE: The arrival of interrupts is often aperiodic.

Binary semaphore

A type of semaphore with just two states. Often used to guarantee mutual exclusion.

Breakpoint

A location in a program at which execution is to be stopped and control of the processor

switched to the debugger. Mechanisms for creating and removing breakpoints are provided by
most debugging tools.

Counting semaphore

A type of semaphore with more than two states. A counting semaphore is typically used to track
multiple resources of the same type. An attempt to take a counting semaphore is blocked only if
all of the available resources are in use.

Critical section

A sequence of instructions that must be executed in sequence and without interruption to

guarantee correct operation of the software. If the instructions are interrupted, a race
condition might occur.

Deadlock

An unwanted software situation in which an entire set of tasks is blocked, waiting for an event
that only a task within the same set can cause. If a deadlock occurs, the only solution is to reset
the involved set of tasks or the entire system. However, it is usually possible to prevent
deadlocks altogether by following certain software-design practices.

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Direct memory access

A technique for transferring data directly between two peripherals (or memory and an I/O
device) with only minimal intervention by the processor. Abbreviated DMA. DMA transfers are
managed by a third device called a DMA controller, which shares the memory bus with the
processor. Unused memory cycles are stolen by the DMA controller. The processor is only
involved, via an interrupt, once the entire block of data has been transferred. In that way, the
processor is freed to do other things and overall throughput is increased.

Intertask communication

The passing of data between tasks in a multitasking system. Although perverse programmers can
accomplish this communication with global variables, all decent RTOSes include extensive
resources (mailboxes, queues, etc.) to safely transfer data without risk of race conditions.

Intertask synchronization

n. The coordination of timing and ordering between tasks in a multitasking environment. All
decent RTOSes include resources (semaphores, monitors, etc.) to safely synchronize without the
risk of race conditions.

Kernel

1.A minimalist operating system.

2.The core of a microkernel architecture operating system like Mach.

3.An essential part of any real-time operating system, the kernel consists of
the scheduler and context switch routine.

Parallel processing

The capability to apply two or more processors to a single computation.

Mutex

An operating system data structure used by tasks to ensure exclusive access to shared variables
or hardware registers. Short for mutual exclusion. A mutex is a multitasking-aware binary flag
that can be used to synchronize the activities of multiple tasks. As such, it can protect critical
sections from interruption and shared resources from simultaneous accesses.

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Mutual exclusion

A guarantee of exclusive access to a shared resource. In embedded systems, the shared resource
is typically a block of memory, a global variable, a peripheral, or a set of registers. Mutual
exclusion is typically achieved with the use of a mutex.

Operating system

A piece of software that makes multitasking possible. An operating system typically consists of
a set of system calls and a periodic clock tick ISR. The operating system is responsible for
deciding which process or thread should be using the processor at any given time and for
controlling access to shared resources.

Real-time operating system

An operating system designed specifically for use in real-time systems. Abbreviated RTOS.

Semaphore

A data structure that is used for intertask synchronization. Semaphores are usually provided by
the operating system and come in two types: binary and counting. The former can be used
for mutual exclusion.

Priority

The relative urgency of one task or interrupt compared to another. In the case of tasks, the
priority is an integer and the scheduler in a preemptive priority-based operating system
compares the priorities of all that are ready to run and selects the one with the highest urgency to
run.

Priority inversion

An unwanted software situation in which a high-priority task is delayed while waiting for access
to a shared resource that is not even being used at the time. For all practical purposes, the priority
of this task has been lowered during the delay period. Priority inversion arises when a medium-
priority task preempts a lower priority task using a shared resource on which the higher priority
task is pending. If the higher priority task is otherwise ready to run, but a medium-priority task is
currently running instead, a priority inversion is said to occur.

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Race condition

A situation in which the combined effects of two or more programmatic threads (or a single
thread and an ISR) varies depending on the precise order in which the instructions of each are
executed.

Race conditions can be eliminated by surrounding critical code sections that must be executed
without interruption with a pair of mutex take and release system calls. To prevent race
conditions involving ISRs, interrupts must be disabled for the duration of the critical section.

VxWorks

A commercial real-time operating system from Wind River Systems.

Wind River Systems

The company that developed the VxWorks real-time operating system. Sometimes just Wind
River or abbreviated WRS. Since its acquisition of competitor Integrated Systems (developers of
pSOS) in 2000, Wind River has been the dominant player in the RTOS marketplace. In a 2002
survey of Embedded Systems Programming subscribers, about 60% of those reporting they used
a commercial RTOS in the past year had used one of Wind River's products.

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 UNIT IV - REAL TIME SYSTEMS

In-circuit emulator

n. A debugging tool that takes the place of (emulates) the processor on the target board.
Abbreviated ICE and often called an emulator for short. The ICE is a bridge between the target
system and a software debugger running on the host. It provides the resources needed to access
the target microprocessor. An emulator connects to or completely replaces the target CPU via a
large cable, which routes all signals to the ICE unit. In-circuit emulators frequently incorporate a
special bond-out version of the target processor that brings normally buried signals out of the
chip to the ICE's logic circuits.

JTAG

A standard for providing external test access to integrated circuits serially, via a four- or five-pin
external interface. Short for Joint Test Action Group, which developed the standard. The JTAG
standard has been adopted as an IEEE standard (IEEE 1149 Standard Test Access Port and
Boundary-Scan Architecture). JTAG ports have been widely embraced by processor
manufacturers. Debug monitors and in-circuit emulators increasingly leverage the capabilities
inherent in JTAG.

Linker

A software development tool that accepts one or more object files as input and outputs
a relocatable program. The linker is thus run after all of the source files have been compiled and
assembled into object files.

Logic analyzer

A hardware debugging tool that can capture and display the logic levels (0 or 1) of dozens, or
even hundreds, of electrical signals as they occur. Logic analyzers can be quite helpful for
debugging hardware problems and complex processor-peripheral interactions. They are primarily
characterized by their capture memory depth and width and by their acquisition speed.

Multitasking

The execution of multiple software routines in pseudoparallel. Each routine represents a separate
thread of execution. The operating system is responsible for simulating parallelism by parceling
out the processor's time to the individual threads.

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ROM emulator

A debugging tool that plugs into the target system's ROM sockets (or that attaches to the SMT
ROM parts). ROM emulators link the target system to a host computer. A plug either inserts into
the target ROM sockets, clips over SMT ROM chips, or is soldered down in place of the ROM
parts. The emulator then links this connection to the host computer over RS-232, Ethernet, or
USB.

Scheduler

The part of an operating system that decides which task to run next. The scheduler's decision is
based on the state of each task, the relative priorities of those that are ready to run, and the
specific scheduling algorithm implemented.

I2C

An inexpensive chip interconnection popular on circuit boards. Short for Inter-Integrated Circuit
bus. Featuring a two-wire synchronous (data and clock) connection, I2C can run at speeds up to
100 kHz ("standard") or 400 kHz ("high speed") and is multidrop

Universal Serial Bus

A serial protocol and physical link that transmits all data differentially on a single pair of wires.
Abbreviated USB. USB is an increasingly popular replacement for slower serial and parallel
ports, especially for connecting to general-purpose computers. In addition to higher throughput,
USB also offers the ability to power downstream devices and to connect a much larger number
of devices.

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 UNIT V - PROCESSES AND OPERATING SYSTEMS

Data compressor
Data compression, source coding, or bit-rate reduction involves encoding information using
fewer bits than the original representation.

Alarm Clock
A clock with a device that can be made to sound at the time set in advance, used to wake
someone up.

Audio player
A device capable of storing and playing digital media such as audio files. The data is typically
stored on a CD, DVD, flash memory, microdrive, or hard drive.

Software modem
a modem with minimal hardware that uses software running on the host computer, and the
computer's resources (especially the central processing unit, random access memory, and
sometimes audio processing), in place of the hardware in a conventional modem.

Digital still camera

A camera which produces digital images that can be stored in a computer and displayed on
screen.

Telephone answering machine

The answering machine, answerphone or messagemachine, also known as the telephone
answering machine(or TAM) in the UK and some Commonwealth countries, ansaphone or
ansafone (from a trade name), or telephone answering device (TAD), is used for answering
telephonesand recording callers' messages.

Engine control unit

An engine control unit (ECU), also commonly called an engine control module (ECM), is a type
of electronic control unit that controls a series of actuators on an internal combustion engine to
ensure optimal engine performance.

Video accelerator.
A video accelerator is a video card with integrated processor and memory to increase the overall
capabilities of video graphics. Today, most video accelerators are used for computer gaming

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