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    Question Paper Code:: (10×2 20 Marks)

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    rajkumarsac
    This document is a question paper for an examination on VLSI Signal Processing. It contains 16 questions divided into 3 parts - Part A contains 10 multiple choice questions worth 2 marks each, Part B contains 5 questions worth 13 marks each, and Part C contains 1 question worth 15 marks. The questions cover topics related to VLSI signal processing including data flow graphs, pipelining, parallel processing, filtering algorithms, number representations, and clocking schemes.

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    Question Paper Code:: (10×2 20 Marks)

    Uploaded by

    rajkumarsac
    860 views3 pages
    This document is a question paper for an examination on VLSI Signal Processing. It contains 16 questions divided into 3 parts - Part A contains 10 multiple choice questions worth 2 marks each, Part B contains 5 questions worth 13 marks each, and Part C contains 1 question worth 15 marks. The questions cover topics related to VLSI signal processing including data flow graphs, pipelining, parallel processing, filtering algorithms, number representations, and clocking schemes.

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    Vlsi signal processing question

    Original Title

    X86965(VL5291)

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    This document is a question paper for an examination on VLSI Signal Processing. It contains 16 questions divided into 3 parts - Part A contains 10 multiple choice questions worth 2 marks each, Part B contains 5 questions worth 13 marks each, and Part C contains 1 question worth 15 marks. The questions cover topics related to VLSI signal processing including data flow graphs, pipelining, parallel processing, filtering algorithms, number representations, and clocking schemes.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    860 views3 pages

    Question Paper Code:: (10×2 20 Marks)

    Uploaded by

    rajkumarsac
    This document is a question paper for an examination on VLSI Signal Processing. It contains 16 questions divided into 3 parts - Part A contains 10 multiple choice questions worth 2 marks each, Part B contains 5 questions worth 13 marks each, and Part C contains 1 question worth 15 marks. The questions cover topics related to VLSI signal processing including data flow graphs, pipelining, parallel processing, filtering algorithms, number representations, and clocking schemes.

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    © All Rights Reserved
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    of 3

    *X86965* Reg. No.

    Question Paper Code : X86965


    M.E./M.Tech. Degree Examinations, April/May 2021
    Second Semester
    VLSI Design and Embedded Systems
    VL5291 – VLSI Signal Processing
    (Common to M.E. Digital Signal Processing/M.E. VLSI Design)
    (Regulations 2017)

    Time : Three Hours Maximum : 100 Marks

    Answer All questions


    Part – A (10×2=20 Marks)

    1. Distinguish between DFG and DG.

    2. Define longest path matrix algorithm.

    3. What is usage of retiming in CMOS circuits ?

    4. Where we can use rank order filter ?

    5. What is the advantage of modified cook Toom algorithm over a cook Toom
    algorithm ?

    6. Why we need to combine pipelining and parallel processing in IIIR filter


    design ?

    7. Draw the bit level Dependence Graph (DG) 4×4 bit carry ripple array
    multiplication.

    8. List any four applications of distributed arithmetic.

    9. What is numerical strength reduction ?

    10. Define clock skew.


    X86965 -2- *X86965*

    PART – B (5×13=65 Marks)

    11. a) i) Draw the block diagram description of the computation y(n) = ay(n-1) + x(n).
    Analyze and represent the same computation in both conventional
    and synchronous data flow graph (DFG). (7)
    ii) Determine and analyze loop bound and iteration bound shown in Figure. (6)


    (OR)
    b) i) Draw and analyze data broadcast structure and fine grain pipeline of the
    FIR filter. (7)
    ii) Summarize in detail about pipelining and parallel processing for low
    power
    applications. (6)

    12. a) i) Illustrate with example and explain detail about an algorithm of


    unfolding. (8)
    ii) List the properties of unfolding. (5)
    (OR)
    b) i) Illustrate with example and explain in detail about odd even merge sort
    algorithm. (7)
    ii) Design an analyze the rank order filter architecture with substructure
    sharing when W=5 and L=2. (6)
    *X86965* -3- X86965

    13. a) Construct a 2×2 convolution algorithm using cook Toom algorithm with
    β=0, β=–1 and β=1. (13)
    (OR)
    b) Consider the following first order IIR filter transfer function and derive the
    filter structure with 4 level pipelining and 3 level block processing (M=4 and
    1
    L=3). H (z ) = . (13)
    1 − az −1

    14. a) Explain in detail about design Iyon’s bit serial multiplier using horner’s rule
    with neat sketches. (13)
    (OR)
    b) Obtain the CSD number for the following the 2’s complement number
    i) 0.00010110
    ii) 1.11111111. (13)

    15. a) Explain detail about the subexpression elimination and multiple constant
    multiplication with neat sketches. (13)
    (OR)
    b) Discuss in detail about wave pipelining and bundled data versus dualrail
    protocol. (13)

    PART – C (1×15=15 Marks)

    16. a) Design and analyze the clock skew in edge triggered single phase and two
    phase clocking. (15)
    (OR)
    b) Examine and describe in detail about real time applications of different DSP
    algorithms. (15)

    _______________________

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