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Shift Registrs and Uart

A register is a digital circuit that stores and moves data. A shift register is a group of flip-flops connected to shift data from one to the next on each clock cycle. Shift registers operate in four modes including serial-in parallel-out to load serial data and output it parallel. Shift registers are used for converting between serial and parallel data, as temporary storage, and in communications like UARTs. UARTs use shift registers to convert parallel to serial and vice versa for transmission, adding start/stop bits and an optional parity bit.

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0% found this document useful (0 votes)
377 views13 pages

Shift Registrs and Uart

A register is a digital circuit that stores and moves data. A shift register is a group of flip-flops connected to shift data from one to the next on each clock cycle. Shift registers operate in four modes including serial-in parallel-out to load serial data and output it parallel. Shift registers are used for converting between serial and parallel data, as temporary storage, and in communications like UARTs. UARTs use shift registers to convert parallel to serial and vice versa for transmission, adding start/stop bits and an optional parity bit.

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Sarath Chandra
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We take content rights seriously. If you suspect this is your content, claim it here.
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Register:

Def: A register is a digital circuit with two basic functions: Data storage and Data
movement.

Shift register: def: A shift register is a group of flip-flops set up in a linear fashion with
their inputs and outputs connected together in such a way that the data is shifted from one
device to another when the circuit is active.

A shift register provides the data movement function. A shift register shifts its output
once every clock cycle.

Generally, shift registers operate in one of four different modes with the basic movement
of data through a shift register being:
 Serial-in to Parallel-out (SIPO)  -  the register is loaded with serial data, one bit
at a time, with the stored data being available at the output in parallel form.
 Serial-in to Serial-out (SISO)  -  the data is shifted serially “IN” and “OUT” of
the register, one bit at a time in either a left or right direction under clock control.
 Parallel-in to Serial-out (PISO)  -  the parallel data is loaded into the register
simultaneously and is shifted out of the register serially one bit at a time under
clock control.
 Parallel-in to Parallel-out (PIPO)  -  the parallel data is loaded simultaneously
into the register, and transferred together to their respective outputs by the same
clock pulse.

 Applications of shift register:


 Converting between serial data and parallel data

Shift register is used as Parallel to serial converter, which converts the parallel data into
serial data. It is utilized at the transmitter section after Analog to Digital Converter ADC

Shift register is used as Serial to parallel converter, which converts the serial data into
parallel data. It is utilized at the receiver section before Digital to Analog Converter DAC

Shift register along with some additional gates generate the sequence of zeros and ones.
Hence, it is used as sequence generator.

 Temporary storage in a processor—scratch pad memories.


 Some arithmetic operations: multiply and divide.
 Communnications---UART
 Serial-in to Parallel-out (SIPO) Shift Register

 4-bit Serial-in to Parallel-out Shift Register


  
 The operation is as follows. Lets assume that all the flip-flops ( FFA to FFD ) have
just been RESET ( CLEAR input ) and that all the outputs QA to QD are at logic
level “0” ie, no parallel data output.
 If a logic “1” is connected to the DATA input pin of FFA then on the first clock
pulse the output of FFA and therefore the resulting QA will be set HIGH to logic
“1” with all the other outputs still remaining LOW at logic “0”. Assume now that
the DATA input pin of FFA has returned LOW again to logic “0” giving us one
data pulse or 0-1-0.
 The second clock pulse will change the output of FFA to logic “0” and the output
of FFB and QB HIGH to logic “1” as its input D has the logic “1” level on it
from QA. The logic “1” has now moved or been “shifted” one place along the
register to the right as it is now at QA.
 When the third clock pulse arrives this logic “1” value moves to the output
of FFC ( QC ) and so on until the arrival of the fifth clock pulse which sets all the
outputs QA to QD back again to logic level “0” because the input to FFA has
remained constant at logic level “0”.
 The effect of each clock pulse is to shift the data contents of each stage one place to
the right, and this is shown in the following table until the complete data value
of  0-0-0-1 is stored in the register. This data value can now be read directly from
the outputs of QA to QD.

Then the data has been converted from a serial data input signal to a parallel data
output. The truth table and following waveforms show the propagation of the logic
“1” through the register from left to right as follows. Basic Data Movement
Through A Shift Register
Clock Pulse No QA QB QC QD

0 0 0 0 0

1 1 0 0 0

2 0 1 0 0

3 0 0 1 0

4 0 0 0 1

5 0 0 0 0

4-bit Parallel-in to Serial-out Shift Register

 
As this type of shift register converts parallel data, such as an 8-bit data word into serial
format, it can be used to multiplex many different input lines into a single serial DATA
stream which can be sent directly to a computer or transmitted over a communications
line. Commonly available IC’s include the 74HC166 8-bit Parallel-in/Serial-out Shift
Registers.
Data Format Converters of Shift Registers
Serial data transmission is preferred for long distance communication due to its
economical value in terms of the wires used. This necessitates parallel-to-serial
conversion at the sender-end for which Parallel In Serial Out shift registers (PISO) can be
used. However, in general, many microprocessor based systems usually prefer parallel
form of data-in for which the transmitted data is to be converted into parallel-mode using
serial-to-parallel converter like Serial In Parallel Out shift register (SIPO).

A serial interface is a shift register that shifts data in/out one bit at a time.  The
illustration below shows how the data is loaded using a parallel load into a shift register.
After the parallel load, data is shifted out one bit at a time, starting with the least
significant bit.

UART

The UART full form is “Universal Asynchronous Receiver/Transmitter.


The main function of UART is to serial data communication.
In UART, the communication between two devices can be done in two ways namely
serial data communication and parallel data communication.

UART
Serial and Parallel Communication 
In serial data communication, the data can be transferred through a single cable or line in
a bit- by- bit form and it requires just two cables.
Serial data communication is not expensive when we compared with parallel
communication. It requires very less circuitry as well as wires.

Thus, this communication is very useful in compound circuits compared with parallel
communication.

In parallel data communication, the data can be transferred through multiple cables at
once. Parallel data communication is expensive as well as very fast, as its requires
additional hardware and cables. The best examples for this communication are old
printers, PCI, RAM, etc.

UART Block Diagram 


The UART block diagram consists of two components namely the transmitter & receiver
that is shown below.  The transmitter section includes three blocks namely transmit hold
register, shift register and also control logic. Likewise, the receiver section includes a
receive hold register, shift register, and control logic. These two sections are commonly
provided by a baud-rate-generator. This generator is used for generating the speed when
the transmitter section & receiver section has to transmit or receive the data.

The hold register in the transmitter comprises the data-byte to be transmitted. The shift
registers in transmitter and receiver move the bits to the right or left till a byte of data is
transmitted or received. A read (or) write control logic is used for telling when to read or
write.

The baud-rate-generator among the transmitter and the receiver generates the speed that
ranges from 110 bps to 230400 bps.
A UART may be used when:

High speed is not required.


An inexpensive communication link between two devices is required.
UART communication is very cheap

Single wire for each direction (plus ground wire)


Asynchronous because no clock signal is transmitted.
Simple hardware
UART FUNCTIONS:
Outbound data:

Convert from parallel to serial.


Add start and stop bits.
Add parity bit
Inbound data:
Convert from serial to parallel.
Remove start and stop bits
Check and remove parity bit.
UART Character Transmission

The start bit marks the beginning of a new word.


When detected, the receiver synchronizes with the new data stream.
Next follows the data bits (7 or 8). The least significant bit is sent first.
The parity bit is added to make the number of 1’s even(even parity) or odd (odd
parity). This bit can be used by the receiver to check for transmission errors.
The stop bit marks the end of transmission. Receiver checks to make sure it is ’1’.
Separates one word from the start bit of the next word.
UART AS Shift Register
• Standard Parallel-In/Serial-Out (PISO) shift register
• Has 4 operations:
Do nothing
Load parallel data from Din
Shift right
Reset
Applications of UART 
UART is normally used in microcontrollers for exact requirements, and these are also
available in various communication devices like wireless communication,  GPS
units, Bluetooth module, and many other applications.

The communication standards like RS422 & TIA are used in UART except for RS232.
Usually, a UART is a separate IC used in UART serial communications.
Advantages and Disadvantages of UART 
The pros and cons of UART include the following

 It requires only two wires for data communication


 CLK signal is not required.
 It includes a parity bit for allowing to check the errors
 The data packet arrangement can be modified because both surfaces are arranged
for it
 The data frame size is a max of 9 bits
 It doesn’t hold several slave (or) master systems
 The every UART baud rate should be in 10% of each other
The UART can provide input/output to a terminal program that allows the user to monitor
status and provide input.

UART Infrastructure

Required Pins
The UART interface consists of two pins: the Rx and Tx pin.  The Rx pin is used to
receive data.  The Tx  pin is used to transmit data.  When two devices are connected
using a UART, the Rx pin of one device is connected to the Tx pin of the second device.

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