Dual Power MOSFET Driver Features: File Number Data Sheet April 1999

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ICL7667

Data Sheet April 1999 File Number 2853.3

Dual Power MOSFET Driver Features


The ICL7667 is a dual monolithic high-speed driver • Fast Rise and Fall Times
designed to convert TTL level signals into high current - 30ns with 1000pF Load
outputs at voltages up to 15V. Its high speed and current
• Wide Supply Voltage Range
output enable it to drive large capacitive loads with high slew
rates and low propagation delays. With an output voltage - VCC = 4.5V to 15V
swing only millivolts less than the supply voltage and a • Low Power Consumption
maximum supply voltage of 15V, the ICL7667 is well suited - 4mW with Inputs Low
for driving power MOSFETs in high frequency switched- - 20mW with Inputs High
mode power converters. The ICL7667’s high current outputs
minimize power losses in the power MOSFETs by rapidly • TTL/CMOS Input Compatible Power Driver
charging and discharging the gate capacitance. The - ROUT = 7Ω Typ
ICL7667’s inputs are TTL compatible and can be directly • Direct Interface with Common PWM Control ICs
driven by common pulse-width modulation control ICs.
• Pin Equivalent to DS0026/DS0056; TSC426

Ordering Information Applications


PART TEMP. RANGE • Switching Power Supplies
NUMBER (oC) PACKAGE PKG. NO.
• DC/DC Converters
ICL7667CBA 0 to 70 8 Ld SOIC (N) M8.15
• Motor Controllers
ICL7667CPA 0 to 70 8 Ld PDIP E8.3

ICL7667CJA 0 to 70 8 Ld CERDIP F8.3A Pinouts


ICL7667 (CAN)
ICL7667CTV 0 to 70 8 Pin Metal Can T8.C
TOP VIEW
ICL7667MTV -55 to 125 8 Pin Metal Can T8.C
V+
(Note 1)
8
ICL7667MJA -55 to 125 8 Ld CERDIP F8.3A
OUT A 1 7 OUT B
(Note 1)

NOTE: N/C 2 6 N/C


1. Add /883B to Part Number for 883B Processing
IN A 3 5 IN B
Functional Diagram 4
V-
VCC
ICL7667 (PDIP, SOIC, CERDIP)
TOP VIEW
≈ 2mA

OUT N/C 1 8 N/C

IN A 2 7 OUT A
IN
V- 3 6 V+

IN B 4 5 OUT B

3-1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
ICL7667

Absolute Maximum Ratings Thermal Information


Supply Voltage V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15V Thermal Resistance (Typical, Note 2) θJA (oC/W) θJC(oC/W)
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . V- -0.3V to V+ +0.3V PDIP Package . . . . . . . . . . . . . . . . . . . 150 N/A
Package Dissipation, TA 25oC . . . . . . . . . . . . . . . . . . . . . . . .500mW SOIC Package . . . . . . . . . . . . . . . . . . . 170 N/A
Metal Can Package . . . . . . . . . . . . . . . 156 68
Operating Temperature Range CERDIP Package. . . . . . . . . . . . . . . . . 115 30
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
ICL7667C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
ICL7667M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
(SOIC - Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
2. θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications
ICL7667C, M ICL7667M

TA = 25oC -55oC ≤ TA ≤ 125oC

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
DC SPECIFICATIONS

Logic 1 Input Voltage VIH VCC = 4.5V 2.0 - - 2.0 - - V

Logic 1 Input Voltage VIH VCC = 15V 2.0 - - 2.0 - - V

Logic 0 Input Voltage VIL VCC = 4.5V - - 0.8 - - 0.5 V

Logic 0 Input Voltage VIL VCC = 15V - - 0.8 - - 0.5 V

Input Current IIL VCC = 15V, VIN = 0V and 15V -0.1 - 0.1 -0.1 - 0.1 µA

Output Voltage High VOH VCC = 4.5V and 15V VCC VCC - VCC VCC - V
-0.05 -0.1

Output Voltage Low VOL VCC = 4.5V and 15V - 0 0.05 - - 0.1 V

Output Resistance ROUT VIN = VIL, IOUT = -10mA, VCC = 15V - 7 10 - - 12 Ω

Output Resistance ROUT VIN = VIH, IOUT = 10mA, VCC = 15V - 8 12 - - 13 Ω

Power Supply Current ICC VCC = 15V, VIN = 3V both inputs - 5 7 - - 8 mA

Power Supply Current ICC VCC = 15V, VIN = 0V both inputs - 150 400 - - 400 µA

SWITCHING SPECIFICATIONS
Delay Time TD2 Figure 3 - 35 50 - - 60 ns

Rise Time TR Figure 3 - 20 30 - - 40 ns

Fall Time TF Figure 3 - 20 30 - - 40 ns

Delay Time TD1 Figure 3 - 20 30 - - 40 ns

NOTE: All typical values have been characterized but are not tested.

3-2
ICL7667

Test Circuits
V- = 15V
+5V
90%
INPUT
+
4.7µF 0.1µF
10%
≈0.4V
INPUT OUTPUT TD1 TD2

ICL7667 CL = 1000pF tf tr
15V
INPUT RISE AND 90% 90%
FALL TIMES ≤10ns
OUTPUT
10% 10%
0V

Typical Performance Curves

1µs 100
VCC = 15V
90 CL = 1nF
VCC = 15V
80
70

TD1 AND TD2, (ns)


100
tr AND tf , (ns)

60
tRISE TD2
50

40
10 TD1
30

tFALL 20

10
1 0
10 100 1000 10K 100K
-55 0 25 70 125
CL (pF) TEMPERATURE (oC)

FIGURE 1. RISE AND FALL TIMES vs CL FIGURE 2. TD1, TD2 vs TEMPERATURE

50 30
VCC = 15V

40 200kHz
tr AND tf
tr AND tf , (ns)

10
30
ICC (mA)

CL = 1nF
VCC = 15V 20kHz
20
3.0

10

0
1
-55 0 25 70 125 10 100 1K 10K 100K
TEMPERATURE (oC) CL (pF)

FIGURE 3. tr, tf vs TEMPERATURE FIGURE 4. ICC vs CL

3-3
ICL7667

Typical Performance Curves (Continued)

100 100

VCC = 15V
ICC (mA)

ICC (mA)
10 10 VCC = 15V

VCC = 5V
1
1
VCC = 5V

CL = 1nF
CL = 10pF
100µA 100mA
10K 100K 1M 10M 10k 100k 1M 10M
FREQUENCY (Hz) FREQUENCY (Hz)

FIGURE 5. ICC vs FREQUENCY FIGURE 6. NO LOAD ICC vs FREQUENCY

50 50

40 40
tr AND tD2 , (ns)
tD1 AND tf , (ns)

30 30
tr = TD2
tf

20 20

tD1
10
10

CL = 1nF CL = 10pF

0 0
5 10 15 5 10 15
VCC (V) VCC (V)

FIGURE 7. DELAY AND FALL TIMES vs VCC FIGURE 8. RISE TIME vs VCC

Detailed Description Input Stage


The ICL7667 is a dual high-power CMOS inverter whose The input stage is a large N-Channel FET with a P-channel
inputs respond to TTL levels while the outputs can swing as constant-current source. This circuit has a threshold of about
high as 15V. Its high output current enables it to rapidly 1.5V, relatively independent of the VCC voltage. This means
charge and discharge the gate capacitance of power that the inputs will be directly compatible with TTL over the
MOSFETs, minimizing the switching losses in switchmode entire 4.5V - 15V VCC range. Being CMOS, the inputs draw
power supplies. Since the output stage is CMOS, the output less than 1µA of current over the entire input voltage range
will swing to within millivolts of both ground and VCC without of ground to VCC. The quiescent current or no load supply
any external parts or extra power supplies as required by the current of the ICL7667 is affected by the input voltage, going
DS0026/56 family. Although most specifications are at VCC = to nearly zero when the inputs are at the 0 logic level and
15V, the propagation delays and specifications are almost rising to 7mA maximum when both inputs are at the 1 logic
independent of VCC . level. A small amount of hysteresis, about 50mV to 100mV at
the input, is generated by positive feedback around the
In addition to power MOS drivers, the ICL7667 is well suited second stage.
for other applications such as bus, control signal, and clock
drivers on large memory of microprocessor boards, where Output Stage
the load capacitance is large and low propagation delays are The ICL7667 output is a high-power CMOS inverter,
required. Other potential applications include peripheral swinging between ground and VCC. At VCC = 15V, the
power drivers and charge-pump voltage inverters. output impedance of the inverter is typically 7Ω. The high

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ICL7667

peak current capability of the ICL7667 enables it to drive a 7. Output stage I2R power loss
1000pF load with a rise time of only 40ns. Because the The sum of the above must stay within the specified limits for
output stage impedance is very low, up to 300mA will flow reliable operation.
through the series N-Channel and P-channel output devices
(from VCC to ground) during output transitions. This crossover As noted above, the input inverter current is input voltage
current is responsible for a significant portion of the internal dependent, with an ICC of 0.1mA maximum with a logic 0
power dissipation of the ICL7667 at high frequencies. It can be input and 6mA maximum with a logic 1 input.
minimized by keeping the rise and fall times of the input to the The output stage crowbar current is the current that flows
ICL7667 below 1µs. through the series N-Channel and P-channel devices that
form the output. This current, about 300mA, occurs only
Application Notes during output transitions. Caution: The inputs should never
Although the ICL7667 is simply a dual level-shifting inverter, be allowed to remain between VIL and VIH since this could
there are several areas to which careful attention must be leave the output stage in a high current mode, rapidly
paid. leading to destruction of the device. If only one of the drivers
is being used, be sure to tie the unused input to a ground.
Grounding
NEVER leave an input floating. The average supply current
Since the input and the high current output current paths drawn by the output stage is frequency dependent, as can
both include the ground pin, it is very important to minimize be seen in ICC vs Frequency graph in the Typical
and common impedance in the ground return. Since the Characteristics Graphs.
ICL7667 is an inverter, any common impedance will
generate negative feedback, and will degrade the delay, rise The output stage I2R power dissipation is nothing more than
and fall times. Use a ground plane if possible, or use the product of the output current times the voltage drop
separate ground returns for the input and output circuits. To across the output device. In addition to the current drawn by
minimize any common inductance in the ground return, any resistive load, there will be an output current due to the
separate the input and output circuit ground returns as close charging and discharging of the load capacitance. In most
to the ICL7667 as is possible. high frequency circuits the current used to charge and
discharge capacitance dominates, and the power dissipation
Bypassing is approximately
The rapid charging and discharging of the load capacitance
PAC = CVCC2f
requires very high current spikes from the power supplies. A
parallel combination of capacitors that has a low impedance where C = Load Capacitance, f = Frequency
over a wide frequency range should be used. A 4.7µF
In cases where the load is a power MOSFET and the gate
tantalum capacitor in parallel with a low inductance 0.1µF
drive requirement are described in terms of gate charge, the
capacitor is usually sufficient bypassing.
ICL7667 power dissipation will be
Output Damping PAC = QGVCCf
Ringing is a common problem in any circuit with very fast where QG = Charge required to switch the gate, in
rise or fall times. Such ringing will be aggravated by long Coulombs, f = Frequency.
inductive lines with capacitive loads. Techniques to reduce
ringing include: Power MOS Driver Circuits
1. Reduce inductance by making printed circuit board traces Power MOS Driver Requirements
as short as possible.
Because it has a very high peak current output, the ICL7667
2. Reduce inductance by using a ground plane or by closely
the at driving the gate of power MOS devices. The high
coupling the output lines to their return paths.
current output is important since it minimizes the time the
3. Use a 10Ω to 30Ω resistor in series with the output of the power MOS device is in the linear region. Figure 9 is a
ICL7667. Although this reduces ringing, it will also slightly
typical curve of charge vs gate voltage for a power MOSFET.
increase the rise and fall times.
The flat region is caused by the Miller capacitance, where
4. Use good bypassing techniques to prevent supply voltage the drain-to-gate capacitance is multiplied by the voltage
ringing.
gain of the FET. This increase in capacitance occurs while
Power Dissipation the power MOSFET is in the linear region and is dissipating
The power dissipation of the ICL7667 has three main significant amounts of power. The very high current output of
components: the ICL7667 is able to rapidly overcome this high
capacitance and quickly turns the MOSFET fully on or off.
5. Input inverter current loss
6. Output stage crossover current loss

3-5
ICL7667

Transformer Coupled Drive of MOSFETs


18
ID = 1A Transformers are often used for isolation between the logic
16
and control section and the power section of a switching
GATE TO SOURCE VOLTAGE

14 regulator. The high output drive capability of the ICL7667


VDD = 50V
12 enables it to directly drive such transformers. Figure 11
10 VDD = 375V
shows a typical transformer coupled drive circuit. PWM ICs
8 680pF with either active high or active low output can be used in
this circuit, since any inversion required can be obtained by
6
VDD = 200V reversing the windings on the secondaries.
4
630pF
2 Buffered Drivers for Multiple MOSFETs
0 212pF
In very high power applications which use a group of
-2 MOSFETs in parallel, the input capacitance may be very large
0 2 4 6 8 10 12 14 16 18 20 and it can be difficult to charge and discharge quickly. Figure
GATE CHARGE - QG (NANO-COULOMBS)
13 shows a circuit which works very well with very large
FIGURE 9. MOSFET GATE DYNAMIC CHARACTERISTICS capacitance loads. When the input of the driver is zero, Q1 is
held in conduction by the lower half of the ICL7667 and Q2 is
Direct Drive of MOSFETs clamped off by Q1. When the input goes positive, Q1 is turned
Figure 11 shows interfaces between the ICL7667 and typical off and a current pulse is applied to the gate of Q2 by the
switching regulator ICs. Note that unlike the DS0026, the upper half of the ICL7667 through the transformer, T1. After
ICL7667 does not need a dropping resistor and speedup about 20ns, T1 saturates and Q2 is held on by its own CGS
capacitor between it and the regulator IC. The ICL7667, with and the bootstrap circuit of C1, D1 and R1. This bootstrap
its high slew rate and high voltage drive can directly drive the circuit may not be needed at frequencies greater than 10kHz
gate of the MOSFET. The SG1527 IC is the same as the since the input capacitance of Q2 discharges slowly.
SG1525 IC, except that the outputs are inverted. This
inversion is needed since ICL7667 is an inverting buffer.

15V
+165VDC

IRF730
+VC +V

SG1527 ICL7667
IRF730
B

GND -V

FIGURE 10A.

15V
+165VDC

IRF730
+VC 1K +V
VOUT
C1
E1
TL494 ICL7667

IRF730
C2
E2
GND 1K -V

+15V

FIGURE 10B.
FIGURE 10. DIRECT DRIVE OF MOSFET GATES

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ICL7667

18V

CA CB VIN +V
1µF +165V
IRF730
EA

470 0V

CA1524 ICL7667
IRF730
1µF
EB

470 -165V

-V VOUT

FIGURE 11. TRANSFORMER COUPLED DRIVE CIRCUIT


V+

0.1µF 0.1µF
4.7µF
IN914
+ D1

4.7µF
R1
10k
Q2 1000pF
C1
1/2 2200pF FF10 IRFF120
ICL7667

0V - 5V 5FF10
INPUT
FROM
PWM IC
1/2 ZL
ICL7667
IRFF120
Q1

FIGURE 12. VERY HIGH SPEED DRIVER

-4
f = 10kHz
-6

-8
SLOPE = 60Ω
VOUT (V)

-10
+15V
-12

1kHz - 250kHz IN4001


SQUARE + - -14
-13.5V
WAVE
IN TTL 1/2 10µF
LEVELS ICL7667 -
IN4001 47µF
+
5 20 40 60 80 100
IOUT (mA)

FIGURE 13A. FIGURE 13B. OUTPUT CURRENT vs OUTPUT VOLTAGE


FIGURE 13. VOLTAGE INVERTER

3-7
ICL7667

Other Applications Clock Driver


Some microprocessors (such as the CDP68HC05 families)
Relay and Lamp Drivers
use a clock signal to control the various LSI peripherals of
The ICL7667 is suitable for converting low power TTL or the family. The ICL7667s combination of low propagation
CMOS signals into high current, high voltage outputs for delay, high current drive capability and wide voltage swing
relays, lamps and other loads. Unlike many other level make it attractive for this application. Although the ICL7667
translator/driver ICs, the ICL7667 will both source and sink is primarily intended for driving power MOSFET gates at
current. The continuous output current is limited to 200mA 15V, the ICL7667 also works well as a 5V high-speed buffer.
by the I2R power dissipation in the output FETs. Unlike standard 4000 series CMOS, the ICL7667 uses short
Charge Pump or Voltage Inverters and Doublers channel length FETs and the ICL7667 is only slightly slower
at 5V than at 15V.
The low output impedance and wide VCC range of the
+15V +15
ICL7667 make it well suited for charge pump circuits. Figure
13A shows a typical charge pump voltage inverter circuit and 1kHz - 250kHz IN4001
SQUARE + -
a typical performance curve. A common use of this circuit is WAVE 28.5V
IN TTL 1/2 -
to provide a low current negative supply for analog circuitry LEVELS 10µF IN4001
ICL7667 47µF
+
or RS232 drivers. With an input voltage of +15V, this circuit
will deliver 20mA at -12.6V. By increasing the size of the
capacitors, the current capability can be increased and the
FIGURE 14. VOLTAGE DOUBLER
voltage loss decreased. The practical range of the input
frequency is 500Hz to 250kHz. As the frequency goes up,
the charge pump capacitors can be made smaller, but the
internal losses in the ICL7667 will rise, reducing the circuit
efficiency.
Figure 14, a voltage doubler, is very similar in both circuitry
and performance. A potential use of Figure 13 would be to
supply the higher voltage needed for EEPROM or EPROM
programming.

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out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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