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Block Diagram

This document is a block diagram of an MT6570/80 chip. It shows the various components and connections between them including: eMMC/LPDDR3 memory, MSDC controllers, connectivity antennas, LCD interface, camera interfaces, touch sensors, audio components, SIM cards, USB, and other peripherals. It provides a high-level overview of the architecture and connectivity of the chip in 3 pages of visual diagrams labeled A through C.

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Luis Alberto Ariza
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159 views1 page

Block Diagram

This document is a block diagram of an MT6570/80 chip. It shows the various components and connections between them including: eMMC/LPDDR3 memory, MSDC controllers, connectivity antennas, LCD interface, camera interfaces, touch sensors, audio components, SIM cards, USB, and other peripherals. It provides a high-level overview of the architecture and connectivity of the chip in 3 pages of visual diagrams labeled A through C.

Uploaded by

Luis Alberto Ariza
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Project : MT6570_80
SCH TOP LEVEL
BPI, APC
eMMC+LPDDR3 MSDC0 / eMMC
or
NAND+LPDDR2

DRAM IF
D RF D

micro SD
MSDC 4-bit
MSDC1 (WG+G)
+ hot-plug RX
Main 1 ANT
TX
FEM
Connectivity ANT

WCN CLK Ctrl TSX


26M
2.4G+1575.42M WCN IF

LCD LCD IF LCD


module (MIPI DSI)

Camera IF Camera
Camera (MIPI CSI)
Modules I2C
C
I2C_0 C

Touch
I2C
i2C_1 26M_AUD

32K_OUT
MT6350
RTC
I2C
Sensor I2C_2

GPIOs
SPI LDOs LDOs
ABB Vibrator VIB
VCPU/
SIM1
SIM1
MT6350 SIM1 VCORE/
VPA Headset
Bucks (HPL, HPR, AU_VIN1)

SIM LVS Receiver


SIM2 SIM2
SIM2 Audio
AUD I/F AU_VIN0 => mic1
Audio I/F Speech

B
SPI AU_VIN2 => mic2 B

GPIOs PWRAP I/F


I2S3
Class D/AB

Keypad Keypad
BC 1.1 BC1.1

MSDC1/Camera
JTAG
/SPI Pin-MUX JTAG
Debug UART
port
UART1 Charger /

GPIOs
UART2 MT6580 PP Battery

USB
A A

USB 2.0 micro USB

USB 2.0

Title
01_Block Diagram
Size
C

Date:
MTK Confidential
Monday, April 27, 2015 Sheet 1 of 99
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