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This document describes a solution to generate a 5 minute delay using an 8254 timer. It uses two counters, with counter zero generating a 1MHz clock signal and counter one counting down each pulse. To achieve a 5 minute delay, the counters are loaded with values that will take 300 million clock cycles to complete. Specifically, counter zero is loaded with 7530H and counter one with 2710H. The necessary control words and addresses to initialize and load the counters are provided. An interrupt is generated when the delay is complete, which turns on LEDs to indicate the delay has finished.

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Hamza Abu Ajamia
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87 views

Assignments 3

This document describes a solution to generate a 5 minute delay using an 8254 timer. It uses two counters, with counter zero generating a 1MHz clock signal and counter one counting down each pulse. To achieve a 5 minute delay, the counters are loaded with values that will take 300 million clock cycles to complete. Specifically, counter zero is loaded with 7530H and counter one with 2710H. The necessary control words and addresses to initialize and load the counters are provided. An interrupt is generated when the delay is complete, which turns on LEDs to indicate the delay has finished.

Uploaded by

Hamza Abu Ajamia
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Microprocessor and Interfacing II                   Hamza Abu Ajamia 

Assignment 3 
 
Problem 
Write the necessary software to operate an 8254 timer with a 5 minutes delay 
 
Solution 
1MHZ CLK for Counter Zero 
The CLK input for Counter One is connected to the OUT of Counter Zero 
The gate for Counter Zero and Counter One is always logic 1 
The output of Counter one is connected to RST 5.5 
 
A 1MHz Clock input means a 1µs for every clock cycle 
5 Minutes = 5 x 60 second 
       = 300 x 106 µs 
So we need a delay procedure that employs a 300 x 106 cycle, which is a very large number 
 
300,000,000 = 30,000* 10,000 
11E1A300H   = 7530H x 2710H 
 
So if employ two counters 
Counter Zero in Mode 2: Rate Generator Clock 
    It is first set to mode 2 using the control word 
 Then the number 7530H is loaded within it 
Counter One in Mode 0,  
   The number 2710H is loaded within it 
 Where it decreases by 1 every time Counter Zero outputs a pulse 
 
 
Control word for Counter Zero – 36H 
SC1  SC0  RW1  RW0  M2  M1  M0  BCD 
0  0  1  1  0  1  1  0 
 
 
Control word for Counter One – 70H 
SC1  SC0  RW1  RW0  M2  M1  M0  BCD 
0  1  1  1  0  0  0  0 
 
Assuming peripheral addressing for the chip, where A1,A0 are connected to their respective 
counterparts, and A7’ is connected to CS 
So 
Address (Counter Zero) =80H 
Address (Counter One) =81H 
Address (Control Word) =83H 
 
<Code NEXT page> 
ProgramStart  MVI A,70H  Initialize Counter One 
  OUT 83H   
  MVI A,10H  2710H 
  OUT 81H   
  MVI A,27H   
  OUT 81H   
     

  MVI A,36H  Initialize Counter Zero 
  OUT 83H   
  MVI A,30H  7530H 
  OUT 80H   
  MVI A,75H   
  OUT 80H   
     

  EI  Wait for Interrupt 
INFINITE  NOP   
  JMP  INFINITE   
     
002CH  JMP DelayAchieved  RST 5.5 
     
DelayAchieved  MVI A,00H  Interrupt Handler, Turns on LEDS connected on 
  OUT LEDPORT  LEDPORT 
  JMP DelayAchieved   
  HLT   
 

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