Scribd
Upload
559 views2 pages

16EC454 ASIC Design Syllabus

This document outlines the syllabus for a course on ASIC design. The course is divided into 5 units that cover topics such as ASIC types and design flow, programmable ASIC logic cells, interconnects, logic synthesis and simulation, and physical design. Evaluation includes lectures, tutorials, and a written exam. The goals are for students to understand circuit design at the transistor level for FPGAs, analyze issues in industrial ASIC design, learn FPGA interconnect techniques, appreciate algorithms for ASICs, and demonstrate understanding of VLSI tool flows and FPGA architecture. References and online resources are also provided.

Uploaded by

Gautami Suman
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
559 views2 pages

16EC454 ASIC Design Syllabus

This document outlines the syllabus for a course on ASIC design. The course is divided into 5 units that cover topics such as ASIC types and design flow, programmable ASIC logic cells, interconnects, logic synthesis and simulation, and physical design. Evaluation includes lectures, tutorials, and a written exam. The goals are for students to understand circuit design at the transistor level for FPGAs, analyze issues in industrial ASIC design, learn FPGA interconnect techniques, appreciate algorithms for ASICs, and demonstrate understanding of VLSI tool flows and FPGA architecture. References and online resources are also provided.

Uploaded by

Gautami Suman
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 2

16EC45 ASIC DESIGN L T P C

4 3 0 0 3
UNIT-I INTRODUCTION TO ASICS, CMOS LOGIC AND ASIC 9
LIBRARY DESIGN
Types of ASICs – Design flow –CMOS transistors, CMOS Design rules – Combinational Logic Cell -
Sequential Logic Cell – Data path Logic cell – Transistors as Resistors.

UNIT-II PROGRAMMABLE ASICS, ASIC LOGIC CELLS 9

Anti fuse – Static RAM – EPROM and EEPROM Technology. Actel ACT - Altera MAX.
UNIT-III PROGRAMMABLE ASIC INTERCONNECT 9

Actel ACT -Xilinx LCA - Xilinx EPLD - Altera MAX 5000 and 7000- - Altera MAX 9000. Design
systems - Logic Synthesis - Half gate ASIC –Schematic entry.
UNIT-IV LOGIC SYNTHESIS, SIMULATION AND TESTING 9
VHDL and logic synthesis - types of simulation – fault models - fault simulation - automatic test pattern
generation.
UNIT-V CAD, PLACEMENT AND ROUTING 9

Y-Chart – Structural, Behavioural, Physical domains - physical design flow - placement– Routing and
its types.

L:45 T:0 T: 45 PERIODS

TEXT BOOKS
1. M.J.S .Smith, "Application Specific Integrated Circuits”, Addison –Wesley Longman Inc., 1997.
[Unit I- V]
2. Jose E France, Yannis Tsividis, “Design of Analog – Digital VLSI Circuits for Telecommunication
and Signal Processing”, Prentice Hall, 1994. [Unit I- V]
REFERENCES
1. FarzadNekoogar and FaranakNekoogar, “From ASICs to SOCs: A Practical Approach”, Prentice
Hall PTR, 2003.[Unit I - IV]
2. Weste and Harris : “CMOS VLSI Design”, Third Edition, Pearson Education, 2005. [Unit 1]
3. P.K.Lala, “Digital Circuit Testing and Testability”, Academic Press, 2002 [Unit IV].
4. N.A.Sherwani, “Algorithms for VLSI Design Automation ”, Kluwer Academic Publishers, 2002
[Unit V]
5. S.H.Gerez, “Algorithms for VLSI Design Automation” – John Wiley & Sons, 2002. [Unit V]

WEB RESOURCES
1. https://www.eda.ncsu.edu/wiki/Tutorial:ASIC_Design_Tutorials
2. http://unixlab.sfsu.edu/~necrl/files/synopsys%20tutorials/ASIC%20Design.pdf
3.http://www.eit.lth.se/fileadmin/eit/courses/etin01/manual_etc/dasic.pdf
4.http://nptel.ac.in/courses/106106089/magma_tutorial/magma_tutorial.html
5.http://www.tutorial-reports.com/hardware/asic/tutorial.php

COURSE OUTCOMES
At the end of the course the student will be able to
CO 1 : Evaluate the circuit design aspects at the transistor and block level abstractions of FPGA
CO 2: Analyze the issues related to entry-level industrial standard ASIC.
CO 3: Familiarize interconnects with corresponding design techniques related to FPGA.
CO 4: Appreciate high performance algorithms available for ASICs.
CO 5: Demonstrate VLSI tool-flow and appreciate FPGA architecture

You might also like