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EE 101 Basic Electronics

This document outlines the course content for EE 101: Basic Electronics. It covers topics such as number systems, basic logic, describing logic circuits, combination circuits, half adders and full adders, integrated circuits, and multiplexers. The author's biography is also provided. Key concepts discussed include Boolean algebra, logic gates, Karnaugh maps, and binary, octal, and hexadecimal number systems.

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0% found this document useful (0 votes)
328 views20 pages

EE 101 Basic Electronics

This document outlines the course content for EE 101: Basic Electronics. It covers topics such as number systems, basic logic, describing logic circuits, combination circuits, half adders and full adders, integrated circuits, and multiplexers. The author's biography is also provided. Key concepts discussed include Boolean algebra, logic gates, Karnaugh maps, and binary, octal, and hexadecimal number systems.

Uploaded by

Kaivaly Daga
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 20

EE 101 : Basic Electronics

EE 101 : Basic Electronics


Chinmay Makarand Pimpalkhare
Autumn Semester 2021

Contents
1 Number Systems 3

2 Basic Logic 7

3 Describing Logic Circuits 9


3.1 Boolean Constants and Variables . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2 Truth Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.3 Logic Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.4 The OR Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.5 The AND Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.6 The NOT Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.7 Integrated Circuits (ICs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.8 Boolean Algebra . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.9 Boolean Theorems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.10 NAND gate as a universal gate . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.11 Alternate Logic Gate Expressions . . . . . . . . . . . . . . . . . . . . . . . . 13
3.12 Some Neat Tricks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4 Combination Circuits 15
4.1 Karnaugh Maps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

5 Half Adder and Full Adder 16


5.1 Half adder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.2 Full Adder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

6 Integrated Circuits (ICs) 17

7 Multiplexer 19

1
EE 101 : Basic Electronics

About the Author

The following is a depiction of the author’s life in an accurate and succinct manner.

Page 2 of 19
EE 101 : Basic Electronics

1 Number Systems
Whenever we write any number, it is imperative to also specify the base since the face values
for e.g. “72” corresponds to different actual values as per the base.

728 = 5810 = 3A16

In a positional notation, the leftmost digit is the MSD. The rightmost is the LSD.
The maximum number that we can represent using a binary system with radix ‘r’ = 2r − 1.
Consider, the binary point in a number. Then, to the left the positional weights vary
as 21 , 22 , 23 , . . . while to the right they vary as 2−1 , 2−2 , 2−3 , . . ..

Why are octal and hexadecimal systems important?


Answer : Since, for very large numbers, converting directly to binary is cumbersome, these
steps help in adding extra steps to simplify the task.

Converting octal to binary : Replace each octal digit by its equivalent 3-bit sequence.
Note that the octal point becomes the binary point.

(673.12)8 = (110111011.001010)2

You might want to replace the leading zero on getting the binary representation, and it is
fine to do so. However, while going from binary to octal, we must make groups of three
starting from the binary point.

Suppose we wanted to find out the binary representation of the number 598610 . Then using
repetitive division by 2 takes 13 divisions while using division by 16 takes just 3!

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EE 101 : Basic Electronics

Sometimes, we wish to say “DON’T CARE” while talking about some of the bits. The
notation used in such a case is an 6.

In BCD, it is customary to leave a space between two distinct 4-bit sequences to avoid
confusion with the binary system.

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EE 101 : Basic Electronics

TUTORIAL - 1 : Number System and Logic Gates

Question 1 : Convert the following BCD number to decimal. : (11111000001)BCD .


Answer : Note that this on conversion to decimal becomes 7X110 . The ‘X’ means
that the number does not have any decimal equivalent.

Question 2 : Find r such that (222)r = (116)7 .


Answer : Expand 222 in the r-radix system to get a quadratic in r. Discard the
negative value of r, since we don‘t do that here.

Imp point : To store 6 bits, we need a full byte.

Doubt : Does saying something such as ‘4.1 bytes’, ‘2.75 bytes’ make sense?
Although this can be done for MB, GB, this can’t be done for a byte. This is more of
a standard.

Read more about One’s Complement

In general, one can also find the r’s Complement of a number, read about it
here.

Imp point : If final carry is generated in 1s complement, the result is positive


and is in its true form.
If it is not generated, then the result is negative and is in its respective complement
form.

Imp point : In 2’s complement, the final carry, if any, has to be discarded.
If there is no carry, the answer found is negative, and we need to find its 2’s
complement. (Will the final reported answer contain a - sign?).

Imp point : r-Complement = 1 + (r-1)-Complement.

Doubt : What exactly is the point of 1’s and 2’s complement? How does the
computer do it actually?
Binary: Plusses and Minuses (Why We Use Two’s Complement) - Computerphile.
Short answer : we use it to represent negative numbers.

Doubt : How do you differentiate between -1 and 3?


There’s something called the sign bit for this.

Page 5 of 19
EE 101 : Basic Electronics

Imp point : To find out the logical relation satisfied by a combination of logic gates,
start from right to left, i.e. from the last relation and then keep breaking them
down.
To find out the output given the inputs as well as the gate structure, start from left
to right. Imp point : EXOR gate has the following logical relation - A⊕B = AB+BA

Read more about Logic Gates here; this also contains a few good examples to try out.

Imp point : 2’s complement of a number Y is equal to -Y.

Page 6 of 19
EE 101 : Basic Electronics

2 Basic Logic
The concept of ENABLE and DISABLE :
The input that is ‘ENABLED’ is in its active state while the one is ‘DISABLED’ is in its
inactive state.

Sometimes, we see some components being drawn with a bubble. This bubble denotes in-
version.

Suppose we need a ‘high’ voltage to enable a gate/circuit, it is termed as an Active-High


Enable. On the other hand, if an inversion, or a ‘low’ voltage to enable a gate, we term it
as an Active-Low Enable.

Active High and Active Low


This just describes how the pin is activated. If it’s an active-low pin, you must “pull”
that pin LOW by connecting it to ground. For an active high pin, you connect it to
your HIGH voltage (usually 3.3V/5V).

For example, let’s say you have a shift register that has a chip enable pin, CE.
If you see the CE pin anywhere in the datasheet with a line over it like this, CE, then
that pin is active-low. The CE pin would need to be pulled to GND in order for the
chip to become enabled. If, however, the CE pin doesn’t have a line over it, then it is
active high, and it needs to be pulled HIGH in order to enable the pin.

Page 7 of 19
EE 101 : Basic Electronics

Karnaugh Maps (K-Maps)

A Karnaugh map (K-map) is a pictorial method used to minimize Boolean expressions


without having to use Boolean algebra theorems and equation manipulations. A
K-map can be thought of as a special version of a truth table .

Using a K-map, expressions with two to four variables are easily minimized. Expres-
sions with five to six variables are more difficult but achievable, and expressions with
seven or more variables are extremely difficult (if not impossible) to minimize using a
K-map.

Link to Wikipedia page

YT video explaining Karnaugh Maps

Page 8 of 19
EE 101 : Basic Electronics

3 Describing Logic Circuits


3.1 Boolean Constants and Variables
Boolean Algebra allows only two values 0 and 1. Anything in between is indeterminate.
- Logic 0 : false , off, low, no, open switch.
- Logic 1 : true, yes, on, high, closed switch .

There are 3 basic logical expressions : AND, OR and NOT.

3.2 Truth Tables


The number of inputs for n-input truth table is 2n . ( For the simplest of truth tables).
To systematically write a truth table, we keep toggling the bits starting from the LSB.

A B C x
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1

A table that goes through ‘n’ states (normally n shall be of the form 2k is known as a
MOD-n truth table.

3.3 Logic Gates


A few things to note :
1. The VCC and GROUND pins are different from the input pins. The input pins are for
the logical operations; on the other hand the VCC and GROUND pins are for the electrical
functioning of the gate. Without it being powered it won’t be able to operate.

3.4 The OR Gate


The Boolean expression for the OR gate is

X =A+B
We read this as ‘X is true if at least one of A,B is true’.

Page 9 of 19
EE 101 : Basic Electronics

A B X=A+B
0 0 0
0 1 1
1 0 1
1 1 1

A nice application : Suppose we want to design an alarm that runs off if either the
temperature or the pressure exceeds the limit.

Applying a ‘CONSTANT HIGH’ through the controllable input for an OR gate will
DISABLE the gate since it will always lead to a HIGH output.

3.5 The AND Gate


The Boolean expression for the AND gate is

X =A·B
We read this as ‘X is true if both A,B are true’.

It is commonly known as a coincidence gate.

Applying a ‘CONSTANT LOW’ through the controllable input for an OR gate will
DISABLE the gate since it will always lead to a LOW output.

A B X=A·B
0 0 0
0 1 0
1 0 0
1 1 1

3.6 The NOT Gate


The Boolean expression for the NOT gate is

X = Ā
We read this as ‘X is true if A is false’.
The NOT gate ‘INVERTS’ the input.

The NOT Gate always has only a single input, and the output is always the opposite of
the input.

Page 10 of 19
EE 101 : Basic Electronics

A bubble is used to denote inversion.


The triangle that represents the NOT gate is a BUFFER.

The NOT gate complements the waveform.

Digital Buffer
A digital buffer (or a voltage buffer) is an electronic circuit element that is used
to isolate the input from the output, providing either no voltage or a voltage that
is same as the input voltage. It draws very little current and will not disturb the
original circuit.

A voltage buffer has a very high input impedance (the opposition to current
flow viewed from the load). The high input impedance is the reason a voltage buffer
is used. A circuit with a voltage buffer will always draw a little amount of current
because of the high input impedance of the buffer. As a result, the power source will
not be affected.

The digital buffer is important because it can control the on and off of data
transmission, which is used widely in the world of registers (sophisticated data storage
device) and buses (data transferring device).

Link to Wikipedia page

3.7 Integrated Circuits (ICs)


Integrated Circuits (ICs)
An IC is a collection of electronic components, resistors, transistors, capacitors, etc.,
all stuffed into a tiny chip, and connected together to achieve a common goal. They
come in all sorts of flavors: single-circuit logic gates, op amps, 555 timers, voltage
regulators, motor controllers, microcontrollers, microprocessors, FPGAs...the list just
goes on-and-on.

For more on ICs ...

For an IC, The first and foremost thing to note is that the VCC always has to be con-
nected to positive voltage while the ground is connected to zero voltage.

CR delay/ Propagation Delay :


Lesser number of components in an IC → lesser capacitance → lesser time delay → faster
speed.

Page 11 of 19
EE 101 : Basic Electronics

Hence, NAND Gates are used as the building blocks since they have the least number of
inputs.
They are preferred over AND gates for the same reason.
Note that the making of a NAND gate requires only 4 transistors, so does making a NOT
gate. This is how it is done.
Diode-Transistor Logic (DTL)
Diode–transistor logic (DTL) is a class of digital circuits that is the direct ancestor
of transistor–transistor logic. It is called so because the logic gating function (e.g.,
AND) is performed by a diode network and the amplifying function is performed by
a transistor.

Link to Wikipedia page

3.8 Boolean Algebra


Hierarchy :
If an expression contains AND and OR gates, AND would be performed first.
Parantheses should be solved first in such a case though.

Whenever an inverter is present, the output is shown to be the input with a bar written
over it.

While drawing a logic circuit, remember to draw a jumper to show that two logic lines
do not intersect.

♠ Is there a way to know if the number of gates being used is the minimum?
There is something known as The Redundancy Theorem or The Consensus Theorem.
Also, alternatively, Karnaugh Maps can be used for this. Read more about how this is done

Implementing Circuits from Boolean Expressions :


• The expression X = A · B · C, could be drawn as a three-input AND gate.
• A circuit defined by X = A + B, would use a two-input OR gate with an INVERTER on
one of the inputs.

Page 12 of 19
EE 101 : Basic Electronics

3.9 Boolean Theorems


1. x + 0 = x
2. x + 1 = x
3. x + x = x
4. x + x = 1
5. x · 0 = 0
6. x · 1 = x
7. x · x = x
8. x · x = 0
9. (x + y) = x · y DeMorgan’s Law-1
10. x · y = x + y DeMorgan’s Law-2
11. x + xy = x
12. x + xy = x + y
13. x + xy = x + y

3.10 NAND gate as a universal gate


A Shorted NAND Gate works like a NOT gate. Then, AND and OR can be obtained by
using a combination of NAND gates and shorted NAND gates.

3.11 Alternate Logic Gate Expressions


Active HIGH - an input/output has no inversion bubble .
Active LOW - an input/output has an inversion bubble.

3.12 Some Neat Tricks


1. If we have an asymmetric expression like X = ABC + ABC + ABC + ABC, make it
symmetric by adding 2 ABCs, since x + x = x, so that it becomes

X = ABC + ABC + ABC + ABC + ABC + ABC


X = ABC + ABC + ABC + ABC + ABC + ABC
X = AB + BC + CA

Page 13 of 19
EE 101 : Basic Electronics

TUTORIAL - 2 : DEFYING LOGIC


Something cool :

(X + Y ) · (X + Z) = X + Y · Z
X · (X + Y ) = X

Dual : To obtain the ‘dual’ of a logical statement :

1. Replace all the ‘AND’ functions by ‘OR’ functions and vice-versa.

2. Replace all the 1s by 0s and vice-versa.

Duality in logic.

stackexchange thread regarding Dual and Complement


stackexchange thread ‘Finding the Complement of a Boolean Expression’

For Sum of Products, look at the 1s in the output column of the truth
table.
For Product of Sums, look at the 0s in the output column of the truth table.

Geeks for geeks ‘Canonical form of an expression’

Page 14 of 19
EE 101 : Basic Electronics

4 Combination Circuits
4.1 Karnaugh Maps
♣Imp point : While moving from one row/column to another in a Karnaugh map, one must
always take care that only one of the variables is complemented.

allowed : AB → AB → AB → AB

not allowed : AB → AB → AB → AB
Convention : We shall use the following order : AB → AB → AB → AB

♣Imp point : The indices of the cells of a Karnaugh map are decided by the binary value
produced at the cell. Put a 0 whenever a variable appears in the form of a complement and
a 1 when it appears naturally. 1

ABCD ≡ (0101)2 ≡ 0 + 4 + 0 + 1 = 5

♣Imp point : Loops can help a lot in simplifying a Boolean expression. Loops of 1s can
consist of 2,4,8 elements.
A Beautiful Resource : Rules for Looping in K-Maps

♣Imp point : The final solution expression is to be generated by finding the OR sum.

♣Imp point : ‘DON’T CARE’ terms can be converted to a 0 or a 1, whichever makes


life easier.

1
There is a bit of ambiguity in deciding whether a complement is to be given the value of a 0 or a 1. This
will change the cell indices for sure, but it probably should not affect the other properties.

Page 15 of 19
EE 101 : Basic Electronics

5 Half Adder and Full Adder


• Binary adders - Philadelphia Edu

• Adder and Subtractor - NISER

• Full Adder - Science Direct

• Wikipedia page

5.1 Half adder


Sum = A ⊕ B
Carry = AB

5.2 Full Adder


Sum = (A ⊕ B) ⊕ Cin

Page 16 of 19
EE 101 : Basic Electronics

6 Integrated Circuits (ICs)


An IC is a collection of electronic devices such as transistors, diodes, and resistors that
have been fabricated and electrically intraconnected onto a small flat chip of semiconductor
material (called the substrate.

The complexity of the IC depends on the scale of integration (the number of logic gates
in the IC).
Levels of IC integration

The Dual Inline Package (DIP) contains two parallel lines of pins. The pins are num-
bered counter-clockwise, when viewed from the top. The actual chip is much more smaller
than the DIP. The silicon chip is connected to the pins of the IC by very fine (thin) wires.
Dual Inline Package - Wikipedia page.

ICs are also categorized on the basis of type of components used in their circuits.
Bipolar ICs use NPN and PNP transistors.
Unipolar ICs use MOSFET and JFET (transistors).

Differences between the TTL devices is limited to electrical characteristics such as power
dissipation and switching speed. Pin layout and logic operations remain the same.

Inputs that are not connected in an IC are called floating.


Floating inputs act like a logic 1.
Voltage measurement may appear indeterminate, but the device behaves as if there is a 1
on the floating input.
Floating CMOS inputs can cause overheating and damage to the device.
Some ICs have protection circuits built in.
One of the methods used is to tie all the unused inputs, and set them to either high or low.

Logic Levels
Logic gate circuits are designed to input and output only two types of signals: “high” (1)
and “low” (0), as represented by a variable voltage: full power supply voltage for a “high”
state and zero voltage for a “low” state. In a perfect world, all logic circuit signals would
exist at these extreme voltage limits, and never deviate from them (i.e., less than full voltage
for a “high,” or more than zero voltage for a “low”).
However, in reality, logic signal voltage levels rarely attain these perfect limits due to stray
voltage drops in the transistor circuitry, and so we must understand the signal level limita-
tions of gate circuits as they try to interpret signal voltages lying somewhere between full
supply voltage and zero.
Logic Signal Voltage Levels

Troubleshooting Digital Systems


There are 3 basic steps in fixing a digital system that has a fault/failure.

Page 17 of 19
EE 101 : Basic Electronics

• Fault Detection : determined operation to expected operation

• Fault isolation : test and measure to isolate the fault

• Fault correction : repair the fault

The basic troubleshooting tools are the logic scope, oscilloscope and the logic pulser.

Page 18 of 19
EE 101 : Basic Electronics

7 Multiplexer

Figure 1: A multiplexer

A multiplexer works as a Data Selector. The short form used for it is MUX.
The SELECT inputs decide which input gets transmitted to the output.

Suppose there is only one SELECT input, ‘S’. If S is 0, I0 will be transmitted, while if
S is 1, I1 will be transmitted.

Similarly, for a 4 × 1 MUX,

For S0 = 0, S1 = 0, Z = I0
For S0 = 0, S1 = 1, Z = I1
For S0 = 1, S1 = 0, Z = I2
For S0 = 1, S1 = 1, Z = I3

How the 74ALS151 MUX works

Page 19 of 19

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