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MicroProcessor Assignment2

The document contains questions and answers about microprocessor architecture and memory addressing. 1) The Destination Index register (DI) is used as an offset address for string instructions in microprocessors. The EAX, EBX, ECX, EDX, ESI, EDI registers hold offset addresses for data in Pentium 4 processors. 2) Memory is addressed using a combination of the stack segment and the stack pointer (SP) or frame pointer (BP) registers depending on whether it is the stack or data segment being accessed. 3) Protected mode allows access to memory areas both below and above 1MB in 80286, and up to 64 terabytes in Pentium 4. Segment registers select descriptors

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100% found this document useful (1 vote)
5K views

MicroProcessor Assignment2

The document contains questions and answers about microprocessor architecture and memory addressing. 1) The Destination Index register (DI) is used as an offset address for string instructions in microprocessors. The EAX, EBX, ECX, EDX, ESI, EDI registers hold offset addresses for data in Pentium 4 processors. 2) Memory is addressed using a combination of the stack segment and the stack pointer (SP) or frame pointer (BP) registers depending on whether it is the stack or data segment being accessed. 3) Protected mode allows access to memory areas both below and above 1MB in 80286, and up to 64 terabytes in Pentium 4. Segment registers select descriptors

Uploaded by

Ritika
Copyright
© © All Rights Reserved
Available Formats
Download as ODT, PDF, TXT or read online on Scribd
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Ques 16.

Which register or registers are used as an offset address for the string
instruction destination in the microprocessor?

Ans. The Destination Index register is used as an offset address for the
string instruction destination in the microprocessor. DI is a 16-bit register.
It is used in the pointer addressing of data and as a destination in some
string related operations.

Ques 17. Which 32-bit register or registers are used to hold an offset address for
data segment data in the Pentium 4 microprocessor?
Ans. The EAX, EBX, ECX, EDX, ESI, EDI registers are used as an offset
address for data segment data in the Pentium 4 processor.

Ques 18. The stack memory is addressed by a combination of the _________


segment plus _________ offset.
Ans. The stack memory is addressed by a combination of the Stack
segment plus SP or ESP offset.

Ques 19. If the base pointer (BP) addresses memory, the _________ segment
contains the data.
Ans. If the base pointer (BP) addresses memory, the Stack segment
contains the data.

Ques 20. Determine the memory location addressed by the following real mode
80286 register
combinations:
(a) DS = 1000H and DI = 2000H
Ans. DS = 10000H, DI = 2000H
Memory Location Accessed = DS + DI
= 10000H + 2000H
= 12000H

(b) DS = 2000H and SI = 1002H


Ans. DS = 20000H, DI = 1002H
Memory Location Accessed = DS + DI
= 20000 + 1002H
= 21002H

(c) SS = 2300H and BP = 3200H


Ans. DS = 23000H, DI = 3200H
Memory Location Accessed = DS + DI
= 23000 + 3200H
= 26200H

(d) DS = A000H and BX = 1000H


Ans. DS = A0000H, DI = 1000H
Memory Location Accessed = DS + DI
= A0000 + 1000H
= A1000H
(e) SS = 2900H and SP = 3A00H
Ans. DS = 29000H, DI = 3A00H
Memory Location Accessed = DS + DI
= 29000H + 3A00H
= 3F12DH

Ques 21. Determine the memory location addressed by the following real mode
Core2 register
combinations:
(a) DS = 2000H and EAX = 00003000H
Ans. DS = 20000H, EAX = 00003000H
Memory Location Accessed = DS + EAX
= 20000H + 00003000H
= 23000H

(b) DS = 1A00H and ECX = 00002000H


Ans. DS = 1A000H, ECX = 00002000H
Memory Location Accessed = DS + ECX
= 1A000H + 00002000H
= 1C000H

(c) DS = C000H and ESI = 0000A000H


Ans. DS = C0000H, ESI = 0000A000H
Memory Location Accessed = DS + ESI
= C0000H + 0000A000H
= CA000H
(d) SS = 8000H and ESP = 00009000H
Ans. DS = 80000H, ESP = 00009000H
Memory Location Accessed = DS +ESP
= 80000H + 00009000H
= 89000H

(e) DS = 1239H and EDX = 0000A900H


Ans. DS = 12390H, EDX = 0000A900H
Memory Location Accessed = DS + EDX
= 12390H + 0000A9000H
= 1CC90H

Ques 22. Protected mode memory addressing allows access to which area of the
memory in the 80286 microprocessor?
Ans. Below 1 MB and above 1 MB.

Ques 23 .Protected mode memory addressing allows access to which area of the
memory in the Pentium 4 microprocessor?
Ans. 64 TeraBytes.

Ques 24. What is the purpose of the segment register in protected mode
memory addressing?
Ans. In protected mode memory addressing the segment register is a
selector that selects the descriptor from a descriptor table. It also sets privi-
lege level of the request and chooses either the global
or local table.

Ques 25 .How many descriptors are accessible in the global descriptor table in
the protected mode?
Ans. 8192 descriptors. Each descriptor table contains 8192 descriptors, so a
total of 16,384 total descriptors are available.
Ques 26. For an 80286 descriptor that contains a base address of A00000H and
a limit of 1000H, what starting and ending locations are addressed by this
descriptor?
Ans. Base address = A00000H Limit = 1000H
Starting Address = A000000H
Ending Address = Base Address + Limit
= A00000H + 1000H
= A010000H

Ques 27. For a Core2 descriptor that contains a base address of 01000000H, a
limit of 0FFFFH, and G = 0 , what starting and ending locations are addressed
by this descriptor?
Ans. Starting address = 01000000H
Since, G = 0, we will limit will be the same.
Ending address = 01000000H + 0FFFFH
= 0100FFFFH

Ques 28. For a Core2 descriptor that contains a base address of 00280000H, a
limit of 00010H, and G = 1 , what starting and ending locations are addressed
by this descriptor?
Ans. Starting address = 00280000H
Since, G = 1, value of the limit is mutliplied 4K bytes( append FFF to the
limit)
Limit = 00010FFFH

Ending address = 00280000H + 00010FFFH


= 00290000H

Ques 29. If the DS register contains 0020H in a protected mode system, which
global descriptor table entry is accessed?
Ans. In the DS register,
DS = 0020H
DS = 0000 0000 0010 0000H
So, TI = 0
th
4 entry of global descriptor table will be accessed.
Ques 30. If DS = 0103H in a protected mode system, the requested privilege
level is _________.
Ans. 0103 = 0000 0001 0000 0011
RPL = 11

Ques 31. If DS = 0105H in a protected mode system, which entry, table, and
requested privilege level are selected?
Ans. 0105H = 0000 0001 0000 0101b.
From this, we can say that the requested privilege level is high(01), table
is local table, entry is 0 0000 0010 0000b = 20H
32th entry

Ques 32. What is the maximum length of the global descriptor table in the
Pentium 4 microprocessor?
Ans. No of entries in the global descriptor table is 8192
Each descriptor is 8 bytes long,
so max length of the global decriptor table = 8192 * 8
= 64K bytes

Ques 33. Code a descriptor that describes a memory segment that begins at
location 210000H and ends at location 21001FH. This memory segment is a
code segment that can be read. The descriptor is for an 80286 microprocessor.

Ans. Staring = 210000H Ending = 21001FH


Base address = 210000 0H
Limit = 21001FH – 210000H
= 001FH
0000 0000 0000 0000 21H

0000H 001FH

Access Right ->

P D P L S E ED/C R/W A

1 1 1 1 1 1 1 0
We assume DPL 11 and ED/C = 1, we assume that segment not accessed yet since
code is read R =1 and memory segment is in code segment E =1 and S =1

Therefore Access right = FEH

0000 0000 0000 0000 FE 21H

0000H 001FH

Ques 34. Code a descriptor that describes a memory segment that begins at
location 03000000H and ends at location 05FFFFFFH. This memory segment is
a data segment that grows upward in the memory system and can be written.
The descriptor is for a Pentium 4 microprocessor.

G D 0 AV Limit
03H 1 1 0 1 FFF F2H 00H

0000H 2FFFH

Assumed that D=1(32bit), AV =1(assumed that segment is available)

Access Right ->

P D P L S E ED/C R/W A
1 1 1 1 0 0 1 0

0000 0000 0000 0000 21H

0000H 001FH

Ques 35. Which register locates the global descriptor table?

Ans. The GDTR (global descriptor table register) contain the base address
of the global descriptor table and its limit. When the protected mode
operation is desired, the address of the global descriptor table and its limit
are loaded into the GDTR.

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