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Experiment-10: AIM: Design and Implement 3 Bit Synchronous UP/Down Counter Theory

This document describes the design and implementation of a 3-bit synchronous up/down counter. It includes: 1) The theory of up/down counters which can count up or down based on an up/down signal. 2) A state diagram and truth table for a 3-bit up/down counter using 3 JK flip-flops. 3) K-map expressions and circuit diagram for the 3-bit up/down counter.

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Sujith Reddy
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128 views9 pages

Experiment-10: AIM: Design and Implement 3 Bit Synchronous UP/Down Counter Theory

This document describes the design and implementation of a 3-bit synchronous up/down counter. It includes: 1) The theory of up/down counters which can count up or down based on an up/down signal. 2) A state diagram and truth table for a 3-bit up/down counter using 3 JK flip-flops. 3) K-map expressions and circuit diagram for the 3-bit up/down counter.

Uploaded by

Sujith Reddy
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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EXPERIMENT-10

CHALAMALA SUJITH REDDY


19CS01009

AIM: Design and Implement 3 bit Synchronous UP/Down Counter

Theory:
A Counter is a register capable of counting the number of clock pulses arriving at
its clock input. Counter represents the number of clock pulses arrived. An
UP/DOWN counter is one that is capable of progressing in increasing order or
decreasing order through a certain sequence. An up/down counter is also called a
bidirectional counter. Usually the up/down operation of the counter is controlled
by an up/down signal. When this signal is high the counter goes through the up
sequence and when the UP/DOWN signal is low the counter follows the reverse
sequence.

For the 3-bit UP/DOWN counter


State Diagram:
Consider 3 JK flip flops A,B,C to make a 3-bit counter.
Truth Table:
Input(I) Present State Next State A B C

Q
A Q
B Q
C J
A A JB
K
B JC
K K
C
Q
Up/Down A+1 Q B+1 QC+1
0 0 0 0 1 1 1 1 X 1 X 1 X
0 1 1 1 1 1 0 X 0 X 0 X 1
0 1 1 0 1 0 1 X 0 X 1 1 X
0 1 0 1 1 0 0 X 0 0 X X 1
0 1 0 0 0 1 1 X 1 1 X 1 X
0 0 1 1 0 1 0 0 X X 0 X 1
0 0 1 0 0 0 1 0 X X 1 1 X
0 0 0 1 0 0 0 0 X 0 X X 1
1 0 0 0 0 0 1 0 X 0 X 1 X
1 0 0 1 0 1 0 0 X 1 X X 1
1 0 1 0 0 1 1 0 X X 0 1 X
1 0 1 1 1 0 0 1 X X 1 X 1
1 1 0 0 1 0 1 X 0 0 X 1 X
1 1 0 1 1 1 0 X 0 1 X X 1
1 1 1 0 1 1 1 X 0 X 0 1 X
1 1 1 1 0 0 0 X 1 X 1 X 1
CHARACTERISTICS TABLE OF JK flip flop:

QT QT+1 J K

0 0 0 X

0 1 1 X

1 0 X 1

1 1 X 0

Circuit Diagram:
K-map Expressions:
Timing Diagram:
( DOWN Counter)
(UP Counter)
Applications of Counters:
1. Used in Frequency counters
2. Digital clocks
3. Analog to digital convertors.
4. In time measurement.
5. We can design digital triangular wave generator by using counters
6. With some changes in their design, counters can be used as frequency
divider circuits. The frequency divider circuit is that which divides the input
frequency exactly by ‘2’

Discussion & Conclusion:

Knowing the basic mapping, an equation for the counter is derived. Beside this,
the task was to Up/down the counter through controlling the input (I).
Similar counters can be designed using D flip flop , T flip flop also.

Circuit is designed by deriving expressions using K-map and Truth Table is verified.

3 bit Synchronous UP/Down Counter is Designed and Implemented

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