2016 Conference of Basic Sciences and Engineering Studies (SGCAC)

Implementation of Matched Filters

Using Microcontrollers
Moutaman Mirghani
Institute of Space Research and Aerospace (ISRA)
National Center for Research (NCR)
[email protected]

Abstract—In the context of the rapid progress occurred in the The transfer function of a filter that is matched to a signal
field of digital signal processing, digital filters applications are s(t) is given as the complex conjugate of the spectrum, or
found in most of the engineering systems that exist today. Fourier transform, of that signal S( f ) [1], i.e.
Matched filter (MF) is a filter that is designed according to the
waveform of the transmitted signal. It is principally applied in H ( f ) = k S * ( f )e− j 2πfto (1)
the detection of pulse radar signals and digital communication where k is an arbitrary scalar that depends on the gain of the
signals. Pulse compression is a signal processing practice that is filter, and to is a delay required for the best sampling instant.
intended to maximize the sensitivity and time-resolution of radar Equivalently, the impulse response of the MF can be found in
systems, making use of a MF or a correlator. A microprocessor terms of the signal for k = 1 as follows
based DSP or an FPGA is often used to realize digital filters.
However, a microcontroller is a low power and low cost complete h (t ) = s * (t − t o ) = s (t o − t ) ( 2)
system-on-chip microprocessor system. By the proper circuit
In its discrete form for N-length signal, (2) will be as follows
layout and the appropriate software on its program memory, the
microcontroller chip could implement various data operations. h(n) = s * ( n − N ) = s ( N − n) (3)
Minimizing the cost of digital filters using microcontrollers
without degrading the performance and speed of the filter It could be proved that MF can be replaced by a correlator
requires various study of the theory of DSP and digital filters. [1], which correlates the received signal with a copy of the
Choosing the convenient microcontroller type and writing the transmitted signal waveform. When the MF receives at its input
appropriate software may attain a cheaper and more flexible only the signal which is matched to, we would obtain the
digital filter. The main objective of this paper is to implement a Autocorrelation Function (ACF) of the waveform at the output.
matched digital filter based on a regular microcontroller. For any signal, its ACF is an even function of its peak value
located at the center, i.e. at the zero time-shift.
Keywords—Matched, Filter, Microcontroller, Pulse, Radar, In order to cope with the digital technology, radar signals
Communication, Waveform, Code. are generally digitally encoded. Unique codes of high Peak-to-
Sidelobe Level (PSL) ratios are used to achieve higher SNR, as
I. INTRODUCTION
well as higher Pulse Compression Ratio (PCR). The MF (or the
The waveform used to represent a digital signal or a radar correlator) achieves high outputs for echo signals reflected
signal is a significant feature. For a radar system, it affects its back to the radar, while reducing noise signals that are not
ability to resolve targets in range or velocity, or both of them. correlated. Consequently, the SNR at the output of the filter is
The transmitted signal waveform is carefully chosen in order to going to be maximized.
optimize the performance of radar according to its function and Barker codes and Pseudo Noise (PN) codes are examples of
the operating conditions. codes that have excellent autocorrelation properties [2]. Those
Matched filter is designed according to the waveform of the codes phase or frequency-modulate the transmitted radar radio
transmitted radar signal or digital signal. In principle, if white signal, which reflects by targets in the radar zone. Spread
noise only exits at its input, the MF achieves at its output the spectrum communication systems, such as direct sequence and
maximum Signal-to-Noise Ratio (SNR) using a linear system. frequency hopping, use the same principle in order to spread
MF is useful in detection of the required signal, rather than the signal over the frequency domain, and hence realize
preserving its waveform while filtering in frequency domain. sufficient SNR with effectively low power.
Typically, MF is used in radar pulse compression to attain
very narrow pulse out of long pulse of a low peak power. That II. DIGITAL MATCHED FILTER
could allow sending long pulses of limited peak power but of Digital filters are replacing analogue filters because of their
sufficient energy. Same applies for digital symbols, i.e. zeros reliability and their compatibility to digital signal processing.
and ones, which are easily detected due to evident drop realized They are available in main two categories; Finite Impulse
in Inter-Symbol Interference (ISI) at the receiver. Response (FIR) and Infinite Impulse Response (IIR) filter [3].
Filters are commonly used in the separation and restoration of
signals; however MF’s are used to distinguish the right signals.

978-1-5090-1812-3/16/$31.00 ©2016 IEEE

128
 In general, IIR filters are faster and have fewer components The Intel 8048 has eventually been replaced by the popular
compared to FIR filters, but they include feedback parts, and Intel 8051 microcontroller (µC), which is applied here so as to
hence they should be tested for stability per each design demonstrate the objectives of this paper. It is a microcomputer
changes. On the other hand, FIR filter has no feedbacks and of Harvard architecture single chip µC series, developed in
hence it is stable by definition, and mostly it has linear phase 1980, conformal to complex instruction set computing (CISC).
response. Those features make FIR filters more common and It remained quite popular, due to its low cost, wide availability;
suitable to be adaptive. Thus, MF’s are often FIR filters. memory efficient one-byte instruction set, and available mature
From Fig. 1 below, we see that the current sample of the development tools. Therefore, that chip and its derivatives are
output signal of the FIR filter y(n) is the sum of the current widely used in high-volume consumer electronics devices such
sample of the input signal x(n) and previous samples multiplied as TV sets, TV remotes, toys, and other gadgets where cost-
by the filter coefficients bk as follows cutting is essential.
N −1
y (n) = ∑ bk x ( n − k ) ( 4)
k =0

where N is the number of taps or filter coefficients. N-1 is the

order of the filter that equals the number of delays marked z-1.

Fig. 1. FIR Filter. Fig. 2. Intel 8051 Microcontroller Structure.

The impulse response sequence of this filter is composed of As seen in Fig. 2 above, the structure of Intel 8051 µC
the filter coefficients b0 to bN-1. In fact, Equation (4) computes incorporates all the features found in a microprocessor, which
the output samples of y(n) by convolving the input signal with are arithmetic logic unit (ALU), program counter (PC), stack
the impulse response of the filter. Regarding Equation (3) pointer (SP) and registers. It also has added other features that
above, this FIR filter is matched to the signal that has samples are needed to create an entire computer; which are ROM,
of reversed order, i.e. s(n) = [bN-1 … b0]. RAM, parallel I/O, serial I/O, timers/counters, a clock circuit as
This filter can be realized inside a programmable device, well as internal data bus. Due to its popularity, the Intel 8051
such as a Field Programmable Gate Array (FPGA), using one core is frequently embedded inside some Application Specific
of the hardware description languages. Otherwise, the same Integrated Circuits (ASICs) and FPGAs. Such built-in µC is
filter is frequently realized by software, using the convolution programmed to fulfill some specific tasks.
above. The input stream is buffered in what is known as
circular or cyclic buffer [4] of length N samples. Loops and III. STATEMENT OF THE PROBLEM
shifts are used within the software program to calculate the Implementation of a digital filter is regularly done using a
output sequence, sample by sample. DSP or an FPGA, in order to achieve high speed of processing
In digital signal processors (DSP’s), which are special in addition to high resolution. However, both technologies
microprocessors dedicated for digital signal processing, costs considerable money and require extensive knowledge.
circular buffers are accessed by hardware data sequencers. Other challenges include availability, complicated printed
Loops in DSP’s also use hardware loop counters. That rapidly circuit board (PCB) and precise power requirement.
increases the speed of the processing. On the other hand, On the other hand, microcontrollers are slow and of limited
regular microprocessor does not include such hardware and resolution and resources. Microcontrollers lack floating-point
rely on data manipulation techniques. operations, which enhance accuracy and ease programming.
Microcontrollers are cheap chips that are totally integrated The convolution processing done by FIR filter is relatively
microprocessor systems. They include program and data slow compared to multiplication that can be done in frequency
memories, as well as I/O devices inside the chip. As may be domain, which requires existence of Fast Fourier Transform
sensed from the name, these devices are more suitable for (FFT) capabilities.
control applications rather than digital signal processing. This
is due to their slow speed of processing and the limitation of IV. PROPOSED CIRCUIT DESIGN
memory. The Intel 8048 microcontroller, which was the first Due to its popularity and availability, the design of the
Intel microcontroller, was supposed in the year 1976 as a new radar compressor proposed here is based on the Intel 8051 µC;
remarkable tool in the field of radar signal processing. even it may be not the best in some designs. It has a limited

129
length of bits, 8 bits, and limited on-chip memory compared to The frequency of the crystal designated Y1 determines the
several of its counterparts. Nevertheless, it has a plenty of clock pulse frequency of the µC and the width of subpulses
design and debugging tools and many accessible pieces of within the long pulse to be transmitted. The crystal frequency is
program codes. Despite the simplicity of coding using C selected as 24 MHz, which is the maximum clock frequency
language, real-time applications run faster if the code was for this specific chip.
written in assembly. That also reduces the machine code and At the matched filter side, the µC designated U2 is used to
the required program memory which is ROM or flash memory. compress the sequence received into Pin 33. According to the
Most common radar waveform that is used to realize pulse code of the program, this pin can be any of the I/O pins and
compression is biphase-coded or Binary Phase Shift Keying could be checked periodically. However, the program can be
(BPSK) signal. A pseudo random code of good ACF features is designed to respond to the input sequence as an external
used to modulate the transmitted signal. On arrival of echo interrupt signal, at either Pin 12 or Pin 13. Following this
signal, the receiver processor compresses the signal to achieve programming technique speeds the processing and allows tasks
narrow pulses of better SNR. The modulating code used in this to be done almost in parallel.
design is 5-bit Barker code, which has a PSL ratio of -14 dB. Each received bit is saved in a 1-byte buffer in the on-chip
Compression could be done at RF, IF or baseband stage of RAM, one as 01 and zero as FF, which represents -1 in 2's
the receiver. However, digital processing of RF signals is not complement form. The received demodulated signal is forced
practical, at least till today. Compressor using a DSP or an to be binary sequence by thresholding. Otherwise, an ADC is
FPGA is preferable to be at the IF to attain better SNR [5]. A required to convert the analog signal into digital, which is
fast ADC is used to convert IF signal into digital, prior to saved in the RAM buffer. The length of the circular buffer is
demodulation. On the other side, microcontrollers perform equal to the code length, i.e. 5. Then, the received signal is
better at baseband, subsequent to demodulation. correlated with a stored copy of the transmitted Barker code.
The proposed circuit schematic is shown in Fig. 3 below. It After the assembly codes were assembled using µVision2
is based on two low cost AT89C51 µC chips. The µC that is program, each code is simulated and debugged prior to
designated U1 is used to generate a biphase code; while the download into chip. Simulation is done using the same IDE in
other µC designated U2 is used as the signal compressor. order to test the code execution and monitor data transfer and
However, the two functions may be done using a single chip at computations. The screen of the µVision2 IDE in the
the expense of processing speed. The size of the required on- debugging mode is shown in Fig 4 below. In this mode, all the
chip RAM depends on the format of the code designed. contents of the internal registers and memory space can be
monitored and traced during the program execution.

Fig. 3. The schematic of the Proposed Circuit

Fig. 4. Code Debug Mode Screen
The µC designated U1 is programmed to generate a cyclic
5-bit Barker sequence. The output sequence that streams out of V. SIMULATION RESULTS
Pin 17 of the µC is swinging between 0 and 5V, as what is
shown in Fig 5 below. If this µC is considered as the master After the success of the software debugging process, the
Pulse Repletion Frequency (PRF) generator of the pulse radar machine code of each µC is ready to be downloaded into its
system, it generates trigger pulses that are used in the timing of assigned program memory. Several EDA programs such as
the other parts of the system. Otherwise, an external trigger OrCAD, Proteus and Multisim tools allow simulating µC’s.
pulse is injected to one of its input pins in order to control the The assembled machine codes are downloaded into the two
start of bursts of code bits. µC’s and the output signals were observed.

130
 The waveform of the code generated by U1 is as shown in showed that the proposal is certainly correct and applicable [7],
Fig. 5 below. That signal is sent serially to U2 which runs the being aware with limits.
compressor program. The output of that µC at Port 3 is the The output signal from compressor is comparable to the
recent sample value of the convolution operation done between theoretical ACF sequence of the 5-bit Barker code used, which
the input code and the impulse response of the MF, given in its is depicted in Fig. 7. Obviously, the two waveforms are not
parallel form. identical due to the limitations in the resolution of the µC,
which is 8 bits only. The mildness of the generated signal
compared to the discrete nature of the ACF comes as result of
the reconstruction Lowpass Filter (LPF) located at the output
of the DAC.
Instead of saving the received bits as 01 and FF to
accomplish correlation using multiplication, sample values can
be stored as 01 and 00 and use XOR operations. This is going
to increase the speed of processing (but less peak value) as
there are no real hardware multipliers in such cheap µC’s.
A shortcut to increase the speed is to use a faster chip like
87C520, which belongs to the 8051 family and has the same
pin configuration as that of the AT89C51 µC used. Otherwise,
one can use a mixed signal processor like the VERSA DSP. All
these chips are so compatible and the executable code is
portable between them, with minor changes.

Fig. 5. The Waveform of Barker Code Generated by U1

The 8-bit digital-to-analog converter (DAC) IC designated

U3 is connected to Port 3 of the µC. The processed analog
video signal [6] at the DAC output is ready to be sent to radar
display, such as range indicator (which is so similar to regular
oscilloscope) to display the compressed echo pulses of targets.
That video signal looks like what is shown in Fig. 6 below.

Fig. 7. Plot of Theoretical ACF of 5-bit Barker Code

ACKNOWLEDGMENT
The author would like to show his gratitude to the staff of
the Institute of Space Research and Aerospace (ISRA), the
National Center for Research (NCR), IEEE Sudan [8][9] and
all his students for their everlasting help and support [10].
REFERENCES
[1] Merrill I. Skolnik, Introduction to Radar Systems, McGraw-Hill, 3rd
edition, 2001.
Fig. 6. The Waveforms of the Signal Generated by U3 [2] Fred E. Nathanson, Radar Design Principles, Signal Processing and the
Environment, 2nd Ed., McGraw-Hill, Inc., 1991.
VI. CONCLUSION [3] M. M. Daffalla, Signal Analysis and Processing, Communication and
Navigation Research Center, Karary University, 2012.
In this paper, a low cost and simple implementation for a
[4] Moutaman Mirghani, Radar Signal Coding, Approach Applying DSP.
soft digital matched filter was presented. The MF is used to PhD Dissertation, University of Khartoum, 2009
compress phase-encoded radar signals. The processing of the [5] Moutaman Mirghani Daffalla, FH/MPS Hybrid Radar Waveform, IET
received signal is done in baseband in order to overcome speed Conference Publications, Issue CP551, Volume 2009.
limitations of µC’s. [6] Radar Pulse Compression, Atif M. Amin and Reem Attayeb,
The µC program has been coded using Intel 8051 assembly Department of Aviation and Aeronautics, Engineering College, Sudan
language. The results obtained from the circuit simulation have University of Science and Technology, 2005.

131
[7] Rania Abdel Hameed, MSc Proposal to Study the Benefits of Applying
Microcontrollers in the Design of Digital Filters Modules, July 2002.
[8] Moutaman Mirghani, Design and Analysis of Low Baudrate Modem
Using Microcontrollers, IEEE Conference, ICCEEE 2013, Aug 2013.
[9] Moutaman Mirghani, Adaptive Multifunction Filter for Processing
Radar Signals, IEEE Conference, ICCEEE 2013 Conference, Aug 2013.
[10] Reem Eltayeb M. Abd Elrahman, Moutaman Mirghani Daffalla, Target
Recognition Using Correlation Method, 6th International Scientific
Conference on Defensive Technologies, OTEH 2014, Belgrade, 2014.

132