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Lesson Plan - COA

The document outlines the session plan for a course on computer organization and architecture. It covers several topics over 9 units including introduction to computer components like CPU, memory, and I/O devices. It also discusses instruction set architecture, data representation, arithmetic operations, control unit design, pipelining, parallel processing, memory organization, and input/output subsystems.

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mvdurgadevi
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145 views4 pages

Lesson Plan - COA

The document outlines the session plan for a course on computer organization and architecture. It covers several topics over 9 units including introduction to computer components like CPU, memory, and I/O devices. It also discusses instruction set architecture, data representation, arithmetic operations, control unit design, pipelining, parallel processing, memory organization, and input/output subsystems.

Uploaded by

mvdurgadevi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as XLSX, PDF, TXT or read online on Scribd
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18CBC202T COMPUTER ORGANIZA

UNIT NO UNIT NAME


1 INTRODUCTION TO COMPUTER ARCHITECTURE

1 INTRODUCTION TO COMPUTER ARCHITECTURE

1 INTRODUCTION TO COMPUTER ARCHITECTURE

1 INTRODUCTION TO COMPUTER ARCHITECTURE

1 INTRODUCTION TO COMPUTER ARCHITECTURE

1 INTRODUCTION TO COMPUTER ARCHITECTURE

1 INTRODUCTION TO COMPUTER ARCHITECTURE

1 INTRODUCTION TO COMPUTER ARCHITECTURE

1 INTRODUCTION TO COMPUTER ARCHITECTURE

2 COMPUTER ARITHMETIC

2 COMPUTER ARITHMETIC

2 COMPUTER ARITHMETIC

2 COMPUTER ARITHMETIC

2 COMPUTER ARITHMETIC

2 COMPUTER ARITHMETIC

2 COMPUTER ARITHMETIC

2 COMPUTER ARITHMETIC

2 COMPUTER ARITHMETIC

3 CONTROL UNIT AND PIPELINING

3 CONTROL UNIT AND PIPELINING

3 CONTROL UNIT AND PIPELINING

3 CONTROL UNIT AND PIPELINING


3 CONTROL UNIT AND PIPELINING

3 CONTROL UNIT AND PIPELINING

3 CONTROL UNIT AND PIPELINING

3 CONTROL UNIT AND PIPELINING

3 CONTROL UNIT AND PIPELINING

4 PERIPHERAL DEVICES AND THEIR CHARACTERISTICS

4 PERIPHERAL DEVICES AND THEIR CHARACTERISTICS

4 PERIPHERAL DEVICES AND THEIR CHARACTERISTICS

4 PERIPHERAL DEVICES AND THEIR CHARACTERISTICS

4 PERIPHERAL DEVICES AND THEIR CHARACTERISTICS

4 PERIPHERAL DEVICES AND THEIR CHARACTERISTICS

4 PERIPHERAL DEVICES AND THEIR CHARACTERISTICS

4 PERIPHERAL DEVICES AND THEIR CHARACTERISTICS

4 PERIPHERAL DEVICES AND THEIR CHARACTERISTICS

5 MEMORY ORGANIZATION AND SYSTEM DESIGN

5 MEMORY ORGANIZATION AND SYSTEM DESIGN

5 MEMORY ORGANIZATION AND SYSTEM DESIGN

5 MEMORY ORGANIZATION AND SYSTEM DESIGN

5 MEMORY ORGANIZATION AND SYSTEM DESIGN

5 MEMORY ORGANIZATION AND SYSTEM DESIGN

5 MEMORY ORGANIZATION AND SYSTEM DESIGN

5 MEMORY ORGANIZATION AND SYSTEM DESIGN

5 MEMORY ORGANIZATION AND SYSTEM DESIGN


TER ORGANIZATION & ARCHITECTURE

SESSION PLAN
Functional blocks of a computer

CPU, memory, input-output subsystems, control unit

Instruction set architecture of a CPU

Registers, instruction execution cycle

RTL interpretation of instructions

Addressing modes, instruction set.

Outlining instruction sets of some common CPUs.

Data representation: Signed number representation

Fixed and floating-point representations, character representation.

Integer addition and subtraction

Ripple carry adder, carry look-ahead adder

Multiplication – shift-and- add

Booth multiplier

Carry save multiplier

Division restoring techniques

Non-restoring techniques

Floating point arithmetic

IEEE 754 format.

Introduction to x86 architecture.

CPU control unit design

Hardwired design approaches

Micro-programmed design approaches


Design of a simple hypothetical CPU

Pipelining: Basic concepts of pipelining, throughput and speedup

Pipeline hazards.

Parallel Processors: Introduction to parallel processors

Concurrent access to memory and cache coherency.

Input-output subsystems

I/O device interface

I/O transfers – program controlled

Interrupt driven and DMA

Privileged and non-privileged instructions

Software interrupts and exceptions.

Programs and processes – role of interrupts in process state transitions,

I/O device interfaces – SCII

USB.

Memory interleaving

Concept of hierarchical memory organization

Cache memory

Cache size vs. block size

Mapping functions

Replacement algorithms

Write policies.

Memory system design: Semiconductor memory technologies

Memory organization

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