ElectronicsII - Part III
ElectronicsII - Part III
th
Electronic Devices and Circuit Theory, 9 ed., Boylestad and Nashelsky
Philadelphia University
Faculty of Engineering
Communication and Electronics Engineering
Amplifier Circuits-III
Operational Amplifiers (Op-Amps):
To illustrate what an op-amp is, let's consider its ideal characteristics. A practical op-
amp, of course, falls short of these ideal standards, but it is much easier to understand
and analyze the device from an ideal point of view. These two considerations are
clearly shown in the Figure Below.
Firstly, the ideal op-amp has
- infinite voltage gain,
- infinite bandwidth,
- it has an infinite input impedance (open) so that it does not load the driving
source,
- a zero output impedance.
The input voltage, V in appears between the two input terminals, and the output
voltage is A v V in as indicated by the internal voltage source symbol.
A differential amplifier is the input stage for the op-amp; it provides amplification of
the difference voltage between the two inputs. The second stage is usually a class A
amplifier that provides additional gain. Some op-amps may have more than one
voltage amplifier stage. A push-pull class B amplifier is typically used for the output
stage.
The term differential comes from the amplifier's ability to amplify the difference of
two input signals applied to its inputs . Only the difference in the two signals is
amplified; if there is no difference, the output is zero .
A basic differential amplifier circuit and its symbol are shown in the Figure. The
transistors (Q 1 and Q 2 ) and the collector resistors (R c1 and R c2 ) are carefully matched
to have identical characteristics. Notice that the two transistors share a single emitter
resistor, R E .
Common Mode Input: Two signal voltages of the same phase, frequency, and
amplitude are applied to the two inputs.
When equal input signals are applied to both
inputs, they cancel, resulting in a zero output
voltage. This action is called common-mode
rejection. Its importance lies in the situation
where an unwanted signal appears commonly
on both op-amp inputs.
2) Input Parameters
Ex. Calculate the CMRR for the circuit measurements shown in Fig.
Solution:
Ex. Determine the output voltage of an op-amp for input voltages of Vi1 = 150 V,
Vi2 =140 V. The amplifier has a differential gain of Ad = 4000 and the value of
CMRR is:
(a) 100.
(b) 105.
Solution:
Common mode Input voltage range: It is the range of input voltages which,
when applied to both inputs, will not cause clipping or other output distortion.
Many op-amps have common-mode input voltage ranges of ±10 V with dc
supply voltages of ±15 V.
Input Offset Voltage: The ideal op-amp produces zero volts out for zero volts
in. In a practical op-amp, however, a small de voltage. V OUT(error) , appears at
the output when no differential input voltage is applied (causes a slight
mismatch of the base-emitter voltages of the differential amplifier input
stage of an op-amp) .
The input offset voltage, V os , is the differential dc voltage required between
the inputs to force the output to zero volts (Typical values of in the range of
2 mV or less, while it is 0V in ideal cases).
Slew Rate: The maximum rate of change of the output voltage in response to a
step input voltage is the slew rate of an op-amp.
The slew rate is dependent upon the high-frequency response of the
amplifier stages within the op-amp.
A pulse is applied to the input and the resulting ideal output voltage is
indicated as below.
The width of the input pulse must be sufficient to allow the output to
"slew" from its lower limit to its upper limit.
A certain time interval Δt is required for the output voltage to go from
its lower limit – V max to its upper limit +V max once the input step is
applied.
Vout
Slew Rate=
t
where ΔV out =+V max - (- V max ), The unit of slew rate is volts per microsecond (V/s).
Solution:
9 (9)
Slew Rate= 18V/μs
1 10 6
Input Bias Current: The input terminals of a bipolar differential amplifier are
the transistor bases and, therefore, the input currents are the base currents. The
input bias current is the dc current required by the inputs of the amplifier to
properly operate the first stage (It is the average of both input currents).
1) Inverting Op-Amp
The signal input is applied to the inverting (–) input. The non-inverting input (+) is
grounded. The resistor R f is the feedback resistor. It is connected from the output to the
negative (inverting) input. This is negative feedback.
Apply kvl to the input loop
V1 I i R1 (1)
But, I i I f (2)
Apply kvl to the output loop
Vo I f R f (3)
substitute 1 and 2 in 3
Rf Rf
Vo Vi Av
Ri Ri
2) Noninverting Op-Amps
3) Summing Op-Amps
Because the op-amp has high input impedance, the multiple inputs are treated as separate
inputs.
4) Integrator Op-Amps
The output is the integral of the input. Integration is the operation of summing the area
under a waveform or curve over a period of time. This circuit is useful in low-pass filter
circuits and sensor conditioning circuits.
5) Differentiator Op-Amps
The differentiator takes the derivative of the input. This circuit is useful in high-pass filter
circuits.
Ex. Calculate the output voltages V2 and V3 in the given circuit below.
Solution:
Ex. What range of output voltage is developed in the given circuit below.
Solution:
Ex. The differential amplifier shown below has a differential gain of 2500 and a
CMRR of 30000.
In part (a), a single ended input of 500V rms is applied and at the same time a
100mV, 60Hz common-mode interference signal appears on both inputs as a
result of radiated pick-up from ac power system.
In part (b), differential input signals of 500V rms each are applied to the
inputs. The common-mode interference is the same as in part (a).
1) Determine the common-mode gain,
2) Express the CMRR in dB,
3) Determine the rms output signal for both parts a and b,
4) Determine the rms interference voltage on the output.
Solution:
Ad Ad
1) CMRR= Ac 0.083
Ac CMRR
2) CMRR dB =20log(30000)=89.5dB
3) (a) vo1 Ad vid 2500 500 1.25Vrms
(b) vo1 Ad vid 2500 500 500 2.5Vrms
4) voc Ac vic 0.083 100m 8.3mVrms
Ri
The attenuation B 0.0435
Ri R f
Z in ( NI ) Z in (1 Ad B ) 17.4G
Z out
Z out ( NI ) 8.6
(1 Ad B )
1
Ac 23
B
Ri
The attenuation B 0.009901
Ri R f
Z in ( NI ) Ri 1.0k
Z out
Z out ( NI ) 101m
(1 Ad B)
Rf
Ac 100
Ri
Ex. Determine the output for the circuit of the given Fig. with components Rf =1M, R1=100k,
R2 =50k, and R3 =500k.
Solution:
When the filter circuit passes signals that are above one ideal cutoff
frequency and below a second cutoff frequency, it is called a bandpass
filter.
RF
Av 1
RG
1
f OH
2R1C1
1
f OH
2 R1C1 R2 C 2
Solution:
1
f c1 ( HPF ) 750 Hz
2 R A1 RB1C A1C B1
1
f c 2 ( LPF ) 1130 Hz
2 R A 2 RB 2 C A2 C B 2
BW f c 2 f c1 380 Hz
fo f c1 f c 2 921Hz
fo
Q 2.42
BW
1
fo , making C1 C 2 C
2 R1 // R3 R2 C1C 2
1 1 R1 R3
2C R1 // R3 R2 2C R1 R3 R2
Q Q Q
R1 , R2 , R3
2f o CAo f o C
2f o C 2Q 2 Ao
R2
Ao
2 R1
Ao 2Q 2 , This a limitation on the gain to give a positive value for R3
Solution: