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Swarnandhra College of Engineering & Technology

This document contains a midterm question bank for an Advanced Computer Architecture course for an M.Tech semester. It includes questions from Unit III on compiler techniques for instruction level parallelism and hardware/software speculation mechanisms. Unit IV questions cover symmetric shared memory architectures, cache coherence problems, and distributed memory architectures. Unit V questions address interconnection networks, examples of interconnected networks, designing clusters, and commercial interconnection network issues. It concludes with a question on prediction and speculation support in IA64.

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RAMYA VATHSALYA P
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140 views1 page

Swarnandhra College of Engineering & Technology

This document contains a midterm question bank for an Advanced Computer Architecture course for an M.Tech semester. It includes questions from Unit III on compiler techniques for instruction level parallelism and hardware/software speculation mechanisms. Unit IV questions cover symmetric shared memory architectures, cache coherence problems, and distributed memory architectures. Unit V questions address interconnection networks, examples of interconnected networks, designing clusters, and commercial interconnection network issues. It concludes with a question on prediction and speculation support in IA64.

Uploaded by

RAMYA VATHSALYA P
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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SWARNANDHRA COLLEGE OF ENGINEERING & TECHNOLOGY

DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING


M. TECH I SEMESTER

Mid-II Question Bank

SUBJECT: Advanced Computer Architecture Branch:ECE Regulation: R19

UNIT-III

1.Write and explain about Compiler techniques for exposing ILP [10M]

2. Discuss about branch prediction[05M]

3. Illustrate the cross cutting issues between Hardware and Software speculation mechanism [05M]

4. Explain the complete procedure how Hardware support more parallelism at compile time [10M]

UNIT-IV

1.Explain in detail the Symmetric shared memory Architectures and Cache coherence problem [10M]

2.Discuss the Distributed memory Architectures [05M]

3. Explain the Synchronization Performance Challenges [05M]

4.Illustrate the characteristics of Application Domain [10M]

UNIT-V

1. Describe Interconnection network. Why is it important? [05M]

2. List and explain some examples of inter connected networks [05M]

3. Define Cluster and discuss the designing of cluster in detail [05M]

4. Discuss the practical issues for commercial Interconnection network [05M]

5. Illustrate how the prediction and speculation support will be provided in IA64 [10M]

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