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Unit 4 Memory Heirarchy

The document discusses memory organization and RAM chips. It covers: 1) Memory is classified as volatile or non-volatile. Main memory uses RAM and communicates directly with the CPU. RAM chips use address lines to access memory locations and read/write signals to read from or write to those locations. 2) A typical RAM chip has chip select lines, read/write lines, address lines, and a bidirectional data bus. During a read or write, the chip select and appropriate read/write line must be enabled along with an address. 3) The number of RAM chips and address lines required depends on the memory size. Larger memories require more chips and wider address buses. Different RAM types include DR

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91 views16 pages

Unit 4 Memory Heirarchy

The document discusses memory organization and RAM chips. It covers: 1) Memory is classified as volatile or non-volatile. Main memory uses RAM and communicates directly with the CPU. RAM chips use address lines to access memory locations and read/write signals to read from or write to those locations. 2) A typical RAM chip has chip select lines, read/write lines, address lines, and a bidirectional data bus. During a read or write, the chip select and appropriate read/write line must be enabled along with an address. 3) The number of RAM chips and address lines required depends on the memory size. Larger memories require more chips and wider address buses. Different RAM types include DR

Uploaded by

vivek kumar
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© © All Rights Reserved
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KCS302-Computer Organization and Architecture

Unit-4:Memory organization

Basic concept and hierarchy, semiconductor RAM memories


• A memory unit is the collection of storage units or devices
together.
• The memory unit stores the binary information in the form
of bits.
• Generally, memory/storage is classified into 2 categories:
 Volatile Memory: This loses its data, when power is switched off.
 Non-Volatile Memory: This is a permanent storage and does not lose any
data when power is switched off.
Memory Hierarchy
Storage Units
Interconnection between various types of memory
The main memory occupies the central position because it is equipped to
communicate directly with the CPU and with auxiliary memory devices through
Input/output processor (I/O).

When the program not residing in main memory is needed by the CPU, they are
brought in from auxiliary memory. Programs not currently needed in main memory are
transferred into auxiliary memory to provide space in main memory for other
programs that are currently in use.
Main Memory

• The memory unit that communicates directly within the CPU, is called
main memory.
• It is the central storage unit of the computer system.
• It is a large and fast memory used to store data during computer
operations. Main memory is made up of RAM and ROM, with RAM
integrated circuit chips holing the major share.
RAM Chip- Random Access Memory

The block representation of a typical RAM chip is shown in the following diagram

In this block representation, the given


RAM chip consists of
 two chip select lines,
 a read line,
 write line,
 address lines and a
 bidirectional 8-bit data bus.
Truth table of RAM Chip

State(Data
CS1 CS2 RD WR Type of Function
bus)

0 0 X X I HI

0 1 X X I HI

1 0 0 0 I HI

Write Data (into


1 0 0 1 WR
RAM)

Extract the Data


1 0 1 X RD
(from RAM)

1 1 X X I HI
• The unit is in operation only when CS1 = 1 and CS2 = 0.
• .If the chip select inputs are not enabled, or if they are enabled but the read or write
inputs are not enabled, the memory is inhibited and its data bus is in a high-impedance
state.
• When CS1 = 1 and CS2 = 0, the memory can be placed in a write or read mode.
• When the WR input is enabled, the memory stores a byte from the data bus into a
location specified by the address input lines.
• When the RD input is enabled, the content of the selected byte is placed
into the data bus.

The RD and WR signals control the memory operation.


PROBLEM

a. How many 128x8 RAM chips are needed to provide memory capacity
of 2048 bytes?
b. How many lines of address bus must be used to access 2048 bytes of
memory
c. Specify the size of the decoder to decode the chip select?

Ans:
a. Total memory capacity is 2048 bytes. We have 128x8 size RAM s
so, number of RAM required= 2048/128= 16

b. Number of lines in the address bus to access 2048 bytes of


memory= 2=48=2 power of 11. So each location in the memory is
identified by 11 bits

c. As 16 RAM chips are required to access 2048 bytes of memory , size of the
decoder required to select one of the chip is 4x16
PROBLEM

A computer uses RAM chips of 1024 x 1 capacity.


a. How many chips are needed, and how should their address lines be
connected to provide a memory capacity of 1024 bytes?
Ans: 8 chips are needed a memory capacity of 1024 bytes
b. How many chips are needed to provide a memory capacity of 16K bytes?
Explain in words how the chips are to be connected to the address bus.
To represent 1024 bytes, 8 chips are needed. Accordingly to represent
16K bytes 16x8 =128 Chips are needed
So, to select one of the location in 16K memory , 14 bits are required
10lines specify-chip address
4lines are decoded into 16-chip select inputs
Types of RAM

o DRAM: Dynamic RAM, is made of capacitors


and transistors, and must be refreshed every
10~100 ms. It is slower and cheaper than SRAM.

o SRAM: Static RAM, has a six transistor circuit in


each cell and retains data, until powered off.

o NVRAM: Non-Volatile RAM, retains its data,


even when turned off. Example: Flash memory.
ROM Chip
In this block representation, the block of ROM significantly
differs from RAM as ROM refers to read only memory,
hence its configuration lags write line and also the data bus is
unidirectional.
The reason for considering 512 x 8 is that often ROM can
accommodate more number of memory cells as that of RAM,
hence the space occupied by 512 x 8 by ROM is equivalent to
128 x 8 as that of RAM ( since ROM is read only memory,
hence large amount of data can be stored within less space).

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