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Oice Otp: aP89xx-DBAMP Demo Board

This document provides information about the aP89xx-DBAMP demo board from APLUS Integrated Circuits Inc. including: - The demo board can be triggered in three modes - key trigger using switches S1-S8 for up to 32 sections, CPU parallel trigger using address pins S8-S1 for up to 254 sections, or CPU serial trigger using pins S1, S2, S3. - In key trigger mode, switches S1-S8 select the voice section and SBT triggers them sequentially. DSW3 selects which output pins are enabled. - In CPU parallel mode, the address pins select the section and SBT triggers playback. - In

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Mike Thomson
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34 views7 pages

Oice Otp: aP89xx-DBAMP Demo Board

This document provides information about the aP89xx-DBAMP demo board from APLUS Integrated Circuits Inc. including: - The demo board can be triggered in three modes - key trigger using switches S1-S8 for up to 32 sections, CPU parallel trigger using address pins S8-S1 for up to 254 sections, or CPU serial trigger using pins S1, S2, S3. - In key trigger mode, switches S1-S8 select the voice section and SBT triggers them sequentially. DSW3 selects which output pins are enabled. - In CPU parallel mode, the address pins select the section and SBT triggers playback. - In

Uploaded by

Mike Thomson
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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INTEGRATED CIRCUITS INC.

A PLUS MAKE YOUR PRODUCTION A-PLUS

VOICE OTP

aP89xx-DBAMP
Demo Board

APLUS INTEGRATED CIRCUITS INC.

Address: Sales E-mail:


3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,
[email protected]
Taiwan 115, R.O.C.

(115)台北市南港區成功路一段 32 號 3 樓之 10.

TEL: 886-2-2782-9266
Technology E-mail:
FAX: 886-2-2782-9255 [email protected]
WEBSITE : http: //www.aplusinc.com.tw

PAGE 1 / 7
aP89xx-DBAMP DEMO BOARD ( + OP-AMP )
for aP89341(341”) , aP89170(170”) , aP89085(85”)
„ PART NO. : AP89xx-DBAMP
„ PCB NO. : 5109

„ PCB SIZE : 76 x 45 mm

„ TRIGGER TYPE : M1 & M0 PIN TRIGGER MODE SELECT


a. KEY Trigger : S8 ~ S1 & SBT , max. 32 sections
b. CPU Parallel Trigger : address --- S8(MSB),S7,S6,S5,S4,S3,S2,S1(LSB), total
max. 254 sections & SBT key voice trigger
c. CPU Serial Trigger : S1(CS) : Chip enable , S2(DI) : series data input ,
S3(SCK) : synchronize clock ----- total max. 254 sections

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1. KEY TRIGGER : DSW2 = [ M0 = 0 , M1 = 0 ]
„ USE KEY : S1,S2,S3,S4,S5,S6,S7,S8;total max. 32 sections
„ SBT KEY : ONE KEY SEQUENTAIL TRIGGER,max. 254 sections
„ DSW3(O3-O2-O1) : ENABLE OUT3,OUT2,OUT1

Section S1 S2 S3 S4 S5 S6 S7 S8
1 HIGH NC NC NC NC NC NC NC
2 NC HIGH NC NC NC NC NC NC
3 NC NC HIGH NC NC NC NC NC
4 NC NC NC HIGH NC NC NC NC
5 NC NC NC NC HIGH NC NC NC
6 NC NC NC NC NC HIGH NC NC
7 NC NC NC NC NC NC HIGH NC
8 NC NC NC NC NC NC NC HIGH
9 HIGH HIGH NC NC NC NC NC NC
10 NC HIGH HIGH NC NC NC NC NC
11 NC NC HIGH HIGH NC NC NC NC
12 NC NC NC HIGH HIGH NC NC NC
13 NC NC NC NC HIGH HIGH NC NC
14 NC NC NC NC NC HIGH HIGH NC
15 NC NC NC NC NC NC HIGH HIGH
16 HIGH NC NC NC NC NC NC HIGH
17 HIGH HIGH HIGH NC NC NC NC NC
18 NC HIGH HIGH HIGH NC NC NC NC
19 NC NC HIGH HIGH HIGH NC NC NC
20 NC NC NC HIGH HIGH HIGH NC NC
21 NC NC NC NC HIGH HIGH HIGH NC
22 NC NC NC NC NC HIGH HIGH HIGH
23 HIGH NC NC NC NC NC HIGH HIGH
24 HIGH HIGH NC NC NC NC NC HIGH
25 HIGH HIGH HIGH HIGH NC NC NC NC
26 NC HIGH HIGH HIGH HIGH NC NC NC
27 NC NC HIGH HIGH HIGH HIGH NC NC
28 NC NC NC HIGH HIGH HIGH HIGH NC
29 NC NC NC NC HIGH HIGH HIGH HIGH
30 HIGH NC NC NC NC HIGH HIGH HIGH
31 HIGH HIGH NC NC NC NC HIGH HIGH
32 HIGH HIGH HIGH NC NC NC NC HIGH

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2. CPU Parallel : DSW2 = [ M0 = 1 , M1 = 0 ]
„ Address pin : S8(MSB),S7,S6,S5,S4,S3,S2, S1(LSB), total max. 254 sections
„ VOICE Trigger pin : SBT

[S8:S1]

SBT1

COUT

STOP

BUSY

3. CPU Serial : DSW2 = [ M0 = 0 , M1 = 1 ]


S1(CS) : Chip enable
S2(DI) : series data input
S3(SCK) : synchronize clock

S1(CS

S2(DI D0 D1 D2 D3 D4 D5 D6 D7

S3(SCK

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Command D7 D6 D5 D4 D3 D2 D1 D0 Description
PUP1 (C5h) 1 1 0 0 0 1 0 1 Power up the chip with NO ramp-up (suitable
PUP2 (8Dh) 1 0 0 0 1 1 0 1 Power up the chip WITH ramp-up (suitable for
PDN1(E1h) 1 1 1 0 0 0 0 1 Power down the chip with NO ramp-down
PDN2(A9h) 1 0 1 0 1 0 0 1 Power down the chip WITH ramp-down
PLAY 0 1 0 1 0 1 0 1 Playback the specified Voice Group
(55h) G7 G6 G5 G4 G3 G2 G1 G0 Voice Group address
STATUS 1 1 1 0 0 0 1 1 Set output status for OUT2 pin
(E3h) 0 0 0 1 0 G2 G1 G0 OUT2 = BUSYB (000), 8K (001), 4K, 2K,
PAUSE(39h) 0 0 1 1 1 0 0 1 Pause the playback and hold at current COUT
RESUME(1Dh) 0 0 0 1 1 1 0 1 Resume playback from the previous COUT
PREFETCH 0 1 1 1 0 0 0 1 Pre-load Voice Group address into buffer for
(71h) G7 G6 G5 G4 G3 G2 G1 G0 Voice Group address

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