Over Voltage Protection Circuit for Automotive Load Dump

National Semiconductor
Over Voltage Protection Application Note 1533
Circuit for Automotive Load Tom Mathews
December 2006
Dump
common in automotive 12V and 24V systems where peak
Introduction “load dump” transients can be as high as 60V. Some load
Transient buss voltages are a serious danger to integrated protection approaches shunt input transient to ground using
circuits. The maximum voltage that an integrated circuit can devices like avalanche diodes and MOVs. The difficulty with
handle depends upon its design process and can be particu- the shunt approach is that large amounts of energy may have
larly low for small geometry CMOS devices. Transient or to be absorbed. Shunt approaches can also be unattractive if
persistent over voltage conditions that exceed an IC’s abso- there is a requirement to provide continuous protection while
lute maximum voltage rating will permanently damage a de- in an over voltage condition (as occurs with double battery).
vice. The need for over voltage protection is particularly

The Circuit
The circuit shown in Figure 1 is a precision series disconnect designed from low cost discrete devices and uses a single
that was designed to protect a switching regulator load that National Semiconductor LMV431AIMF ($0.22 in 1k qty.).
had an absolute maximum input voltage of 24V. The circuit is

20211301

FIGURE 1. Over Voltage Protection

Since this circuit uses a PFET pass device (Q1), there is little many flavors of adjustable reference. Some have different in-
forward voltage drop or associated power loss. ternal reference voltage and some have different gain polar-
The LMV431AIMF (D1) adjustable reference is ideal for this ity. They all have two basic (and very useful) components: A
problem because it provides a low cost means to determine temperature stable, precision band gap reference, and a high
a precision trip point and maintain temperature stability that gain error amplifier (used as a comparator in this circuit). Most
is not possible with a zener diode or with other approaches devices have uni-polar output in the form of an open collector
(1% for the A version, 0.5% for the B version). In order to or emitter. Figure 2 shows conceptually what is inside Na-
preserve this precision, resistors R1 and R2 should be 1% tol- tional Semiconductor’s LMV431AIMF.
erance or better.
Adjustable references are often misunderstood. As in:
“What’s that third wire coming out of that diode?” There are
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20211302

FIGURE 2. Adjustable Reference Concept

The input voltage is monitored by the LMV431 through volt-

age divider R1 and R2. The circuit shown in Figure 1 is set to
trip at 19.2V but an arbitrary trip point can be selected and is
determined with these equations:

20211304

The output of the LMV431 pulls down when the reference pin FIGURE 3. Truth Table
exceeds 1.24V. The cathode of an LMV431 can pull down to
a saturation point of about 1.2V. This is sufficient to turn Q2
The circuit’s function is shown in Figure 4. The trip point can
off. Q2 was specifically selected to have a high gate threshold
be anywhere in the 2.7V to 60V range. Below about 2.7V the
(>1.3V). Do not make substitution for Q2 without taking this
circuit will enter the off state. This is because there is no
into account.
longer sufficient input voltage to satisfy the gate to source
The device states for D1, Q2, and Q1 are shown here in Figure thresholds of Q1 and Q2.
3 for the case of a 19.2V trip point.

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20211305

FIGURE 4. Circuit Function

When in the off state, the circuit presents about 42 kΩ to the LMV431 when over voltage is detected. When conditions re-
input (off state quiescent load). Zener diodes D2 and D3 are turn to normal, reconnect is delayed by the R3•C1 time con-
necessary to limit the maximum gate to source voltages seen stant. Most loads (usually regulators) contain large input
by Q1 and Q2 (which cannot exceed 20V). D3 also prevents capacitors which provide time for the disconnect circuit to en-
the cathode of D1 from exceeding its maximum of 35V. Re- gage by limiting the transient slew rate. The nature of the
sistor R4 provides a small amount of bias to Q2 in order to expected transient along with the available capacitance will
satisfy Q2’s drain leakage in the off state. Note that the body determine the required response time. The shut off action of
diode in Q1 means that there is no protection to the load for this circuit occurs in about 12 µsec. Maximum transient rise
reverse battery (negative input voltages). In order to protect times are limited in proportion to this time interval by Cload.
against reverse battery, either a blocking diode or a second This circuit was tested with a Cload of 1 µF. Larger Cload is
(back to back) PFET is required. allowed and recommended if fast rising, low source
The circuit is designed to actuate quickly but reconnect more impedance transients are expected.
slowly. Capacitor C1 rapidly discharges to ground through the
Cload dissipating into the 1 kΩ test load. The driving wave-
Response Time Measurement form also shows this decay because the test source used
The response to a normal 12V ON and OFF cycle is shown could not sink current.
in Figure 5. The off portion decays slowly because of the 1 µF

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20211306

FIGURE 5. Normal 12V Operation

The response to an over voltage is shown in Figure 6. Note output to 19.2V where the circuit disconnects. After this, the
that the fast rising over voltage event has time to charge the disconnected output voltage decays into the 1 kΩ load.

20211307

FIGURE 6. Response to 60V step input, Cload = 1 µF

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If the 1µF Cload capacitor is removed the actuation speed of fore action is taken. For this reason, Cload should be sized
the disconnect can be observed. This is shown in Figure 7. appropriately for the expected transient rise time and expect-
Since the rise time of the input transient isn’t limited by any ed transient source impedance.
capacitance the output voltage is charged to the full 60V be-

20211308

FIGURE 7. Raw response to 60V input, Cload = 0 µF

RDS(ON),on is highest when the gate to source voltage is low.

Load Limits For larger loads replace Q1 with a 60V PFET with more ther-
The 550 mA maximum allowed load is set by the thermal limits mal capacity (smaller θJA) or lower RDS(ON).
of Q1 at 85°C. When making this calculation, remember that

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Over Voltage Protection Circuit for Automotive Load Dump
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