LM2766 Switched Capacitor Voltage Converter: 1 Features 3 Description
LM2766 Switched Capacitor Voltage Converter: 1 Features 3 Description
LM2766 Switched Capacitor Voltage Converter: 1 Features 3 Description
LM2766
SNVS071C – MARCH 2000 – REVISED SEPTEMBER 2015
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Typical Voltage Doubler Application
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM2766
SNVS071C – MARCH 2000 – REVISED SEPTEMBER 2015 www.ti.com
Table of Contents
1 Features .................................................................. 1 8.3 Feature Description................................................... 8
2 Applications ........................................................... 1 8.4 Device Functional Modes.......................................... 8
3 Description ............................................................. 1 9 Application and Implementation .......................... 9
4 Revision History..................................................... 2 9.1 Application Information.............................................. 9
9.2 Typical Application ................................................... 9
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4 10 Power Supply Recommendations ..................... 12
6.1 Absolute Maximum Ratings ...................................... 4 11 Layout................................................................... 13
6.2 ESD Ratings.............................................................. 4 11.1 Layout Guidelines ................................................. 13
6.3 Recommended Operating Conditions....................... 4 11.2 Layout Example .................................................... 13
6.4 Thermal Information .................................................. 4 12 Device and Documentation Support ................. 14
6.5 Electrical Characteristics........................................... 5 12.1 Device Support...................................................... 14
6.6 Typical Characteristics ............................................. 6 12.2 Community Resources.......................................... 14
7 Parameter Measurement Information .................. 7 12.3 Trademarks ........................................................... 14
7.1 Test Circuit ................................................................ 7 12.4 Electrostatic Discharge Caution ............................ 14
12.5 Glossary ................................................................ 14
8 Detailed Description .............................................. 8
8.1 Overview ................................................................... 8 13 Mechanical, Packaging, and Orderable
8.2 Functional Block Diagram ......................................... 8
Information ........................................................... 14
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
• Added Device Information and Pin Configuration and Functions sections, ESD Rating table, Feature Description,
Device Functional Modes, Application and Implementation, Power Supply Recommendations, Layout, Device and
Documentation Support, and Mechanical, Packaging, and Orderable Information sections ................................................. 1
DBV Package
6-Pin SOT-23
Top View
1 6
2 5
3 4
Pin Functions
PIN
TYPE DESCRIPTION
NO. NAME
1 V+ Power Power supply positive voltage input.
2 GND Ground Power supply ground input.
3 CAP− Power Connect this pin to the negative terminal of the charge-pump capacitor.
4 SD Input Shutdown control pin, tie this pin to V+ in normal operation.
5 VOUT Power Positive voltage output.
6 CAP+ Power Connect this pin to the positive terminal of the charge-pump capacitor.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)
MIN MAX UNIT
Supply voltage (V+ to GND, or V+ to VOUT) 5.8 V
SD (GND − 0.3) (V+ + 0.3) V
VOUT continuous output current 40 mA
Output short-circuit duration to GND (3) 1 sec
(4)
Continuous power dissipation (TA = 25°C) 600 mW
TJMax (4) 150 °C
Storage temperature, Tstg −65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, contact the TI Sales Office/ Distributors for availability and specifications.
(3) VOUT may be shorted to GND for one second without damage. For temperatures above 85°C, VOUT must not be shorted to GND or
device may be damaged.
(4) The maximum allowable power dissipation is calculated by using PDMax = (TJMax − TA)/RθJA, where TJMax is the maximum junction
temperature, TA is the ambient temperature, and RθJA is the junction-to-ambient thermal resistance of the specified package.
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
(1) In the test circuit, capacitors C1 and C2 are 10-µF, 0.3-Ω maximum ESR capacitors. Capacitors with higher ESR may increase output
resistance, and reduce output voltage and efficiency.
(2) Specified output resistance includes internal switch resistance and capacitor ESR. See the details in Application and Implementation for
positive voltage doubler.
(3) The output switches operate at one half of the oscillator frequency, ƒOSC = 2 × ƒSW.
Figure 5. Output Voltage vs Load Current Figure 6. Switching Frequency vs Supply Voltage
8 Detailed Description
8.1 Overview
The LM2766 CMOS charge-pump voltage converter operates as a voltage doubler for an input voltage in the
range of 1.8 V to 5.5 V. Two low-cost capacitors and a diode (needed during start-up) are used in this circuit.
LM2766
V+ OUT
CAP+
SD Switch Array
OSCILLATOR Switch Drivers
CAP-
GND
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
The output characteristics of this circuit can be approximated by an ideal voltage source in series with a
resistance. The voltage source equals 2 V+. The output resistance Rout is a function of the ON resistance of the
internal MOSFET switches, the oscillator frequency, and the capacitance and ESR of C1 and C2. Because the
switching current charging and discharging C1 is approximately twice the output current, the effect of the ESR of
the pumping capacitor C1 is multiplied by four in the output resistance. The output capacitor C2 is charging and
discharging at a current approximately equal to the output current, therefore, its ESR only counts once in the
output resistance. A good approximation of Rout is:
2
R OUT 2R SW + + 4ESR C1 + ESR C2
&OSC × C1
where
• RSW is the sum of the ON resistance of the internal MOSFET switches shown in Figure 12. (1)
The peak-to-peak output voltage ripple is determined by the oscillator frequency as well as the capacitance and
ESR of the output capacitor C2:
IL
VRIPPLE = + 2 × IL × ESRC2
&OSC × C2 (2)
High capacitance, low ESR capacitors can reduce both the output resistance and the voltage ripple.
The Schottky diode D1 is only needed to protect the device from turning on its own parasitic diode and potentially
latching up. During start-up, D1 also quickly charges up the output capacitor to VIN minus the diode drop thereby
decreasing the start-up time. Therefore, the Schottky diode D1 must have enough current carrying capability to
charge the output capacitor at start-up, as well as a low forward voltage to prevent the internal parasitic diode
from turning on. A Schottky diode like 1N5817 can be used for most applications. If the input voltage ramp is less
than 10 V/ms, a smaller Schottky diode like MBR0520LT1 can be used to reduce the circuit size.
where
• IQ(V+) is the quiescent power loss of the device; and
• IL2ROUT is the conversion loss associated with the switch on-resistance, the two external capacitors and their
ESRs. (3)
The selection of capacitors is based on the specifications of the dropout voltage (which equals IOUT ROUT), the
output voltage ripple, and the converter efficiency. Low ESR capacitors (Table 2) are recommended to maximize
efficiency, reduce the output voltage drop and voltage ripple.
11 Layout
LM2766
V+ CAP+
GND OUT
CAP- SD
12.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
www.ti.com 10-Dec-2020
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
LM2766M6/NOPB ACTIVE SOT-23 DBV 6 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 S16B
LM2766M6X/NOPB ACTIVE SOT-23 DBV 6 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 S16B
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
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Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Dec-2016
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Dec-2016
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0006A SCALE 4.000
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
C
3.0
2.6 0.1 C
1.75
B A 1.45 MAX
1.45
PIN 1
INDEX AREA
1
6
2X 0.95
3.05
2.75
1.9 5
2
4
3
0.50
6X
0.25
0.15
0.2 C A B (1.1) TYP
0.00
0.25
GAGE PLANE 0.22
TYP
0.08
8
TYP 0.6
0 TYP SEATING PLANE
0.3
4214840/B 03/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.15 per side.
4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.
5. Refernce JEDEC MO-178.
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EXAMPLE BOARD LAYOUT
DBV0006A SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
2 5
2X (0.95)
3 4
SOLDER MASK
SOLDER MASK METAL METAL UNDER OPENING
OPENING SOLDER MASK
4214840/B 03/2018
NOTES: (continued)
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EXAMPLE STENCIL DESIGN
DBV0006A SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
2 5
2X(0.95)
3 4
(R0.05) TYP
(2.6)
4214840/B 03/2018
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
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