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Lec 24 Design of Hack Computer

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0% found this document useful (0 votes)
91 views32 pages

Lec 24 Design of Hack Computer

Uploaded by

Noman Sarfraz
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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or as an example) Computer Organization & Assembly Language Programming Solution: multiplex, using an instruction register

Memory

data
@R1
a CHIP Xor { program
And Memory
output
ALU
D=M
IN a, b;
Not notb aAndNotb
OUT out; instruction
register
instruction instruction @temp
PARTS:
data
load M=D
Or out on

Not nota
Not(in=a, out=nota); Memory
address
fetch

input
notaAndb Not(in=b, out=notb);
mux
And And(a=nota, b=b, out=w1); data
fetch /
execute
instruction
b And(a=a, b=notb, out=w2); address address bit

control bus 0 00 00 00 00 0 00 00 01
Or(a=w1, b=w2, out=out);
} address bus
1 11 11 10 00 0 01 00 00
address bus (data flows not shown, to minimize clutter)

0 00 00 00 00 0 01 00 00
Nand to Tetris / www.nand2tetris.org / Chapter 5 / Copyright © Noam Nisan and Shimon Schocken Slide 25

ulator
1 11 00 01 10 0 00 10 00
nput pins (e.g. a and b)

Lecture # 24
tb, notaAndb)
Design of Hack Computer
ight © Noam Nisan and Shimon Schocken Slide 33

global main
SECTION .data
msg: db "Learning is fun with Arif", 0Ah, 0h
len_msg: equ $ - msg 0: b8 01 00 00 00
SECTION .text 5: bf 01 00 00 00
main:
#include<stdio.h> mov rax,1 a: 48 be 00 00 00 00 00
#include<stdlib.h> mov rdi,1 11: 00 00 00
int main(){ mov rsi,msg 14: ba 1b 00 00 00
mov rdx,len_msg
printf("Learning is fun with Arif\n"); syscall
19: 0f 05
exit(0); mov rax,60 1b: b8 3c 00 00 00
} mov rdi,0 20: bf 00 00 00 00
syscall 25: 0f 05

Slides of first half of the course are adapted from:


https://www.nand2tetris.org
Download s/w tools required for first half of the course from the following link:
https://drive.google.com/file/d/0B9c0BdDJz6XpZUh3X2dPR1o0MUE/view

Instructor: Muhammad Arif Butt, Ph.D.


Today’s Agenda
• Recap of Hack Computer Architecture
• Implementation of Hack CPU Chip (CPU.hdl)
• Implementation of Hack Memory Chip (Memory.hdl)
– RAM16 chip (RAM16K.hdl)
– Screen chip (Screen.hdl)
– Keyboard chip (Keyboard.hdl)
• Implementation of Hack ROM Chip (ROM32K.hdl)
• Implementation of Hack Computer Chip (Computer.hdl)

Instructor: Muhammad Arif Butt, Ph.D. 2


Recap: Hack Computer Architecture

ROM Hack CPU RAM

instruction data out

instruction ALU
data
memory memory
address of data in
next
instruction D register

A register

PC

reset

Instructor: Muhammad Arif Butt, Ph.D. 3


Implementation of
Hack CPU Chip

Instructor: Muhammad Arif Butt, Ph.D. 4


Recap: Hack CPU Interface
Hack CPU

outM
From data memory inM 16
16 writeM To Data Memory
ALU 1
addressM
From instruction memory instruction 15
16
CU
restarting reset
D register
15 PC To Instruction Memory
signal 1 A register

PC

Inputs: Outputs:
• Data Value • Data Value
• Instruction • Write to Memory? (yes/no)
• Reset Bit • Memory Address
• Address of next instruction
Instructor: Muhammad Arif Butt, Ph.D. 5
Chip Parts of Hack CPU and their Control
ALU Output ALU Output
instr[4]
instr[6..11]
loadAReg

D register

Mux16 A register Out M


Instrution
ALU
111 a cccccc ddd jjj instr[15]

inM Mux16
M input
Write M
C
A register output zr, ng
instr[12] Address M
Memory address output
Reset
Reset bit
load

PC
Program counter output
PC

Instructor: Muhammad Arif Butt, Ph.D. 6


Select Input of First Mux16 Chip
ALU Output ALU Output

D register

Mux16 A register Out M


Instrution
ALU
111 a cccccc ddd jjj instr[15]

inM Mux16
M input
Write M
C
A register output zr, ng

Address M
Memory address output
Reset
Reset bit

PC
Program counter output
PC

Instructor: Muhammad Arif Butt, Ph.D. 7


Select Input of Second Mux16 Chip
ALU Output ALU Output

D register

Instrution
Mux16 A register Complete
ALU
Specification Out M

111 a cccccc ddd jjj instr[15] dest= comp


inM Mux16
M input
1 11 a c1 c2 c3 c4 c5 c
Write M
A register output
comp
zr, ng
C c1 c2 c3 c4 c5 c6 dest
0 1 0 1 0 1 0 null
instr[12] 1 Memory address output
1 1 1 1 1 1 Address MM
-1 1 1 1 0 1 0 D
Reset D 0 0 1 1 0 0 MD
Reset bit
A M 1 1 0 0 0 0 A
!D 0 0 1 1 0 1 AM
!A !M 1 1 0 0 0 1 AD
-D 0 0 1 1 1 1 PC AMD
Program counter output
-A -M 1 1 0 0 1 1
PC D+1 0 1 1 1 1 1 jump
A+1 M+1 1 1 0 1 1 1 null
D-1 0 0 1 1 1 0
JGT
A-1 M-1 1 1 0 0 1 0
D+A D+M 0 0 0 0 1 0 JEQ
D-A D-M 0 1 0 0 1 1 JGE
A-D M-D 0 0 0 1 1 1 JLT
D&A D&M 0 0 0 0 0 0 JNE
D|A D|M 0 1 0 1 0 1 JLE
a==0 a==1 JMP

Instructor: Muhammad Arif Butt, Ph.D. 8


Load Input of A-Register Chip
ALU Output ALU Output

loadAReg

D register

y Code Format:
Mux16
Instrution
C-Instruction
A register Out M
ALU
dest= comp ;jump
111 a cccccc ddd jjj instr[15]

inM Mux16
M input
c1 c2 c3 c4 c5 c6 d1 d2 d3 j1 j2 j3 Write M
C
A register output zr, ng
instr[12] Address M
Memory address output
Reset
Reset bit

dest d1 d2 d3 effect: the value is stored in:


PC
null 0 0 0 The value is not stored Program counter output
M 0 0 1 RAM[A] PC
D 0 1 0 D register
MD 0 1 1 RAM[A] and D register
A 1 0 0 A register
AM 1 0 1 A register and RAM[A]
AD 1 1 0 A register and D register
AMD 1 1 1 A register, RAM[A], and D register

Instructor: Muhammad Arif Butt, Ph.D. 9


Load Input of D-Register Chip
ALU Output ALU Output
instr[4]

loadAReg

D register

y Code Format:
Mux16
Instrution
C-Instruction
A register Out M
ALU
dest= comp ;jump
111 a cccccc ddd jjj instr[15]

inM Mux16
M input
c1 c2 c3 c4 c5 c6 d1 d2 d3 j1 j2 j3 Write M
C
A register output zr, ng
instr[12] Address M
Memory address output
Reset
Reset bit

dest d1 d2 d3 effect: the value is stored in:


PC
null 0 0 0 The value is not stored Program counter output
M 0 0 1 RAM[A] PC
D 0 1 0 D register
MD 0 1 1 RAM[A] and D register
A 1 0 0 A register
AM 1 0 1 A register and RAM[A]
AD 1 1 0 A register and D register
AMD 1 1 1 A register, RAM[A], and D register

Instructor: Muhammad Arif Butt, Ph.D. 10


ic Code to Binary Code
Load Input of PC-Register
mp ;jump ALU Output ALU Output
instr[4]

c5 c6 d1 d2 d3 loadAReg
j1 j2 j3
D register
dest d1 d2 d3 effect: the value is stored in:
null
Instrution 0 0Mux16
0 The valueA register
is not stored Out M

M 0 0 1 RAM[A] ALU
111 Da cccccc 0ddd jjj
1 D register
0 instr[15]
MD 0 1 1 RAM[A] and D register Mux16
inM
A 1 0 0 A register
M input

AM 1 0 1 A register and RAM[A] Write M


C
AD 1 1 0 A register and DA register
registeroutput zr, ng

AMD 1 1 1 A register, RAM[A], and D register instr[12] Memory address output


Address M

Reset
Reset bit
jump j1 j2 j3 effect: load

null 0 0 0 no jump PC
Program counter output
JGT 0 0 1 if out > 0 jump
PC
JEQ 0 1 0 if out = 0 jump
JGE 0 1 1 if out ≥ 0 jump
JLT 1 0 0 if out < 0 jump load = f(jump bits, zr/ng bits)
JNE 1 0 1 if out ≠ 0 jump if (load == 1)
JLE 1 1 0 if out ≤ 0 jump
JMP 1 1 1 Unconditional jump PC = A

Instructor: MuhammadifArif 11
to jump to ROM[17], D-1Butt,
==Ph.D.
0
Control Input of ALU Chip
ALU Output ALU Output
instr[4]
instr[6..11]
loadAReg

D register

Complete Specification
Mux16
Instrution
A register of C-Instruction ALU
Out M

111 a cccccc ddd jjj dest= comp ;jump


instr[15]

inM Mux16
1 11 a c1 c2 c3
M input
c4 c5 c6 d1 d2 d3 j1 j2 j3
Write M
comp c1 c2 c3 c4 c5 c6 dest d1 d2 d3
A register output
effect: the value is stored in: zr, ng
C
0 1 0 1 0 1 0 null 0 0 0 The value is not stored
1 1 1 1 1 1 1 M 0 0 1 RAM[A]instr[12] Address M
Memory address output
-1 1 1 1 0 1 0 D 0 1 0 D register
Reset
D 0 0 1
Reset bit
1 0 0 MD 0 1 1 RAM[A] and D register
A M 1 1 0 0 0 0 A 1 0 0 A register load
!D 0 0 1 1 0 1 AM 1 0 1 A register and RAM[A]
!A !M 1 1 0 0 0 1 AD 1 1 0 A register and D register
-D 0 0 1 1 1 1 AMD 1 1 1 A register, RAM[A], and D register PC
Program counter output
-A -M 1 1 0 0 1 1
D+1 0 1 1 1 1 1 jump j1 j2 j3 effect:PC
A+1 M+1 1 1 0 1 1 1 null 0 0 0 no jump
D-1 0 0 1 1 1 0
JGT 0 0 1 if out > 0 jump
A-1 M-1 1 1 0 0 1 0
D+A D+M 0 0 0 0 1 0 JEQ 0 1 0 if out = 0 jump
D-A D-M 0 1 0 0 1 1 JGE 0 1 1 if out ≥ 0 jump
A-D M-D 0 0 0 1 1 1 JLT 1 0 0 if out < 0 jump
D&A D&M 0 0 0 0 0 0 JNE 1 0 1 if out ≠ 0 jump
D|A D|M 0 1 0 1 0 1 JLE 1 1 0 if out ≤ 0 jump
a==0 a==1 JMP 1 1 1 Unconditional jump

Instructor: Muhammad Arif Butt, Ph.D. 12


CPU Implementation
/** CPU.hdl
The Hack CPU (Central Processing unit), consisting of an ALU, two registers named A and D, and a
program counter named PC. The CPU is designed to fetch and execute instructions written in the
Hack machine language. In particular, functions as follows:
Executes the inputted instruction according to the Hack machine language specification. The D
and A in the language specification refer to CPU-resident registers, while M refers to the
external memory location addressed by A, i.e. to Memory[A]. The inM input holds the value of
this location. If the current instruction needs to write a value to M, the value is placed in
outM, the address of the target location is placed in the addressM output, and the writeM
control bit is asserted. (When writeM==0, any value may appear in outM). The outM and writeM
outputs are combinational: they are affected instantaneously by the execution of the current
instruction. The addressM and pc outputs are clocked: although they are affected by the
execution of the current instruction, they commit to their new values only in the next time
step. If reset==1 then the CPU jumps to address 0 (i.e. pc is set to 0 in next time step) rather
than to the address resulting from executing the current instruction.
*/
CHIP CPU {
IN inM[16], // M value input (M = contents of RAM[A])
instruction[16], // Instruction for execution
reset; // Signals whether to re-start the current
// program (reset==1) or continue executing
// the current program (reset==0).

OUT outM[16], // M value output


writeM, // Write to M?
addressM[15], // Address in data memory (of M)
pc[15]; // address of next instruction

PARTS:
// Chip implementation code on next slide

Instructor: Muhammad Arif Butt, Ph.D. 13


CPU Implementation
CPU.hdl (cont…)
PARTS:
Not(in=instruction[15],out=Ainst);
Not(in=Ainst,out=Cinst);
Mux16(a=instruction, b=ALUout, sel=Cinst, out=ARegBefore);
And(a=instruction[5], b=Cinst, out=d1); // instruction[5] = d1 if it's a C instruction
Or(a=d1, b=Ainst, out=storeAReg);
ARegister(in=ARegBefore, load=storeAReg, out=A, out[0..14]=addressM);
Mux16(a=A, b=inM, sel=instruction[12], out=MOrA); // instruction[12] = a
And(a=instruction[4], b=Cinst, out=d2); // instruction[4] = d2 if it's a C instruction
DRegister(in=ALUout, load=d2, out=D);

ALU(x=D, y=MOrA, zx=instruction[11], nx=instruction[10], zy=instruction[9],


ny=instruction[8], f=instruction[7], no=instruction[6], out=ALUout, out=outM, zr=zr, ng=ng);

And(a=instruction[3], b=Cinst, out=writeM); // instruction[2] = d3 if it's a C instruction


Not(in=zr, out=notzr);
Not(in=ng, out=notng);
And(a=notzr, b=notng, out=pos);
And(a=instruction[2], b=ng, out=jneg);
And(a=instruction[1], b=zr, out=jzer);
And(a=instruction[0], b=pos, out=jpos);
Or(a=jneg, b=jzer, out=jzerneg);
Or(a=jzerneg, b=jpos, out=jumpIfCinst);
And(a=jumpIfCinst, b=Cinst, out=jump);

PC(in=A, load=jump, inc=true, reset=reset, out[0..14]=pc);


}

Instructor: Muhammad Arif Butt, Ph.D. 14


The Hack Computer

ROM Hack CPU Memory


instruction data out

instruction ALU
data
memory memory
address of data in
next
instruction D register

A register

PC

reset

Instructor: Muhammad Arif Butt, Ph.D. 15


Implementation of
Hack Memory Chip

Instructor: Muhammad Arif Butt, Ph.D. 16


Memory Chip
load
Memory
0

in
RAM
16 (16K)
out
16,383
16,384 Screen 16
address (8K
24,575 memory
15 map)
24,576 Keyboard

• RAM/Data Memory: 16 bit, 16K RAM Chip (address 0 to 16383)


• Screen Memory Map: 16 bit, 8K memory Chip with a raster display side effect
(16384 to 24575)
• Keyboard Memory Map: 16 bit register with a keyboard side effect (address 24576)
Instructor: Muhammad Arif Butt, Ph.D. 17
RAM16 Chip Implementation
load

Memory Load
0 16K-Register/words RAM
in
in RAM Implementation tips:
• Memory of 16K registers, each 16 bit-wide. Out holds the value stored at the
(16K) 16
memory location specified by address. If load==1, out then the in value is loaded
16 RAM
into the memory location specified16by address (the loaded value will be emitted
out to out from the next time step onward)
address
16
• Feed the 16 bit i n value to all the registers, simultaneously
16,383 16 • Use DMux8Way chip to select one of the eight registers specified by address
Screen 15• Use Mux8Way16 chip to select the 16 bit contents of register specified by
address 16,384 address on 16 bit out output
(8K
15 memory RAM16K.hdl
24,575 map)
CHIP RAM16K {
24,576 Keyboard
IN in[16], load, address[14];
OUT out[16];
PARTS:
DMux4Way(in=load, sel=address[12..13], a=load0, b=load1, c=load2, d=load3);

RAM4K(in=in, load=load0, address=address[0..11], out=out0);


RAM4K(in=in, load=load1, address=address[0..11], out=out1);
RAM4K(in=in, load=load2, address=address[0..11], out=out2);
RAM4K(in=in, load=load3, address=address[0..11], out=out3);

Mux4Way16(a=out0, b=out1, c=out2, d=out3, sel=address[12..13], out=out);


}

Instructor: Muhammad Arif Butt, Ph.D. 18


33
Screen Built-in Chip
Memory Load

in

in 0 RAM 16 out
Screen
16
(16K) 16
16,383 address
16,384 Screen out
(8K 15
memory 16
address 24,575 map)
24,576
15
Keyboard Screen Built in Chip
Screen.hdl

CHIP Screen {
IN in[16], // what to write
load, // write-enable bit
address[13]; // where to read/write
OUT out[16]; // Screen value at the given address
BUILTIN Screen;
CLOCKED in, load;
}

Instructor: Muhammad Arif Butt, Ph.D. 19


Keyboard
Keyboard Built-in Chip
Memory

Memory
0
in 0 RAM
16
in (16K) RAM built-in
16,383 chip
16,384 (16K)
out
16 Screen
(8K out
memory 16
16,383 16
address 24,575 map)
16,384 Screen
address
24,576
15 Keyboard (8K memory
15 24,575
map) Key Board Built in Chip
KeyBoard.hdl
24,576 Keyboard

CHIP Keyboard {

• Realized by a built-in OUT


chipout[16];
named Keyboard
// The ASCII code of the pressed key,
// or 0 if no key is currently pressed,
• Keyboard: A read-only 16-bit register
// +
ora one
keyboard input side-effect.
the special codes
BUILTIN Keyboard;
}

Nand to Tetris / www.nand2tetris.org / Chapter 5 / Copyright © Noam Nisan and Shimon Schocken
20
Instructor: Muhammad Arif Butt, Ph.D.
Memory Chip Implementation

Memory.hdl
CHIP Memory {
IN in[16], load,
/** The complete address[15];
address space of the Hack computer's data memory, including RAM and memory-
OUT mapped I/O. Facilitates read and write operations, as follows:
out[16];
PARTS: Read: out(t) = Mem[address(t)](t)
DMux(in=load, sel=address[14], a=loadRam, b=loadScreen);
Write: if load(t) then Mem[address(t)](t+1) = in(t)
RAM16K(in=in, address=address[0..13], load=loadRam, out=outRam);
In words: the chip always
Screen(in=in, outputs the value stored at the memory
address=address[0..12], location specified by address.
load=loadScreen, out=outScreen);
Keyboard(out=outKeyboard);
If load==1, the in value is loaded into the register specified by address. This value becomes available
through the out output from the
Mux4Way16(a=outRam, next time stepc=outScreen,
b=outRam, onward. d=outKeyboard, sel=address[13..14],
out=out);
The memory access rules are as follows:
} Only the top 16K+8K+1 words of the address space are used.
0x0000-0x5FFF: accessing an address in this range results in accessing the RAM. 21
Instructor: Muhammad Arif Butt, Ph.D.
0x4000-0x5FFF: accessing an address in this range results in accessing the Screen.
The Hack Computer

ROM Hack CPU Memory

✔ ✔
instruction data out

instruction ALU
data
memory memory
address of data in
next
instruction D register

A register

PC

reset

Instructor: Muhammad Arif Butt, Ph.D. 22


Implementation of
Hack Instruction Memory Chip

Instructor: Muhammad Arif Butt, Ph.D. 23


Instruction Memory

Hack Program
0000000000001101
1110101001010101 instruction data out
0000000000000001 Instruction data
1110101001101011 load memory CPU
0000001100110101 memory
1110010111011111 ROM32K
*
* Address data in
*
1111001001100111

reset

To run a program on the Hack computer:


• Load the program into the Instruction Memory How do you load a
• Press “reset” program into the
Instruction Memory?
• The program starts running
Instructor: Muhammad Arif Butt, Ph.D. 24
Loading a Program in Instruction Memory

Hack Program
0000000000001101
1110101001010101 Instruction instruction data out data
0000000000000001
memory CPU memory
1110101001101011 load
0000001100110101 ROM32K
1110010111011111
*
* Address data in
*
1111001001100111

reset

• Hardware Implementation: We use a specialized hardware normally called the programmers,


which burn/write the hack machine code into a EEPROM chip. We then plug that EEPROM into our
computer. Press the reset button and our program starts running. To run another program repeat
process (game cartridges for game consoles)
• Hardware Simulation: Programs are stored in text files; Program loading is emulated by the built-
in ROM chip. The simulator’s software features a load-program service
Instructor: Muhammad Arif Butt, Ph.D. 25
ROM32K Built-in Chip
ROM32K.hdl
Fed from the
CHIP ROM32K { program counter
IN address[15]; out
address
OUT out[16];
15
ROM32K 16
BUILTIN ROM32K;
}
Current Instruction

• The Hack instruction memory is implemented as a built-in ROM32K chip,


which is actually a read-only, 16-bit, 32K RAM chip with program loading
side-effect. The chip always outputs the value stored at the memory location
specified by address (next instruction to be executed)
• The built-in chip implementation (written in Java) has a GUI side-
effect, showing an array-like component that displays the ROM’s contents
• The ROM32K chip is supposed to be pre-loaded with a machine language
program. However, once the built-in chip implementation is loaded inside
the hardware simulator, it allows the user to load Hack machine program
from a text file (We will soon see a demo)

Instructor: Muhammad Arif Butt, Ph.D. 26


Implementation
of
Hack Computer Chip

Instructor: Muhammad Arif Butt, Ph.D. 27


Hack Computer Abstraction

Hack Computer

reset
reset

Instructor: Muhammad Arif Butt, Ph.D. 28


Hack Computer Implementation

✔ inM ✔
instruction ✔ writeM

ROM32K CPU outM Memory


addressM
pc

reset

Instructor: Muhammad Arif Butt, Ph.D. 29


Hack Computer Chip
Computer.hdl
/**
* The HACK computer, including CPU, ROM and RAM.
* When reset is 0, the program stored in the computer's ROM executes.
* When reset is 1, the execution of the program restarts.
* Thus, to start a program's execution, reset must be pushed "up" (1)
* and "down" (0). From this point onward the user is at the mercy of
* the software. In particular, depending on the program's code, the
* screen may show some output and the user may be able to interact
* with the computer via the keyboard.
*/

CHIP Computer {
IN reset;
PARTS:
ROM32K(address=pc, out=instruction);
CPU(inM=memoryOut, instruction=instruction, reset=reset, outM=outM,
writeM=writeM, addressM=addressM, pc=pc);
Memory(in=outM, load=writeM, address=addressM, out=memoryOut);
}

Simplicity at its peak J


Instructor: Muhammad Arif Butt, Ph.D. 30
Running Assembly Programs in Hack Computer

Demo
Hack Computer Chip

add.asm, swap.asm,
rect.asm

Instructor: Muhammad Arif Butt, Ph.D. 31


Things To Do

Instructor: Muhammad Arif Butt, Ph.D. 32

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