Universal Counter

Universal counter can be defined as a counter that counts the number of cycles over a second.
The universal counter is used for measuring time, frequency, pulse rates, pulse counting,
periodic times, speeds and velocities etc. In other words, all measurements of time period,
frequency, time interval etc., by various circuits can be assembled together to form one
complete block, called a universal counter timer. In universal counters, measured values are
fundamentally displayed together with their measurement unit. The measuring range can be
suited to requirements prior to the start of measurement, e.g. the number of decimals to be
displayed can be physically reduced to a sensible number. Desired functions can be selected
using the function switch.

BLOCK DIAGRAM OF UNIVERSAL COUNTER:

There are two channels for the input named as chl and ch2. The input signal reaches the
preamplifiers through the attenuators. Two Schmitt Trigger circuits are fed from the output of
the two preamplifiers. The two Schmitt Triggers present their outputs to the logic control
circuitry. The second channel is meant for frequency ratio and multiple ratio measurement.
The block logic control circuitry (LCC) contains logic gates that are enabled or disabled
depending on the selection of the function by the function switch and on the status of the
inputs to the LCC. The output from the LCC directly reaches one input of the Main Gate. The
main gate output drives a decimal counter. The output of the decimal counter drives a
decoder driver which drives the display unit. The second input to the main gate is derived
from gate control flip flop. The gate control flip-flop is controlled by the output of the logic

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control circuit. The crystal oscillator (also called clock oscillator) generates an output voltage
at 1 MHz, that is sinusoidal in nature. The crystal oscillator offers excellent frequency
stability. In order to improve on the long term frequency stability, the crystal oscillator is kept
in a constant temperature oven. The output of the crystal oscillator is given to a Schmitt
Trigger circuit. This converts the sinusoidal voltage of the crystal oscillator in to train of
pulses. The rate of the pulse train offered by the Schmitt trigger will be equal to the frequency
of the clock oscillator. The output from the Schmitt trigger is presented to a chain of decade
dividers. The output of the Schmitt trigger, as well as the outputs of the decade dividers is
brought over the ways of a selector switch. The selector switch has seven ways w1 to w7, and
we can select pulses from 1 μs to 1 s. These are the time base pulses to the logic control
circuitry, again through another Schmitt Trigger.

Measurement of frequency using universal counter:- The part of the circuit of the
universal counter that is utilized for frequency measurement is presented in figure.

The input signal whose frequency is to be measured (counted) is given to the first channel of
the universal counter. It reaches the preamplifier through the attenuator. The amplified signal
reaches the Schmitt trigger where it is converted in to a square wave. A differentiator circuit,
along with a clipper (not shown in the diagram) produces a train of pulses. This train of
pulses is separated by the period of the input signal. These pulses are applied to the A input
of the AND gate.

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The time base selector switch is selected to the appropriate range. The time base pulses are
given to the Schmitt trigger from where they reach the gate control flip-flop. The first time
base pulse triggers the gate control flip-flop and its output goes high. Therefore the B input of
the AND gate will be held at high state, thus enabling the AND gate. Therefore the input
signal pulses present at the A input of the AND gate are allowed to reach the decimal counter.
Therefore the count starts. The AND gate will be enabled as long as its B input is high. For
the second time base pulse, the gate control flip-flop toggles and its output goes low.
Therefore the B input of the AND gate goes low. Hence the AND gate is disabled, preventing
the input signal pulses from reaching the decimal counter.

Thus the decimal counter will count the input pulses only for the period between the first time
base pulse and the second time base pulse. If we select the time base pulse with 1 second
duration, the decimal counter counts the number of input pulses presented during that 1
second. This count will be displayed on the display which is the frequency of the input signal.

Measurement of time period using universal counter:- The part of the circuit of the
universal counter that is utilized for time period measurement is presented in figure.

The gate control flip-flop is controlled by the input signal presenting the start and stop signals
through the two input channels. That is the gating signal is obtained from the input signal
whose time period is not known. This input signal controls the enabling and disabling of the
main gate. The other input to the main gate is derived from the decade dividers connected
through the Schmitt trigger to the clock oscillator. Now the gate will pass the trigger pulses
from the divider to the decimal counter, which counts and displays. The decimal counter
counts the number of pulses that occur during one period of the unknown input signal.

Accuracy of a frequency counter:- Accuracy of a frequency counter depends on a number

of factors. There are several errors that can occur during measurement and can be described
as below.

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(1) Time base error: Accuracy of time base depends upon the type of clock oscillator used.
Its accuracy will have a direct impact on the overall frequency counter accuracy. The
oscillator accuracy is the sum of the various oscillator errors:

(a) Mains / line voltage variations: Variations in the power input voltage will cause
variations of the voltages to the crystal oscillator. The level of the variation will depend upon
the effectiveness of any voltage regulators, but there is always some small voltage variation.
This can result in small errors in the crystal oscillator voltage that will be reflected in the
frequency counter timer errors.

(b)Temperature stability: Temperature stability of the crystal oscillator used for the clock
or time base is one of the main sources of error or inaccuracy. The short term stability is
generally quoted in parts per million over a temperature range. Often when wanting to make
accurate measurements, it is wise to allow the test instrument to warm up and for the
temperature to stabilise over a period of a few hours before the measurement is taken. Oven
controlled crystal oscillators may reach their specified accuracy sooner, but experience
generally indicates allowing a frequency counter, or any other test instrument to warm up and
stabilise over a a few hours before making any accurate measurements.

(c)Short term stability: The short term variation include elements such as the short term
frequency variations including phase noise / phase jitter. If phase noise is high it can mean
that the gate period could vary by an amount that could cause fewer or more pulses to be
gated than the exact gate time would allow through.

(d)Long term stability: This form of crystal oscillator frequency error occurs over time.
While many high grade crystal oscillators are pre-aged, these errors still occur to some
degree. Typically they are expressed in parts per million over a month. A period this long is
taken because the effects of ageing are masked by the short term effects over much shorter
periods of time. The errors resulting from ageing of the frequency counter timer clock can be
reduced by periodic recalibration of the test instrument.

(2) The ± count error: One of the forms of frequency counter error occurs with the way
exact timing of the gate open and closure with respect to the incoming waveform. Sometimes
it is possible for the time base to open so that there is one more count than at other times. The
ambiguity occurs because of the non-coherent relationship between the time base clock and
the incoming waveform.

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The time base gate is open for the same amount of time in each case, but in the first case
three positive going edges are counted, whereas in the second case, two are counted. The
reason for this is the relative timing or phasing between the two signals. There can be a
difference of one count between two readings as a result of this error.

(3)Trigger error: Trigger errors on a frequency counter are those errors that occur on a
time interval counter as a result of noise on the incoming signal that result in the input gate
being opened or closed to soon or too late. They cause the cause one limit of the hysteresis
window of the input trigger to fire at the wrong time, thereby introducing a timing
measurement error. This error can be made worse by increasing he sensitivity of the input
circuitry and thereby allowing noise to have a greater effect.

(4)Systematic error : This form of measurement error on a test instrument occurs as a

result of a mismatch between the start and stop channels. It may result of differences in
channel rise or fall times, or the propagation delay differences.

Resolution of a frequency counter:- The resolution of a frequency counter is its ability to

differentiate between two signals that are close to each other. It is a measure of the number of
digits in the reading of the signal frequency. Most frequency counters are what are termed
direct reading counters, and the resolution is determined by the gate time. This is the time for
which the counter is counting the number of pulses or transition crossings. As the number of
crossings in a second is equal to the frequency, a one second gate time will enable
frequencies to be read down to a resolution on 1 Hz. It can be seen that for other gate times, a
0.1 second gate time will allow a resolution of 10 Hz to be achieved, whereas a 10 second
gate time will enable a resolution of 0.1 Hz to be achieved. Thus it can be seen that for a
direct reading frequency counter, the resolution is a function of the gate time.