ESSENTIALS OF COMPUTER

SCIENCE
Dr. K. Rajbabu M.E. Ph.D
Manager, Controls & Instrumentation
BHEL, Trichy
CONCEPT – PROGRAM – INPUT –
PROCESSING - OUTPUT
LANGUAGE

Human Language
Commonly used to express feelings and communication of messages
It can be oral or gestural communication

Computer Language
Computer language are the languages by which a user command a
computer to work on the algorithm for the desired input and expected
output
PROGRAM

A program is a series of organized instructions that directs a computer to

perform task
PROGRAMMING LANGUAGE

Programming language is a set of words, symbols and codes that enables

humans to communicate effectively with computer

Natural language have grammar and vocabulary

Programming language has syntax, keywords and constants

WHY SO MANY?

Continuous evolution
Optimization
New requirements & approaches
LEVELS OF PROGRAMMING
LOW LEVEL LANGUAGE

Low-level
level languages provide abstraction from the hardware

Represented in the binary form i.e. 0 or 1

They are machine instructions.

Classification of Low-level languages : Machine-level language & Assembly

level language.
MACHINE LANGUAGE

First generation programming

Operation Code – such as addition and subtraction

Operands – to identify the data to be processed

Machine language is a machine dependent language. E.g. IBM vs Apple varies

with architecture

Only language that can be understandable be computer

Very efficient code but difficult to write

ASSEMBLY LANGUAGE

Second Generation Language

Comparatively easier

Symbolic Operation codes replaced binary codes

Code is translated to object code using ASSEMBLER

ASSEMBLY LANGUAGE
ASSEMBLY LANGUAGE
 COMPARISON
Parameters Machine Level Language Assembly Level Language
It is above the machine level
It is at the lowest level in the hierarchy
language in the hierarchy and so
rarchy Level and has zero abstraction level from the
less abstraction level from the
hardware.
hardware.
arning Curve It is hard to understand by Humans. It is easy to learn and maintain.
It is written in simple English and i
itten as It is written in binary that is 0 or 1.
easy to understand.
It is a first-generation
generation programming It is the second-generation
neration
language. programming language.
quirement for
The machine code is executed directly It requires an assembler to conver
nslator/Assembler
so no translator is required. assembly language to machine co
HIGH-LEVEL
LEVEL LANGUAGE

High-level
level language allows us to write programs that are independent of the type of
computer.

Focus only on attention towards Logic.

The language needs a compiler to translate a high-level

high language into a low-level
language.

The high-level
level language is easy to learn & maintain.

The high-level
level languages are portable i.e. they are machine-independent.
machine
 COMPARISON

Parameters Low-Level
Level Language High-Level Language
It is machine friendly i.e. easily It is user friendly, as it is writt
vel of Understanding
understood by computers. in simple English.
me of Execution Takes time to execute. Executes at a faster pace.

It requires the compiler to

It requires the assembler to convert
ol Required convert the high-level langu
assembly code to machine code.
to machine instructions.
rtability It is not portable. It is portable.
mory Efficiency It is memory efficient. It is less memory efficient.
bugging and
Not easy Easy
aintenance
HLL VS LLL

Low Level Language (LLL) High Level Language (HLL)

Direct memory Management Interpreted
More memory efficient Less memory efficient
Strictly hardware dependent Mostly independent of hardware
Faster than high level language Poor performance
Complex in nature Easy to maintain
Statements corresponds to clock cycles Codes are concise
Needs assembler Needs compiler or interpreter
Machine code and Assembly language Python, Java, C++ etc
HIGHER LEVEL PROGRAMMING LANGUAGE
PROCEDURAL LANGUAGE

This programming paradigm, derived from structured programming specifies a series of

well-structured
structured procedures and steps to compose a program.

It provides a set of commands by segregating the program into variables, functions,

statements & conditional operators.

Various Programming editors or IDEs help users develop programming code using one or
more programming languages.

Some of them are Adobe Dreamweaver, Eclipse or Microsoft visual studio, BASIC, C, Java,
PASCAL, FORTRAN are examples of Procedural Programming Language.
FUNCTIONAL PROGRAMMING
LANGUAGES
Declarative programming paradigm constructed by applying and composing functions

The language emphasizes expressions and declarations than on the execution of

statements.

The foundation of functional programming is lambda calculus which uses conditional

expressions and recursion to perform the calculations.

It does not support iteration like loop statements & conditional statements like if-else.
if

Some of the most prominent functional programming languages are Haskell, SML,
Scala, F#, ML, Scheme, and More.
OBJECT-ORIENTED
ORIENTED PROGRAMMING
LANGUAGE
This programming paradigm is based on the “objects” i.e. it contains data in the form of
fields and the code in the form of procedures.

OOPs,, offer many features like abstraction, encapsulation, polymorphism, inheritance,

classes, and Objects.

Encapsulation is the main principle as it ensures secure code.

It also emphasizes code reusability with the concept of inheritance and polymorphism
allows the spreading of current implementations without changing much of the code.

Most multi-paradigm
paradigm languages are OOPs languages such as Java, C++, C#, Python,
Javascript, and more.
 SCRIPTING PROGRAMMING LANGUAGES

programming languages that are not compiled but are rather interpreted.
The instructions are written for a run time environment.
majorly used in web applications, System administration, games and multimedia.
It is used to create plugins and extensions for existing applications.
Server Side Scripting Languages: Javascript,, PHP, and PERL.
Client-Side Scripting Languages: Javascript,, AJAX, Jquery
System Administration: Shell, PERL, Python
Linux Interface: BASH
Web Development: Ruby
LOGIC PROGRAMMING

The programming paradigm is largely based on formal logic.

The language does not tell the machine how to do something but employs
restrictions on what it must consider doing.

PROLOG,, ASAP(Answer Set programming), and Datalog are major logic

programming languages, rules are written in the form of classes.
PROCEDURAL VS FUNCTIONAL
VS OOP
PROCEDURAL VS FUNCTIONAL
VS OOP
PROCEDURAL VS FUNCTIONAL
VS OOP
ABSTRACTION
PROGRAM DEVELOPMENT
PROGRAM
C++ PROGRAM

// Your First C++ Program

#include <iostream>

int main() {

std::cout << "Hello World!";

return 0;

}
 JAVA PROGRAM

* This is a simple Java program. public static void main(String args[

FileName : "HelloWorld.java". */ {

lass HelloWorld System.out.println("Hello, World");

/ Your program begins with a call to main(). }

/ Prints "Hello, World" to the terminal

window.
DEVELOPMENT CYCLE (PDLC)

Define
Scope, objective
Analyze
Input – process - output
Assumptions, deliverables, exceptions
Algorithm development
Coding and Documentation
Testing and Debugging
Maintenance
ALGORITHM

An algorithm is a sequence of unambiguous instructions for solving a problem,

i.e., for obtaining a required output for any legitimate input in a finite amount of
time
ALGORITHMIC ANALYSIS

Space complexity
How much space is required

Time complexity
How much time does it take to run the algorithm
GENERAL ANALYSIS

Depends on the machine and platform.

However, the analysis should be independent of machine and platform.

Exact value cannot be arrived.

Further, dependency on
amount of input

Sequence of input
WHAT DOES “SIZE OF THE INPUT” MEAN?

If we are searching an array, the “size” of the input could be the size of the array

If we are merging two arrays, the “size” could be the sum of the two array sizes

If we are computing the nth Fibonacci number, or the nth factorial, the “size” is n

We choose the “size” to be the parameter that most influences the actual
time/space required
It is usually obvious what this parameter is

Sometimes we need two or more parameters

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GENERAL ANALYSIS

Complexity is measured as a function of size of input

Time is measured as T(n) and Space as S(n) for ‘n’ inputs

Rate of growth - Exponential

2n, nn,n!

Polynomial Growth – n2, n3, log(n)

Better execution time is through algorithm with linear growth for large amount
of data
TIME ANALYSIS

Active or Characteristic Operations alone to be considered

What a “characteristic operation” is depends on the particular problem
If searching, it might be comparing two values
If sorting an array, it might be:
comparing two values
swapping the contents of two array locations
both of the above
Sometimes we just look at how many times the innermost loop is executed
TIME ANALYSIS

Bookkeeping operations shall be ignored.

Count the number of active operations

Ignore the constants and arrive at a common notation with respect to ‘n’ with the
highest value.
 IS IT POSSIBLE TO FIND EXACT VALUES?

It is sometimes possible, in assembly language, to compute exact time and space

requirements

We know exactly how many bytes and how many cycles each machine instruction takes

For a problem with a known sequence of steps (factorial, Fibonacci), we can determine
how many instructions of each type are required

However, often the exact sequence of steps cannot be known in advance

The steps required to sort an array depend on the actual numbers in the array (which
we do not know in advance)
 HIGH LEVEL LANGUAGES
n a higher-level
level language (such as Java), we do not know how long each operation
akes
Which is faster, x < 10 or x <= 9 ?
We don’t know exactly what the compiler does with this
The compiler probably optimizes the test anyway (replacing the slower version with the
faster one)

n a higher-level
level language we cannot do an exact analysis
Our timing analyses will use major oversimplifications
Nevertheless, we can get some very useful results
 CONSTANT TIME
Constant time means there is some constant k such that this operation always takes k
nanoseconds

A Java statement takes constant time if:

It does not include a loop

It does not include calling a method whose time is unknown or is not a constant

f a statement involves a choice (if or switch) among operations, each of which takes constant
ime, we consider the statement to take constant time
This is consistent with worst-case analysis
 LINEAR TIME
We may not be able to predict to the nanosecond how long a Java program will take, but
do know some things about timing:
for (i = 0, j = 1; i < n; i++) { j = j * i;; }

This loop takes time k*n + c, for some constants k and c

k : How long it takes to go through the loop once

(the time for j = j * i, plus loop overhead)

n : The number of times through the loop (we

( can use this as the “size” of the problem)

c : The time it takes to initialize the loop

The total time k*n + c is linear in n

CONSTANT TIME IS (USUALLY)
USUALLY) BETTER THAN LINEAR TIME

Suppose we have two algorithms to solve a task:

Algorithm A takes 5000 time units
Algorithm B takes 100*n time units

Which is better?
Clearly, algorithm B is better if our problem size is small, that is, if n < 50
Algorithm A is better for larger problems, with n > 50
So B is better on small problems that are quick anyway
But A is better for large problems, where it matters more

We usually care most about very large problems

But not always!
 THE ARRAY SUBSET PROBLEM

Suppose you have two sets, represented as unsorted arrays:

int[] sub = { 7, 1, 3, 2, 5 };
int[] super = { 8, 4, 7, 1, 2, 3, 9 };

and you want to test whether every element of the first set (sub) also occurs in the second set (super):
System.out.println(subset(sub, super));

(The answer in this case should be false, because sub contains the integer 5, and super doesn’t)

We are going to write method subset and compute its time complexity (how fast it is)

Let’s start with a helper function, member, to test whether one number is in an array
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 MEMBER
static boolean member(int x, int[] a) {
int n = a.length;
for (int i = 0; i < n; i++) {
if (x == a[i]) return true;
}
return false;
}
If x is not in a, the loop executes n times, where n = a.length
This is the worst case
If x is in a, the loop executes n/2 times on average
Either way, linear time is required: k*n+c
 SUBSET
static boolean subset(int[] sub, int[] super) {
int m = sub.length;
for (int i = 0; i < m; i++)
if (!member(sub[i], super) return false;
return true;
}
The loop (and the call to member) will execute:
m = sub.length times, if sub is a subset of super
This is the worst case, and therefore the one we are most interested in
Fewer than sub.length times (but we don’t know how few)
We would need to figure this out in order to compute average time complexity
The worst case is a linear number of times through the loop
But the loop body doesn’t take constant time, since it calls member, which takes linear time
ANALYSIS OF ARRAY SUBSET ALGORITHM

We’ve seen that the loop in subset executes m = sub.length times (in the worst case)

Also, the loop in subset calls member, which executes in time linear in n = super.length

Hence, the execution time of the array subset method is m*n, along with assorted
constants
We go through the loop in subset m times, calling member each time

We go through the loop in member n times

If m and n are similar, this is roughly quadratic

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 WHAT ABOUT THE CONSTANTS?

Forget the constants!

An added constant, f(n)+c, becomes less and less important as n gets larger

A constant multiplier, k*f(n), does not get less important, but...

Improving k gives a linear speedup (cutting k in half cuts the time required in half)
Improving k is usually accomplished by careful code optimization, not by better algorithms
We aren’t that concerned with only linear speedups!
SIMPLIFYING THE FORMULAE

Throwing out the constants is one of two things we do in analysis of algorithms

By throwing out constants, we simplify 12n2 + 35 to just n2

Our timing formula is a polynomial, and may have terms of various orders (constant,
linear, quadratic, cubic, etc.)
We usually discard all but the highest-order
order term

We simplify n2 + 3n + 5 to just n2
BIG O NOTATION

When we have a polynomial that describes the time requirements of an algorithm, we

simplify it by:
Throwing out all but the highest-order
order term
Throwing out all the constants

If an algorithm takes 12n3+4n2+8n+35 time, we simplify this formula to just n3

We say the algorithm requires O(n3) time

We call this Big O notation
(More accurately, it’s Big Ω,, but we’ll talk about that later)
BIG O FOR SUBSET ALGORITHM

Recall that, if n is the size of the set, and m is the size of the (possible) subset:
We go through the loop in subset m times, calling member each time

We go through the loop in member n times

Hence, the actual running time should be k*(m*n) + c, for some constants k and c

We say that subset takes O(m*n) time

CAN WE JUSTIFY BIG O NOTATION?

Big O notation is a huge simplification; can we justify it?

It only makes sense for large problem sizes
For sufficiently large problem sizes, the highest-order
highest term swamps all the rest!
Consider R = x2 + 3x + 5 as x varies:
x=0 x2 = 0 3x = 0 5=5 R=5
x = 10 x2 = 100 3x = 30 5=5 R = 135
x = 100 x2 = 10000 3x = 300 5 = 5 R = 10,305
x = 1000 x2 = 1000000 3x = 3000 5 = 5 R = 1,003,005
x = 10,000 x2 = 108 3x = 3*104 5 = 5 R = 100,030,005
x = 100,000 x2 = 1010 3x = 3*105 5 = 5 R = 10,000,300,005
30
Y = X2 + 3X + 5, FOR X=1..10

31
Y = X2 + 3X + 5, FOR X=1..20

32
COMMON TIME COMPLEXITIES

BETTER O(1) constant time

O(log n) log time
O(n) linear time
O(n log n) log linear time
O(n2) quadratic time
O(n3) cubic time
O(2n) exponential time
WORSE

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ALGORITHM

Repeat for I = 1 to N
Repeat for J = 1 to N
SUM 0
Repeat for K = 1 to N
SUM SUM + A[I, K] * B[K, J]
End Repeat K
C[I,J] SUM
End Repeat J
End Repeat I
ORDER NOTATION

The Big-O notation:

the running time of an algorithm as a function of the size of its input

worst case estimate

asymptotic behavior

O(n2) means that the running time of the algorithm on an input of size n is
limited by the quadratic function of n
 BIG-OH
OH NOTATION DEFINITION

iven functions f(n) and g(n), we say that 80

70 3n
n) is O(g(n)) if there are positive constants
60 2n+10
and n0 such that
50
n
n) ≤ cg(n) for n ≥ n0 40
30
xample: 2n + 10 is O(n) 20
2n + 10 ≤ cn 10
0
(c − 2) n ≥ 10 0 10 20
n
n ≥ 10/(c − 2)
Pick c = 3 and n0 = 10
 More Big-Oh
Oh Examples
7n-2
7n-2 is O(n)
need c > 0 and n0 ≥ 1 such that 7n-2 ≤ c•n for n ≥ n0
this is true for c = 7 and n0 = 1
3n3 + 20n2 + 5
3n3 + 20n2 + 5 is O(n3)
need c > 0 and n0 ≥ 1 such that 3n3 + 20n2 + 5 ≤ c•n3 for n ≥ n0
this is true for c = 4 and n0 = 21
3 log n + 5
3 log n + 5 is O(log n)
need c > 0 and n0 ≥ 1 such that 3 log n + 5 ≤ c•log n for n ≥ n0
this is true for c = 8 and n0 = 2
BIG-OH
OH AND GROWTH RATE

The big-Oh
Oh notation gives an upper bound on the growth rate of a function

The statement “f(n) is O(g(n))”” means that the growth rate of f(n) is no more than the
growth rate of g(n)

We can use the big-Oh

Oh notation to rank functions according to their growth rate

f(n)) is O(g(n)) g(n) is O(f(n))

g(n) grows more Yes No
f(n) grows more No Yes
Same growth Yes Yes
 BIG-OH RULES

f (n ) = a 0 + a 1 n + a 2 n 2 + ... + a d n d

If is f(n) a polynomial of degree d, then f(n) is O(nd), i.e.,

1. Drop lower-order terms
2. Drop constant factors

Use the smallest possible class of functions

Say “2n is O(n)” instead of “2n
2n is O(n2)”

Use the simplest expression of the class

Say “3n + 5 is O(n)” instead of “3n
3n + 5 is O(3n)”
 ASYMPTOTIC ALGORITHM ANALYSIS

The asymptotic analysis of an algorithm determines the running time in big-Oh

big notation

To perform the asymptotic analysis

We find the worst-case
case number of primitive operations executed as a function of the input size
We express this function with big-Oh
Oh notation

Example:
We determine that algorithm arrayMax executes at most 7n − 1 primitive operations

We say that algorithm arrayMax “runs in O(n) time”

Since constant factors and lower-order

order terms are eventually dropped anyhow, we can disregard them
when counting primitive operations
 IMPORTANT FUNCTIONS GROWTH RATES

n log(n) n nlog(n) n2 n3 2n
8 3 8 24 64 512 256

16 4 16 64 256 4096 65536

32 5 32 160 1024 32768 4.3x109

64 6 64 384 4096 262144 1.8x1019

128 7 128 896 16384 2097152 3.4x1038

256 8 256 2048 65536 16777218 1.2x1077

TYPES OF ANALYSIS

Best Case Analysis

Average Case Analysis

Worst Case Analysis

TYPES OF ANALYSIS

Best case running time is usually useless

Average case time is very useful but often difficult to determine

We focus on the worst case running time

Easier to analyze

Crucial to applications such as games, finance and robotics

SPACE COMPLEXITY

Space complexity = The amount of memory required by an algorithm to run to

completion
[Core dumps = the most often encountered cause is “dangling pointers”]

Some algorithms may be more efficient if data completely loaded into memory
Need to look also at system limitations

E.g. Classify 2GB of text in various categories [politics, tourism, sport, natural
disasters, etc.] – can I afford to load the entire collection?
SPACE COMPLEXITY

Fixed part: The size required to store certain data/variables, that is

independent of the size of the problem:
- e.g. name of the data collection
same size for classifying 2GB or 1MB of texts

Variable part: Space needed by variables, whose size is dependent on the size
of the problem:
- e.g. actual text
- load 2GB of text VS. load 1MB of text
SPACE COMPLEXITY

Space complexity is the amount of memory used by the algorithm (including the
input values to the algorithm) to execute and produce the result.

Sometime Auxiliary Space is confused with Space Complexity. But Auxiliary

Space is the extra space or the temporary space used by the algorithm during it's
execution.

Space Complexity = Auxiliary Space + Input space

 MEMORY DURING EXECUTION

Instruction Space: It's the amount of memory used to save the compiled version of

instructions.

Environmental Stack: Sometimes an algorithm(function) may be called inside another

algorithm(function). In such a situation, the current variables are pushed onto the system

stack, where they wait for further execution and then the call to the inside

algorithm(function) is made.
 MEMORY DURING EXECUTION

For example, If a function A() calls function B() inside it, then all th variables of the

function A()will get stored on the system stack temporarily, while the function B() is called

and executed inside the funciton A().

Data Space: Amount of space used by the variables and constants.

But while calculating the Space Complexity of any algorithm, we usually consider only Data

Space and we neglect the Instruction Space and Environmental Stack.

SPACE COMPLEXITY

S(P) = c + S(instance characteristics) for(i = 0; i<n; i++) {

c = constant
s+= a[i];
Example: }
float summation(const float (&a)[10], int n )
return s;
{
}
float s = 0;
Space? one for n, one for a [passed b
int i;
reference!], one for i constant sp
EXAMPLE

int square(int a) { return a*a; }

Linear: int sum(int A[], int n) { int sum = 0, i; for(i = 0; i < n; i++) sum = sum + A[i];
return sum; }
RELATIVES OF BIG-OH

big-Omega

f(n) is Ω(g(n))
(g(n)) if there is a constant c > 0 and an integer constant n0 ≥ 1 such that
f(n) ≥ c•g(n) for n ≥ n0

big-Theta

f(n) is Θ(g(n))
(g(n)) if there are constants c’ > 0 and c’’ > 0 and an integer constant n0 ≥
1 such that c’•g(n) ≤ f(n) ≤ c’’•g(n) for n ≥ n0
 EXAMPLES

You go and ask the first person of the class, if he has the pen. Also, you ask this person about
other 99 people in the classroom if they have that pen & So on.

O(n): Going and asking each student individually is O(N).

O(log n): Now I divide the class in two groups, then ask: “Is it on the left side, or the right
side of the classroom?” Then I take that group and divide it into two and ask again, and so
on. Repeat the process till you are left with one student who has your pen. This is what you
mean by O(log n).
PROBLEM

int i, j, k = 0;
for (i = n / 2; i <= n; i++) {
for (j = 2; j <= n; j = j * 2) {
k = k + n / 2;
}
}
Output:
O(nLogn)
PROBLEM

int a = 0, i = N;
while (i > 0) {
a += i;
i /= 2;
}
PROGRAM EXECUTION
PROGRAM

Plain text

Parsing

Text to command

Command to low level language

C COMPILER
C COMPILER
C COMPILER
JAVA COMPILER
 JAVA BYTE CODE

View compiled class file in text editor

Opcode(e.g. CA, 4C, etc) in the

bytecode above, each of them has a
corresponding mnemonic code (e.g.,
aload_0 in the example below). The
opcode is not readable, but we can use
javap to see the mnemonic form of a
.class file.
JAVA BYTE CODE

"javap -c"
c" prints out disassembled code for each method in the class.
Disassembled code means the instructions that comprise the Java bytecodes.
javap -classpath . -c HelloWorld
JAVA PREPROCESSOR

javap -classpath . -verbose HelloWorld

PREPROCESSOR

Step before compiler

Processes the preprocessor commands in the source code

Eg. # define MAX_ROWS 10

COMPILER

It is a computer program that reads source code and converts into assembly
code or executable code

High level language to object code

ASSEMBLER

Assembler creates object code by translating assembly language instruction into

OPCODE
INTERPRETER

It is a translator which translates the source code into machine code one line at a
time

Whereas compiler translates all lines at a same time

PYTHON INTERPRETER
PYTHON CODE
LINKER

Linker uses the object files created by the compiler

Links the predefined library objects to create the executable code

LOADER

Loads the executable code in the main memory

 FUNDAMETALS OF
OPERATING SYSTEM
OPERATING SYSTEM

Operating System acts as a communication bridge (interface) between the user

and computer hardware

Resource Manager

Allocates memory and CPU for running the program

OPERATING SYSTEM

Central Processing Unit (CPU)

Bus

Main Memory (RAM)

Secondary Storage Media

I / O Devices
CENTRAL PROCESSING UNIT

Central Processing Unit

The “brain” of the computer

Controls all other computer functions

In PCs (personal computers) also called the microprocessor or simply processor.

BUS

Computer components are connected by a bus.

A bus is a group of parallel wires that carry control signals and data between
components.
MAIN MEMORY

Main memory holds information such as computer programs, numeric data, or

documents created by a word processor.

Main memory is made up of capacitors.

If a capacitor is charged, then its state is said to be 1, or ON.

We could also say the bit is set.

If a capacitor does not have a charge, then its state is said to be 0, or OFF.

We could also say that the bit is reset or cleared.

MAIN MEMORY

Memory is divided into cells, where each cell contains 8 bits (a 1 or a 0). Eight bits
is called a byte.

Each of these cells is uniquely numbered.

The number associated with a cell is known as its address.

Main memory is volatile storage. That is, if power is lost, the information in main
memory is lost.
MAIN MEMORY

Other computer components can

get the information held at a particular address in memory, known as a READ,

or store information at a particular address in memory, known as a WRITE.

Writing to a memory location alters its contents.

Reading from a memory location does not alter its contents.

 MAIN MEMORY (CON’T)

All addresses in memory can be accessed in the same amount of time.

We do not have to start at address 0 and read everything until we get to the address we
really want (sequential access).

We can go directly to the address we want and access the data (direct or random access).

That is why we call main memory RAM (Random Access Memory).

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 SECONDARY STORAGE MEDIA
Disks -- floppy, hard, removable (random access)
• Tapes (sequential access)

• CDs (random access)

• DVDs (random access)

• Secondary storage media store files that contain

• computer programs

• data

• other types of information

• This
27 type of storage is called persistent (permanent) storage because it is non-volatile.
non
 I/O (INPUT/OUTPUT)) DEVICES

nformation input and output is handled by I/O (input/output) devices.

More generally, these devices are known as peripheral devices.
Examples:
monitor
keyboard
mouse
disk drive (floppy, hard, removable)
CD or DVD drive
printer
scanner

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COMPUTER LEVEL HIERARCHY
DIGITAL SYSTEM
ELEMENTS OF DIGITAL SYSTEM
GENERAL ARCHITECTURE
DETAILED ARCHITECTURE
CENTRAL PROCESSING UNIT (CPU)
(

Coordinates the operation of the processor. Also called as Control Unit

Manages memory, arithmetic/logic unit and input and output devices

Also known as the nerve center of a computer system.

Let's us consider an example of addition of two operands by the instruction given

as Add LOCA, RO.
CENTRAL PROCESSING UNIT (CPU)
(

Executing instructions that are stored in computer memory

ALU, Control Unit, Registers and special function registers are involved

The special function registers include program counters (PC), instruction registers
(IR), memory address registers (MAR) and memory and memory data registers
(MDR).
CENTRAL PROCESSING UNIT (CPU)
(

Two possible ways of servicing devices are (i)

( polling routine and (ii) interrupt
handler

Polling enables the processor software to check each of the input and output
devices frequently. During this check, the processor tests to see if any devices need
servicing or not.

Interrupt method provides an external asynchronous input that informs the

processor that it should complete whatever instruction that is currently being
executed and fetch a new routine that will service the requesting device
ARITHMETIC LOGIC UNIT (ALU)
(

Most of all the arithmetic and logical operations of a computer are executed in
the ALU (Arithmetic and Logical Unit) of the processor.

It performs arithmetic operations like addition, subtraction, multiplication,

division and also the logical operations like AND, OR, NOT operations
REGISTERS

The Program counter is one of the most critical registers in CPU.

The Program counter monitors the execution of instructions. It keeps track on

which instruction is being executed and what the next instruction will be.

The instruction register IR is used to hold the instruction that is currently being
executed.
REGISTERS

The two registers MAR and MDR are used to handle the data transfer between
the main memory and the processor.

The MAR holds the address of the main memory to or from which data is to be
transferred.

The MDR contains the data to be written into or read from the addressed word
of the main memory.
REGISTERS

The two registers MAR and MDR are used to handle the data transfer between
the main memory and the processor.

The MAR holds the address of the main memory to or from which data is to be
transferred.

The MDR contains the data to be written into or read from the addressed word
of the main memory.
REGISTERS

Accumulator: Stores the results of calculations made by ALU.

Program Counter (PC): Keeps track of the memory location of the next
instructions to be dealt with. The PC then passes this next address to Memory
Address Register (MAR).

Memory Address Register (MAR): It stores the memory locations of instructions

that need to be fetched from memory or stored into memory.
REGISTERS

Memory Data Register (MDR): It stores instructions fetched from memory or any
data that is to be transferred to, and stored in, memory.

Current Instruction Register (CIR): It stores the most recently fetched instructions
while it is waiting to be coded and executed.

Instruction Buffer Register (IBR): The instruction that is not to be executed

immediately is placed in the instruction buffer register IBR.
GENERAL PURPOSE VS SPECIAL PURPOSE
REGISTERS
COMPUTERS

Fixed Program Computers – Their function is very specific and they couldn’t be
programmed, e.g. Calculators.

Stored Program Computers – These can be programmed to carry out many

different tasks, applications are stored on them, hence the name.
STORED PROGRAM CONCEPT
STORED PROGRAM CONCEPT

Van Neumann – Common storage for both data and instruction

Harvard - Separate data and instruction

VON NEUMANN ARCHITECTURE
HARVARD ARCHITECTURE
 VON NEUMANN ARCHITECTURE HARVARD ARCHITECTURE
COMPARISON
is ancient computer architecture based on stored It is modern computer architecture based on
rogram computer concept. Harvard Mark I relay based model.

ame physical memory address is used for Separate physical memory address is used for
nstructions and data. instructions and data.

here is common bus for data and instruction Separate buses are used for transferring data and
ransfer. instruction.

wo clock cycles are required to execute single

An instruction is executed in a single cycle.
nstruction.

is cheaper in cost. It is costly than van neumann architecture.

PU can not access instructions and read/write at CPU can access instructions and read/write at the
he same time. same time.

is used in personal computers and small

It is used in micro controllers and signal processing.
omputers.
FLYNN’S CLASSIFICATION OF COMPUTERS

Instruction Stream: Sequence of instructions read from memory

Data Stream: Operations performed on the data in the processor
CONTROL UNIT
CONTROL UNIT

Fetches internal instructions of the programs from the

main memory to the processor instruction register, and
based on this register contents, the control unit generates
a control signal that supervises the execution of these
instructions.

A control unit works by receiving input information to

which it converts into control signals, which are then sent
to the central processor. The computer’s processor then
tells the attached hardware what operations to perform.
CONTROL UNIT

It coordinates the sequence of data movements into, out of, and between a processor’s many su
units.

It interprets instructions.

It controls data flow inside the processor.

It receives external instructions or commands to which it converts to sequence of control signals.

It controls many execution units(i.e. ALU, data buffers and registers) contained within a CPU.

It also handles multiple tasks, such as fetching, decoding, execution handling and storing results.
CLASSIFICATION OF CONTROL UNIT

Hardwired Control
Microprogrammed Control
CONTROL UNIT

Two types – Hardwired

 CONTROL UNIT – INPUT & OUTPUT

INPUT OUTPUT

Two decoders, I flip-flop and bits 0 through 11 The control of the inputs of the nine register
of IR.
The control of the read and write inputs of
AC (bits 0 through 15), DR (bits 0 through 15), memory
and the value of the seven flip-flops.
To set, clear, or complement the flip-flops

S2, S1, and SO to select a register for the bu

The control of the AC adder and logic circu

HARDWIRED
CONTROL UNIT
Control logic to be implemented with
gates, flip-flops, decoders, and other
digital circuits

designed from scratch using traditional

digital logic design techniques to
produce a minimal, optimized circuit.

The control unit is like an ASIC

(application-specific integrated
circuit).
HARDWIRED CONTROL UNIT

A Hard-wired
wired Control consists of two decoders, a sequence counter, and a number of
logic gates.
An instruction fetched from the memory unit is placed in the instruction register (IR).
The component of an instruction register includes; I bit, the operation code, and bits 0
through 11.
The operation code in bits 12 through 14 are coded with a 3 x 8 decoder.
The outputs of the decoder are designated by the symbols D0 through D7.
The operation code at bit 15 is transferred to a flip-flop
flip designated by the symbol I.
The operation codes from Bits 0 through 11 are applied to the control logic gates.
The Sequence counter (SC) can count in binary from 0 through 15.
 MICRO PROGRAMMED CONTROL UNIT

t from some sort of ROM. The desired control signals are simply stored in the ROM, and retriev
uence to drive the micro operations needed by a particular instruction.
micro-operations
operations are performed by executing a program consisting of micro-instructions.
micro
Control memory address register specifies the address of the micro-instruction.
micro
Control memory is assumed to be a ROM, within which all control information is permanently
ed. The control register holds the microinstruction fetched from the memory. control memory.
MICRO PROGRAMMED CONTROL UNIT

The micro-instruction
instruction contains a control word that specifies one or more micro-
micro
operations for the data processor.

While the micro-operations

operations are being executed, the next address is computed in the
next address generator circuit and then transferred into the control address register to
read the next microinstruction.

The next address generator is often referred to as a micro-program

micro sequencer, as it
determines the address sequence that is read from control memory.
INSTRUCTION CYCLE

The process involved in executing a single instruction

Each instruction cycle consists of the following phases:
Fetch instruction from memory.
Decode the instruction.
Read the effective address from memory.
Execute the instruction.
INPUT - OUTPUT
DESIGN OF COMPUTER

A memory unit with 4096 words of 16 bits each

Registers: AC (Accumulator), DR (Data register), AR (Address register), IR
(Instruction register), PC (Program counter), TR (Temporary register), SC
(Sequence Counter), INPR (Input register), and OUTR (Output register).
Flip-Flops: I, S, E, R, IEN, FGI and FGO
Two decoders: a 3 x 8 operation decoder and 4 x 16 timing decoder
A 16-bit common bus
Control Logic Gates
The Logic and Adder circuits connected to the input of AC.
MEMORY ORGANIZATION
STORAGE UNIT
STORAGE OF INFORMATION
STORAGE UNIT - REGISTERS

Registers are a type of computer memory used to quickly accept, store, and transfer
data and instructions that are being used immediately by the CPU.

Termed as Processor registers.

A processor register may hold an instruction, a storage address, or any data (such as bit
sequence or individual characters).
 REGISTERS
COMMONLY USED REGISTERS

Commonly
Register used Registers
Symbol Number of bits Function

Data register DR 16 Holds memory operand

Address register AR 12 Holds address for the memory

Accumulator AC 16 Processor register

Instruction register IR 16 Holds instruction code

Program counter PC 12 Holds address of the instruction

Temporary register TR 16 Holds temporary data

Input register INPR 8 Carries input character

Output register OUTR 8 Carries output character

 REGISTER

A Register is a group of flip-flops

flops with each flip-flop
flip capable of storing one

bit of information.

Accumulator:: This is the most common register, used to store data taken out

from the memory.

General Purpose Registers: This is used to store data intermediate results

during program execution. It can be accessed via assembly programming.

programming
 REGISTER

Special Purpose Registers: Users do not access these registers. These registers are for
Computer system,

MAR: Memory Address Register are those registers that holds the address for
memory unit.

MBR: Memory Buffer Register stores instruction and data received from the
memory and sent from the memory.

PC: Program Counter points to the next instruction to be executed.

IR: Instruction Register holds the instruction to be executed.

executed
REGISTERS

The Memory unit has a capacity of 4096 words, and each word contains 16 bits.
The Data Register (DR) contains 16 bits which hold the operand read from the memory
location.
The Memory Address Register (MAR) contains 12 bits which hold the address for the memory
location.
The Program Counter (PC) also contains 12 bits which hold the address of the next instruction to
be read from memory after the current instruction is executed.
The Accumulator (AC) register is a general purpose processing register.
The instruction read from memory is placed in the Instruction register (IR).
The Temporary Register (TR) is used for holding the temporary data during the processing.
The Input Registers (IR) holds the input characters given by the user.
The Output Registers (OR) holds the output after processing the input data.
STORAGE UNIT – CACHE MEMORY

Part of CPU

Path between the processor and the main memory

Lesser access time than the main memory and is faster than the main memory

Bridge the speeds of the main memory and the CPU

Stores the program (or its part) currently being executed or which may be executed within a
short period of time

Stores temporary data that the CPU may frequently require for manipulation
STORAGE UNIT – CACHE MEMORY
STORAGE UNIT – PHYSICAL MEMORY

Categorization : Volatile, Non-Volatile,

Volatile, Semi-Volatile,
Semi Protected

Access Mode, Access Time, Transfer Rate, Capacity and Cost

RAM
SRAM, DRAM

ROM
PROM, EPROM, EEPROM
 MAIN MEMORY

Communicates directly with CPU, Secondary memory and Cache memory.

It is the central storage unit of the computer system.

It is a large and fast memory used to store data during computer operations. RAM: Random
Access Memory

DRAM: Dynamic RAM, is made of capacitors and transistors, and must be refreshed every
10~100 ms. It is slower and cheaper than SRAM.

SRAM: Static RAM, has a six transistor circuit in each cell and retains data, until powered off
 MAIN MEMORY

SRAM is a type of semiconductor memory that uses Bistable latching circuitry to store each b
In this type of RAM, data is stored using the six transistor memory cell. Static RAM is mostly
used as a cache memory for the processor (CPU).

DRAM is a type of RAM which allows you to stores each bit of data in a separate capacitor
within a particular integrated circuit.
 MAIN MEMORY

SRAM DRAM
SRAM has lower access time, which is faster DRAM has a higher access time. It is slower
compared to DRAM. than SRAM.
SRAM is costlier than DRAM. DRAM cost is lesser compared to SRAM.
SRAM needs a constant power supply, which DRAM requires reduced power consumption
means it consumes more power. the information stored in the capacitor.
SRAM offers low packaging density. DRAM offers a high packaging density.
Uses transistors and latches. Uses capacitors and very few transistors.
L2 and L3 CPU cache units are some general The DRAM is mostly found as the main
application of an SRAM. memory in computers.
The storage capacity of SRAM is 1MB to 16MB. The storage capacity of DRAM is 1 GB to 16G
 MAIN MEMORY

SRAM DRAM
SRAM is in the form of on-chip memory. DRAM has the characteristics of off-chip
memory.
The SRAM is widely used on the processor or The DRAM is placed on the motherboard.
lodged between the main memory and
processor of your computer.
SRAM is of a smaller size. DRAM is available in larger storage capacity
This type of RAM works on the principle of This type of RAM works on holding the charg
changing the direction of current through
switches.
 MAIN MEMORY

NVRAM: Non-Volatile
Volatile RAM, retains its data, even when turned off. Example: Flash memory.

ROM: Read Only Memory, is non-volatile

volatile and is more like a permanent storage for information.

It also stores the bootstrap loader program, to load and start the operating system when

computer is turned on. PROM(Programmable ROM), EPROM(Erasable PROM)

and EEPROM(Electrically Erasable PROM) are some commonly used ROMs.

MAIN MEMORY
 MAIN MEMORY

The internal clock rate is the frequency needed to match the external clock rate.

Bus clock speed, is the speed at which the connection between CPU & memory operates at.
Higher bus speed means you can send more data more quickly

Data rate is how many bits a module can transfer in a given time, and speed is how many bytes
it can transfer.
 SECONDARY MEMORY
External memory or non-volatile.
E.g. disk, CD-ROM, DVD, etc
These are magnetic and optical memories.
It is known as the backup memory.. Not connected to CPU directly.
It is a non-volatile memory.
Data is permanently stored even if power is switched off.
It is used for storage of data in a computer.
Computer may run without the secondary memory.
Slower than primary memories.
CONTROL LOGIC GATES
LOGIC GATES

Fundamental element of computer

using diodes or transistors acting as electronic switches

using vacuum tubes, electromagnetic relays (relay logic), fluidic logic, pneumatic
logic, optics, molecules, or even mechanical elements.

NOT, AND, OR and XOR

Inverse gates - NAND, NOR and XNOR

 LOGIC GATES

Main structural part of a digital system.

Produces signals of binary 1 or 0 when input logic requirements are satisfied.

Distinct graphic symbol, and its operation can be described by means of algebraic
expressions.

The seven basic logic gates includes: AND, OR, XOR, NOT, NAND, NOR, and XNOR.

Truth Table: Depicts the relationship between the input-output

input binary variables in tabular
form.

One or two binary input (A, B) variables designated and one binary output variable (X).
AND GATE

High output only if all its inputs are high

Represented by a dot (.) sign

OR GATE

High output only if any of its inputs are high

Represented by a dot (+) sign

NOT GATE

Inverted version of the input at its output.

Also known as an Inverter

 NAND GATE

qual to an AND gate followed by a NOT gate

ives a high output if any of the inputs are low

epresented by a AND gate with a small circle on the output

mall circle represents inversion

NOR GATE

Equal to an OR gate followed by a NOT gate

Low output if any of the inputs are high

Represented by an OR gate with a small circle on the

output
XOR GATE

Exclusive OR

Give a high output if one of its inputs is high but not both of them

Represented by an encircled plus sign

XNOR GATE

Exclusive NOR Gate

Inverse operation to the XOR gate

Low output if one of its inputs is high but not both of them
 BOOLEAN ALGEBRA

Algebra that deals with binary variables and logic operations

 COMBINATIONAL CIRCUIT

Comprises of logic gates whose outputs at any time are determined directly from the
present combination of inputs without any regard to previous inputs.

Information-processing
processing operation fully specified logically by a set of Boolean functions

Input variables, logic gates, and output variables

 COMBINATIONAL CIRCUIT
Design Procedure:

The problem is stated.

The total number of available input variables and required output variables is determined.

The input and output variables are allocated with letter symbols.

The exact truth table that defines the required relationships between inputs and outputs is
derived.

The simplified Boolean function is obtained from each output. (K-Map)

(K

The logic diagram is drawn.

 HALF ADDER

Two binary inputs (augend and addend bits) and two binary outputs ( sum and carry).

The simplified sum of products (SOP) expressions is: S = x'y+xy', C = xy

 FULL ADDER

Three binary inputs (augend,, addend , carry from the previous lower significant position
bits) and two binary outputs ( sum and carry).
FULL ADDER
LATCHES

Electronic device that instantly changes its output based on the applied input.

We use latch to store either 0 or 1 at any specified time.

The "SET" and "RESET" are two inputs in a latch, and there are two outputs that are
complement to each other.

Used to store one bit of data and it is a memory device.

A latch is just like a flip-flop,

flop, but latch is not a synchronous device.

The Latch does not work on the clock edges like the flipflop.
 LATCHES

LATCH FLIP-FLOP
atch is a bistable device, and the state of the Flip
Flip-Flop is also a bistable device and there are tw
h is represented as 0 and 1. stable states of Flip-Flop,
Flip which are represented a
0 and 1.
atch is a level triggered device. Flip
Flip-flop is an edge triggered device.
cannot classify the Latch. We can classify the flip-flop
flip as synchronous or
asynchronous flipflops.
orm sequential circuits, latches are To form sequential circuits, Flip-Flop
Flip is constructe
structed from logic gates. from latches along with an additional clock signa
ches are fast as compared to the Flip-Flop. Flip
Flip-Flops are slow as compared to the latches.
s power is consumed by the Latches. More power is consumed by the Flip-Flop.
Flip
 LATCHES

LATCH FLIP-FLOP
latches can be clocked or clockless. For all the time, Flip-Flops
Flip are clocked.
y binary inputs can be used to operate the By the clock signal and binary input, the Flip-Flop
Flip
hes. works.
latch is sensitive to the input and as longFlip--Flop is sensitive to the clock signals and until
t is 'On', we can transmit the data. there is a change in the input clock signal, it never
changes the output.
latch cannot be used as a register because Flip--Flop can work as a register because it contains
register requires more advanced clock signals in its input.
ctronic circuits where time plays an
ential role.
 LATCHES

LATCH FLIP-FLOP
latch is asynchronous because latch does Flip--Flop is synchronous because flip-flop work on
work on the basis of the time signal. the basis of the clock signal.
latch cannot be built from the gates. Flip--Flop cannot be built from the latches.
ches are responsive towards faults on Flip--Flops are protected toward fault.
ble pin.
 FLIP-FLOPS

Flip flops are an application of logic gates under sequential circuit.

Asynchronous or transparent are called Latch. Synchronous are called Flip Flop

A flip-flop
flop circuit can remain in a binary state indefinitely (as long as power is delivered to
the circuit) until directed by an input signal to switch states.
Counters, Frequency Dividers, Shift Registers. Storage Registers, Bounce elimination switch
 FLIP-FLOPS

Trigger: state of the flip-flop

flop is changed by a momentary change in the input signal.

Pulses trigger clocked flip-flops.

flops. A clock pulse is either positive or negative.

A pulse start from the initial value of '0', goes momentarily to '1', and after a short while,
returns to its initial '0' value.

A positive clock source remains at '0' during the interval between pulses and goes to 1
during the occurrence of a pulse.

The pulse goes through two signal transition: from '0' to '1' and return from '1' to '0'.
FLIP-FLOPS
 S-R FLIP-FLOPS

Basic Flip flops stands for SET-RESET flip-flops.

flops.

Consists of two NOR gates or also two NAND gates

S-R FLIP-FLOPS
 CLOCKED S-R FLIP-FLOPS
FLOPS

Additional control input that determines when the state of the circuit is to be changed

The limitation with a S-R flip-flop

flop using NOR and NAND gate is the invalid state. This
problem can be overcome by using a stable SR flip-flop
flip that can change outputs when
certain invalid states are met, regardless of the condition of either the Set or the Reset
inputs.

A clock pulse is given to the inputs of the AND Gate.

If the value of the clock pulse is '0', the outputs of both the AND Gates remain '0'.
CLOCKED S-R FLIP-FLOPS
FLOPS
 D FLIP-FLOPS

D flip-flop
flop is a slight modification of clocked SR flip-flop.
flip

D input is connected to the S input and the complement of the D input is connected to the
R input.

When the value of CP is '1' (HIGH), the flip-flop

flop moves to the SET state if it is '0' (LOW), the
flip-flop switches to the CLEAR state.
D FLIP-FLOPS
 J-K FLIP-FLOPS

J-K flip-flop
flop can be considered as a modification of the S-R
S flip-flop.

The main difference is that the intermediate state is more refined and precise than that of
an S-R flip-flop.

The characteristics of inputs 'J' and 'K' is same as the 'S' and 'R' inputs of the S-R
S flip-flop.

J stands for SET, and 'K' stands for CLEAR.

When both the inputs J and K have a HIGH state, the flip-flop
flip switches to the complement
state, so, for a value of Q = 1, it switches to Q=0, and for a value of Q = 0, it switches to Q=1.
J-K FLIP-FLOPS
 T FLIP-FLOPS

T flip-flop is a much simpler

version of the J-K flip-flop.

Both the J and K inputs are

connected and are also called as
a single input J-K Flip-flop.
 DECODERS

Combinational circuit that converts binary information from the 'n' coded inputs to a
maximum of 2^n different outputs
DECODERS
 ENCODERS

Maximum of 2^n (or less) input lines and n output lines

 MULTIPLEXER

Combinational circuit that has 2n input lines and a single output line

Multi-input and single-output

output combinational circuit

The binary information is received from the input lines and directed to the output line. On
the basis of the values of the selection lines, one of these data inputs will be connected to the
output.

Unlike encoder and decoder, there are n selection lines and 2n input lines. So, there is a total
of 2N possible combinations of inputs. A multiplexer is also treated as Mux.
MULTIPLEXER
 DEMULTIPLEXER

A De-multiplexer
multiplexer is a combinational circuit that has only 1 input line and 2N output lines.

Total of 2n possible combinations of inputs. De-multiplexer

De is also treated as De-mux.
 COMPARISON

D Flip-Flop: When the clock triggers, the value remembered by the flip-flop
flip becomes the
value of the D input (Data) at that instant.

T Flip-Flop: When the clock triggers, the value remembered by the flip-flop
flip either toggles or
remains the same depending on whether the T input (Toggle) is 1 or 0.

J-K Flip-Flop: When the clock triggers, the value remembered by the flip-flop
flip toggles if
the J and K inputs are both 1 and the value remains the same if both are 0; if they are
different, then the value becomes 1 if the J (Jump) input is 1 and 0 if the K (Kill) input is 1.
 COMPARISON

S-R Flip-Flop: When the clock triggers, the value remembered by the flip-flop
flip remains
unchanged if R and S are both 0, becomes 0 if the R input (Reset) is 1, and becomes 1 if
the S input (Set) is 1. The behavior in unspecified if both inputs are 1. (In Logisim, the value in
the flip-flop remains unchanged.)
BUILDING A SIMPLE MEMORY
BUILDING A SIMPLE MEMORY

To store a single bit, we can use Flip flops or latches

Larger memories can be built by

Using a 2D array of these 1-bit
bit devices (i)
( “Horizontal” expansion to increase
word size
(ii) “Vertical” expansion to increase number of words

Dynamic RAMs use a tiny capacitor to store a bit

Design concepts are mostly independent of the actual technique used to store a
bit of data
BUILDING A SIMPLE MEMORY

4X3 memory design

Uses 12 D flip flops in a 2D array

Uses a 2-to-44 decoder to select a row (i.e. a word)

Multiplexers are used to gate the appropriate output

A single WRITE (WR) is used to serve as a write and read signal – zero is used to
indicate write operation – one is used for read operation

Two address lines are needed to select one of four words of 3 bits each
BUILDING A SIMPLE MEMORY
NUMBER SYSTEM
STORAGE REPRESENTATION
 BIT AND BYTE

A bit is the smallest unit of data stored in a computer and it has a value of 0 or 1

It’s like a switch, on (1) or off (0)

In computers, bits are stored electronically in RAM and auxiliary storage devices by two-
two

state digital circuits

The storage device itself doesn’t know what the bit pattern represents, but software

(application software, operating system, and I/O device firmware) stores and interprets the

pattern

That is, data is coded then stored and when retrieved it is decoded

A byte is a string of 8 bits and is called a character when the data is text
 BITS, BYTES, AND WORDS

A bit is a single binary digit (a 1 or 0).

A byte is 8 bits
A word is 32 bits or 4 bytes
Long word = 8 bytes = 64 bits
Quad word = 16 bytes = 128 bits
Programming languages use these standard number of bits when organizing data
storage and access.
What do you call 4 bits?
(hint: it is a small byte)

4
 NUMBER SYSTEMS

The on and off states of the capacitors in RAM can be thought of as the values 1 and 0,
respectively.

Therefore, thinking about how information is stored in RAM requires knowledge of the
binary (base 2) number system.

Let’s review the decimal (base 10) number system first.

5
 THE DECIMAL NUMBER SYSTEM

• The decimal number system is a positional number system.

• Example:
Value 5 6 2 1 1 X 100 = 1
Position 4 3 2 1 2 X 101 = 20
Address 103 102 101 100 6 X 102 = 600
5 X 103 = 5000

6
 THE DECIMAL NUMBER SYSTEM (CON’T)

The decimal number system is also known as base 10. The values of the positions are
calculated by taking 10 to some power.

Why is the base 10 for decimal numbers?

o Because we use 10 digits, the digits 0 through 9.

7
 THE BINARY NUMBER SYSTEM

• The binary number system is also known as base 2. The values of the positions are
calculated by taking 2 to some power.

• Why is the base 2 for binary numbers?

o Because we use 2 digits, the digits 0 and 1.

8
 THE BINARY NUMBER SYSTEM (CON’T)

• The binary number system is also a positional numbering system.

• Instead of using ten digits, 0 - 9, the binary system uses only two digits, 0 and 1.

• Example of a binary number and the values of the positions:

1 0 0 1 1 0 1

26 25 24 23 22 21 20

9
CONVERTING FROM BINARY TO DECIMAL

1 0 0 1 1 0 1 1 X 20 = 1
26 25 24 23 22 21 20 0 X 21 = 0
1 X 22 = 4
20 = 1 24 = 16 1 X 23 = 8
21 = 2 25 = 32 0 X 24 = 0
22 = 4 26 = 64 0 X 25 = 0
23 = 8 1 X 26 = 64
7710

10
CONVERTING FROM BINARY TO DECIMAL (CON’T)

Practice conversions:

Binary Decimal

11101
1010101
100111

11
 CONVERTING FROM DECIMAL TO BINARY (CON’T)

• Make a list of the binary place values up to the number being converted.
• Perform successive divisions by 2, placing the remainder of 0 or 1 in each of the positions
from right to left.
• Continue until the quotient is zero.
• Example: 4210

25 24 23 22 21 20
32 16 8 4 2 1
1 0 1 0 1 0

12
CONVERTING FROM DECIMAL TO BINARY (CON’T)

• Practice conversions:

• Decimal Binary

• 59
• 82
• 175

13
 WORKING WITH LARGE NUMBERS

0101000010100111 = ?

Humans can’t work well with binary numbers; there are too many digits to deal with.

Memory addresses and other data can be quite large. Therefore, we sometimes use the
hexadecimal number system.

14
THE HEXADECIMAL NUMBER SYSTEM

• The hexadecimal number system is also known as base 16. The values of the
positions are calculated by taking 16 to some power.

• Why is the base 16 for hexadecimal numbers ?

• Because we use 16 symbols, the digits 0 and 1 and the letters A through F.

15
 THE HEXADECIMAL NUMBER SYSTEM (CON’T)

• Binary Decimal Hexadecimal Binary Decimal Hexadecimal

• 0 0 0 1010 10 A
• 1 1 1 1011 11 B
• 10 2 2 1100 12 C
• 11 3 3 1101 13 D
• 100 4 4 1110 14 E
• 101 5 5 1111 15 F
• 110 6 6
• 111 7 7
• 1000 8 8
• 1001 9 9

16
HE HEXADECIMAL NUMBER SYSTEM (CON’T)

Example of a hexadecimal number and the values of the positions:

3 C 8 B 0 5 1
166 165 164 163 162 161 160

17
 EXAMPLE OF EQUIVALENT NUMBERS

Binary: 1 0 1 0 0 0 0 1 0 1 0 0 1 1 12

Decimal: 2064710

Hexadecimal: 50A716

Notice how the number of digits gets smaller as the base increases.

18
BINARY REPRESENTATION

Why binary representation (as suppose to decimal or octal, etc..)?

Because the devices that store and manage the digital data are far less
expensive and complex for binary representation.

They are also far more reliable when they have to represent one out of two
possible values.

Because the electronic signals are easier to maintain if they carry only binary
data.
 BINARY REPRESENTATION

One bit can be either 0 or 1. Therefore, one bit can represent only two things.

To represent more than two things, we need multiple bits. Two bits can represent
four things because there are four combinations of 0 and 1 that can be made from
two bits: 00, 01, 10,11.

In general, n bits can represent 2n things because there are 2n combinations of 0

and 1 that can be made from n bits. Note that every time we increase the number
of bits by 1, we double the number of things we can represent.
DATA REPRESENTATION IN
MEMORY
DATA REPRESENTATION

Symbols

Roman Numbers

Positional system – radix ten or decimal system

133 = 1 X 10^2 + 3 X 10^1 + 3 * 10^0

Binary Number System

10011 = 1 * 2^4 + 0 * 2^3 + 0 * 2^2 + 1*2^1 + 1*2^0 = 19

DATA REPRESENTATION

Octal

5378 5 * 8^2 + 3 * 8^1 + 7 * 8^0 = 351 (base 10)

HexaDecimal

Ranges from 0 to F
 PRIMITIVE DATA STRUCTURE

Basic representation of any data.

Integer
A natural number, the negative of a natural number, and 0.
So an integer number system is a system for ‘counting’ things in a simple systematic
way
Real Numbers
Integer + floating decimal values
Character
BASIC OPERATIONS ON PRIMITIVE DS

CREATE

Declare n, a, b as integer

DESTROY

SELECTION

UPDATE

N a+b
INTEGER

Represent the quantity and discrete in nature

E.g. No of flights arriving at an airport

{…-(n+1), -n,…,-2,-1,0, 1, 2, …., n, (n+1),..}

REPRESENTATION OF INTEGER

Unsigned number – (only positive values)

Signed numbers
 UNSIGNED INTEGER

An unsigned integer is an integer without a sign, that is, a non-negative

non integer

They range from zero to infinity, but no computer can store all the integers in that range

So, a maximum unsigned integer is defined

This maximum is based on the number of bits used to store an integer

Let’s use 8 and 16-bit

bit (1 and 2 bytes) storage locations in our examples

The length of storage is set by the data type the programmer specifies for a variable
 UNSIGNED INTEGER

An unsigned integer is stored as its value when represented as a binary number

Leading zeros are added to fill out the storage location

For example, the decimal number 9 is represented as 00001001 when stored in 1-byte
1 becaus
000010012 = 910

When stored in a 2-byte

byte location, 9 would be represented as 0000000000001001
 UNSIGNED INTEGER

One may use the following table to work with binary numbers:

For example, given 00001001, what decimal number does it represent?

Add the non-negative

negative powers of two, that is, 8 + 1 = 9
 UNSIGNED INTEGER

One may use the same table to go the other way, that is, given the decimal number 13,
what is its binary representation?

Find the largest power of 2 that doesn’t exceed the number and place a 1 in that cell:

Subtract that power of 2 from the number and use this as the new number: 13 – 8 = 5
 UNSIGNED INTEGER

Then continue in this way until the sum of the powers of two equals the number:

Now, 5 – 4 = 1, and so finally:

Note that 8 + 4 + 1 = 13
 UNSIGNED INTEGER

Then fill in the remaining cells with zeros:

So, the unsigned integer representation of decimal 13 is 00001101 when stored in 1-byte
1
 UNSIGNED INTEGER

If one tries to store a number in a memory location that is not large enough we have what i
called overflow

In this case, depending on the system, one may or may not receive an error message

So, one must not store a number that is larger than the maximum for a given length of
storage

The maximum number storable in 1-byte

byte is 255
 UNSIGNED INTEGER

For example, if one tries to store 256 in 1-byte

byte there is overflow because the largest value
storable in 8 bits is 255 as one can see from the following table:

Note that 128 + 64 + 32 + 16 + 8 + 4 + 2 + 1 = 255

 SIGNED INTEGER

A sign-and-magnitude
magnitude format is used to allow for positive and negative numbers (and zero

The leading bit is designated as the sign bit: 0 for positive or zero, 1 for negative

The remaining bits represent the value

So, in 1-byte
byte of storage the maximum number storable is not 255 as it was for the unsigned

integer representation, but 127:

SIGNED POSITIVE INTEGER

To determine what the sign-and-magnitude

magnitude representation of a positive decimal
number is:
Convert the decimal number to binary

If needed add leading zeros to fill the storage location

For example, decimal 12 is represented in 1--byte as 00001100 because 8 + 4 = 12:

 SIGNED POSITIVE INTEGER

Going the other way, given a sign-and-magnitude

magnitude representation for a positive
number, one can interpret it as follows:
Leftmost bit will be 0 indicating positive

Convert the remaining bits to a decimal number

For example, 00010001 is decimal 17:

Because 16 + 1 = 17
CONCERNS

Not economical
Extra Effort required to perform operation (+7+ (-6))
( or (-7+ 6)
Additional operation required to find the sign of the operand.

Hence, it is proposed to have radix complement representation

2’S COMPLEMENT
Two’s complement is still a sign-and-magnitude
magnitude format
In two’s complement, some of the magnitude bits are flipped from 0 to 1 or 1 to
0
Modulo M = RN
R is the radix, N is the number of bits required in the modulo M.
-x = M – x
 2’S COMPLEMENT
Integer 2’s Complement Integer 2’s Complement
0 0000 -1 (16-1=15) 1111
1 0001 -2 (16-2=14) 1110
2 0010 -3 (16-3=13) 1101
3 0011 -4 (16-4=12) 1100
4 0100 -5 (16-5=11) 1011
5 0101 -6 (16-6=10) 1010
6 0110 -7 (16-7=9) 1001
7 0111 -8 (16-8=8) 1000

The range of values defined using 4-bit

4 is -8 to 7
 2’S COMPLEMENT

Two’s complement is the standard representation for negative integers in modern

computers

This is because arithmetic operations are simple to implement when integers are stored thi
way

Although on the surface it seems complicated, at a deeper level it allows for simplicity of
operations
 2’S COMPLEMENT

An alternative but equivalent method for converting a negative number to its two’s
complement representation is:
Ignore the sign and convert the decimal number to binary

If needed add leading zeros to fill the storage location

Flip all the bits

Add 1 to the result of the last step

Make the sign bit 1

Some people find this easier

CONCERNS

Only addition and complement operation sufficient for all operations.

Adding 7 + 7 or -7 -77 will lead to overflow.
DIMINISHED RADIX-COMPLEMENT
COMPLEMENT

Also called as “1’s complement”.

DRCOMP(X) = Rn – 1 – X
Rn =Modulo representation
E.g. X = 6 is represented in modulo 16 bit is 16 – 1 – 6 = 9
 DIMINISHED RADIX-COMPLEMENT
COMPLEMENT

Integer 1’s Complement Integer 1’s Complement

0 0000 -1(16-1-1) 1110
1 0001 -2(16-1-2) 1101
2 0010 -3(16-1-3) 1100
3 0011 -4(16-1-4) 1011
4 0100 -5(16-1-5) 1010
5 0101 -6(16-1-6) 1001
6 0110 -7(16-1-7) 1000
7 0111 -0(16-1-0) 1111

The range of values defined using 4-bit

4 is -7 to 7
CONCERNS

Only addition and complement operation sufficient for all operations.

Available of both -0
0 and +0 which may lead to computational issues.
3+4 = 7, 3 -4 = -1, -3 + 4 result in ‘0’.
7+7 = -1, -7 – 7 = 0
Error due to overflow.
 OVERFLOW RULES

Addition of +ve and –ve number can never cause overflow

Addition of 2 +ve or 2 –ve numbers does not cause overflow if the resulting sum has the
same sign as the two operands.

Exception: in 2’s complement adding 2 n bit negative numbers such that |a| + |b| < 2(n+1)

Above rules are violated in case of -7 – 7 and +7 +7 in 2’s complement

INTEGER REPRESENTATION

Range of values for n-bit

bit storage representation is 2n-1

In 2’s complement, 2n-1 <= N <= 2n-1 -1

In 1’s complement, 2n-1 +1 <= N <= 2n-1 -1

BINARY CODED DECIMAL (BCD)

Recent computers and large computers adopt BCD format to represent integer
53 in a 4 bit representation is 0101 0011 0
Mainly used in IBM mainframes
Last bit is used for negative.
-53 = 0101 0010 1
BINARY CODED DECIMAL (BCD)

The addition and subtraction of BCD have different rules.

The BCD arithmetic is little more complicated.

BCD needs more number of bits than binary to represent the decimal number. So
BCD is less efficient than binary.
REAL NUMBERS

Fixed Point Representation

In the floating-point
point notation a real number is represented by a 32-bit
32 string.
Including in 32-bit, 24-bit
bit use for representation of Mantissa and remaining 8-bit
8
use for representation of Exponent .Both the mantissa and the exponent are twos
complement binary Integers.
REAL NUMBERS

To assign values ranging from distance of sun to earth (16,800,000,000,000) and

energy emission (0.000000000000832)).

Precision is directly affected in the cost of the computer.

The general form of a real number in radix R is

F-1 f-2… f-M X RE

Where F-1 f-2… f-M is the fractional part or mantissa

And E is the exponent which is always integer

REAL NUMBER

Round off Error - Approximation Vs Accurate measurement

168 X 1014 vs 168,817,210,391,704 kms

General Format

Sign Charateristic Fraction

REAL NUMBER - EXCESS NOTATION

This fixed length notation (i.e., the length of the bit pattern used can not be
altered once set at the beginning) makes it possible to store negative (-)
( and
non-negative
negative (+ including zero) values by treating the right-most
right digits referred
to as the Most Significant Bit (MSB) as representing the sign of the number.

In excess notation the MSB also known as the sign bit of 1 represents the non-
negative (+) sign and a 0 indicates a negative (-)
( number.
 REAL NUMBER - EXCESS NOTATION
In the case of a 4-bit pattern, for example: 0110 the digit/column value of the most
significant bit is 8, so 4 bit patterns are referred to as an excess (8) notation.

To convert this example find the sum value of the entire pattern as though a standard
binary number:

(0x8) + (1x4) + (1x2) + (0x1) = 6

Then subtract the excess value,8, from the sum, (6 - 8)

The result is a signed value, -2.

 REAL NUMBER - EXCESS NOTATION

n the case of a 5-bit pattern example, 11110, the digit/column value of the most significant bit is
o 5-bit
bit patterns are referred to as an excess (16) notation.

o convert this example find the sum value of the entire pattern as though a standard binary
umber:

1x16) + (1x8) + (1x4) + (1x2) + (0x1) = 16 + 8 + 4 + 2 + 0 = 30

hen subtract the current excess value, 16, from the sum, (30 - 16). The result is a signed value,

herefore, it is evident that in excess notation, the sign bit of 0 represents the negative sign and
epresents the non-negative
negative sign to denote a signed value.
REAL NUMBER - FRACTIONAL PART OR
MANTISSA
F must lie in the interval R-1 <= F < 1
DATA INTERPRETATION IN COMPUTER

Character String

For example, in some computers, the eight bits 11000000 is used to represent

the character "A" and 11000001 for character "B" and another for each

character that has a representation in a particular machine. So, the character

string "AB" would be represented by the bit string 1100000011000001.

 CHARACTER REPRESENTATION
The American Standard Code for Information Interchange (ASCII) is the scheme used
to assign a bit pattern to each of the characters
ASCII charts come in different flavors:
Some have 7 bit strings, some 8 or more
Some show the binary code for the various characters as well as the code
represented in other number systems, e.g., decimal, hex, octal
For example, the letter A has the ASCII code:
1000001 in binary for a 7-bit chart Note: All four of these numbers
65 in decimal represent the same value but using
different number systems
41 in hex
101 in octal
SUBSET OF ASCII CHART
 ASCII CHART
Uppercase characters have different ASCII codes than lowercase

Uppercase characters come before lowercase

Numbers come before letters

The special characters are spread around

The numbers and upper and lowercase characters are in adjacent groupings, so that their
codes increment by one
 ASCII CHART
The only difference between the binary codes for the upper and lowercase characters is the
sixth bit, that is, the decimal code for a lowercase character is 32 greater than the
uppercase character’s decimal code

ASCII codes before decimal 32 are control characters (nonprintable) like bell, backspace,
and carriage return

The final ASCII code in the 7-bit

bit chart is the control character DEL with decimal code 127
 EXTENDED ASCII & UNICODE
The eight-bit
bit ASCII chart is sometimes called Extended ASCII

The seven-bit
bit ASCII codes are the same in eight-bit
eight chart except have a zero at the left

Some manufactures use the extra bit to create additional special characters, these
however are nonstandard, e.g., using decimal 171 for ½, or 246 for ÷

Unicode is another scheme developed so that the many symbols in international languages
may be represented. It also uses bit patterns. UTF-32
UTF uses 32 bits.
EBCDIC

The extended binary coded decimal interchange code (EBCDIC) is an 8-

8
bit alphanumeric code which has been extensively used by IBM in its mainframe
applications.

ASCII code is a 7-bit

bit code whereas EBCDIC is an 8-bit
8 code.

ASCII code is more commonly used worldwide while EBCDIC is used primarily in
large IBM computers.
LOW LEVEL LANGUAGE
 INSTRUCTION SET

Computer instructions are a set of machine language instructions that a particular processor
understands and executes. A computer performs tasks on the basis of the instruction provided

An instruction comprises of groups called fields. These fields include:

The Operation code (Opcode)) field which specifies the operation to be performed.

The Address field which contains the location of the operand, i.e., register or memory location.

The Mode field which specifies how the operand will be located.
INSTRUCTION CODE FORMAT

Each microprocessor has specific set of instructions

Each instruction is represented by 8-bit
bit byte called OPCODE or instruction byte
Memory - reference instruction
Register - reference instruction
Input-Output instruction
 INSTRUCTION SET

A set of instructions is said to be complete if the computer includes a sufficient number of

instructions in each of the following categories:

Arithmetic, logical and shift instructions

A set of instructions for moving information to and from memory and processor registers.

Instructions which controls the program together with instructions that check status condition

Input and Output instructions

CLASSIFICATION OF INSTRUCTION

Data Transfer – transfer data between register or between register and memory
MOV B, A MVI A Data
Arithmetic
Logical
Branching
Control
DATA TRANSFER

LDA <Addr> – Load accumulator from Address

LDAX <Register> Load accumulator from Register
LXI <Register> <Address>
LHLD <Address> - Load to Register ‘L’
STA, STAX – Store Accumulator Direct
INSTRUCTION TYPES

Data transfer
Data operation
Program control
DATA TYPES

Numeric (integer, floating point)

Boolean (true, false)
Character (ASCII, Unicode)
ADDRESSING MODES - DIRECT
ADDRESSING MODES - INDIRECT
ADDRESSING MODES - REGISTER DIRECT
ADDRESSING MODES - REGISTER INDIRECT

@R
ADDRESSING MODES - IMMEDIATE
ADDRESSING MODES - IMPLICIT
ADDRESSING MODES - RELATIVE
ADDRESSING MODES - INDEXED
INSTRUCTION FORMATS

More operands = less instructions

More operands = larger words
3-OPERAND
OPERAND INSTRUCTIONS
2-OPERAND
OPERAND INSTRUCTIONS
1-OPERAND
OPERAND INSTRUCTIONS
0-OPERAND
OPERAND INSTRUCTIONS
INSTRUCTION SET ARCHITECTURE

Instruction set
Register set
Memory access information
ISA ATTRIBUTES

Completeness
Orthogonality
Register set design
ISA REQUIREMENTS

Backward compatibility
Data types/sizes
Interrupts
Conditional instructions
A RELATIVELY SIMPLE ISA - REGISTERS

Accumulator AC
General purpose register R
Flag Z
A RELATIVELY SIMPLE ISA - INSTRUCTION
SET
A RELATIVELY SIMPLE ISA - INSTRUCTION SET
(CONTINUED)
A RELATIVELY SIMPLE ISA - INSTRUCTION
FORMATS
EXAMPLE RELATIVELY SIMPLE PROGRAM

n
1 + 2 + ... + n , o r ∑ i
i=1

T h is c o u ld b e w r itte n a s a h ig h -le v e l la n g u a g e
c o d e s n ip p e t a s f o llo w s .
to ta l= 0 ;
F O R i= 1 to n D O { to ta l = to ta l + i} ;
1 . to ta l = 0 , i = 0
2. i = i + 1
3 . to ta l = to ta l + i
4 . IF i ≠ n THEN GOTO 2
EXAMPLE RELATIVELY SIMPLE PROGRAM
CODE
EXAMPLE RELATIVELY SIMPLE PROGRAM
TRACE
THE 8085 ISA - INSTRUCTION SET
Data movement instructions
THE 8085 ISA - INSTRUCTION SET
Data operation instructions
THE 8085 ISA - INSTRUCTION SET
Program control instructions
THE 8085 ISA - INSTRUCTION FORMATS
EXAMPLE 8085 PROGRAM

n
1 + 2 + ... + n , o r ∑ i
i =1

1. i = n, sum = 0
2 . s u m = s u m + i, i = i - 1
3 . IF i ≠ 0 T H E N G O T O 2
4 . to ta l = s u m
EXAMPLE 8085 PROGRAM CODE
EXAMPLE 8085 PROGRAM TRACE
 COMPARISON
Property 8085 Microprocessor 8086 Microprocessor

ata Bus Size 8-Bit 16-Bit

ddress Bus Size 16-bit 20-bit

ock Speed 3MHz Varies in range 5.8 – 10 MHz

uty Cycle for clock 50% 33%

ags It has 5 flags (Sign, Zero, Auxiliary It has 9 flags (Overflow, Direction,
Carry, Parity, Carry) Interrupt. Trap, Sign, Zero,
Auxiliary Carry, Parity, Carry)
 COMPARISON
Property 8085 Microprocessor 8086 Microprocessor

Pipelining Support Does not support Supports

Memory Segmentation Does not support Supports

upports

Number of transistors Nearly 6500 Nearly 29000

Processor type Accumulator based General Purpose register based

Presence of Minimum Not present Present

nd Maximum mode
 COMPARISON
Property 8085 Microprocessor 8086 Microprocessor

Number of processors Only one processor is used More than one processor is used.
Additional processor (external) ca
also be employed

Memory Size 64KB 1MB

nstruction No multiplication and division Multiplication and Division

instruction operations are present

nstruction Queue Does not support Supports

upport
HARDWARE DESCRIPTION
LANGUAGE
HARDWARE DESCRIPTION LANGUAGE

HDL is a language that describes the hardware of digital systems in a textual

form.
Used to program the structure, design and operation of electronic circuits
It resembles a programming language, but is specific oriented to describing
hardware structures and behaviors
Traditional programming represents serial instructions whereas HDL represents
parallel instructions
Provides alternative to schematics
HARDWARE DESCRIPTION LANGUAGE

The principal feature of a hardware description language is that it contains the

capability to describe the function of a piece of hardware independently of the
implementation.
The great advance with modern HDLs was the recognition that a single language
could be used to describe the function of the design and also to describe the
implementation.
This allows the entire design process to take place in a single language, and thus
a single representation of the design.
HARDWARE DESCRIPTION LANGUAGE

The principal feature of a hardware description language is that it contains the

capability to describe the function of a piece of hardware independently of the
implementation.
The great advance with modern HDLs was the recognition that a single language
could be used to describe the function of the design and also to describe the
implementation.
This allows the entire design process to take place in a single language, and thus
a single representation of the design.
 VERILOG

The Verilog Hardware Description Language, usually just called Verilog, was designed and
first implemented by Phil Moorby at Gateway Design Automation in 1984 and 1985.

Verilog simulators are available for most computers at a variety of prices, and which have a
variety of performance characteristics and features.

Verilog is more heavily used than ever, and it is growing faster than any other hardware
description language.

It has truly become the standard hardware description language.

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 VERILOG

A Verilog model is composed of modules. A module is the basic unit of the model, and it may
be composed of instances of other modules.

A module which is composed of other module instances is called a parent module, and the
instances are called child modules.

comp1

comp2 system
sub3

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 VERILOG DESIGN CONCEPT

ystem instantiates comp1,comp2

omp2 instantiates sub3 System

comp1 comp2

sub3

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 PRIMITIVES

Primitives are pre-defined

defined module types. They can be instantiated just like any other module
type.

The Verilog primitives are sometimes called gates, because for the most part, they are simple
logical primitives.

1-output and,nand or,nor

1-input buf, not Etc.

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 REGISTER

Registers are storage elements. Values are stored in registers in procedural assignment
tatements.

Typical register declarations would be:

reg r1, r2;

reg [31:0] bus32;
integer i;
real fx1, fx2;

Register can take 0, 1, x (unknown) and z (high impedence)

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 REGISTER TYPES

There are four types of registers:

Reg This is the generic register data type. A reg declaration can specify registers which are 1
bit wide to 1 million bits wide. A register declared as a reg is always unsigned.

Integer Integers are 32 bit signed values. Arithmetic done on integers is 2's complement.

Time Registers declared with the time keyword are 64-bit

64 unsigned integers.

Real (and Realtime) Real registers are 64-bit

bit IEEE floating point. Not all operators can be
used with real operands. Real and realtime are synonymous.

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 EXAMPLE

Primitives are instantiated in a module like any other module instance. For example, the
module represented by this diagram would be instantiated:
module test;
wire n1, n2;
ain n2
reg ain, bin; n1
bin
and and_prim(n1, ain, bin);
not not_prim(n2, n1);
ndmodule

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 ASSIGN

Continuous assignments are sometimes known as data flow statements because they describe
how data moves from one place, either a net or register, to another. They are usually thought
of as representing combinational logic.

Example:

assign w1 = w2 & w3;

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LETS GET THE VERILOG MODULE FOR THIS
CIRCUIT

http://www.doulos.com/knowhow/verilog_designers_guide
re_assignments/

5/6/2021 119
 SOLUTIONS USING “ASSIGN” AND “WIRE”
module AOI (input A, B, C, D, end of a block comment */
output F);
// Equivalent...
/* start of a block comment
wire AB = A & B;
wire F;
wire CD = C & D;
wire AB, CD, O;
wire O = AB | CD;
assign AB = A & B;
wire F = ~O;
assign CD = C & D;
endmodule // end of Verilog code
assign O = AB | CD;
assign F = ~O;
end of a block comment */
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 MODULE ABC IN VABC

module vabc (d, s);

input [1:0] s;
output [3:0] d; abc a1 (d[3], d[2], d[1], d[0], s[1], s[0]);

ndmodule

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MODULE DEFINITION + GATE LEVEL DIAGRAM
module abc (a, b, c, d, s1, s0);
input s1, s0;
output a, b, c,d;

not (s1_, s1), (s0_, s0);

and (a, s1_, s0_);

and (b, s1_, s0);
and (c, s1, s0_);
and (d, s1, s0);

ndmodule

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 VERILOG MODULE EXAMPLE
module shift (shiftOut, dataIn, shiftCount);
parameter width = 4;
output [width-1:0]
shiftOut; input [width-1:0] dataIn;
input [31:0] shiftCount;
assign shiftOut = dataIn << shiftCount;
ndmodule

his module can now be used for shifters of various sizes, simply by changing the width parameter.
Parameters can be changed per instance.

hift sh1 (shiftedVal, inVal,, 7); //instantiation of shift module defparam sh1.width = 16; // parameter
redefinition
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 NET COMPONENT (CONNECTORS)
Nets are the things that connect model components together. They are usually thought of as wires in a
circuit. Nets are declared in statements like this:
net_type [range] [delay3] list_of_net_identifiers ;
or
net_type [drive_strength] [range] [delay3]
list_of_net_decl_assignments ;

Example:
wire w1, w2;
tri [31:0] bus32;
wire wire_number_5 = wire_number_2 & wire_number_3;
here represents AND operation (AND gate)
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4-BIT
BIT ADDER : LETS WRITE VERILOG SOURCE

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