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Digital Circuits and Logic Design: Lecture4-3

1. The document discusses techniques for optimizing the implementation of logic functions including row dominance, column dominance, and cyclic (or essential) prime implicants. 2. It describes how to solve cyclic prime implicant cases using branching or Petrick's method, which involves choosing prime implicants in different combinations to find a minimum cost solution. 3. Petrick's method is specifically described as a way to systematically determine all minimum sum-of-products solutions from a prime implicant chart by using distributive laws and choosing terms with the fewest literals.

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17 views

Digital Circuits and Logic Design: Lecture4-3

1. The document discusses techniques for optimizing the implementation of logic functions including row dominance, column dominance, and cyclic (or essential) prime implicants. 2. It describes how to solve cyclic prime implicant cases using branching or Petrick's method, which involves choosing prime implicants in different combinations to find a minimum cost solution. 3. Petrick's method is specifically described as a way to systematically determine all minimum sum-of-products solutions from a prime implicant chart by using distributive laws and choosing terms with the fewest literals.

Uploaded by

ramanaidu1
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Digital Circuits and Logic Design

Lecture4-3:Optimized Implementation of
Logic Functions (Cont. & end)

112341 Digital Circuits and Logic Design 2010 (KTS)


Notes: Row and Column dominance
Row Pi dominates Pj if Pi has all the 1- entries in Pj and
Pi costs (e.g., number of literals) no costs more than Pj.

Prime Minterm
implicant 10 11 13 15 Suppose all row
p
have the same
1 cost, then row P2
p2 dominates P1, P3,
p3 and P4.
p4

Remove Row dominance

112341 Digital Circuits and Logic Design 2010 (KTS)


Notes: Row and Column dominance
Column mi dominates column mj if mi has all the 1-entries
in mj. Column mi is dominating and column mj is dominated .

Prime Minterm Dominating column can


be removed because that
implicant 0 2 6 7 8
whenever one of their
p dominated column is
1
covered, they are covered
p as well.
2
p
3 Dominating column m6
p is removed
4
Column dominance
Column m6 dominates column m2 and m8
112341 Digital Circuits and Logic Design 2010 (KTS)
Cyclic Prime Implicant
When reduce prime implicant
1.No Essential PI
2.No Column Dominance
3.No Row Dominance
and the PI chart :
Prime Minterm
implicant 0 1 2 5 6 7

p
1
We call cyclic
p
2 prime implicant.
p
3 How to solve it?
p
4
p
5
p
6

112341 Digital Circuits and Logic Design 2010 (KTS)


Cyclic Prime Implicant
1. Branching – We can choose any prime implicant (PI)
and first choose this PI in the final cover, then we can
determine the rest of the final cover in the usual way and
compute its cost . Next try the other PI and work in the
same way. We compare the cost and choose the less
expensive alternative. ( Trial and Error process)

2. Petrick's method - is a technique for determining all


minimum sum-of-products solutions from a prime
implicant chart. Petrick's method is very tedious for large
charts, but it is easy to implement on a computer.

112341 Digital Circuits and Logic Design 2010 (KTS)


Cyclic Prime Implicant

P1-00x Prime Minterm


P2-0x0 implicant 0 1 2 5 6 7
P3-x01
P4-x10 p
1
P5-1x1
P6-11x p
2
p
1.Choose P1, 3
P4 ,and P5 p
4
for cover all
p
5
p
6

112341 Digital Circuits and Logic Design 2010 (KTS)


Cyclic Prime Implicant

Prime Minterm
implicant 0 1 2 5 6 7

p
2.Choose P2, 1
P3 ,and P6 p
2
for cover all p
3
p
4
p
5
p
6
112341 Digital Circuits and Logic Design 2010 (KTS)
Cyclic Prime Implicant

Prime Minterm
implicant 0 1 2 5 6 7

p
3.Choose P1, 1
P2,P5 ,and P6 p
2
for cover all p
3
p
4
p
5
p
6
112341 Digital Circuits and Logic Design 2010 (KTS)
Cyclic Prime Implicant
C1={P1,P4,P5}
=> f(a, b, c)= a’b’+bc’+ac =>cost=13
C2={P2,P3,P6}
=> f(a, b, c)= a’c’+b’c+ab =>cost=13
C3= {P1,P2,P5,P6}
=> f(a, b, c,)= a’b’+a’c’+ac+ab =>cost=17
Note: Cost not include NOT gate
P1-00x P4-x10
P2-0x0 P5-1x1 So choose C1 or C2
P3-x01 P6-11x

112341 Digital Circuits and Logic Design 2010 (KTS)


Petrick's method
Prime Minterm P1 and P2
implicant 0 1 2 5 6 7 Cover minterm
p
1 m0 so:
p
2 (P1+P2) cover m0
p
3 (P1+P3) cover m1
p
4 (P2+P4) cover m2
p
5 (P3+P5) cover m5
p (P4+P6) cover m6
6
All minterm cover: (P5+P6) cover m7
(P1+P2) (P1+P3) (P2+P4) (P3+P5) (P4+P6)(P5+P6)
112341 Digital Circuits and Logic Design 2010 (KTS)
Petrick's method
Use the distributive law to turn that expression
into a sum of products.
[ also use expression :X + XY = X and XX = X
and X+X=X ]
=(P1+P2) (P1+P3) (P2+P4) (P3+P5) (P4+P6)(P5+P6)
=(P1+P2P3)(P4+ P2P6)(P5+P3P6)
=(P1P4+P1P2P6+P2P3P4+P2P3P6)(P5+P3P6)
=P1P4P5+P1P4P3P6+P1P2P6P5+P1P2P3P6+
P2P3P4P5+P2P3P6P4+P2P3P6P5+P2P3P6

=P1P4P5+P1P4P3P6+P1P2P5P6+P2P3P4P5+P2P3P6
112341 Digital Circuits and Logic Design 2010 (KTS)
Petrick's method
Choose term or terms with fewest total literals. In our
example, the two products both expand to 6 literals
total each:

P1P4P5 =>C1 ={P1,P4,P5}


f(a,b,c) = a’b’+bc’+ac
P2P3P6 =>C2 ={P2,P3,P6}
f(a, b, c)= a’c’+b’c+ab
So the answer from Petrick’s method same as
Branching Method

112341 Digital Circuits and Logic Design 2010 (KTS)


Using Quine-McCluskey and Petrick's
Method: Find all minimum sum-of-products
solutions for

f (x1,.., x4) = Σ m(2, 5, 6, 11,12, 14, 15) + D(0,3,4)

112341 Digital Circuits and Logic Design 2010 (KTS)


H/W :How to solve problem
multiple output by QM method

112341 Digital Circuits and Logic Design 2010 (KTS)


QM-Conclusion
There are 4 main steps in the Quine-McCluskey
algorithm:
1.Generate Prime Implicants
2.Construct Prime Implicant Table
3.Reduce Prime Implicant Table
Remove Essential Prime Implicants
Column Dominance
Row Dominance
4.Solve Prime Implicant Table
Branching or Petrick’s method

112341 Digital Circuits and Logic Design 2010 (KTS)


LIBRARY ieee ;
USE ieee.stdlogic_1164.all;
ENTITY func1 IS
(0,1,z,-) for
PORT(xl,x2, x3 : IN STD_LOGIC ;
Boolean
f : OUT STD_LOGIC );
operator
END func1 ;

ARCHITECTURE LogicFunc OF func1 IS


BEGIN
f <= (NOT x1 AND NOT x2 AND NOT x3) OR
(NOT x1 AND x2 AND NOT x3) OR
(x1 AND NOT x2 AND NOT x3) OR
(x1 AND NOT x2 AND x3) OR
(x1 AND x2 AND NOT x3);
END LogicFunc ;
Circuits Synthesized from VHDL Code
112341 Digital Circuits and Logic Design 2010 (KTS)
H/W:
1.Exercise 4.46,4.49 Chap.4, p.245-246
2.Simulate 7-Segments (Last H/W) by
Proteus Program

112341 Digital Circuits and Logic Design 2010 (KTS)

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