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CS 303 Chapter 1, Lecture 2

This document provides an overview of computer architecture and organization. It discusses the major components of a computer including the CPU, memory, and I/O devices. It then explains the instruction cycle and how a simple program is executed. The document also describes device controllers, interrupts, and how interrupts are used to signal events and transfer control between the CPU and devices or software. It outlines the interrupt handling process and different types of interrupts.

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0% found this document useful (0 votes)
78 views16 pages

CS 303 Chapter 1, Lecture 2

This document provides an overview of computer architecture and organization. It discusses the major components of a computer including the CPU, memory, and I/O devices. It then explains the instruction cycle and how a simple program is executed. The document also describes device controllers, interrupts, and how interrupts are used to signal events and transfer control between the CPU and devices or software. It outlines the interrupt handling process and different types of interrupts.

Uploaded by

HARSH MITTAL
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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CS 303

Chapter 1, lecture 2

1
Computer Architecture (Very Fast Recap)
• What are the major components of a computer?
• CPU.
• Memory: main and disk.
• I/O components.
• All these are interconnected.
• What is the main objective of a computer?
• To execute user programs.
• CPU: executes the instructions.
• Memory: stores data and programs.
• I/O modules: move data between computer and external environment.

2
Computer Components

3
Instruction Cycle

4
Instruction Components

5
Program Execution

6
Example of Program Execution
• Goal: add contents of memory word at address 940 to the contents of
memory word at address 941, and store the results in the latter location.
• Three instructions (with three fetch and execute stages) are needed:
• PC contains 300, address of 1st instruction. This instruction (1940) is loaded
into the IR, and PC is incremented, to 301.
• 1st four bits of instruction in IR indicate AC to be loaded from memory.
Remaining 12 bits specify memory address = 940. This will load contents of
940 (= 3) into AC.
• Next instruction (= 5941) is fetched from 301, and put in IR. Also, PC is
incremented, to 302.
• 1st four bits of instruction in IR indicates add to AC from memory address 941
(which contains 2). We do 3 + 2 = 5 and put 5 back in AC.
• Next instruction (=2941) is fetched from 302, and put in IR. Also, PC is
incremented, to 303.
• 1st four bits of IR instructions indicate to store AC contents to memory 941.
• We are now done.
7
Computer System Organization
• Computer-system consists of:
• One or more CPUs, device controllers connected through a
common bus providing access to shared memory.
• Concurrent execution of CPUs and devices competing for memory.

8
Device Controllers
• Note that each I/O device (disk, USB) has an associated controller.
• A device controller is a piece of hardware that connects the operating
system to the various devices, such as keyboard, mouse, printer etc.
• Each device controller is in charge of a particular device type.
• Goal of a device controller?
• Make I/O data available to the OS.
• So that the OS can act on it.
• Controller may have it’s own local buffer to store data.
• For example, data read by keyboard is put in a buffer, from where it can be read
by the OS.
• Controller has a piece of code that accomplishes its task, and it is called
a device driver.
• Device driver is software that manages device (hardware) controllers.
9
Interrupts
! How does a device driver informs the CPU that it has finished its
operation?
! By causing an interrupt.
! Events in an OS are signaled by interrupts.
! Interrupts (to an OS) may be signaled by either the hardware or the
software (called traps or exceptions or system calls).
! Hardware interrupts CPU by sending a signal.
! Signal sent through the system bus.
! Software interrupts CPU by executing a system call.
! This is a piece of code.
! Key concept: an operating system is interrupt driven.
! This is how, for example, the CPU gets to know about a program that wants to start
execution.
! Many other events signaled by interrupts, as we will soon see.

10
Interrupt Timeline

11
Interrupt Time Line
• Here’s the sequence of events:
1.CPU is busy executing some instructions of a program.
2.CPU is interrupted.
3.It stops it’s execution, & transfers to a fixed location in memory, that
contains the interrupt service routine.
4.This routine/code is executed.
5.On completion, CPU resumes execution of interrupted program.
• Table of pointers is maintained.
• Each pointer points to a specific interrupts service routine.
• This table of pointers is stored in low memory locations, & is
called an interrupt vector, say *iv[100].
• Vector – “to direct to a desired point”.
• Both Windows and Linux service interrupts in this manner.

12
Interrupt Implementation
• CPU hardware has a wire (interrupt request line) that it senses after executing
every instruction.
• When CPU detects a device controller has sent a signal on the line, it reads
interrupt number and jumps to relevant isr.
• CPU executes the isr code (to service the interrupt).
• Note that current state of CPU needs to be saved (and restored later).
• After servicing the interrupt, CPU goes back to what it was doing (execute next
instruction of the halted program). Need a state restore for this.
• In modern OSes, interrupts are assigned a priority level (which one to service
now, which one can wait a bit?).
• Vector number 0: divide error, 6: invalid opcode, 7: device not available, 14: page
fault etc.
• Integers here are indexes to array of pointers.
13
Interrupt I/O Cycle
CPU I/O controller
1

device driver initiates I/O 2


initiates I/O

CPU executing checks for


interrupts between instructions
3

CPU receiving interrupt, 4 input ready, output


transfers control to complete, or error
interrupt handler generates interrupt signal
7
5

interrupt handler
processes data,
returns from interrupt

CPU resumes
processing of
interrupted task

14
Types of Interrupts
Program interrupts As a result of instruction execution e.g. arithmetic
overflow, out of bounds instruction.
Timer interrupts Generated by a timer in the processor to perform
functions at regular intervals.
I/O interrupts Normal I/O completion or error conditions.
Hardware failure interrupts Power failure.

15
Interrupt Vector Table (source: ece-research.unm.edu).

16

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