P775TM1 Esm
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umut zeki BulutP775TM1 Esm
Uploaded by
umut zeki BulutP775TM (-G) / P775TM1 (-G)
Preface
Notebook Computer
P775TM (-G) / P775TM1 (-G)
Service Manual
Preface
I
Preface
Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent ven-
dor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.
This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publica-
tion, except for copies kept by the user for backup purposes.
Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Preface
Version 1.0
November 2017
Trademarks
Intel and Intel Core are trademarks of Intel Corporation.
Windows® is a registered trademark of Microsoft Corporation.
Other brand and product names are trademarks and/or registered trademarks of their respective companies.
II
Preface
About this Manual
This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.
It is organized to allow you to look up basic information for servicing and/or upgrading components of the P775TM (-
G) / P775TM1 (-G) series notebook PC.
The following information is included:
Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.
Appendix A, Part Lists
Preface
Appendix B, Schematic Diagrams
Appendix C, Updating the FLASH ROM BIOS
III
Preface
IMPORTANT SAFETY INSTRUCTIONS
Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to per-
sons when using any electrical equipment:
1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of elec-
trical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output
of 19.5V, 16.9A (330 Watts) or 16.9A (330 Watts) minimum AC/DC Adapter.
Preface
IV
Preface
Instructions for Care and Operation
The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer Do not place it on an unstable Do not place anything heavy
to any shock or vibration. surface. on the computer.
2. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not expose it to excessive Do not leave it in a place Don’t use or store the com- Do not place the computer on
Preface
heat or direct sunlight. where foreign matter or mois- puter in a humid environment. any surface which will block
ture may affect the system. the vents.
3. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power Do not turn off any peripheral Do not disassemble the com- Perform routine maintenance
until you properly shut down devices when the computer is puter by yourself. on your computer.
all programs. on.
V
Preface
4. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage your data.
5. Take care when using peripheral devices.
Removal Warning Use only approved brands of Unplug the power cord before
When removing any peripherals. attaching peripheral devices.
cover(s) and screw(s)
for the purposes of de-
vice upgrade, remem-
ber to replace the
cover(s) and screw(s)
before restoring power
to the system.
Also note the following
when the cover is re-
moved: Power Safety
Preface
• Hazardous mov- The computer has specific power requirements:
ing parts.
• Keep away from • Only use a power adapter approved for use with this computer.
moving fan blades • Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
unsure of your local power specifications, consult your service representative or local power company.
• The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
Power Safety not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
Warning • When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
Before you undertake • Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
any upgrade proce- • Before cleaning the computer, make sure it is disconnected from any external power supplies.
dures, make sure that
you have turned off the
power, and discon- Do not plug in the power Do not use the power cord if Do not place heavy objects
nected all peripherals cord if you are wet. it is broken. on the power cord.
and cables (including
telephone lines and
power cord). You must
also remove your bat-
tery in order to prevent
accidentally turning the
machine on.
VI
Preface
Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.
Battery Guidelines
The following can also apply to any backup batteries you may have.
Preface
• If you do not use the battery for an extended period, then remove the battery from the computer for storage.
• Before removing the battery for storage charge it to 60% - 70%.
• Check stored batteries at least every 3 months and charge them to 60% - 70%.
Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under var-
ious state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste
officials for details in your area for recycling options or proper disposal.
Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer.
Discard used battery according to the manufacturer’s instructions.
Battery Level
Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10%
will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week.
VII
Preface
Related Documents
You may also need to consult the following manual for additional information:
User’s Manual on Disc
This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup pro-
gram. It also describes the installation and operation of the utility programs provided with the notebook PC.
System Startup
1. Remove all packing materials.
2. Place the computer on a stable surface.
3. Insert the battery and make sure it is locked in position.
4. Securely attach any peripherals you want to use with the
computer (e.g. keyboard and mouse) to their ports.
Preface
5. When first setting up the computer use the following
procedure (as to safeguard the computer during shipping,
the battery will be locked to not power the system until first
connected to the AC/DC adapter and initially set up as
below):
• Attach the AC/DC adapter cord to the DC-In jack at the 135°
rear of the computer, then plug the AC power cord into an
outlet, and connect the AC power cord to the AC/DC
adapter and leave it there for 6 seconds or longer.
• Remove the adapter cord from the computer’s DC-In jack,
and then plug it back in again; the battery will now be
unlocked.
6. Use one hand to raise the lid/LCD to a comfortable viewing Figure 1
angle (do not to exceed 135 degrees); use the other hand Opening the Lid/LCD/
(as illustrated in Figure 1) to support the base of the Computer with AC/DC
computer (Note: Never lift the computer by the lid/LCD). Adapter Plugged-In
7. Press the power button to turn the computer “on”.
VIII
Preface
Contents
Introduction ..............................................1-1 Part List Illustration Location ........................................................ A-2
Top ................................................................................................. A-3
Overview .........................................................................................1-1 Bottom .......................................................................................... A-4
External Locator - Top View with LCD Panel Open ......................1-4 LCD (LG-AU) ............................................................................... A-5
External Locator - Front & Right side Views .................................1-5
LCD (AU) ...................................................................................... A-6
External Locator - Left Side & Rear View .....................................1-6 MB ................................................................................................. A-7
External Locator - Bottom View .....................................................1-7 HDD ............................................................................................... A-8
Mainboard Overview - Top (Key Parts) .........................................1-8
VGA (G1/G3) ................................................................................ A-9
Mainboard Overview - Bottom (Key Parts) ....................................1-9
VGA (G2) .................................................................................... A-10
Mainboard Overview - Top (Connectors) .....................................1-10
Mainboard Overview - Bottom (Connectors) ...............................1-11 Schematic Diagrams................................. B-1
Disassembly ...............................................2-1 Block Diagram ................................................................................B-2
Processor 1/5 ...................................................................................B-3
Preface
Overview .........................................................................................2-1 Processor 2/5 ...................................................................................B-4
Maintenance Tools ..........................................................................2-2 Processor 3/5 ...................................................................................B-5
Connections .....................................................................................2-2
Processor 4/5 ...................................................................................B-6
Maintenance Precautions .................................................................2-3 Processor 5/5 ...................................................................................B-7
Disassembly Steps ...........................................................................2-4 DDR4 CHA SO-DIMM_0 ..............................................................B-8
Removing the Battery ......................................................................2-5 DDR4 CHA SO-DIMM_1 ..............................................................B-9
Removing and Installing the Hard Disk Drive ................................2-6 DDR4 CHB SO-DIMM_0 ............................................................B-10
Removing the M.2 SSD Module .....................................................2-9
DDR4 CHB SO-DIMM_1 ............................................................B-11
Removing the Primary System Memory (RAM) .........................2-10 Panel, Inverter, CRT .....................................................................B-12
Removing and Installing the Processor .........................................2-12
Display Port A ..............................................................................B-13
Removing the System Memory (RAM) from Under the Keyboard ..2-
Display Port B ...............................................................................B-14
15 HDMI ............................................................................................B-15
Removing the Wireless LAN Module ...........................................2-17
MXM PCI-E .................................................................................B-16
Wireless LAN, Combo Module Cables .........................................2-18
Lynix Point 1/7 .............................................................................B-17
Removing the WiGig Module .......................................................2-19 Lynix Point 2/7 .............................................................................B-18
Removing the M.2 SSD Module ...................................................2-20
Lynix Point 3/7 .............................................................................B-19
Removing and Installing the Video Card ......................................2-22
Lynix Point 4/7 .............................................................................B-20
Part Lists ..................................................A-1 Lynix Point 5/7 .............................................................................B-21
IX
Preface
Lynix Point 6/7 ............................................................................. B-22 P750DM HDD Board ...................................................................B-54
Lynix Point 7/7 ............................................................................. B-23 P750DM Power LED Board .........................................................B-55
USB Charging .............................................................................. B-24 P750DM Click Board ...................................................................B-56
CCD, USB Port3 .......................................................................... B-25 P750DM Audio Board ..................................................................B-57
M.2 3G+USB & WLAN+BT ....................................................... B-26 P750DM Audio ESS DAC ...........................................................B-58
M.2 PCIE4X SSD1 & SSD2 ........................................................ B-27 P750DM Audio HP AMP .............................................................B-59
Realtek ALC898 ........................................................................... B-28 P750DM Audio Board ..................................................................B-60
PCM1861 + TAS5766DCA ......................................................... B-29 P775DM Audio Board ..................................................................B-61
Subwoofer .................................................................................... B-30 P775DM Audio ESS DAC ...........................................................B-62
EC IT8587 .................................................................................... B-31 P775DM Audio HP AMP .............................................................B-63
Second EC IT8587 ....................................................................... B-32 P775DM Audio Board ..................................................................B-64
Backlight Keyboard ...................................................................... B-33 P750DM BOT LED Board ...........................................................B-65
LID SW, Fan, LED Conn ............................................................. B-34 P750DM LID Switch Board .........................................................B-66
Fan, TP, FP, Multi-Con ................................................................ B-35 P750DM Charge LED Board ........................................................B-67
Preface
LAN E2500 .................................................................................. B-36 P775DM Charge LED Board ........................................................B-68
PS8338B + PS8330B ................................................................... B-37 P775DM Power LED Board .........................................................B-69
TBT .............................................................................................. B-38 Power On Sequence ......................................................................B-70
Power ............................................................................................ B-39 Updating the FLASH ROM BIOS......... C-1
TPS65982 ..................................................................................... B-40
TPS65982 ..................................................................................... B-41
Cardreader RTS5250 .................................................................... B-42
TPM SLB9655TT & NPCT420 ................................................... B-43
VCCIO / 1P0A ............................................................................. B-44
DDR 1.2V/0.6VS/VCCPLL_OC ................................................. B-45
VDD3, VDD5 ............................................................................... B-46
5V/5VS, 3V/3.3VS, 3.3VA .......................................................... B-47
5VS_2/2.5V/NV3V3/3.3V_ON/5V_RUN ................................... B-48
Fan CPU, VGA Power ................................................................. B-49
VCore ........................................................................................... B-50
VCore Output Stage ..................................................................... B-51
VCCSA / VCCGT ........................................................................ B-52
Power Charger, DC-In .................................................................. B-53
X
Introduction
Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the P775TM (-G) / P775TM1 (-G) series notebook
computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual.
Information about drivers (e.g. VGA & audio) is also found in User’s Manual. That manual is shipped with the computer.
Operating systems (e.g. Windows 10, etc.) have their own manuals as do application software (e.g. word processing and
database programs). If you have questions about those programs, you should consult those manuals.
The P775TM (-G) / P775TM1 (-G) series notebook is designed to be upgradeable. See Disassembly on page 2 - 1 for a
1.Introduction
detailed description of the upgrade procedures for each specific component. Please note the warning and safety informa-
tion indicated by the “” symbol.
The balance of this chapter reviews the computer’s technical specifications and features.
Overview 1 - 1
Introduction
Specifications Processor Options Memory
i7-8700K (3.70GHz)* Four 260 Pin SO-DIMM Sockets Supporting DDR4 2400
12MB Smart Cache, 14nm, DDR4-2666MHz, TDP 95W MHz Memory
i5-8600K (3.60GHz)* (The real memory operating frequency depends on the FSB
9MB Smart Cache, 14nm, DDR4-2666MHz, TDP 95W of the processor.)
Memory Expandable from 8GB (minimum) up to 64GB
Latest Specification Information i7-8700 (3.20GHz)
(maximum)
12MB Smart Cache, 14nm, DDR4-2666MHz, TDP 65W
The specifications listed here are correct at the Support XMP 2666/3000 MHz (XMP depends on processor)
i5-8400 (2.80GHz)
time of sending them to the press. Certain items
(particularly processor types/speeds) may be 6MB Smart Cache, 14nm, DDR4-2666MHz, TDP 65W
changed, delayed or updated due to the manu- i3-8350K (4.00GHz) (for P775TM/P775TM1 only)
facturer's release schedule. Check with your 8MB Smart Cache, 14nm, DDR4-2400MHz, TDP 91W SO-DIMM Memory Types
service center for more details. i3-8100 (3.60GHz) (for P775TM/P775TM1 only)
All SO-DIMM memory modules in-
6MB Smart Cache, 14nm, DDR4-2400MHz, TDP 65W stalled in the system should be iden-
tical (the same size and brand) in
1.Introduction
*Supports Intel® XTU overclocking technology depending on
CPU SKU order to prevent unexpected system
behavior.
LCD Options
17.3" (43.94cm), 16:9, QFHD (3840x2160)/FHD (1920x1080) Do not mix SO-DIMM memory mod-
CPU Speed & Computer in DC Mode Core Logic ule sizes and brands otherwise un-
expected system problems may
Note that when the computer is in DC mode Intel® Z370 Chipset occur.
(powered by the battery only) the CPU may not BIOS
run at full speed. This is a design feature imple-
AMI BIOS (64Mb SPI Flash-ROM)
mented in order to protect the battery. Security
Pointing Device
Security (Kensington® Type) Lock Slot
Built-In Secure Pad (with Microsoft PTP Multi Gesture &
BIOS Password
Scrolling Functionality)
Fingerprint Reader Module
Keyboard
Trusted Platform Module 2.0
Full Color Illuminated Full-size Winkey Keyboard (with
Intel PTT for Systems Without TPM Hardware
numeric keypad and anti-ghost keys)
Storage
Video Adapter Options
Two changeable 2.5" (6cm) 7.0mm (h)/ 9.5mm (h) SATA
NVIDIA® GeForce GTX 1060 PCIe Video Card
(Serial) Hard Disk Drives/Solid State Drives (SSD) support-
6GB GDDR5 Video RAM on board ing RAID level 0/1
Supports GPU Overclocking (Factory Option) Two M.2 SATA 2280 SSDs supporting
NVIDIA® GeForce GTX 1070 / GTX 1080 PCIe Video Card RAID level 0/1
(for P775TM1(-G) only) Or
8GB GDDR5 Video RAM (Factory Option) Two M.2 PCIe
Supports GPU Overclocking Gen3 x4 2280 SSDs supporting RAID level 0/1
1 - 2 Overview
Introduction
Audio Communication Power
High Definition Audio Compliant Interface Built-In Qualcomm 10/100/1000Mb Base-TX Ethernet LAN Removable 8-cell Smart Lithium-Ion Battery Pack, 82WH
S/PDIF Digital Output 2.0M FHD PC Camera Module Full Range AC/DC Adapter
Two Speakers WLAN/ Bluetooth M.2 Modules: AC Input: 100 - 240V, 50 - 60Hz
Sound Blaster Audio (Factory Option) Intel® Wireless-AC 8265 Wireless LAN DC Output: 19.5V, 11.8A (230W) - P775TM(-G)
ESS™ SABRE HIFI DAC for High Resolution Headphone (802.11ac) + Bluetooth 4.1 DC Output: 19.5V, 16.9A (330W) - P775TM1(-G)
Audio (Factory Option) Qualcomm® Atheros Killer™ Wireless-AC
Built-In Array Microphone
Dimensions & Weight
1535 Wireless LAN (802.11ac) + Bluetooth 4.1
Sub-Woofer 418mm (w) * 295.3mm (d) * 40.9mm (h)
(Factory Option) Qualcomm® Wireless LAN (802.11ac/ad)
+ Bluetooth 4.1 3.9kg (Barebone System with Video Card and 82WH Battery)
Note: External 7.1CH Audio Output Supported by 2-In-1 Or
Audio Jacks, Microphone, Line-In and Line- Out Jacks M.2 Slots
4.3kg (Barebone System with Video Card and 82WH Battery)
Interface Slot 1 for Combo WLAN and Bluetooth Module
Slot 2 for SATA or PCIe Gen3 x4 SSD
One USB 3.1 Gen 2 Type C Port
Slot 3 for SATA or PCIe Gen3 x4 SSD
1.Introduction
One USB 3.1 Gen 2/Thunderbolt 3 Combo Port (Type C)
Two Mini DisplayPorts (1.3) Card Reader
One HDMI-Out Port Embedded Multi-In-1 Push-Push Card Reader
One 2-In-1 Audio Jack (Headphone/ S/PDIF Optical Output MMC (MultiMedia Card) / RS MMC
Combo Jack) SD (Secure Digital) / Mini SD / SDHC/ SDXC (up to UHS-
One Microphone-In Jack II)
One Line-Out Jack Features
One Line-In Jack Supports NVIDIA® G-SYNC™ Technology
One RJ-45 LAN Jacks (NVIDIA® G-SYNC™ Technology is supported by some LCD
One DC-In Jack panels and GTX series video adapters Only)
Four USB 3.0 (USB 3.1 Gen 1) Ports (Including one AC/DC Intel® Optane™ Technology
Powered USB port) Virtual Reality Ready (i5 & i7 Processor only)
Supports Windows® 10 Cortana with Voice
(Factory Option) USB Drive
Environmental Spec
Temperature
Operating: 10°C - 35°C
Non-Operating: -20°C - 60°C
Relative Humidity
Operating: 20% - 80%
Non-Operating: 10% - 90%
Overview 1 - 3
Introduction
Figure 1
External Locator - Top View with LCD Panel Open
Top View
1. PC Camera
2. PC Camera LED 3 2 1 3
3. Built-In
Microphone
4. LCD
5. Speakers
6. Power Button
7. LED Lock 4
Indicators
1.Introduction
8. Keyboard
9. TouchPad and
Buttons
10. Fingerprint
Reader
5 5
7 6 7
10
9
1 - 4 External Locator - Top View with LCD Panel Open
Introduction
External Locator - Front & Right side Views Figure 2
Front Views
1. LED Power
Indicators
Front
1.Introduction
Figure 3
Right Side Views
1. Line-In Jack
2. Microphone Jack
3. Line-Out Jack
Right 4. Headphone and
S/PDIF Combo
6 Jack
1 2 3 4 5 5
5. USB 3.0/3.1 Port
6. Security Lock Slot
External Locator - Front & Right side Views 1 - 5
Introduction
External Locator - Left Side & Rear View
Figure 4
Left Side View
1. RJ-45 LAN Jack
2. USB 3.1/
Thunderbolt
Combo Port Left
3. USB 3.1 Port
4. USB 3.0/3.1 Port
5. Powered USB 3.1 2 3 4 5 6
1
Port
6. Multi-in-1 Card
1.Introduction
Reader
Figure 5
Rear View
1. Vent/Fan Intake
2. HDMI-Out Port Rear
3. Mini Display Port 1
4. Mini Display Port 2 1 1
5. DC-In Jack 2 3 4
5
1 - 6 External Locator - Left Side & Rear View
Introduction
External Locator - Bottom View Figure 6
Bottom View
1. Vent
2. Component Bay
Cover
3. Battery
4. Sub Woofer
5. HDD Bay
1.Introduction
1 2
1
4
3
5
Overheating
To prevent your com-
puter from overheating
make sure nothing
blocks the vent/fan in-
takes while the com-
puter is in use.
External Locator - Bottom View 1 - 7
Introduction
Figure 7 Mainboard Overview - Top (Key Parts)
Mainboard Top
Key Parts
1. Memory Slots
DDR4 SO-DIMM
2. Platform
Controller Hub
1.Introduction
2
1
1 - 8 Mainboard Overview - Top (Key Parts)
Introduction
Mainboard Overview - Bottom (Key Parts) Figure 8
Mainboard Bottom
Key Parts
1. KBC ITE IT8587
2. VGA-Card
Connector
2
3. CPU Socket (no
CPU installed)
4. Memory Slots
DDR4 SO-DIMM
3
(Primary)
5. Hard Disk
1.Introduction
Connector
1
1
4
5
Mainboard Overview - Bottom (Key Parts) 1 - 9
Introduction
Figure 9 Mainboard Overview - Top (Connectors)
Mainboard Top
Connectors
1. RJ-45 LAN Jack
2. USB 3.1/
Thunderbolt
Combo Port
3. USB 3.1 Port 10
4. USB 3.0/3.1 Port
5. Multi-in-1 Card
Reader 4
1.Introduction
6. KB LED
Connector 4
7. WLAN Card
Connector 16
1 11
8. Fingerprint 15
Connector 6
2 14
9. TP FFC Cable 8
3 11
Connector
13
10. Panel Cable 9
Connector 7 12
4
11. Keyboard Cable
Connector 4
12. Battery
Connector
13. Line-In Jack 5
14. Microphone Jack
15. Line-Out Jack
16. Headphone and
S/PDIF Combo
Jack
1 - 10 Mainboard Overview - Top (Connectors)
Introduction
Mainboard Overview - Bottom (Connectors) Figure 10
Mainboard Bottom
Connectors
1. HDMI-Out Port
2. Display Port
3. DC-In Jack
1 2 2 3 4. VGA Fan Cable
Connector
5. 3G / SSD
Connector
6. CMOS Battery
7. SSD Connector
1.Introduction
8. CPU Fan Cable
Connector
4
8
5
6
Mainboard Overview - Bottom (Connectors) 1 - 11
Introduction
1.Introduction
1 - 12
Disassembly
Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the P775TM (-G) / P775TM1 (-G) series notebook’s
parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated).
We suggest you completely review any procedure before you take the computer apart.
Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are
repeated here for your convenience.
2.Disassembly
To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the dis-
Information
assembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previ-
ous disassembly procedure. The amount of screws you should be left with will be listed here also.
A box with a will also provide any possible helpful information. A box with a contains warnings.
An example of these types of boxes are shown in the sidebar.
Warning
Overview 2 - 1
Disassembly
NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).
Maintenance Tools
The following tools are recommended when working on the notebook PC:
• M3 Philips-head screwdriver
• M2.5 Philips-head screwdriver (magnetized)
• M2 Philips-head screwdriver
• Small flat-head screwdriver
• Pair of needle-nose pliers
• Anti-static wrist-strap
2.Disassembly
Connections
Connections within the computer are one of four types:
Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to gently pry
the locking collar away from its base. When replacing the connection, make
sure the connector is oriented in the same way. The pin1 side is usually not
indicated.
Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently rock it from side
to side as you pull it out. Do not pull on the wires themselves. When replacing
the connection, do not try to force it. The socket only fits one way.
Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pliers to gently
lift the connector away from its socket. When replacing the connection, make
sure the connector is oriented in the same way. The pin1 side is usually not
indicated.
Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as you pull them
apart. If the connection is very tight, use a small flat-head screwdriver - use
just enough force to start.
2 - 2 Overview
Disassembly
Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a re-
moval and/or replacement job, take the following precautions: Power Safety
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other components Warning
could be damaged.
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. Before you undertake
any upgrade proce-
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields.
dures, make sure that
These can hinder proper performance and damage components and/or data. You should also monitor the position of magnet-
you have turned off the
ized tools (i.e. screwdrivers). power, and discon-
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged. nected all peripherals
5. Be careful with power. Avoid accidental shocks, discharges or explosions. and cables (including
•Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. telephone lines and
•When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. power cord). It is advis-
6. Peripherals – Turn off and detach any peripherals. able to also remove
2.Disassembly
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity. Before han- your battery in order to
dling any part in the computer, discharge any static electricity inside the computer. When handling a printed circuit board, do prevent accidentally
not use gloves or other materials which allow static electricity buildup. We suggest that you use an anti-static wrist strap turning the machine
on.
instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils
which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted to charged
surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as screws,
loose inside the computer.
Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.
(For Computer Models Supplied with Light Blue Cleaning Cloth) Some computer models in this series come sup-
plied with a light blue cleaning cloth. To clean the computer case with this cloth follow the instructions below.
• Power off the computer and peripherals.
• Disconnect the AC/DC adapter from the computer.
• Use a little water to dampen the cloth slightly.
• Clean the computer case with the cloth.
• Dry the computer with a dry cloth, or allow it time to dry before turning on.
• Reconnect the AC/DC adapter and turn the computer on.
Overview 2 - 3
Disassembly
Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.
To remove the Battery: To remove the WLAN Module:
1. Remove the battery page 2 - 5 1. Remove the battery page 2 - 5
2. Remove the processor page 2 - 12
To remove the HDD: 3. Remove the keyboard page 2 - 10
1. Remove the battery page 2 - 5 4. Remove the wireless LAN page 2 - 17
2. Remove the HDD page 2 - 6
To remove the WiGig Module:
To remove the M.2 SSD: 1. Remove the battery page 2 - 5
2.Disassembly
1. Remove the battery page 2 - 5 2. Remove the processor page 2 - 12
2. Remove the HDD page 2 - 6 3. Remove the keyboard page 2 - 10
3. Remove the M.2 SSD page 2 - 9 4. Remove the WiGig page 2 - 19
To remove the Primary System Memory: To remove and install the M.2 SSD:
1. Remove the battery page 2 - 5 1. Remove the battery page 2 - 5
2. Remove the primary system memory page 2 - 10 2. Remove the primary system memory page 2 - 10
3. Remove the M.2 SATA page 2 - 20
To remove and install the Processor:
4. Install the M.2 SATA page 2 - 21
1. Remove the battery page 2 - 5
2. Remove the system memory page 2 - 10 To remove and install the Video Card:
3. Remove the processor page 2 - 12 1. Remove the battery page 2 - 5
4. Install the processor page 2 - 14 2. Remove the video card page 2 - 22
3. Install the video card page 2 - 23
To remove the System Memory under the
Keyboard:
1. Remove the battery page 2 - 5
2. Remove the processor page 2 - 12
3. Remove the keyboard page 2 - 15
4. Remove the system memory page 2 - 16
2 - 4 Disassembly Steps
Disassembly
Removing the Battery
1. Turn the computer off, and turn it over. Figure 1
2. Slide the latch 1 in the direction of the arrow (Figure 1a). Battery Removal
3. Slide the latch 2 in the direction of the arrow, and hold it in place (Figure 1a).
4. Lift the battery in the direction of the arrow 3 . a. Slide the latch and hold in
5. Lift the battery 64 out of the compartment (Figure 1c). place.
b. Lift the battery up toward
the direction of the arrow.
c. Lift the battery out.
a. c.
1
2
2.Disassembly
b. 4
3
4. Battery
Removing the Battery 2 - 5
Disassembly
Figure 2 Removing and Installing the Hard Disk Drive
HDD Assembly
The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 7mm/
Removal
9.5mm (h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as out-
a. Locate the HDD bay
lined in Chapter 4 of the User’s Manual) when setting up a new hard disk.
cover and remove the
screws. Hard Disk Removal Process
b. Remove the hard disk
1. Turn off the computer, and remove the battery (page 2 - 5).
bay cover by sliding the
cover at point 3 . 2. Locate the hard disk bay cover and remove screws 1 - 2 (Figure 2a).
3. Remove the hard disk bay cover by sliding the cover at point 3 (Figure 2b).
a. b.
2.Disassembly
1 2
HDD System Warning
New HDD’s are blank. Before you begin make sure:
You have backed up any data you want to keep from your old HDD.
• 2 Screws You have all the CD-ROMs and FDDs required to install your operating system and programs.
If you have access to the internet, download the latest application and hardware driver updates for
the operating system you plan to install. Copy these to a removable medium.
2 - 6 Removing and Installing the Hard Disk Drive
Disassembly
4. Lift the hard disk bay cover 64 off the computer (Figure 3c)
5. Remove the screw 5 . Slightly lift and pull the HDD-1 assembly in the direction of the arrow 6 to remove the hard Figure 3
HDD Assembly
disk assembly 67 (Figure 3d).
Removal (cont’d.)
6. Remove the screw 8 . Slightly lift and pull the HDD-2 assembly (if available) in the direction of the arrow 9 to
remove the hard disk assembly 10 (Figure 3e).
c. Remove the HDD bay
7. Remove screws 11 - 16 , HDD bracket 17 and the adhesive cover 18 from the hard disk 19 (Figure 3f).
cover.
8. Reverse the process to install a new hard disk (do not forget to replace all the screws and covers). d. Remove the screw. Lift
and pull the HDD-1 as-
d. e. sembly in the direction of
c.
the arrow to remove the
hard disk assembly.
e. Remove the screw. Lift
and pull the HDD-2 as-
sembly in the direction of
2.Disassembly
8 the arrow to remove the
hard disk assembly.
f. Remove the screws,
5 hdd bracket and adhe-
sive cover.
4
9
11
f.
13 12
14 6
HDD-2
18 HDD-1
4. HDD Bay Cover
19 7. HDD-1 Assembly
10. HDD-2 Assembly
15
17. Adhesive Cover
7 18. HDD Bracket
19. HDD
17 10
• 8 Screws
16
Removing and Installing the Hard Disk Drive 2 - 7
Disassembly
Hard Disk Size Note (Foam Rubber Insert)
Note that the hard disks pictured on the following pages are all 9.5mm(H) hard disk drives. In some cases 7mm(H) hard
disk drives will be installed.
Figure 4
Foam Rubber
Insert for 7mm(H)
2.Disassembly
HDDs
HDD-2 HDD-1
• If you are replacing a 9.5mm(H) HDD with a
7mm(H) HDD then insert the foam rubber
insert.
• If you are replacing a 7mm(H) HDD with a
9.5mm(H) HDD then remove the foam rub-
ber insert.
2 - 8 Removing and Installing the Hard Disk Drive
Disassembly
Removing the M.2 SSD Module Figure 5
Note that the SSD (if installed) is beside the HDD bay. M.2 SSD Module
1. Turn off the computer, and turn it over, remove the battery (page 2 - 5). Removal
2. Remove the screw 1 from the SSD (Figure 5a).
3. The M.2 SSD module 62 will pop-up (Figure 5b). a. Remove the screws.
b. The module will pop up.
4. Lift the M.2 SSD module 62 up and off the computer (Figure 5c).
c. Lift the module out.
5. Reverse the process to install a new SSD (make sure that the hexagonal screw 3 is in the correct location
depending upon the size of the module).
a. b. c.
2.Disassembly
2
3
2. M.2 SSD Module
1 • 1 Screw
2
Removing the M.2 SSD Module 2 - 9
Disassembly
Figure 6 Removing the Primary System Memory (RAM)
RAM Module
Removal
The computer has four memory sockets for 260 pin Small Outline Dual In-line (SO-DIMM) DDR 4 type memory modules.
The total memory size is automatically detected by the POST routine once you turn on your computer.
a. Remove the screws.
Slide the bottom Two primary memory sockets are located under component bay cover (the bottom case cover), and two secondary
cover until the cover
and case indicators memory sockets are located under the keyboard (not user upgradable). If you are installing only two RAM modules
are aligned. then they should be installed in the primary memory sockets under the component bay cover.
Note that the RAM located under the keyboard is not user upgradable.
Memory Upgrade Process
2.Disassembly
1. Turn off the computer, and turn it over, remove the battery (page 2 - 5).
2. Remove screws 1 - 5 .
3. Slide the bottom cover until the cover and case indicators 6 are aligned (Figure 6a).
a.
2 3
1 4
5 6
6
• 5 Screws
2 - 10 Removing the Primary System Memory (RAM)
Disassembly
4. Lift the component bay cover 6 off the computer case. The modules will be visible at point 7 (Figure 7c). Figure 7
5. Gently pull the two release latches ( 8 & 9 ) on the sides of the memory socket(s) in the direction indicated below RAM Module
(Figure 7d). Removal (cont’d.)
6. The RAM module 10 will pop-up, and you can remove it (Figure 7e).
7. Pull the latches to release the second module if necessary. c. Lift the component bay
8. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot. cover off the computer
9. The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it case. The modules will
will go. DO NOT FORCE the module; it should fit without much pressure. be visible at point 7 .
10. Press the module in and down towards the mainboard until the slot levers click into place to secure the module. d. Gently pull the two re-
lease latches on the
11. Replace the bay cover and screws. sides of the memory
12. Restart the computer to allow the BIOS to register the new memory configuration as it starts up. socket(s) in the direc-
e. tion indicated below.
c.
e. The RAM module will
2.Disassembly
pop-up, and you can
6 remove it.
10
d.
Contact Warning
Be careful not to touch the metal pins on the module’s connecting
8 9 6. Component Bay
edge. Even the cleanest hands have oils which can attract particles,
Cover
and degrade the module’s performance.
10. RAM Module
8 9
• 4 Screws
Removing the Primary System Memory (RAM) 2 - 11
Disassembly
Figure 8 Removing and Installing the Processor
Processor
Removal
Processor Removal Procedure
Procedure 1. Turn off the computer, remove the battery (page 2 - 5), and component bay cover (page 2 - 10).
2. Remove screws 1 - 4 from the heat sink unit in the order indicated on the label (i.e screw 4 first through to
a. Remove the screws screw 1 last Figure 8a).
in the correct order. 3. Carefully (it may be hot) remove the heat sink unit 5 (Figure 8b).
b. Carefully remove
the heat sink unit.
a.
2 3
Note:
2.Disassembly
Loosen the screws in the reverse
4 1 order 4-3-2-1 as indicated.
b.
5. Heat Sink Unit
• 4 Screws
2 - 12 Removing and Installing the Processor
Disassembly
4. Press down and hold the latch 11 (with the latch held down you will be able to release it).
5. Move the latch 11 and bracket 12 fully in the direction indicated to unlock the CPU(Figure 9c).
6. Carefully (it may be hot) lift the CPU A up out of the socket (Figure 9d). Figure 9
7. See page 2 - 14 for information on inserting a new CPU. Processor Removal
8. When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!). (cont’d)
c. c. Move the latch and
bracket fully in the direc-
tion indicated to unlock
12 the CPU.
d. Lift the CPU out of the
socket.
2.Disassembly
11
11
Unlock
d.
A
Caution
The heat sink, and CPU area in
general, contains parts which are
subject to high temperatures. Al-
low the area time to cool before re-
moving these parts.
A. CPU
Removing and Installing the Processor 2 - 13
Disassembly
Figure 10 Processor Installation Procedure
Processor 1. Insert the CPU A ; pay careful attention to the pin alignment (Figure 10a), it will fit only one way (DO NOT FORCE
Installation IT!).
2. Move the bracket B and latch C fully in the direction indicated to lock the CPU.
a. Insert the CPU. 3. Apply the whole tube of thermal grease D to the top of the CPU as shown (Figure 10b).
b. Move the latch and 4. Remove the sticker E (Figure 10c) from the heat sink unit (if it is a new unit).
bracket fully in the direc-
5. Insert the heat sink unit F as indicated in Figure 10c.
tion indicated to lock the
CPU. Apply thermal 6. Tighten the CPU heat sink screws in the order 1 - 4 (the order as indicated on the label and Figure 10d).
grease. 7. Replace the CPU fan, component bay cover and tighten the screws (page 2 - 12).
c. Remove the sticker from
the heat sink unit and in- a. b.
sert the heat sink.
d. Tighten the screws. B
2.Disassembly
A
D
C
C
Note:
Tighten the screws in the order 1-2-3-4 as indicated.
c. d.
E
F 2 3
A. CPU
F. Heat Sink
4 1
• 4 Screws
2 - 14 Removing and Installing the Processor
Disassembly
Removing the System Memory (RAM) from Under the Keyboard Figure 11
Keyboard
The computer has four memory sockets for 260 pin Small Outline Dual In-line (SO-DIMM) DDR 4 type memory modules. Removal
The total memory size is automatically detected by the POST routine once you turn on your computer.
a. Remove the screws
and component bay
Two primary memory sockets are located under component bay cover (the bottom case cover), and two secondary
cover.
memory sockets are located under the keyboard. If you are installing only two RAM modules then they should be in- b. Remove the screws.
stalled in the primary memory sockets under the component bay cover. c. Eject the keyboard
using a special eject
Memory Upgrade Process stick to push the
keyboard out while
1. Turn off the computer, and turn it over, remove the battery (page 2 - 5) .
releasing the key-
2. Remove screws 1 - 5 and the component bay cover 6 (Figure 11a) and CPU heatsink (page 2 - 12). board as shown.
3. Remove screws 7 - 8 from the bottom of the computer (Figure 11b).
2.Disassembly
4. Open it up with the LCD on a flat surface before pressing at point 9 to release the keyboard module (use an eject
stick 10 to do this with a diameter no bigger than 2.5mm) while releasing the keyboard in the direction of the
arrow 11 as shown (Figure 11c).
a. c.
1 2 3 4
6 11
b.
9
6. Top Cover Module
10. Eject Stick
7 10
• 7 Screws
8
Removing the System Memory (RAM) from Under the Keyboard 2 - 15
Disassembly
Figure 12 5. Carefully lift the keyboard 12 up, being careful not to bend the keyboard ribbon cables 13 - 15 .
RAM Module 6. Disconnect the keyboard ribbon cables 13 - 15 from the locking collar socket 16 by using a small flat-head screw-
Removal driver to pry the locking collar pins 17 away from the base (Figure 12d).
7. Remove the keyboard and the memory sockets 18 & 19 will be visible.
d. Lift the keyboard up, 8. Gently pull the two release latches ( 20 & 21 ) on the sides of the memory socket(s) in the direction indicated below.
and disconnect the 9. The RAM module 22 will pop-up, and you can remove it.
keyboard ribbon cable 10. Pull the latches to release the second module if necessary.
from the locking collar 11. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
socket. 12. The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it
e. Remove the keyboard
and the memory sock-
will go. DO NOT FORCE the module; it should fit without much pressure.
ets will be visible. 13. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
f. Pull the two release 14. Replace the bay cover and screws.
latches on the sides of 15. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
2.Disassembly
the memory socket(s)
d. f.
in the direction indicat-
ed.
12 13
22
17 17 20 21
16 22
16 14
15
20 21
17 17
16 22
e.
18
19
Contact Warning
12. Keyboard Be careful not to touch the metal pins on the module’s
22. RAM Modules connecting edge. Even the cleanest hands have oils
which can attract particles, and degrade the module’s
performance.
2 - 16 Removing the System Memory (RAM) from Under the Keyboard
Disassembly
Removing the Wireless LAN Module Figure 13
1. Turn off the computer, remove the battery (page 2 - 5), CPU (page 2 - 12) and the keyboard (page 2 - 15). Wireless LAN
2. The Wireless LAN module will be visible at point 1 under the keyboard (Figure 13a). Module Removal
3. Carefully disconnect cables 2 - 3 , then remove screw 4 from the module socket (Figure 13b).
4. The Wireless LAN module 5 will pop-up (Figure 13c). a. The Wireless LAN mod-
ule will be visible at point
5. Lift the Wireless LAN module (Figure 13d) up and off the computer.
1 under the keyboard
b. Disconnect the cables
a. c. and remove the screw.
c. The WLAN module will
pop up.
1 d. Lift the WLAN module
out.
5
2.Disassembly
b. d.
2
4
3
5. WLAN Module
• 1 Screw
5
Removing the Wireless LAN Module 2 - 17
Disassembly
Wireless LAN, Combo Module Cables
Note that the cables for connecting to the antennae on WLAN, WLAN & Bluetooth Combo, 3G and LTE modules are
not labelled. The cables/covers (each cable will have either a black or transparent cable cover) are color coded for iden-
tification as outlined in the table below.
Antenna Cable Cover
Module Type Cable Color
Type Type
WLAN/WLAN & Bluetooth WM 1 Black Transparent
Combo WM 2 Black White
WiGig WG 1 Blue Black
2.Disassembly
Cable 1 is usually connected to antenna 1 (Main) on the module, and cable 2 to antenna 2 (Aux).
2 - 18 Wireless LAN, Combo Module Cables
Disassembly
Removing the WiGig Module Figure 14
1. Turn off the computer, remove the battery (page 2 - 5), CPU (page 2 - 12) and the keyboard (page 2 - 15). WiGig Module
2. The module will be visible at point 1 under the keyboard (Figure 13a). Removal
3. Carefully disconnect cables 2 - 4 , then remove screw 5 from the module socket (Figure 13b).
4. The module 6 will pop-up (Figure 13c). a. The module will be visi-
ble at point 1 under the
5. Lift the module (Figure 13d) up and off the computer.
keyboard
b. Disconnect the cables
a. c. and remove the screw.
c. The module will pop up.
d. Lift the module out.
2.Disassembly
6
b. d.
2
5
6. WiGig Module
3
4 • 1 Screw
6
Removing the WiGig Module 2 - 19
Disassembly
Figure 15 Removing the M.2 SSD Module
M.2 SSD Module
1. Turn off the computer, remove the battery (page 2 - 5), and component bay cover (page 2 - 10).
Removal
2. Locate the module; it is visible at point 1 (Figure 15a).
3. Carefully remove the screw 2 from the module (Figure 15b).
a. Locate the module.
b. Remove the screw. 4. The M.2 SATA module 63 will pop-up (Figure 15c).
c. The module will pop-up. 5. Lift the M.2 SATA module 63 up and off the computer (Figure 15d).
d. Lift the module up off the 6. Reverse the process to install a new SSD (make sure that the hexagonal screw 4 is in the correct location).
socket.
a. d.
2.Disassembly
1
3
b.
4
2
c.
3. SSD Module
• 1 Screw 3
2 - 20 Removing the M.2 SSD Module
Disassembly
M.2 SSD Installation Procedure Figure 16
1. Place the thermal pad 1 on the computer as shown (Figure 16a). M.2 SSD Module
2. Insert the module 2 in the computer. Make sure that the hexagonal screw 3 is in the correct location (Figure Installation
16b).
3. Tighten the screw 4 to secure it in place (Figure 16c). a. Place the thermal pad.
b. Insert the module.
c. Tighten the screw.
a.
Thermal Pad
1 Make sure you place the thermal pad’s adhe-
sive side down onto the computer surface as
illustrated.
2.Disassembly
The usage of the thermal pad will depend
upon the thickness of the module being used.
• If you are using the thinner module, then
b. apply the whole thermal pad provided on
the computer.
3
• If you are using the thicker module, sepa-
rate the pad into its two parts. Use the
larger part and place the adhesive side
2 onto the computer (discard the smaller
part that you have separated).
c.
1. Thermal Pad
2. M.2 SATA Module
4
• 1 Screw
Removing the M.2 SSD Module 2 - 21
Disassembly
Figure 17 Removing and Installing the Video Card
Video Card
Video Card Removal Procedure
Removal Procedure
1. Turn off the computer, turn it over and remove the battery (page 2 - 5) and component cover (page 2 - 10).
a. Remove the screws in
2. Remove screws 1 - 5 from the heat sink unit in the order indicated on the label (i.e screw 4 first through to
the correct order. screw 1 last) (Figure 17a).
b. Carefully remove the 3. Carefully (it may be hot) remove the heat sink unit 6 (Figure 17b).
heat sink units. 4. Disconnect cable 7 and remove screws 8 & 9 from the video card. The video card 10 will pop up (Figure
c. Remove the video card 17c).
screws. The video card 5. Remove the video card 10 (Figure 17d).
will pop up. a. c.
d. Remove the video card.
2.Disassembly
2 3 10
9
Caution 4 1 8
9
The heat sink, and video
card area in general, 5 7
contains parts which are
subject to high tempera-
b. d.
tures. Allow the area
time to cool before re-
moving these parts. 6 Heat Sink Screw Removal
10 and Insertion
Remove the screws from the heat
sink in the order indicated here: 9-
8-7-6-5-4-3-2-1.
6. Heat Sink Units When tightening the screws,
10. Video Card make sure that they are tightened
in the order: 1-2-3-4-5-6-7-8-9.
• 5 Screws
2 - 22 Removing and Installing the Video Card
Disassembly
Installing a New Video Card Figure 18
1. Place the thermal pad 15 on the computer as shown (Figure 18e). Installing a New
2. Prepare to fit the video card 14 into the slot by holding it at about a 30° angle (Figure 18f). Video Card
3. The card needs to be fully into the slot, and the video card and socket have a guide-key and pin which align to
allow the card to fit securely (Figure 18g). e. Insert the video card at
4. Fit the connectors firmly into the socket, straight and evenly. a 30 degree angle.
f. Fit the connectors
e. f. h.
straight and even, and
13 secure the card with the
screws.
14
16
2.Disassembly
11
15 12
Caution
The heat sink, and video
card area in general,
g. contains parts which are
subject to high tempera-
tures. Allow the area
time to cool before re-
moving these parts.
5. DO NOT attempt to push one end of the card in ahead of the other.
6. The card’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the socket
as it will go. DO NOT FORCE the card; it should fit without much pressure. 14. Video Card
7. Connect the cable 11 and secure the card with screws 12 & 13 (Figure 17 on page 2 - 22). 15. Thermal Pad
8. Apply the whole tube of the thermal grease 16 to the center of the main VGA chip as shown (Figure 18h).
9. Place the heat sink back on the card, and secure the screws in the order indicated in Figure 17 on page 2 - 22. • 2 Screws
10. Reinsert the component bay cover, and secure with the screws as indicated in Figure 11 on page 2 - 15.
Removing and Installing the Video Card 2 - 23
Disassembly
2.Disassembly
2 - 24
Part Lists
Appendix A: Part Lists
This appendix breaks down the P775TM (-G) / P775TM1 (-G) series notebook’s construction into a series of illustra-
tions. The component part numbers are indicated in the tables opposite the drawings.
Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.
Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.
Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the
A.Part Lists
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.
A - 1
Part Lists
Part List Illustration Location
The following table indicates where to find the appropriate part list illustration.
Table A- 1
Part List Illustration
Location
Parts
Top page A - 3
Bottom page A - 4
LCD (LG-AU) page A - 5
A.Part Lists
LCD (AU) page A - 6
MB page A - 7
HDD page A - 8
VGA (G1/G3) page A - 9
VGA (G2) page A - 10
A - 2 Part List Illustration Location
Part Lists
Top
Figure A - 1
Top
A.Part Lists
Top A - 3
Part Lists
Bottom
Figure A - 2
A.Part Lists
Bottom
A - 4 Bottom
Part Lists
LCD (LG-AU)
Figure A - 3
LCD (LG-AU)
A.Part Lists
LCD (LG-AU) A - 5
Part Lists
LCD (AU)
Figure A - 4
A.Part Lists
LCD (AU)
A - 6 LCD (AU)
Part Lists
MB
Figure A - 5
MB
A.Part Lists
MB A - 7
Part Lists
HDD
Figure A - 6
A.Part Lists
HDD
A - 8 HDD
Part Lists
VGA (G1/G3)
Figure A - 7
VGA (G1/G3)
A.Part Lists
VGA (G1/G3) A - 9
Part Lists
VGA (G2)
Figure A - 8
A.Part Lists
VGA (G2)
A - 10 VGA (G2)
Schematic Diagrams
Appendix B: Schematic Diagrams
This appendix has circuit diagrams of the P775TM (-G) / P775TM1 (-G) notebook’s PCB’s. The following table indi-
cates where to find the appropriate schematic diagram.
Diagram - Page Diagram - Page Diagram - Page
Table B - 1
Block Diagram - Page B - 2 M.2 3G+USB & WLAN+BT - Page B - 26 VCore - Page B - 50
Schematic
Processor 1/5 - Page B - 3 M.2 PCIE4X SSD1 & SSD2 - Page B - 27 VCore Output Stage - Page B - 51
Processor 2/5 - Page B - 4 Realtek ALC898 - Page B - 28 VCCSA / VCCGT - Page B - 52
Diagrams
B.Schematic Diagrams
Processor 3/5 - Page B - 5 PCM1861 + TAS5766DCA - Page B - 29 Power Charger, DC-In - Page B - 53
Processor 4/5 - Page B - 6 Subwoofer - Page B - 30 P750DM HDD Board - Page B - 54
Processor 5/5 - Page B - 7 EC IT8587 - Page B - 31 P750DM Power LED Board - Page B - 55
DDR4 CHA SO-DIMM_0 - Page B - 8 Second EC IT8587 - Page B - 32 P750DM Click Board - Page B - 56
DDR4 CHA SO-DIMM_1 - Page B - 9 Backlight Keyboard - Page B - 33 P750DM Audio Board - Page B - 57
DDR4 CHB SO-DIMM_0 - Page B - 10 LID SW, Fan, LED Conn - Page B - 34 P750DM Audio ESS DAC - Page B - 58
DDR4 CHB SO-DIMM_1 - Page B - 11 Fan, TP, FP, Multi-Con - Page B - 35 P750DM Audio HP AMP - Page B - 59
Panel, Inverter, CRT - Page B - 12 LAN E2500 - Page B - 36 P750DM Audio Board - Page B - 60
Display Port A - Page B - 13
Display Port B - Page B - 14
PS8338B + PS8330B - Page B - 37
TBT - Page B - 38
P775DM Audio Board - Page B - 61
P775DM Audio ESS DAC - Page B - 62
HDMI - Page B - 15 Power - Page B - 39 P775DM Audio HP AMP - Page B - 63 Version Note
MXM PCI-E - Page B - 16 TPS65982 - Page B - 40 P775DM Audio Board - Page B - 64 The schematic dia-
Lynix Point 1/7 - Page B - 17 TPS65982 - Page B - 41 P750DM BOT LED Board - Page B - 65 grams in this chapter
Lynix Point 2/7 - Page B - 18 Cardreader RTS5250 - Page B - 42 P750DM LID Switch Board - Page B - 66
are based upon version
6-7P-P77FB-002. If
Lynix Point 3/7 - Page B - 19 TPM SLB9655TT & NPCT420 - Page B - 43 P750DM Charge LED Board - Page B - 67
your mainboard (or oth-
Lynix Point 4/7 - Page B - 20 VCCIO / 1P0A - Page B - 44 P775DM Charge LED Board - Page B - 68 er boards) are a later
Lynix Point 5/7 - Page B - 21 DDR 1.2V/0.6VS/VCCPLL_OC - Page B - 45 P775DM Power LED Board - Page B - 69 version, please check
with the Service Center
Lynix Point 6/7 - Page B - 22 VDD3, VDD5 - Page B - 46 Power On Sequence - Page B - 70
for updated diagrams
Lynix Point 7/7 - Page B - 23 5V/5VS, 3V/3.3VS, 3.3VA - Page B - 47 (if required).
USB Charging - Page B - 24 5VS_2/2.5V/NV3V3/3.3V_ON/5V_RUN - Page B - 48
CCD, USB Port3 - Page B - 25 Fan CPU, VGA Power - Page B - 49
B - 1
Schematic Diagrams
Block Diagram
5 4 3 2 1
P750DM AUDIO BOARD
PS8338B
P7XXTM COFFEELAKE System Block Diagram PHONE JACK x4, USB3.0 x1 SHEET 55-58
Display PortA P770DM AUDIO BOARD
SHEET 12 SHEET 36 PHONE JACK x4, USB3.0 x1 SHEET 59-62
CoffeeLAKE-S CPU 2333 MHz DDR IV P750DM HDD BOARD
PS8330B <=4.5"
DDR4 / 1.2V SO-DIMM*4 SHEET 52
D SHEET 36
PCIE*16 37.5x37.5mm SHEET 7,8,9,10 D
35W~95W P750DM POWER LED BOARD
<=4.3" SHEET 53
TPS65982 Alpine Ridge MXM3.0 Socket LGA1151 Socket
SHEET 39 (SP) P750DM BOT LED BOARD
SHEET 15
SHEET 63
SHEET 37,38
Display PortB PAGE 2,3,4,5,6
SHEET 13 SYSTEM SMBUS P750DM CLICK BOARD
USB3.1 SHEET 54
TYPE C 25 MHz
B.Schematic Diagrams
SHEET 39 HDMI
TPS65982 DMI*4 P750DM CHARGER LED BOARD SHEET 65
SHEET 14 7.1 channel
SHEET 40 <=8" P770DM CHARGER LED BOARD SHEET 67
eDP 3Kx2K HP
SHEET 11 P750DM LID SWITCH BOARD
USB3.0 OUT
Sheet 1 of 69 USB3.1
TYPE C
PORT 6
SPDIF MIC LINE
SHEET 64
SHEET 40 CFL_PCH_H (USB6) OUT IN IN/OUT P750DM FINGER SENSOR BOARD
Block Diagram C
Coffee Lake PCH Hi-End HP SHEET 66 C
P750 PCIe1~PCIe4
CLICK BOARD P750
POWER LED BOARD
PCH-H(Z370) AUDIO BOARD SHEET 56-63
<=7"
TOUCH PAD SHEET 53
SPI(Option)
SHEET 16
TPM1.2&2.0 TI
INT SPKER
(Option) PCM1861+TAS5766DCA Front L
(RESERVE) SHEET 41 23x23mm FCBGA INT MIC
Azalia Codec SHEET 28 Front R
EC SHEET 24
REALTEK
ITE 8587A ALC898
24 MHz LPC SUBWOOFER
SHEET 34 (512KB ROM) AMP
SHEET 27 APA2607QBI
32.768 KHz SHEET 30 SHEET 29
SHEET 29
EC SMBUS BIOS PAGE 16,17,18,19
SPI 20,21,22 AZALIA LINK 24 MHz ONLY FOR P775
THERMAL SMART SMART SHEET 16
B B
SENSOR FANx2 BATTERY
RT1
AC-IN PCIE 100 MHz
SHEET 2 SHEET 33 SHEET 51 Second EC
<9.5" <12"
ITE 8587A 32.768KHz
<9.5" <9.5"
INT. Backlight K/B SHEET 31
NGFF PCIE
SHEET 32
SOCKET
USB 3.0 USB 2.0 WLAN+BT NGFF PCIE NGFF PCIE Qualcomm Realtek
5 Gbps 480 Mbps SOCKET SOCKET
SATA I/II/III 6.0Gb/s (USB11) E2500 RTS5250
SHEET 25
SSD1 PCIE4X SSD2 PCIE4X
3"~10" SHEET 26 SHEET 26 LAN CARD READER
A KEY 25
1"~14" M KEY M KEY SHEET 35 SHEET 40
MHz
SATA HDD SATA HDD NGFF USB3.0 USB3.0 USB3.0
SATA3 SATA3
SOCKET PORT4 PORT1 CCD
RJ-45 3IN1
SHEET 17 3G/LTE (USB4) (USB1) (USB10) SOCKET
SIM CARD SHEET 23 SHEET 24 SHEET 24 SHEET 35 SHEET 40
(USB3) FINGER PRINTER
SHEET 52 SHEET 25 (Charging)
(USB2)
ON CLICK BOARD
A A
B KEY
P750
HDD BOARD 姣
:USB3.0 FingerPrint
PORT2 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SHEET 54 12 MHz Title
[01] BLOCK DIAGRAM
(Optional)
Size Document Number Rev
A3 SCHEMATIC1 6-7P-P77FB-002-1 2.0
Date: Monday, August 28, 2017 Sheet 1 of 69
5 4 3 2 1
B - 2 Block Diagram
Schematic Diagrams
Processor 1/5
5 4 3 2 1
SKYLAKE-S Processor 1/5 ( DMI,FDI,PEG ,RSVD) 3.3V
月
MXM SIDE U39C SKL_S_CPU ?
月
MXM SIDE PLACE NEAR CPU
2
LGA1151
RT1
15 PEG_RX0 C540 0.22u_10V_X5R_04 PEG_RX_0 B8
PEG_RXP[0] PEG_TXP[0]
A5 PEG_TX_0 C513 0.22u_10V_X5R_04
PEG_TX0 15 100k_1%_04_NTC
P/N 6-17-10420-734
C539 0.22u_10V_X5R_04 PEG_RX#_0 B7 A6 PEG_TX#_0 C510 0.22u_10V_X5R_04
15 PEG_RX#0 PEG_TX#0 15
1
PEG_RXN[0] PEG_TXN[0]
PEG_RX_1 PEG_TX_1 THERM_VOLT 30
15 PEG_RX1 C538 0.22u_10V_X5R_04 C7 B4 C509 0.22u_10V_X5R_04
PEG_RX#_1 PEG_RXP[1] PEG_TXP[1] PEG_TX#_1 PEG_TX1 15
D 15 PEG_RX#1 C537 0.22u_10V_X5R_04 C6 B5 C508 0.22u_10V_X5R_04 D
PEG_RXN[1] PEG_TXN[1] PEG_TX#1 15
R577
C536 0.22u_10V_X5R_04 PEG_RX_2 D6 C3 PEG_TX_2 C507 0.22u_10V_X5R_04 20K_1%_04
15 PEG_RX2 PEG_RX#_2 PEG_RXP[2] PEG_TXP[2] PEG_TX#_2 PEG_TX2 15
15 PEG_RX#2 C535 0.22u_10V_X5R_04 D5 C4 C506 0.22u_10V_X5R_04
PEG_RXN[2] PEG_TXN[2] PEG_TX#2 15
C534 0.22u_10V_X5R_04 PEG_RX_3 E5 D2 PEG_TX_3 C505 0.22u_10V_X5R_04
15 PEG_RX3 PEG_RX#_3 PEG_RXP[3] PEG_TXP[3] PEG_TX#_3 PEG_TX3 15
15 PEG_RX#3 C533 0.22u_10V_X5R_04 E4 D3 C504 0.22u_10V_X5R_04
PEG_RXN[3] PEG_TXN[3] PEG_TX#3 15
C553 0.22u_10V_X5R_04 PEG_RX_4 F6 E1 PEG_TX_4 C503 0.22u_10V_X5R_04 CAD Note: Capacitor need to be placed
15 PEG_RX4 PEG_RX#_4 PEG_RXP[4] PEG_TXP[4] PEG_TX#_4 PEG_TX4 15 close to buffer output pin
15 PEG_RX#4 C552 0.22u_10V_X5R_04 F5 E2 C502 0.22u_10V_X5R_04
PEG_RXN[4] PEG_TXN[4] PEG_TX#4 15
C532 0.22u_10V_X5R_04 PEG_RX_5 G5 F2 PEG_TX_5 C501 0.22u_10V_X5R_04
15 PEG_RX5 PEG_RX#_5 PEG_RXP[5] PEG_TXP[5] PEG_TX#_5 PEG_TX5 15
15 PEG_RX#5 C531 0.22u_10V_X5R_04 G4 F3 C500 0.22u_10V_X5R_04
PEG_RXN[5] PEG_TXN[5] PEG_TX#5 15
C551 0.22u_10V_X5R_04 PEG_RX_6 H6 G1 PEG_TX_6 C499 0.22u_10V_X5R_04
15 PEG_RX6 PEG_RX#_6 PEG_RXP[6] PEG_TXP[6] PEG_TX#_6 PEG_TX6 15
15 PEG_RX#6 C550 0.22u_10V_X5R_04 H5 G2 C498 0.22u_10V_X5R_04
PEG_RXN[6] PEG_TXN[6] PEG_TX#6 15
C530 0.22u_10V_X5R_04 PEG_RX_7 J5 H2 PEG_TX_7 C497 0.22u_10V_X5R_04
15 PEG_RX7
B.Schematic Diagrams
PEG_RX#_7 PEG_RXP[7] PEG_TXP[7] PEG_TX#_7 PEG_TX7 15
15 PEG_RX#7 C529 0.22u_10V_X5R_04 J4 H3 C496 0.22u_10V_X5R_04
PEG_RXN[7] PEG_TXN[7] PEG_TX#7 15
C549 0.22u_10V_X5R_04 PEG_RX_8 K6 J1 PEG_TX_8 C495 0.22u_10V_X5R_04
15 PEG_RX8 PEG_RX#_8 PEG_RXP[8] PEG_TXP[8] PEG_TX#_8 PEG_TX8 15
15 PEG_RX#8 C548 0.22u_10V_X5R_04 K5 J2 C494 0.22u_10V_X5R_04
PEG_RXN[8] PEG_TXN[8] PEG_TX#8 15
C528 0.22u_10V_X5R_04 PEG_RX_9 L5 K2 PEG_TX_9 C38 0.22u_10V_X5R_04
15 PEG_RX9 PEG_RX#_9 PEG_RXP[9] PEG_TXP[9] PEG_TX#_9 PEG_TX9 15
15 PEG_RX#9 C527 0.22u_10V_X5R_04 L4 K3 C39 0.22u_10V_X5R_04
PEG_RXN[9] PEG_TXN[9] PEG_TX#9 15
15
15
PEG_RX10
PEG_RX#10
C547
C546
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PEG_RX_10
PEG_RX#_10
M6
M5 PEG_RXP[10]
PEG_RXN[10]
PEG_TXP[10]
PEG_TXN[10]
L1
L2
PEG_TX_10
PEG_TX#_10
C493
C492
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PEG_TX10
PEG_TX#10
15
15
Sheet 2 of 69
C C526 0.22u_10V_X5R_04 PEG_RX_11 N5 M2 PEG_TX_11 C491 0.22u_10V_X5R_04 C
15
15
15
PEG_RX11
PEG_RX#11
PEG_RX12
C525
C545
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PEG_RX#_11
PEG_RX_12
N4
P6
PEG_RXP[11]
PEG_RXN[11]
PEG_TXP[11]
PEG_TXN[11]
M3
N1
PEG_TX#_11
PEG_TX_12
C490
C40
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PEG_TX11
PEG_TX#11
15
15 Processor 1/5
PEG_RX#_12 PEG_RXP[12] PEG_TXP[12] PEG_TX#_12 PEG_TX12 15
15 PEG_RX#12 C544 0.22u_10V_X5R_04 P5 N2 C41 0.22u_10V_X5R_04
PEG_RXN[12] PEG_TXN[12] PEG_TX#12 15
C524 0.22u_10V_X5R_04 PEG_RX_13 R5 P2 PEG_TX_13 C489 0.22u_10V_X5R_04
15 PEG_RX13 PEG_RX#_13 PEG_RXP[13] PEG_TXP[13] PEG_TX#_13 PEG_TX13 15
15 PEG_RX#13 C523 0.22u_10V_X5R_04 R4 P3 C488 0.22u_10V_X5R_04
PEG_RXN[13] PEG_TXN[13] PEG_TX#13 15
C543 0.22u_10V_X5R_04 PEG_RX_14 T6 R2 PEG_TX_14 C487 0.22u_10V_X5R_04
15 PEG_RX14 PEG_RX#_14 PEG_RXP[14] PEG_TXP[14] PEG_TX#_14 PEG_TX14 15
15 PEG_RX#14 C542 0.22u_10V_X5R_04 T5 R1 C486 0.22u_10V_X5R_04
PEG_RXN[14] PEG_TXN[14] PEG_TX#14 15
C522 0.22u_10V_X5R_04 PEG_RX_15 U5 T2 PEG_TX_15 C485 0.22u_10V_X5R_04
15 PEG_RX15 PEG_RX#_15 PEG_RXP[15] PEG_TXP[15] PEG_TX#_15 PEG_TX15 15
15 PEG_RX#15 C521 0.22u_10V_X5R_04 U4 T3 C484 0.22u_10V_X5R_04
PEG_RXN[15] PEG_TXN[15] PEG_TX#15 15
12 mil PEG_RCOMP L7
VCCIO R87 24.9_1%_04
PEG_RCOMP
Y3 AC2
20 DMI_RXP0 DMI_RXP[0] DMI_TXP[0] DMI_TXP0 20
Y4 AC1
20 DMI_RXN0 DMI_RXN[0] DMI_TXN[0] DMI_TXN0 20
AA4 AD3
20 DMI_RXP1 DMI_RXP[1] DMI_TXP[1] DMI_TXP1 20
AA5 AD2
20 DMI_RXN1 DMI_RXN[1] DMI_TXN[1] DMI_TXN1 20
AB4 AE2
20 DMI_RXP2 DMI_RXP[2] DMI_TXP[2] DMI_TXP2 20
AB3 AE1
B 20 DMI_RXN2 DMI_RXN[2] DMI_TXN[2] DMI_TXN2 20 B
AC4 AF2
20 DMI_RXP3 DMI_RXP[3] DMI_TXP[3] DMI_TXP3 20
AC5 AF3
20 DMI_RXN3 DMI_RXN[3] DMI_TXN[3] DMI_TXN3 20
SKL_S_CPU_LGA
REV = 1.2 3 OF 12
SKL_S_CPU ?
U39J ?
LGA1151
J8 H11
J7 RSVD_TP RSVD_TP H12
IST_TRIG L8 RSVD_TP RSVD_TP
K8 RSVD_TP AW38
RSVD_TP RSVD_TP AV39
AV1 RSVD_TP
AW2 RSVD_TP AU39
RSVD_TP RSVD AU40
H8 RSVD
VSS AT15
K10 VSS
L10 RSVD AR23
RSVD VSS AR22
J17 VSS
B39 RSVD
J19 RSVD J15
C40 RSVD RSVD J14
RSVD RSVD
A
G8 AU9 A
AY3 VSS RSVD AU10
VSS RSVD
PCH_2_CPU_TRIGGER D1
22 PCH_2_CPU_TRIGGER CPU_2_PCH_TRIGGER_R PROC_TRIGIN
R61 20_1%_04 B3 J13
22 CPU_2_PCH_TRIGGER PROC_TRIGOUT RSVD K13 TP_CPU_K13
L12
K12 RSVD
RSVD
RSVD
J11 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
RSVD D15 Title
RSVD
RSVD
K11 [02] Processor 1/5-DMI,PEG,RSVD
10 OF 12 Size Document Number Rev
SKL_S_CPU_LGA REV = 1.2 ?
3,5,43
11,15,17,24,25,27,38,42,43,44,46,47,51
VCCIO
3.3V A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: W ednesday, October 25, 2017 Sheet 2 of 69
5 4 3 2 1
Processor 1/5 B - 3
Schematic Diagrams
Processor 2/5
5 4 3 2 1
SKYLAKE-S Processor 2/7 (JTAG,CLK,CFG ,DISPLAY)
CFG TABLE
CFG[0] Stall reset sequence after PCU PLL lock until de-asserted:
SKL_S_CPU ? 1 = (Default) Normal Operation;
U39E
No stall.
LGA1151 0 = Stall.
19 PCH_CPU_BCLK_DP W5 H15 CFG0
W4 BCLKP CFG[0] F15 CFG1
19 PCH_CPU_BCLK_DN BCLKN CFG[1] CFG[1] Reserved configuration lane.
F16 CFG2
W1 CFG[2] H16 CFG3 PCI Express* Static x16 Lane Numbering Reversal.
19 PCH_CPU_PCIBCLK_DP PCI_BCLKP CFG[3] CFG[2]
D W2 F19 CFG4 1 = Normal operation D
19 PCH_CPU_PCIBCLK_DN PCI_BCLKN CFG[4] 0 = Lane numbers reversed.
H18 CFG5
VCCST_VCCPLL K9 CFG[5] G21 CFG6
19 PCH_CPU_NSSC_CLK_DP CLK24P CFG[6] CFG[3] Reserved configuration lane.
19 PCH_CPU_NSSC_CLK_DN J9 H20 CFG7
CLK24N CFG[7] G16
CFG[8] CFG[4] eDP enable:
CPU_24MHZ E16 1 = Disabled.
R556 100_1%_04 H_VIDSOUT CFG[9] F17 0 = Enabled.
R547 1K_1%_04 H_PROCHOT_N CFG[10] H17
R572 1K_1%_04 H_THRMTRIP# CFG[11] G20 CFG[6:5] PCI Express* Bifurcation
R557 56.2_1%_04 H_VIDALERT_N CFG[12] F20 00 = 1 x8, 2 x4 PCI Express*
CFG[13] 01 = reserved
F21 10 = 2 x8 PCI Express*
R558 *20mil_04 R554 220_04 CPU_VIDALERT_N E39 CFG[14] H19 11 = 1 x16 PCI Express*
49 H_VIDALERT_N_VR H_VIDSCK VIDALERT# CFG[15]
49 H_VIDSCK_VR R553 *20mil_04 E38
R555 *20mil_04 H_VIDSOUT E40 VIDSCK F14 CFG[7] PEG Training:
49 H_VIDSOUT_VR H_PROCHOT_N H_PROCHOT_R_N VIDSOUT CFG[17]
49 H_PROCHOT_N R548 499_1%_04 C39 E14 1 = (default) PEG Train immediately following RESET# deassertion.
PROCHOT# CFG[16] F18 0 = PEG Wait for BIOS for training.
DDR_VTT_CNTL AC36 CFG[19] G18
44 DDR_VTT_CNTL H_SKTOCC_N DDR_VTT_CNTL CFG[18]
AC38
B.Schematic Diagrams
CFG[19:8] Reserved configuration lanes.
19 H_SKTOCC_N ZVM#
AC37 D16 BPM0
R157 10K_04 RSVD_AC37 BPM#[0] D17 BPM1
3.3VA BPM#[1] G14 BPM2
R580 6.04K_1%_04 VCCST_PW RGD_CPU U2 BPM#[2] H14 BPM3
17,21 VCCST_PW RGD VCCST_PWRGD BPM#[3]
R579 2.74K_1%_04
18 H_PW RGD F8 H_TCK TERMINATION PLACE NEAR CPU WITHIN 1.1 INCH
E7 PROCPWRGD H13 H_TDO
17 PLTRST_CPU_N RESET# PROC_TDO H_TDI VCCST_VCCPLL
17 H_PM_SYNC E8 G12
PM_SYNC PROC_TDI
Sheet 3 of 69 R552 20_1%_04 H_PM_DOW N_R D8 F13 H_TMS
17 H_PM_DOW N PM_DOWN PROC_TMS H_TCK
R91 *20mil_04 PECI G7 F11
17,30 H_PECI H_THRMTRIP# H_THERMTRIP_N PECI PROC_TCK H_PREQ_N
R86 *20mil_04 D11 R549 *51_04
17 H_THRMTRIP# THERMTRIP# H_TRST_N H_TDO
C F12 R550 51_04 C
PROC_TRST#
Processor 2/5 AB35
AB36
D13
SKTOCC#
PROC_SELECT#
PROC_PREQ#
PROC_PRDY#
B9
B10
H_PREQ_N
H_PRDY_N
CATERR# M11 CFG_RCOMP R573 49.9_1%_04 H_TCK R551 51_04
CFG_RCOMP
SKL_S_CPU_LGA PLACE INSIDE CPU CAVITY H_TRST_N R568 *51_04
REV = 1.2 5 OF 12 ?
SKL_S_CPU
U39D ?
LGA1151
C21 E10
D21 DDI1_TXP[0] EDP_TXP[0] D10
D22 DDI1_TXN[0] EDP_TXN[0] D9
E22 DDI1_TXP[1] EDP_TXP[1] C9
B23 DDI1_TXN[1] EDP_TXN[1] H10
A23 DDI1_TXP[2] EDP_TXN[2] G10
C23 DDI1_TXN[2] EDP_TXP[2] G9
D23 DDI1_TXP[3] EDP_TXN[3] F9
DDI1_TXN[3] EDP_TXP[3]
B13 D12
C13 DDI1_AUXP EDP_AUXP E12
DDI1_AUXN EDP_AUXN
B18
A18 DDI2_TXP[0] VCCIO
B H_PROCHOT_N D18 DDI2_TXN[0] D14 B
E18 DDI2_TXP[1] EDP_DISP_UTIL
C19 DDI2_TXN[1]
D
Q8 D19 DDI2_TXP[2] M9 DP_RCOMP R92 24.9_1%_04
2SK3018S3 D20 DDI2_TXN[2] EDP_RCOMP
G E20 DDI2_TXP[3]
30 H_PROCHOT_EC DDI2_TXN[3]
S
A12
R64 B12 DDI2_AUXP
DDI2_AUXN
100K_04 B14
A14 DDI3_TXP[0]
C15 DDI3_TXN[0]
B15 DDI3_TXP[1]
CAD Note: Capacitor need to be placed B16 DDI3_TXN[1]
close to buffer output pin A16 DDI3_TXP[2]
C17 DDI3_TXN[2]
B17 DDI3_TXP[3]
DDI3_TXN[3] V3
PROC_AUDIO_CLK AUD_AZACPU_SCLK_R 18
B11 V2
DDI3_AUXP PROC_AUDIO_SDI AUD_AZACPU_SDO_R 18
C11 U1 AUD_AZACPU_SDI_R R578 20_1%_04
DDI3_AUXN SKL_S_CPU_LGAPROC_AUDIO_SDO AUD_AZACPU_SDI 18
4 OF 12
REV = 1.2 ?
A A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
2,5,43 VCCIO
[03] Processor 2/5-CLK,MISC,DIS
5,18,46,49 VCCST_VCCPLL
Size Document Number Rev
16,17,18,20,21,46 3.3VA
A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: W ednesday, October 25, 2017 Sheet 3 of 69
5 4 3 2 1
B - 4 Processor 2/5
Schematic Diagrams
Processor 3/5
5 4 3 2 1
SKYLAKE-S Processor 3/5 ( DDR4 )
M_A_DQ[63:0] 7,8 M_B_DQ[63:0] 9,10
?
SKL_S_CPU SKL_S_CPU ?
U39A U39B
D LGA1151 LGA1151 D
M_A_DQ0 AE38 AW18 M_B_DQ0 AD34 AM20
M_A_DQ1 DDR0_DQ[0] DDR0_CKP[0] M_A_CK0 7 M_B_DQ1 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKP[0] M_B_CK0 9
AE37 AV18 M_A_CK#0 7 AD35 AM21 M_B_CK#0 9
M_A_DQ2 AG38 DDR0_DQ[1] DDR0_CKN[0] AW17 M_B_DQ2 AG35 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[0] AP22
M_A_DQ3 DDR0_DQ[2] DDR0_CKP[1] M_A_CK1 7 M_B_DQ3 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[1] M_B_CK1 9
AG37 AY17 M_A_CK#1 7 AH35 AP21 M_B_CK#1 9
M_A_DQ4 AE39 DDR0_DQ[3] DDR0_CKN[1] AW16 M_B_DQ4 AE35 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKN[1] AN20
M_A_DQ5 DDR0_DQ[4] DDR0_CKP[2] M_A_CK2 8 M_B_DQ5 DDR1_DQ[4]/DDR0_DQ[20] DDR1_CKP[2] M_B_CK2 10
AE40 AV16 M_A_CK#2 8 AE34 AN21 M_B_CK#2 10
M_A_DQ6 AG39 DDR0_DQ[5] DDR0_CKN[2] AT16 M_B_DQ6 AG34 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKN[2] AP19
M_A_DQ7 DDR0_DQ[6] DDR0_CKP[3] M_A_CK3 8 M_B_DQ7 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKP[3] M_B_CK3 10
AG40 AU16 M_A_CK#3 8 AH34 AP20 M_B_CK#3 10
M_A_DQ8 AJ38 DDR0_DQ[7] DDR0_CKN[3] M_B_DQ8 AK35 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKN[3]
M_A_DQ9 AJ37 DDR0_DQ[8] AY24 M_B_DQ9 AL35 DDR1_DQ[8]/DDR0_DQ[24] AY29
M_A_DQ10 DDR0_DQ[9] DDR0_CKE[0] M_A_CKE0 7 M_B_DQ10 DDR1_DQ[9]/DDR0_DQ[25] DDR1_CKE[0] M_B_CKE0 9
AL38 AW24 M_A_CKE1 7 AK32 AV29 M_B_CKE1 9
M_A_DQ11 AL37 DDR0_DQ[10] DDR0_CKE[1] AV24 M_B_DQ11 AL32 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CKE[1] AW29
M_A_DQ12 DDR0_DQ[11] DDR0_CKE[2] M_A_CKE2 8 M_B_DQ12 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CKE[2] M_B_CKE2 10
AJ40 AV25 M_A_CKE3 8 AK34 AU29 M_B_CKE3 10
M_A_DQ13 AJ39 DDR0_DQ[12] DDR0_CKE[3] M_B_DQ13 AL34 DDR1_DQ[12]/DDR0_DQ[28] DDR1_CKE[3]
M_A_DQ14 AL39 DDR0_DQ[13] AW12 M_B_DQ14 AK31 DDR1_DQ[13]/DDR0_DQ[29] AP17
M_A_DQ15 DDR0_DQ[14] DDR0_CS#[0] M_A_CS0# 7 M_B_DQ15 DDR1_DQ[14]/DDR0_DQ[30] DDR1_CS#[0] M_B_CS0# 9
AL40 AU11 AL31 AN15
B.Schematic Diagrams
M_A_DQ16 DDR0_DQ[15] DDR0_CS#[1] M_A_CS1# 7 M_B_DQ16 DDR1_DQ[15]/DDR0_DQ[31] DDR1_CS#[1] M_B_CS1# 9
AN38 AV13 M_A_CS2# 8 AP35 AN17 M_B_CS2# 10
M_A_DQ17 AN40 DDR0_DQ[16]/DDR0_DQ[32] DDR0_CS#[2] AV10 M_B_DQ17 AN35 DDR1_DQ[16]/DDR0_DQ[48] DDR1_CS#[2] AM15
M_A_DQ18 DDR0_DQ[17]/DDR0_DQ[33] DDR0_CS#[3] M_A_CS3# 8 M_B_DQ18 DDR1_DQ[17]/DDR0_DQ[49] DDR1_CS#[3] M_B_CS3# 10
AR38 AN32
M_A_DQ19 AR37 DDR0_DQ[18]/DDR0_DQ[34] AW11 M_B_DQ19 AP32 DDR1_DQ[18]/DDR0_DQ[50] AM16
M_A_DQ20 DDR0_DQ[19]/DDR0_DQ[35] DDR0_ODT[0] M_A_ODT0 7 M_B_DQ20 DDR1_DQ[19]/DDR0_DQ[51] DDR1_ODT[0] M_B_ODT0 9
AN39 AU14 M_A_ODT1 7 AN34 AL16 M_B_ODT1 9
M_A_DQ21 AN37 DDR0_DQ[20]/DDR0_DQ[36] DDR0_ODT[1] AU12 M_B_DQ21 AP34 DDR1_DQ[20]/DDR0_DQ[52] DDR1_ODT[1] AP15
M_A_DQ22 DDR0_DQ[21]/DDR0_DQ[37] DDR0_ODT[2] M_A_ODT2 8 M_B_DQ22 DDR1_DQ[21]/DDR0_DQ[53] DDR1_ODT[2] M_B_ODT2 10
AR39 AY10 M_A_ODT3 8 AN31 AL15 M_B_ODT3 10
M_A_DQ23 AR40 DDR0_DQ[22]/DDR0_DQ[38] DDR0_ODT[3] M_B_DQ23 AP31 DDR1_DQ[22]/DDR0_DQ[54] DDR1_ODT[3]
M_A_DQ24
M_A_DQ25
M_A_DQ26
AW37
AU38
AV35
DDR0_DQ[23]/DDR0_DQ[39]
DDR0_DQ[24]/DDR0_DQ[40]
DDR0_DQ[25]/DDR0_DQ[41]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
AY13
AV15
AW23
M_A_BA0
M_A_BA1
7,8
7,8
M_B_DQ24
M_B_DQ25
M_B_DQ26
AL29
AM29
AP29
DDR1_DQ[23]/DDR0_DQ[55]
DDR1_DQ[24]/DDR0_DQ[56]
DDR1_DQ[25]/DDR0_DQ[57]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
AN18
AL17
AP16
M_B_A16
M_B_A14
9,10
9,10
Sheet 4 of 69
M_A_DQ27 DDR0_DQ[26]/DDR0_DQ[42] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] M_A_BG0 7,8 M_B_DQ27 DDR1_DQ[26]/DDR0_DQ[58] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] M_B_A15 9,10
C M_A_DQ28
M_A_DQ29
M_A_DQ30
AW35
AU37
AV37
AT35
DDR0_DQ[27]/DDR0_DQ[43]
DDR0_DQ[28]/DDR0_DQ[44]
DDR0_DQ[29]/DDR0_DQ[45]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
AW13
AV14
AY11
M_A_A16
M_A_A14
7,8
7,8
M_B_DQ28
M_B_DQ29
M_B_DQ30
AR29
AM28
AL28
AR28
DDR1_DQ[27]/DDR0_DQ[59]
DDR1_DQ[28]/DDR0_DQ[60]
DDR1_DQ[29]/DDR0_DQ[61]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
AL18
AM18
AW28
M_B_BA0
M_B_BA1
9,10
9,10
C
Processor 3/5
M_A_DQ31 DDR0_DQ[30]/DDR0_DQ[46] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] M_A_A15 7,8 M_B_DQ31 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] M_B_BG0 9,10
AU35 AP28
M_A_DQ32 AY8 DDR0_DQ[31]/DDR0_DQ[47] AW15 M_B_DQ32 AR12 DDR1_DQ[31]/DDR0_DQ[63] AL19
M_A_DQ33 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] M_A_A0 7,8 M_B_DQ33 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] M_B_A0 9,10
AW8 AU18 AP12 AL22
M_A_DQ34 DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] M_A_A1 7,8 M_B_DQ34 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] M_B_A1 9,10
AV6 AU17 AM13 AM22
M_A_DQ35 DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] M_A_A2 7,8 M_B_DQ35 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] M_B_A2 9,10
AU6 AV19 AL13 AM23
M_A_DQ36 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] M_A_A3 7,8 M_B_DQ36 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[3] M_B_A3 9,10
AU8 AT19 AR13 AP23
M_A_DQ37 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] M_A_A4 7,8 M_B_DQ37 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[4] M_B_A4 9,10
AV8 AU20 AP13 AL23
M_A_DQ38 DDR0_DQ[37]/DDR1_DQ[5] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] M_A_A5 7,8 M_B_DQ38 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] M_B_A5 9,10
AW6 AV20 AM12 AW26
M_A_DQ39 DDR0_DQ[38]/DDR1_DQ[6] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] M_A_A6 7,8 M_B_DQ39 DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] M_B_A6 9,10
AY6 AU21 AL12 AY26
M_A_DQ40 DDR0_DQ[39]/DDR1_DQ[7] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] M_A_A7 7,8 M_B_DQ40 DDR1_DQ[39]/DDR1_DQ[23] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] M_B_A7 9,10
AY4 AT20 AP10 AU26
M_A_DQ41 DDR0_DQ[40]/DDR1_DQ[8] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] M_A_A8 7,8 M_B_DQ41 DDR1_DQ[40]/DDR1_DQ[24] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] M_B_A8 9,10
AV4 AT22 AR10 AW27
M_A_DQ42 DDR0_DQ[41]/DDR1_DQ[9] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] M_A_A9 7,8 M_B_DQ42 DDR1_DQ[41]/DDR1_DQ[25] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] M_B_A9 9,10
AT1 AY14 AR7 AP18
M_A_DQ43 DDR0_DQ[42]/DDR1_DQ[10] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] M_A_A10 7,8 M_B_DQ43 DDR1_DQ[42]/DDR1_DQ[26] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] M_B_A10 9,10
AT2 AU22 AP7 AU27
M_A_DQ44 DDR0_DQ[43]/DDR1_DQ[11] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] M_A_A11 7,8 M_B_DQ44 DDR1_DQ[43]/DDR1_DQ[27] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] M_B_A11 9,10
AV3 AV22 AR9 AV27
M_A_DQ45 DDR0_DQ[44]/DDR1_DQ[12] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] M_A_A12 7,8 M_B_DQ45 DDR1_DQ[44]/DDR1_DQ[28] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] M_B_A12 9,10
AW4 AV12 AP9 AR15
M_A_DQ46 DDR0_DQ[45]/DDR1_DQ[13] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] M_A_A13 7,8 M_B_DQ46 DDR1_DQ[45]/DDR1_DQ[29] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] M_B_A13 9,10
AT4 AV23 AR6 AY28
M_A_DQ47 DDR0_DQ[46]/DDR1_DQ[14] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] M_A_BG1 7,8 M_B_DQ47 DDR1_DQ[46]/DDR1_DQ[30] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] M_B_BG1 9,10
AT3 AU24 AP6 AU28
M_A_DQ48 DDR0_DQ[47]/DDR1_DQ[15] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# M_A_ACT# 7,8 M_B_DQ48 DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# M_B_ACT# 9,10
AP2 AM10
M_A_DQ49 AM4 DDR0_DQ[48]/DDR1_DQ[32] AY15 M_B_DQ49 AL10 DDR1_DQ[48] AL20
M_A_DQ50 DDR0_DQ[49]/DDR1_DQ[33] DDR0_PAR DDR0_A_PARITY 7,8 M_B_DQ50 DDR1_DQ[49] DDR1_PAR DDR1_B_PARITY 9,10
AP3 AT23 AM7 AY25
M_A_DQ51 DDR0_DQ[50]/DDR1_DQ[34] DDR0_ALERT# DDR0_A_ALERT# 7,8 M_B_DQ51 DDR1_DQ[50] DDR1_ALERT# DDR1_B_ALERT# 9,10
AM3 AL7
M_A_DQ52 AP4 DDR0_DQ[51]/DDR1_DQ[35] M_B_DQ52 AM9 DDR1_DQ[51]
M_A_DQ53 AM2 DDR0_DQ[52]/DDR1_DQ[36] AF39 M_B_DQ53 AL9 DDR1_DQ[52] AF34
M_A_DQ54 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSN[0] M_A_DQS#0 7,8 M_B_DQ54 DDR1_DQ[53] DDR1_DQSN[0]/DDR0_DQSN[2] M_B_DQS#0 9,10
AP1 AK39 AM6 AK33
M_A_DQ55 DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQSN[1] M_A_DQS#1 7,8 M_B_DQ55 DDR1_DQ[54] DDR1_DQSN[1]/DDR0_DQSN[3] M_B_DQS#1 9,10
AM1 AP39 AL6 AN33
M_A_DQ56 DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[2]/DDR0_DQSN[4] M_A_DQS#2 7,8 M_B_DQ56 DDR1_DQ[55] DDR1_DQSN[2]/DDR0_DQSN[6] M_B_DQS#2 9,10
AK3 AU36 AJ6 AN29
B M_A_DQ57 DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSN[3]/DDR0_DQSN[5] M_A_DQS#3 7,8 M_B_DQ57 DDR1_DQ[56] DDR1_DQSN[3]/DDR0_DQSN[7] M_B_DQS#3 9,10 B
AH1 AW7 AJ7 AN13
M_A_DQ58 DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSN[4]/DDR1_DQSN[0] M_A_DQS#4 7,8 M_B_DQ58 DDR1_DQ[57] DDR1_DQSN[4]/DDR1_DQSN[2] M_B_DQS#4 9,10
AK4 AU3 AE6 AR8
M_A_DQ59 DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSN[5]/DDR1_DQSN[1] M_A_DQS#5 7,8 M_B_DQ59 DDR1_DQ[58] DDR1_DQSN[5]/DDR1_DQSN[3] M_B_DQS#5 9,10
AH2 AN3 AF7 AM8
M_A_DQ60 DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQSN[6]/DDR1_DQSN[4] M_A_DQS#6 7,8 M_B_DQ60 DDR1_DQ[59] DDR1_DQSN[6] M_B_DQS#6 9,10
AH4 AJ3 AH7 AG6
M_A_DQ61 DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQSN[7]/DDR1_DQSN[5] M_A_DQS#7 7,8 M_B_DQ61 DDR1_DQ[60] DDR1_DQSN[7] M_B_DQS#7 9,10
AK2 AH6
M_A_DQ62 AH3 DDR0_DQ[61]/DDR1_DQ[45] AF38 M_B_DQ62 AE7 DDR1_DQ[61] AF35
M_A_DQ63 DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQSP[0] M_A_DQS0 7,8 M_B_DQ63 DDR1_DQ[62] DDR1_DQSP[0]/DDR0_DQSP[2] M_B_DQS0 9,10
AK1 AK38 AF6 AL33
DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSP[1] M_A_DQS1 7,8 DDR1_DQ[63] DDR1_DQSP[1]/DDR0_DQSP[3] M_B_DQS1 9,10
AP38 AP33
DDR0_DQSP[2]/DDR0_DQSP[4] M_A_DQS2 7,8 DDR1_DQSP[2]/DDR0_DQSP[6] M_B_DQS2 9,10
AU33 AV36 AR25 AN28
DDR0_ECC[0] DDR0_DQSP[3]/DDR0_DQSP[5] M_A_DQS3 7,8 DDR1_ECC[0] DDR1_DQSP[3]/DDR0_DQSP[7] M_B_DQS3 9,10
AT33 AV7 AR26 AN12
DDR0_ECC[1] DDR0_DQSP[4]/DDR1_DQSP[0] M_A_DQS4 7,8 DDR1_ECC[1] DDR1_DQSP[4]/DDR1_DQSP[2] M_B_DQS4 9,10
AW33 AU2 AM26 AP8
DDR0_ECC[2] DDR0_DQSP[5]/DDR1_DQSP[1] M_A_DQS5 7,8 DDR1_ECC[2] DDR1_DQSP[5]/DDR1_DQSP[3] M_B_DQS5 9,10
AV31 AN2 AM25 AL8
DDR0_ECC[3] DDR0_DQSP[6]/DDR1_DQSP[4] M_A_DQS6 7,8 DDR1_ECC[3] DDR1_DQSP[6] M_B_DQS6 9,10
AU31 AJ2 AP26 AG7
DDR0_ECC[4] DDR0_DQSP[7]/DDR1_DQSP[5] M_A_DQS7 7,8 DDR1_ECC[4] DDR1_DQSP[7] M_B_DQS7 9,10
AV33 AP25
AW31 DDR0_ECC[5] AV32 AL25 DDR1_ECC[5] AN25
AY31 DDR0_ECC[6] DDR0_DQSP[8] AU32 AL26 DDR1_ECC[6] DDR1_DQSP[8] AN26
DDR0_ECC[7] DDR0_DQSN[8] DDR1_ECC[7] DDR1_DQSN[8]
DDR CHANNEL B
DDR CHANNEL A AB40
DDR_VREF_CA DDR_VREF_CA 7
AC40 DDR0_VREF_DQ
1 OF 12 DDR0_VREF_DQ AC39
DDR1_VREF_DQ DDR1_VREF_DQ 9
2 OF 12
SKL_S_CPU_LGA
REV = 1.2 SKL_S_CPU_LGA
REV = 1.2 ?
?
A A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[04] Processor 3/5-DDR4
Size Document Number Rev
A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 4 of 69
5 4 3 2 1
Processor 3/5 B - 5
Schematic Diagrams
Processor 4/5
5 4 3 2 1
SKYLAKE-S Processor 4/5 ( POWER )
VCORE VCORE 4.2A 4.2A
SKL_S_CPU VCCSA SKL_S_CPU VDDQ
U39G ? U39I ?
LGA1151 LGA1151
AA7 AT18
A25 H32 AB6 VCCSA VDDQ AT21
A26 VCC VCC J21
DESIGN NOTE: AB7 VCCSA VDDQ AU13
A27 VCC VCC F32 PLACE CAPS IN SOCKET EDGE BOTTOM/TOP AB8 VCCSA VDDQ AU15
D
VCORE
DESIGN NOTE: A28 VCC VCC F33 AC7 VCCSA VDDQ AU19
D
PLACE CAPS IN SOCKET EDGE BOTTOM/TOP A29 VCC VCC F34 AC8 VCCSA VDDQ AU23
A30 VCC VCC G23 N7 VCCSA VDDQ AV11
C102 C586 C97 C47 C46 B25 VCC VCC G24 P7 VCCSA VDDQ AV17
B27 VCC VCC G25 R7 VCCSA VDDQ AV21
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 B29 VCC VCC G26 T7 VCCSA VDDQ AW10
B31 VCC VCC G27 U7 VCCSA VDDQ AW14
B32 VCC VCC G28 Y6 VCCSA VDDQ AW25
FOR OCK only
B33 VCC VCC G29 Y7 VCCSA VDDQ AY12
C95 C580 C91 C43 C60 B34 VCC VCC J22 VCCSA Y8 VCCSA VDDQ AY16
B35 VCC VCC J23 W7 VCCSA VDDQ AY18 VDDQ
B.Schematic Diagrams
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 B36 VCC VCC J24 V7 VCCSA VDDQ AY23
B37 VCC VCC J25 AA6 VCCSA VDDQ
C25 VCC VCC J26 C108 C100 VCCSA AJ9 VCCPLL_OC_R R93 0_04
C26 VCC VCC J27 VCCIO VCCPLL_OC
C104 C105 C584 C578 C93 C27 VCC VCC J28 22u_6.3V_X5R_08 22u_6.3V_X5R_08 AK11 VCCPLL_OC
C28 VCC VCC J29 AK14 VCCIO
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 C29 VCC VCC J30 AK24 VCCIO
C30 VCC VCC J31 AJ23 VCCIO R576 *0_04
C32 VCC VCC K16 M8 VCCIO
Sheet 5 of 69 C63 C111 C64 C45 C579
C34
C36
D25
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
K18
K20
K21
P8
T8
U8
VCCIO
VCCIO
VCCIO
VCCIO
VCORE
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 D27 K23 W8
Processor 4/5 D29
D31
D32
VCC
VCC
VCC
VCC
VCC
VCC
K25
K27
K29
VCCIO
VCCOPC
VCCOPC
AJ30
AJ27
AJ28
C98 C96 C587 C591 C62 D33 VCC VCC K31 V5 VCCOPC AJ29
C D34 VCC VCC L14 PR75 0_06 V6 VCCST VCCOPC AK27 C
VCC VCC VCCST_VCCPLL VCCST VCCOPC
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 D35 L15
D36 VCC VCC L16 V4
E24 VCC VCC L17 VCCPLL AJ25
E25 VCC VCC L18
DESIGN NOTE: VCCEOPIO AJ26
C103 C61 C585 C44 E26 VCC VCC L19 PLACE CAPS IN SOCKET VCCEOPIO VCC_OPC_1P8_NC VCC_OPC_1P8_NC1
E27 VCC VCC L20 EDGE BOTTOM/TOP
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 E28 VCC VCC L21 AB37 1 2
E29 VCC VCC L22 VCC_OPC_1P8 AB38 PJ44 *CV-40mil
E30 VCC VCC L23 VCC_OPC_1P8
E32 VCC VCC L24 R592 100_04
VCC VCC VCCSA
E34 L25 AD5 VCCSA_SENSE 51
C592 C110 C583 C94 E36 VCC VCC L26 C581 C577 VCCSA_SENSE AF4 R590 100_04
VCC VCC VCCIO_SENSE VCCIO
F23 L27 AE4 VSS_SA_IO_SENSE 51
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 F24 VCC VCC L28 22u_6.3V_X5R_08 1u_6.3V_X5R_04 VSS_SAIO_SENSE R591 100_04
F25 VCC VCC L29
F27 VCC VCC L30 AK21
VCC VCC VCCOPC_SENSE VCORE
F29 M13 AJ24
F31 VCC VCC M14 VCCEOPIO_SENSE AK22
G30 VCC VCC M16 VSSOPC_EOPIO_SENSE
G32 VCC VCC M18 SKL_S_CPU_LGA
H22 VCC VCC M20 9 OF 12
H23 VCC VCC M22 REV = 1.2 ?
H25 VCC VCC M24
H27 VCC VCC M26
H29 VCC VCC M28
H31 VCC VCC M30
VCC VCC
AJ11 AJ12 VCORE
B AJ13 VCC VCC AJ14 B
AJ15 VCC VCC AJ16
AJ17 VCC VCC AJ18 PR64
AJ19 VCC VCC AJ20
AJ21 VCC VCC AJ22 100_04
VCC VCC
C38 VCCCORE_SENSE 49
VCC_SENSE D38
VSS_SENSE VSSCORE_SENSE 49
SKL_S_CPU_LGA PR63
7 OF 12
REV = 1.2 ? 100_04
DESIGN NOTE:
VDDQ PLACE CAPS IN SOCKET EDGE BOTTOM/TOP
C638 C646
C633 C630 C648 C647 + +
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 *560u_2.5V_6.6*6.6*5.9 *560u_2.5V_6.6*6.6*5.9
VCCIO
DESIGN NOTE:
PLACE CAPS IN SOCKET EDGE BOTTOM/TOP
A A
C109 C99 C112 C92 C106 C582
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08
44 VCCPLL_OC
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
C101 C107 C113 Title
7,8,9,10,18,44
3,18,46,49
VDDQ
VCCST_VCCPLL
[05] Processor 4/5-POWER
0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 2,3,43 VCCIO
Size Document Number Rev
6,50
51
VCORE
VCCSA A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 5 of 69
5 4 3 2 1
B - 6 Processor 4/5
Schematic Diagrams
Processor 5/5
5 4 3 2 1
SKYLAKE-S Processor 5/5 ( GND )
?
U39L SKL_S_CPU
U39K SKL_S_CPU ? U39F SKL_S_CPU ? G13 D39 VCCGT U39H SKL_S_CPU
? VCORE
AB5 C37 VSS VSS
VSS VSS G17 D7 LGA1151
AC3 J16 VSS VSS
VSS VSS AK29 G15 E11 AA34 F35
AC33 D40 VSS VSS VSS VCCGT VCCGTX
VSS VSS_NCTF AK30 G3 E13 AA35 G34
LGA1151
AB39 K35 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK36 G6 E17 AA36 G35
AA8 K37 VSS VSS VSS VCCGT VCCGTX
D VSS VSS AK37 H1 E15 AA37 H33 D
A17 K33 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK40 H21 E19 AA38 H34
A11 H37 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK5 H24 E21 AB33 J33
AA33 C10 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK6 H26 E23 AB34 J35
AA3 D24 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK7 H39 E3 G36 K32
A24 D37 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK8 H4 E31 G37 K34
A13 B30 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK9 H9 E33 G38 L31
A15 B26 VSS VSS VSS VCCGT VCCGTX
VSS VSS AL1 J18 E37 G39 L33
AG1 B24 VSS VSS VSS VCCGT VCCGTX
VSS VSS AL11 J20 E35 G40 M32
AH8 AY7 VSS VSS VSS VCCGT VCCGTX
VSS VSS A7 AL14 J3 E6 H36
AJ1 AY5 VSS VSS VSS VSS VCCGT
VSS VSS AC34 AL2 J6 E9 H38
AH40 AY30 VSS VSS VSS VSS VCCGT
AC35 AL21 K1 F1 H40
B.Schematic Diagrams
AH5 VSS VSS AY27
AC6 VSS VSS AL24 K14 VSS VSS F22 J36 VCCGT
AH39 VSS VSS AW36
AD1 VSS VSS AL27 K17 VSS VSS F10 J37 VCCGT
AH38 VSS VSS AW34
AD33 VSS VSS AL3 K22 VSS VSS F26 J38 VCCGT
AH37 VSS VSS AW32
AD36 VSS VSS AL30 U3 VSS LGA1151 VSS F28 J39 VCCGT
AH36 VSS VSS C12
AD37 VSS VSS AL36 T37 VSS VSS F30 J40 VCCGT
AG8 VSS VSS C14
AD38 VSS VSS AL4 T35 VSS VSS F40 K36 VCCGT
AH33 VSS VSS C16
AD39 VSS VSS AL5 R33 VSS VSS F4 K38 VCCGT
AG5 VSS VSS C18
AD4 VSS VSS AM11 P4 VSS VSS F7 K40 VCCGT
VSS VSS
AG4
AG36
AG33
AG3
VSS
VSS
VSS
VSS
VSS
VSS
C5
C8
D26
D28
AD40
AD6
AD7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM14
AM17
AM19
P39
P37
P1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G11
G19
G22
L34
L35
L36
VCCGT
VCCGT
VCCGT
VCCGT
Sheet 6 of 69
VSS VSS AD8 AM24 N33 G31 L37
AG2
AR30
AR3
AR27
VSS
VSS
VSS
VSS
VSS
D30
D4
AE3
AE33
AE36
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM27
AM30
AM31
M39
M37
M29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G33
H35
J10
L38
L39
L40
VCCGT
VCCGT
VCCGT
VCCGT
Processor 5/5
VSS AE5 AM32 M25 J12 M33
AT10 VSS VSS VSS VSS VCCGT
VSS AE8 AM33 M27 J32 M34
H30 VSS VSS VSS VSS VCCGT
C VSS AF1 AM34 M23 J34 M36 C
AV38 LGA1151 VSS VSS VSS VSS VCCGT
VSS AF33 AM35 M21 K15 M38
AV9 VSS VSS VSS VSS VCCGT
VSS AF36 AM36 M19 K19 M40
L11 VSS VSS VSS VSS VCCGT
VSS AF37 AM37 M15 B38 N34
K30 VSS VSS VSS VSS_NCTF VCCGT
VSS AF40 AM38 M17 U33 N35
K28 VSS VSS VSS VSS VCCGT
VSS AF5 AM39 M10 T4 N36
K26 VSS VSS VSS VSS VCCGT
VSS AF8 AM40 M12 T1 N37
K24 VSS VSS VSS VSS VCCGT
VSS AM5 M1 R6 N38
C2 VSS VSS VSS VCCGT
VSS_NCTF AN1 L32 R8 N39
A4 VSS VSS VSS VCCGT
VSS_NCTF AN10 L3 R3 N40
H7 VSS VSS VSS VCCGT
VSS AN11 L13 P35 P33
H28 VSS VSS VSS VCCGT
VSS AN14 K7 N8 P34
AT30 VSS VSS VSS VCCGT
VSS AN16 K4 N6 P36
AT25 VSS VSS VSS VCCGT
VSS AN19 K39 N3 P38
AT14 VSS VSS VSS VCCGT
VSS AN22 AU25 M4 P40
L6 VSS VSS VSS VCCGT
VSS AN23 AU34 M7 R34
L9 VSS VSS VSS VCCGT
VSS AN24 AU4 M35 R35
AR33 VSS VSS VSS VCCGT
VSS AN27 AT38 B28 R36
AU1 VSS VSS VSS VCCGT
VSS AN30 AT37 T39 R37
AT9 VSS VSS VSS VCCGT
VSS AN36 AT34 V8 R38
AT28 VSS VSS VSS VCCGT
VSS AN4 AT31 W33 R39
AT32 VSS VSS VSS VCCGT
VSS AN5 AT29 Y5 R40
AY9 VSS VSS VSS VCCGT
VSS AN6 AT27 T33
AW9 VSS VSS VCCGT
VSS AN7 AT26 T34
AW5 VSS VSS VCCGT
VSS AJ31 AN8 AR24 T36
AW30 VSS VSS VSS VCCGT
VSS AJ32 AN9 V35 T38
AW3 VSS VSS VSS VCCGT
VSS AJ33 AP11 U6 T40
AV5 VSS VSS VSS VCCGT
VSS AJ34 AP14 V1 U34
AV34 VSS VSS VSS VCCGT
VSS AJ35 AP24 V37 U35
B AV30 VSS VSS VSS VCCGT B
VSS AJ36 AP27 V39 U36
AV28 VSS VSS VSS VCCGT
VSS AJ4 AP30 AT8 U37
AV26 VSS VSS VSS VCCGT
VSS AJ5 AP36 W3 U38
AV2 VSS VSS VSS VCCGT
VSS AJ8 AP37 Y35 U39
AU7 VSS VSS VSS SKL_S_CPU_LGA VCCGT
VSS AK10 AP40 W6 U40
AU5 VSS VSS VSS VCCGT
VSS AK12 AP5 Y37 12 of 12 V33
AU30 VSS VSS VSS VCCGT
VSS AK13 AR1 V34
AT7 VSS VSS VCCGT
VSS AK15 AR11 REV = 1.2 ? V36
AT6 VSS VSS VCCGT
VSS AK16 AR14 V38
AT5 VSS VSS VCCGT
VSS AK17 AR16 V40
AT40 VSS VSS VCCGT
VSS AK18 AR17 W34
AT39 VSS VSS VCCGT
VSS AK19 AR18 W35
AT36 VSS VSS VCCGT
VSS AK20 AR19 W36
AT24 VSS VSS VCCGT
VSS AK23 AR2 W37
AT17 VSS VSS VCCGT
VSS AK25 AR20 W38 F39
AT13 VSS VSS VCCGT VCCGT_SENSE VCORE
VSS AK26 AR21 Y33 F38
AT12 VSS VSS VCCGT VSSGT_SENSE
VSS AK28 Y34
AT11 VSS VCCGT
VSS Y36 F37
AR5 VCCGT VCCGTX_SENSE
VSS Y38 F36
AR4 VCCGT VSSGTX_SENSE
AR36 VSS
VSS SKL_S_CPU_LGA
AR35
VSS SKL_S_CPU_LGA 8 OF 12
AR34
VSS 6 OF 12 REV = 1.2 ?
AR32
VSS REV = 1.2 ?
AR31
B6 VSS
C20 VSS
C22 VSS
C35 VSS
A C33 VSS A
C31 VSS
C24 VSS SKL_S_CPU_LGA
VSS 11 of 12
REV = 1.2 ?
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[06] Processor 5/5-GND
Size Document Number Rev
5,50 VCORE A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 6 of 69
5 4 3 2 1
Processor 5/5 B - 7
Schematic Diagrams
DDR4 CHA SO-DIMM_0
5 4 3 2 1
JDIMM1A
1.2V 0.6V
137 8 VDDQ VTT_MEM
4 M_A_CK0 M_A_DQ5 4,8 JDIMM1B
CHA DIMM0
139 CK0_T DQ0 7
4 M_A_CK#0 CK0_C DQ1 M_A_DQ0 4,8
4 M_A_CK1 138 20
CK1_T DQ2 M_A_DQ2 4,8
4 M_A_CK#1 140 21 163 258
CK1_C DQ3 M_A_DQ3 4,8 VDD19 VTT 2.5V
4 160
DQ4 M_A_DQ1 4,8 VDD18
4 M_A_CKE0 109 3 159
CKE0 DQ5 M_A_DQ4 4,8 VDD17
4 M_A_CKE1 110 16 154 259
CKE1 DQ6 M_A_DQ6 4,8 VDD16 VPP2
17 153 257
DQ7 M_A_DQ7 4,8 VDD15 VPP1
4 M_A_CS0# 149 28 148
S0* DQ8 M_A_DQ8 4,8 VDD14 3.3VS
4 M_A_CS1# 157 29 147
S1* DQ9 M_A_DQ12 4,8 VDD13
41 JDIMM1 = CHA DIMM0 000 142
DQ10 M_A_DQ14 4,8 VDD12
D 4 M_A_ODT0 155 42 141 D
ODT0 DQ11 M_A_DQ11 4,8 VDD11
4 M_A_ODT1 161 24 136 255
ODT1 DQ12 M_A_DQ9 4,8 VDD10 VDDSPD
25 135
DQ13 M_A_DQ13 4,8 VDD9
4,8
4,8
M_A_BG0
M_A_BG1
115
113 BG0
BG1
DQ14
DQ15
38
37
M_A_DQ10
M_A_DQ15
4,8
4,8
BOT JDIMM3 = CHB DIMM0 010 130
129 VDD8
VDD7
C665 C664
4,8 M_A_BA0 150 50 124
BA0 DQ16 M_A_DQ17 4,8 VDD6
4,8 M_A_BA1 145 49 123 0.1u_16V_X7R_04 2.2u_6.3V_X5R_04
BA1 DQ17 M_A_DQ20 4,8 VDD5
62 118
DQ18 M_A_DQ23 4,8 VDD4
144 63 117
4,8
4,8
M_A_A0
M_A_A1 133 A0 DQ19 46
M_A_DQ18 4,8
TOP JDIMM2 = CHA DIMM1 001 112 VDD3
W> >K^ dKW/E
A1 DQ20 M_A_DQ16 4,8 VDD2
4,8 M_A_A2 132 45 111
A2 DQ21 M_A_DQ21 4,8 VDD1
4,8 M_A_A3 131 58
A3 DQ22 M_A_DQ19 4,8
4,8 M_A_A4 128 59 GND1
A4 DQ23 M_A_DQ22 4,8 MT1
126 70 GND2
B.Schematic Diagrams
4,8 M_A_A5 A5 DQ24 M_A_DQ25 4,8 MT2
4,8 M_A_A6 127 71
A6 DQ25 M_A_DQ29 4,8 VDDQ
4,8 M_A_A7 122 83 JDIMM4 = CHB DIMM1 011
A7 DQ26 M_A_DQ30 4,8
4,8
4,8
M_A_A8
M_A_A9
125
121 A8 DQ27
84
66
M_A_DQ31
M_A_DQ24
4,8
4,8
251
247 VSS VSS
252
248 W> >K^ dK^K/DD
146 A9 DQ28 67 243 VSS VSS 244
4,8 M_A_A10 A10_AP DQ29 M_A_DQ28 4,8 VSS VSS
4,8 M_A_A11 120 79 239 238
A11 DQ30 M_A_DQ27 4,8 VDDQ VSS VSS
119 80 235 234
4,8
4,8
M_A_A12
M_A_A13 158 A12
A13
DQ31
DQ32
174
M_A_DQ26
M_A_DQ32
4,8
4,8
W> >K^ dK^K/DD 231 VSS
VSS
VSS
VSS
230 C689 C681 C670 C677
Sheet 7 of 69 4,8
4,8
4,8
M_A_A14
M_A_A15
M_A_A16
151
156
152
A14_WE*
A15_CAS*
A16_RAS*
DQ33
DQ34
DQ35
173
187
186
170
M_A_DQ37
M_A_DQ39
M_A_DQ34
4,8
4,8
4,8
DIMM0_CHA_EVENT# R231 240_1%_04
227
223
217
213
VSS
VSS
VSS
VSS
VSS
VSS
226
222
218
214
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
DQ36 M_A_DQ36 4,8 VSS VSS
DDR4 CHA SO- 4,8 M_A_ACT# 114
ACT*
DQ37
DQ38
DQ39
169
183
182
M_A_DQ33
M_A_DQ38
M_A_DQ35
4,8
4,8
4,8
209
205
201
VSS
VSS
VSS
VSS
VSS
VSS
210
206
202
C
4,8 DDR0_A_PARITY 143 195 197 196 C669 C668 C685 C691 C
DIMM _0 PARITY DQ40 M_A_DQ41 4,8 VSS VSS
4,8 DDR0_A_ALERT# 116 194 193 192
DIMM0_CHA_EVENT# 134 ALERT* DQ41 M_A_DQ45 4,8 VSS VSS
207 189 188 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
EVENT* DQ42 M_A_DQ46 4,8 VSS VSS
8,9,10,18 DDR4_DRAMRST# 108 208 185 184
RESET* DQ43 M_A_DQ42 4,8 VSS VSS
191 181 180
DQ44 M_A_DQ44 4,8 VSS VSS
7,8 VREFCA_CHA_DIMM 164 190 175 176
VREFCA DQ45 M_A_DQ40 4,8 VSS VSS
203 171 172
DQ46 M_A_DQ43 4,8 VSS VSS
8,9,10,16 SMB_DATA_MAIN 254 204 167 168
SDA DQ47 M_A_DQ47 4,8 VSS VSS
253 216 107 106
8,9,10,16 SMB_CLK_MAIN SCL DQ48 M_A_DQ49 4,8 VSS VSS VDDQ
215 103 102
SA2_CHA_DIM0 DQ49 M_A_DQ52 4,8 VSS VSS
166 228 W> d, Wt/d,/EϮϬϬD/>^ 99 98
SA1_CHA_DIM0 SA2 DQ50 M_A_DQ55 4,8 &ZKD d, ^K/DDͲϬ VSS VSS
260 229 93 94
SA0_CHA_DIM0 SA1 DQ51 M_A_DQ51 4,8 VSS VSS
256 211 89 90
SA0 DQ52 M_A_DQ50 4,8 DDR4_DRAMRST# VSS VSS
212 85 86
DQ53 M_A_DQ48 4,8 VSS VSS
224 81 82
DQ54 M_A_DQ53 4,8 VSS VSS
225 C224 77 78 C692 C690 C682 C687
DQ55 M_A_DQ54 4,8 VSS VSS
92 237 73 72
CB0_NC DQ56 M_A_DQ61 4,8 VSS VSS
91 236 *0.1u_10V_X7R_04 69 68 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
CB1_NC DQ57 M_A_DQ63 4,8 VSS VSS
101 249 65 64
CB2_NC DQ58 M_A_DQ57 4,8 VSS VSS
105 250 61 60
CB3_NC DQ59 M_A_DQ60 4,8 VSS VSS
88 232 57 56
CB4_NC DQ60 M_A_DQ56 4,8 VSS VSS
87 233 51 52
CB5_NC DQ61 M_A_DQ58 4,8 VSS VSS
100 245 47 48
CB6_NC DQ62 M_A_DQ62 4,8 VSS VSS
104 246 43 44 C679 C676 C672 C666
CB7_NC DQ63 M_A_DQ59 4,8 VREFCA_CHA_DIMM VSS VSS
W> d, W>K^ dK^K/DD 39 40
12 13 35 VSS VSS 36 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
VDDQ DM0*/DBI0* DQS0_T M_A_DQS0 4,8 VSS VSS
33 34 31 30
DM1*/DBI1* DQS1_T M_A_DQS1 4,8 VSS VSS
54 55 C674 C673 27 26
DM2*/DBI2* DQS2_T M_A_DQS2 4,8 VSS VSS
75 76 23 22
B DM3*/DBI3* DQS3_T M_A_DQS3 4,8 VSS VSS 2.5V B
178 179 0.1u_16V_X7R_04 *2.2u_10V_X5R_04 19 18
DM4*/DBI4* DQS4_T M_A_DQS4 4,8 VSS VSS
199 200 15 14
DM5*/DBI5* DQS5_T M_A_DQS5 4,8 VSS VSS
220 221 9 10
DM6*/DBI6* DQS6_T M_A_DQS6 4,8 VSS VSS
241 242 5 6
DM7*/DBI7* DQS7_T M_A_DQS7 4,8 VSS VSS
96 97 1 2
DM8*/DBI8* DQS8_T VSS VSS C661 C645 C662 C663
11
DQS0_C M_A_DQS#0 4,8
32 10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04
DQS1_C M_A_DQS#1 4,8
53
DQS2_C M_A_DQS#2 4,8 D4AS0-26001-1P92
74
DQS3_C M_A_DQS#3 4,8 VTT_MEM
177
DQS4_C M_A_DQS#4 4,8
198
DQS5_C M_A_DQS#5 4,8
219
DQS6_C M_A_DQS#6 4,8
240
DQS7_C M_A_DQS#7 4,8
95 C198 C188
162 DQS8_C
165 S2*/C0 1u_6.3V_X5R_04
10u_6.3V_X5R_06
S3*/C1
VDDQ
D4AS0-26001-1P92
C667 R706
W> >K^ dK, 0.1u_16V_X7R_04 1K_1%_04 dK,:/DDϭ͕ϯ
5,8,9,10,18,44 VDDQ
A R707 2_1%_04 R688 0_04 8,9,10,44 VTT_MEM A
4 DDR_VREF_CA
8,9,10,47 2.5V
8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51 3.3VS
C675 C649 R705
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
0.022u_16V_X7R_04 0.1u_16V_X7R_04 1K_1%_04
R689 Title
24.9_1%_04
VREFCA_CHA_DIMM
[07] DDR4 CHA SO-DIMM_0
VREFCA_CHA_DIMM 7,8
Size Document Number Rev
A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 7 of 69
5 4 3 2 1
B - 8 DDR4 CHA SO-DIMM_0
Schematic Diagrams
DDR4 CHA SO-DIMM_1
5 4 3 2 1
JDIMM2A VDDQ VTT_MEM
JDIMM2B
4 M_A_CK2 137 8
M_A_DQ5 4,7
CHA DIMM1
139 CK0_T DQ0 7 163 258
4 M_A_CK#2 CK0_C DQ1 M_A_DQ0 4,7 VDD19 VTT 2.5V
4 M_A_CK3 138 20 160
CK1_T DQ2 M_A_DQ2 4,7 VDD18
4 M_A_CK#3 140 21 159
CK1_C DQ3 M_A_DQ3 4,7 VDD17
4 154 259
DQ4 M_A_DQ1 4,7 VDD16 VPP2
4 M_A_CKE2 109 3 153 257
CKE0 DQ5 M_A_DQ4 4,7 VDD15 VPP1
4 M_A_CKE3 110 16 148
CKE1 DQ6 M_A_DQ6 4,7 VDD14
17 147
DQ7 M_A_DQ7 4,7 VDD13 3.3VS
4 M_A_CS2# 149 28 142
S0* DQ8 M_A_DQ8 4,7 VDD12
4 M_A_CS3# 157 29 141
S1* DQ9 M_A_DQ12 4,7 VDD11
41 136 255
DQ10 M_A_DQ14 4,7 VDD10 VDDSPD
D 4 M_A_ODT2 155 42 135 D
ODT0 DQ11 M_A_DQ11 4,7 VDD9
4 M_A_ODT3 161 24 130 C234 C235
ODT1 DQ12 M_A_DQ9 4,7 VDD8
25 129
DQ13 M_A_DQ13 4,7 VDD7
4,7 M_A_BG0 115 38 124 0.1u_16V_X7R_04 2.2u_6.3V_X5R_04
BG0 DQ14 M_A_DQ10 4,7 VDD6
4,7 M_A_BG1 113 37 123
BG1 DQ15 M_A_DQ15 4,7 VDD5
4,7 M_A_BA0 150 50 118
BA0 DQ16 M_A_DQ17 4,7 VDD4
4,7 M_A_BA1 145 49 117
BA1 DQ17 M_A_DQ20 4,7 VDD3
62 112
4,7 M_A_A0 144
A0
DQ18
DQ19
63
M_A_DQ23
M_A_DQ18
4,7
4,7
111 VDD2
VDD1
W> >K^ dKW/E
4,7 M_A_A1 133 46
A1 DQ20 M_A_DQ16 4,7
4,7 M_A_A2 132 45 GND1
A2 DQ21 M_A_DQ21 4,7 MT1
4,7 M_A_A3 131 58 JDIMM1 = CHA DIMM0 000 GND2
A3 DQ22 M_A_DQ19 4,7 MT2
4,7 M_A_A4 128 59
A4 DQ23 M_A_DQ22 4,7
4,7
4,7
M_A_A5
M_A_A6
126
127 A5 DQ24
70
71
M_A_DQ25
M_A_DQ29
4,7
4,7
251 252 VDDQ W> >K^ dK^K/DD
A6 DQ25 VSS VSS
B.Schematic Diagrams
122 83 JDIMM3 = CHB DIMM0 010 247 248
4,7
4,7
M_A_A7
M_A_A8 125
121
A7
A8
DQ26
DQ27
84
66
M_A_DQ30
M_A_DQ31
4,7
4,7 BOT 243
239
VSS
VSS
VSS
VSS
244
238
4,7 M_A_A9 A9 DQ28 M_A_DQ24 4,7 VSS VSS
4,7 M_A_A10 146 67 235 234 C686 C170 C169 C634
A10_AP DQ29 M_A_DQ28 4,7 VSS VSS
120 79 231 230
4,7
4,7
M_A_A11
M_A_A12 119
158
A11
A12
DQ30
DQ31
80
174
M_A_DQ27
M_A_DQ26
4,7
4,7 TOP 227
223
VSS
VSS
VSS
VSS
226
222
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
4,7 M_A_A13 A13 DQ32 M_A_DQ32 4,7 VSS VSS
4,7 M_A_A14 151 173 JDIMM2 = CHA DIMM1 001 217 218
A14_WE* DQ33 M_A_DQ37 4,7 VSS VSS
4,7
4,7
M_A_A15
M_A_A16
156
152 A15_CAS*
A16_RAS*
DQ34
DQ35
DQ36
187
186
170
169
M_A_DQ39
M_A_DQ34
M_A_DQ36
4,7
4,7
4,7
213
209
205
201
VSS
VSS
VSS
VSS
VSS
VSS
214
210
206
202 C678 C671 C680 C683
Sheet 8 of 69
DQ37 M_A_DQ33 4,7 JDIMM4 = CHB DIMM1 011 VSS VSS
C
4,7
4,7 M_A_ACT#
DDR0_A_PARITY 143
116
114
ACT*
PARITY
DQ38
DQ39
DQ40
183
182
195
194
M_A_DQ38
M_A_DQ35
M_A_DQ41
4,7
4,7
4,7
197
193
189
185
VSS
VSS
VSS
VSS
VSS
VSS
196
192
188
184
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
C
DDR4 CHA SO-
4,7 DDR0_A_ALERT# M_A_DQ45 4,7
7,9,10,18 DDR4_DRAMRST#
DIMM1_CHA_EVENT# 134
108
ALERT*
EVENT*
RESET*
DQ41
DQ42
DQ43
DQ44
207
208
191
M_A_DQ46
M_A_DQ42
M_A_DQ44
4,7
4,7
4,7
W> >K^ dK^K/DD
DIMM1_CHA_EVENT# R690
VDDQ 181
175
171
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
180
176
172
VDDQ DIMM _1
7 VREFCA_CHA_DIMM 164 190 240_1%_04 167 168
VREFCA DQ45 M_A_DQ40 4,7 VSS VSS
203 107 106
DQ46 M_A_DQ43 4,7 VSS VSS
7,9,10,16 SMB_DATA_MAIN 254 204 103 102 C221 C233 C231 C228
SDA DQ47 M_A_DQ47 4,7 VSS VSS
7,9,10,16 SMB_CLK_MAIN 253 216 99 98
SCL DQ48 M_A_DQ49 4,7 VSS VSS
215 93 94 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
SA2_CHA_DIM1 DQ49 M_A_DQ52 4,7 VSS VSS
166 228 89 90
SA1_CHA_DIM1 SA2 DQ50 M_A_DQ55 4,7 VSS VSS
260 229 85 86
SA0_CHA_DIM1 SA1 DQ51 M_A_DQ51 4,7 VSS VSS
3.3VS R182 0_04 256 211 81 82
SA0 DQ52 M_A_DQ50 4,7 VSS VSS
212 77 78
DQ53 M_A_DQ48 4,7 VSS VSS
224 73 72
DQ54 M_A_DQ53 4,7 VSS VSS
225 69 68 C227 C225 C226 C219
DQ55 M_A_DQ54 4,7 VSS VSS
92 237 65 64
CB0_NC DQ56 M_A_DQ61 4,7 VSS VSS
91 236 61 60 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
CB1_NC DQ57 M_A_DQ63 4,7 VSS VSS
101 249 57 56
CB2_NC DQ58 M_A_DQ57 4,7 VSS VSS
105 250 51 52
CB3_NC DQ59 M_A_DQ60 4,7 VREFCA_CHA_DIMM VSS VSS
88 232 W> d, W>K^ dK^K/DD 47 48
CB4_NC DQ60 M_A_DQ56 4,7 VSS VSS 2.5V
87 233 43 44
CB5_NC DQ61 M_A_DQ58 4,7 VSS VSS
100 245 39 40
CB6_NC DQ62 M_A_DQ62 4,7 VSS VSS
104 246 C229 C650 35 36
CB7_NC DQ63 M_A_DQ59 4,7 VSS VSS
31 30
12 13 0.1u_16V_X7R_04 *2.2u_10V_X5R_04 27 VSS VSS 26 C240 C239 C238 C199
VDDQ DM0*/DBI0* DQS0_T M_A_DQS0 4,7 VSS VSS
33 34 23 22
DM1*/DBI1* DQS1_T M_A_DQS1 4,7 VSS VSS
54 55 19 18 10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04
DM2*/DBI2* DQS2_T M_A_DQS2 4,7 VSS VSS
75 76 15 14
B DM3*/DBI3* DQS3_T M_A_DQS3 4,7 VSS VSS B
178 179 9 10
DM4*/DBI4* DQS4_T M_A_DQS4 4,7 VSS VSS VTT_MEM
199 200 5 6
DM5*/DBI5* DQS5_T M_A_DQS5 4,7 VSS VSS
220 221 1 2
DM6*/DBI6* DQS6_T M_A_DQS6 4,7 VSS VSS
241 242
DM7*/DBI7* DQS7_T M_A_DQS7 4,7
96 97
DM8*/DBI8* DQS8_T W> d, Wt/d,/EϮϬϬD/>^ C660 C700
11 &ZKD d, ^K/DDͲϬ
DQS0_C M_A_DQS#0 4,7 D4AS0-26001-1P40
32 10u_6.3V_X5R_06 1u_6.3V_X5R_04
DQS1_C M_A_DQS#1 4,7 DDR4_DRAMRST#
53
DQS2_C M_A_DQS#2 4,7
74
DQS3_C M_A_DQS#3 4,7
177 C223
DQS4_C M_A_DQS#4 4,7
198
DQS5_C M_A_DQS#5 4,7
219 *0.1u_10V_X7R_04
DQS6_C M_A_DQS#6 4,7
240
DQS7_C M_A_DQS#7 4,7
95
162 DQS8_C
165 S2*/C0
S3*/C1
D4AS0-26001-1P40
A A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
5,7,9,10,18,44 VDDQ
[08] DDR4 CHA SO-DIMM_1
7,9,10,44 VTT_MEM
Size Document Number Rev
7,9,10,47
7,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51
2.5V
3.3VS A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 8 of 69
5 4 3 2 1
DDR4 CHA SO-DIMM_1 B - 9
Schematic Diagrams
DDR4 CHB SO-DIMM_0
5 4 3 2 1
JDIMM3A VDDQ VTT_MEM
JDIMM3B
4 M_B_CK0 137 8
CK0_T DQ0 M_B_DQ0 4,10
4 M_B_CK#0 139 7 163 258
CK0_C DQ1 M_B_DQ4 4,10 VDD19 VTT 2.5V
4 M_B_CK1 138 20 160
CK1_T DQ2 M_B_DQ7 4,10 VDD18
4 M_B_CK#1 140 21 159
M_B_DQ3 4,10
CHB DIMM0
CK1_C DQ3 4 154 VDD17 259
DQ4 M_B_DQ5 4,10 VDD16 VPP2
4 M_B_CKE0 109 3 153 257
CKE0 DQ5 M_B_DQ1 4,10 VDD15 VPP1
4 M_B_CKE1 110 16 148
CKE1 DQ6 M_B_DQ2 4,10 VDD14
17 147
DQ7 M_B_DQ6 4,10 VDD13 3.3VS
4 M_B_CS0# 149 28 142
S0* DQ8 M_B_DQ9 4,10 VDD12
4 M_B_CS1# 157
S1* DQ9
29
41
M_B_DQ14
M_B_DQ13
4,10
4,10
141
136 VDD11 255 W> >K^ dKW/E
155 DQ10 42 135 VDD10 VDDSPD
D 4 M_B_ODT0 M_B_DQ15 4,10 D
161 ODT0 DQ11 24 130 VDD9 C815 C814
4 M_B_ODT1 ODT1 DQ12 25
M_B_DQ8 4,10 JDIMM1 = CHA DIMM0 000 129 VDD8
DQ13 M_B_DQ10 4,10 VDD7
4,10 M_B_BG0 115 38 124 0.1u_16V_X7R_04 2.2u_6.3V_X5R_04
BG0 DQ14 M_B_DQ11 4,10 VDD6
4,10 M_B_BG1 113 37 123
BG1 DQ15 M_B_DQ12 4,10 VDD5
150 50 JDIMM3 = CHB DIMM0 010 118
4,10
4,10
M_B_BA0
M_B_BA1 145 BA0
BA1
DQ16
DQ17
49
62
M_B_DQ21
M_B_DQ20
4,10
4,10 BOT 117
112
VDD4
VDD3
DQ18 M_B_DQ22 4,10 VDD2
4,10 M_B_A0 144 63 111
A0 DQ19 M_B_DQ19 4,10 VDD1
4,10 M_B_A1 133 46
A1 DQ20 M_B_DQ16 4,10
132 45 GND1
4,10
4,10
M_B_A2
M_B_A3 131 A2
A3
DQ21
DQ22
58
M_B_DQ17
M_B_DQ23
4,10
4,10 TOP MT1
MT2
GND2
B.Schematic Diagrams
4,10 M_B_A4 128 59 JDIMM2 = CHA DIMM1 001
A4 DQ23 M_B_DQ18 4,10 VDDQ
4,10 M_B_A5 126 70
A5 DQ24 M_B_DQ28 4,10
4,10
4,10
M_B_A6
M_B_A7
127
122 A6 DQ25
71
83
M_B_DQ25
M_B_DQ30
4,10
4,10
251
247 VSS VSS
252
248 W> >K^ dK^K/DD
125 A7 DQ26 84 243 VSS VSS 244
4,10 M_B_A8
121 A8 DQ27 66
M_B_DQ27 4,10 JDIMM4 = CHB DIMM1 011 239 VSS VSS 238
4,10 M_B_A9 A9 DQ28 M_B_DQ29 4,10 VSS VSS
4,10 M_B_A10 146 67 235 234
A10_AP DQ29 M_B_DQ24 4,10 VSS VSS
4,10 M_B_A11 120 79 231 230 C774 C187 C652 C636
A11 DQ30 M_B_DQ26 4,10 VSS VSS
4,10 M_B_A12 119 80 227 226
A12 DQ31 M_B_DQ31 4,10 VSS VSS
Sheet 9 of 69 4,10
4,10
4,10
M_B_A13
M_B_A14
M_B_A15
158
151
156
A13
A14_WE*
A15_CAS*
DQ32
DQ33
DQ34
174
173
187
M_B_DQ36
M_B_DQ32
M_B_DQ38
4,10
4,10
4,10 VDDQ
223
217
213
VSS
VSS
VSS
VSS
VSS
VSS
222
218
214
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
4,10 M_B_A16 152 186
M_B_DQ39 4,10 W> >K^ dK^K/DD 209 210
DDR4 CHB SO-
A16_RAS* DQ35 170 205 VSS VSS 206
DQ36 M_B_DQ33 4,10 VSS VSS
169 201 202
DQ37 M_B_DQ37 4,10 DIMM0_CHB_EVENT# VSS VSS
4,10 M_B_ACT# 114 183 R833 240_1%_04 197 196 C176 C177 C178 C773
ACT* DQ38 M_B_DQ35 4,10 VSS VSS
182 193 192
DIMM _0 DQ39 M_B_DQ34 4,10 VSS VSS
C
4,10 DDR1_B_PARITY 143 195 189 188 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 C
PARITY DQ40 M_B_DQ41 4,10 VSS VSS
116 194 185 184
4,10 DDR1_B_ALERT# DIMM0_CHB_EVENT# ALERT* DQ41 M_B_DQ45 4,10 VSS VSS
134 207 181 180
EVENT* DQ42 M_B_DQ46 4,10 VSS VSS VDDQ
7,8,10,18 DDR4_DRAMRST# 108 208 175 176
RESET* DQ43 M_B_DQ43 4,10 VSS VSS
191 171 172
DQ44 M_B_DQ40 4,10 VSS VSS
9,10 VREFCA_CHB_DIMM 164 190 167 168
VREFCA DQ45 M_B_DQ44 4,10 VSS VSS
203 107 106
DQ46 M_B_DQ42 4,10 VSS VSS
254 204 103 102
7,8,10,16 SMB_DATA_MAIN SDA DQ47 M_B_DQ47 4,10 VSS VSS
253 216 99 98
7,8,10,16 SMB_CLK_MAIN SCL DQ48 M_B_DQ49 4,10 VSS VSS
215 93 94 C222 C826 C829 C220
SA2_CHB_DIM0 DQ49 M_B_DQ48 4,10 VSS VSS
166 228 89 90
SA1_CHB_DIM0 SA2 DQ50 M_B_DQ51 4,10 VSS VSS
3.3VS R829 0_04 260 229 85 86 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
SA0_CHB_DIM0 SA1 DQ51 M_B_DQ50 4,10 VSS VSS
256 211 81 82
SA0 DQ52 M_B_DQ52 4,10 VSS VSS
212 77 78
DQ53 M_B_DQ53 4,10 VSS VSS
224 73 72
DQ54 M_B_DQ55 4,10 VREFCA_CHB_DIMM VSS VSS
225 W> d, W>K^ dK^K/DD 69 68
DQ55 M_B_DQ54 4,10 VSS VSS
92 237 65 64
CB0_NC DQ56 M_B_DQ61 4,10 VSS VSS
91 236 61 60 C831 C830 C218 C827
CB1_NC DQ57 M_B_DQ60 4,10 VSS VSS
101 249 C819 C820 57 56
CB2_NC DQ58 M_B_DQ59 4,10 VSS VSS
105 250 51 52 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
CB3_NC DQ59 M_B_DQ62 4,10 VSS VSS
88 232 0.1u_16V_X7R_04 *2.2u_10V_X5R_04 47 48
CB4_NC DQ60 M_B_DQ56 4,10 VSS VSS
87 233 43 44
CB5_NC DQ61 M_B_DQ57 4,10 VSS VSS
100 245 39 40
CB6_NC DQ62 M_B_DQ63 4,10 VSS VSS 2.5V
104 246 35 36
CB7_NC DQ63 M_B_DQ58 4,10 VSS VSS
31 30
12 13 27 VSS VSS 26
VDDQ DM0*/DBI0* DQS0_T M_B_DQS0 4,10 VSS VSS
33 34 23 22
DM1*/DBI1* DQS1_T M_B_DQS1 4,10 VSS VSS
54 55 19 18
DM2*/DBI2* DQS2_T M_B_DQS2 4,10 VSS VSS
75 76 15 14 C703 C702 C701 C720
B DM3*/DBI3* DQS3_T M_B_DQS3 4,10 VSS VSS B
178 179 9 10
DM4*/DBI4* DQS4_T M_B_DQS4 4,10 VSS VSS
199 200 W> d, Wt/d,/EϮϬϬD/>^ 5 6 10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04
DM5*/DBI5* DQS5_T M_B_DQS5 4,10 &ZKD d, ^K/DDͲϭ VSS VSS
220 221 1 2
DM6*/DBI6* DQS6_T M_B_DQS6 4,10 VSS VSS
241 242
DM7*/DBI7* DQS7_T M_B_DQS7 4,10 DDR4_DRAMRST#
96 97
DM8*/DBI8* DQS8_T
11 C828 VTT_MEM
DQS0_C M_B_DQS#0 4,10 D4AS0-26001-1P52
32
DQS1_C M_B_DQS#1 4,10
53 *0.1u_10V_X7R_04
DQS2_C M_B_DQS#2 4,10
74
DQS3_C M_B_DQS#3 4,10
177 C298 C813
DQS4_C M_B_DQS#4 4,10
198
DQS5_C M_B_DQS#5 4,10
219 10u_6.3V_X5R_06 1u_6.3V_X5R_04
DQS6_C M_B_DQS#6 4,10
240
DQS7_C M_B_DQS#7 4,10
95
162 DQS8_C
165 S2*/C0
S3*/C1 VDDQ
D4AS0-26001-1P52
C651
W> >K^ dK , 0.1u_16V_X7R_04 R830
1K_1%_04 dK,:/DDϮ͕ϰ
R860 2_1%_04 R859 0_04
4 DDR1_VREF_DQ
A 7,8,10,47 2.5V A
C849 5,7,8,10,18,44 VDDQ
C850 R831 7,8,10,44 VTT_MEM
0.1u_16V_X7R_04 7,8,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51 3.3VS
0.022u_16V_X7R_04 1K_1%_04
R861
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
24.9_1%_04 Title
VREFCA_CHB_DIMM
[09] DDR4 CHB SO-DIMM_0
VREFCA_CHB_DIMM 9,10
Size Document Number Rev
A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 9 of 69
5 4 3 2 1
B - 10 DDR4 CHB SO-DIMM_0
Schematic Diagrams
DDR4 CHB SO-DIMM_1
5 4 3 2 1
JDIMM4A VDDQ VTT_MEM
JDIMM4B
4 M_B_CK2 137 8
M_B_DQ0 4,9
CHB DIMM1
139 CK0_T DQ0 7 163 258
4 M_B_CK#2 CK0_C DQ1 M_B_DQ4 4,9 VDD19 VTT 2.5V
4 M_B_CK3 138 20 160
CK1_T DQ2 M_B_DQ7 4,9 VDD18
4 M_B_CK#3 140 21 159
CK1_C DQ3 M_B_DQ3 4,9 VDD17
4 154 259
DQ4 M_B_DQ5 4,9 VDD16 VPP2
4 M_B_CKE2 109 3 153 257
CKE0 DQ5 M_B_DQ1 4,9 VDD15 VPP1
4 M_B_CKE3 110 16 148
CKE1 DQ6 M_B_DQ2 4,9 VDD14
17 147
DQ7 M_B_DQ6 4,9 VDD13
4 M_B_CS2# 149 28 142
S0* DQ8 M_B_DQ9 4,9 VDD12 3.3VS
D
4 M_B_CS3# 157
S1* DQ9
29
41
M_B_DQ14
M_B_DQ13
4,9
4,9
141
136 VDD11 255 W> >K^ dKW/E D
155 DQ10 42 135 VDD10 VDDSPD
4 M_B_ODT2 ODT0 DQ11 M_B_DQ15 4,9 VDD9
4 M_B_ODT3 161 24 130 C236 C237
ODT1 DQ12 M_B_DQ8 4,9 VDD8
25 129
DQ13 M_B_DQ10 4,9 VDD7
4,9 M_B_BG0 115 38 JDIMM1 = CHA DIMM0 000 124 0.1u_16V_X7R_04 2.2u_6.3V_X5R_04
BG0 DQ14 M_B_DQ11 4,9 VDD6
4,9 M_B_BG1 113 37 123
BG1 DQ15 M_B_DQ12 4,9 VDD5
4,9 M_B_BA0 150 50 118
BA0 DQ16 M_B_DQ21 4,9 VDD4
4,9 M_B_BA1 145 49 117
BA1 DQ17 M_B_DQ20 4,9 VDD3
62 JDIMM3 = CHB DIMM0 010 112
4,9 M_B_A0 144
133 A0
DQ18
DQ19
63
46
M_B_DQ22
M_B_DQ19
4,9
4,9 BOT 111 VDD2
VDD1
4,9 M_B_A1 A1 DQ20 M_B_DQ16 4,9
4,9 M_B_A2 132 45 GND1
A2 DQ21 M_B_DQ17 4,9 MT1
4,9 M_B_A3 131 58 GND2
A3 DQ22 M_B_DQ23 4,9 MT2
128 59
4,9
4,9
M_B_A4
M_B_A5 126 A4
A5
DQ23
DQ24
70
M_B_DQ18
M_B_DQ28
4,9
4,9 TOP VDDQ
W> >K^ dK^K/DD
B.Schematic Diagrams
4,9 M_B_A6 127 71 JDIMM2 = CHA DIMM1 001 251 252
A6 DQ25 M_B_DQ25 4,9 VSS VSS
4,9 M_B_A7 122 83 247 248
A7 DQ26 M_B_DQ30 4,9 VSS VSS
4,9 M_B_A8 125 84 243 244
A8 DQ27 M_B_DQ27 4,9 VSS VSS
4,9 M_B_A9 121 66 239 238
A9 DQ28 M_B_DQ29 4,9 VSS VSS
4,9 M_B_A10 146 67 JDIMM4 = CHB DIMM1 011 235 234
A10_AP DQ29 M_B_DQ24 4,9 VSS VSS
4,9 M_B_A11 120 79 231 230 C635 C637 C632 C772
A11 DQ30 M_B_DQ26 4,9 VSS VSS
4,9 M_B_A12 119 80 227 226
A12 DQ31 M_B_DQ31 4,9 VSS VSS
4,9 M_B_A13 158 174 223 222 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
A13 DQ32 M_B_DQ36 4,9 VSS VSS
Sheet 10 of 69
4,9 M_B_A14 151 173 217 218
A14_WE* DQ33 M_B_DQ32 4,9 VSS VSS
4,9 M_B_A15 156 187 213 214
A15_CAS* DQ34 M_B_DQ38 4,9 VSS VSS
4,9 M_B_A16 152 186 209 210
A16_RAS* DQ35 M_B_DQ39 4,9 VDDQ VSS VSS
DQ36
170
M_B_DQ33 4,9 W> >K^ dK^K/DD 205
VSS VSS
206
DDR4 CHB SO-
169 201 202
DQ37 M_B_DQ37 4,9 VSS VSS
4,9 M_B_ACT# 114 183 197 196 C631 C629 C628 C688
ACT* DQ38 M_B_DQ35 4,9 DIMM1_CHB_EVENT# VSS VSS
C 182 R832 240_1%_04 193 192 C
DQ39 M_B_DQ34 4,9 VSS VSS
4,9 DDR1_B_PARITY 143 195 189 188 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
PARITY DQ40 M_B_DQ41 4,9 VSS VSS
7,8,9,18
4,9 DDR1_B_ALERT# DIMM1_CHB_EVENT#
DDR4_DRAMRST#
116
134
108
ALERT*
EVENT*
RESET*
DQ41
DQ42
DQ43
194
207
208
191
M_B_DQ45
M_B_DQ46
M_B_DQ43
4,9
4,9
4,9
185
181
175
171
VSS
VSS
VSS
VSS
VSS
VSS
184
180
176
172 VDDQ
DIMM _1
DQ44 M_B_DQ40 4,9 VSS VSS
9 VREFCA_CHB_DIMM 164 190 167 168
VREFCA DQ45 M_B_DQ44 4,9 VSS VSS
203 107 106
DQ46 M_B_DQ42 4,9 VSS VSS
254 204 103 102
7,8,9,16 SMB_DATA_MAIN SDA DQ47 M_B_DQ47 4,9 VSS VSS
253 216 99 98
7,8,9,16 SMB_CLK_MAIN SCL DQ48 M_B_DQ49 4,9 VSS VSS
215 93 94
SA2_CHB_DIM1 DQ49 M_B_DQ48 4,9 VSS VSS
166 228 89 90 C816 C817 C232 C818
SA1_CHB_DIM1 SA2 DQ50 M_B_DQ51 4,9 VSS VSS
R233 0_04 260 229 85 86
SA0_CHB_DIM1 SA1 DQ51 M_B_DQ50 4,9 VSS VSS
3.3VS R232 0_04 256 211 81 82 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
SA0 DQ52 M_B_DQ52 4,9 VSS VSS
212 77 78
DQ53 M_B_DQ53 4,9 VSS VSS
224 73 72
DQ54 M_B_DQ55 4,9 VSS VSS
225 69 68
DQ55 M_B_DQ54 4,9 VSS VSS
92 237 65 64
CB0_NC DQ56 M_B_DQ61 4,9 VREFCA_CHB_DIMM VSS VSS
91 236 W> d, W>K^ dK^K/DD 61 60
CB1_NC DQ57 M_B_DQ60 4,9 VSS VSS
101 249 57 56 C822 C823 C825 C824
CB2_NC DQ58 M_B_DQ59 4,9 VSS VSS
105 250 51 52
CB3_NC DQ59 M_B_DQ62 4,9 VSS VSS
88 232 C230 C821 47 48 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
CB4_NC DQ60 M_B_DQ56 4,9 VSS VSS
87 233 43 44
CB5_NC DQ61 M_B_DQ57 4,9 VSS VSS
100 245 0.1u_16V_X7R_04 *2.2u_10V_X5R_04 39 40
CB6_NC DQ62 M_B_DQ63 4,9 VSS VSS
104 246 35 36
CB7_NC DQ63 M_B_DQ58 4,9 VSS VSS 2.5V
31 30
12 13 27 VSS VSS 26
VDDQ DM0*/DBI0* DQS0_T M_B_DQS0 4,9 VSS VSS
33 34 23 22
DM1*/DBI1* DQS1_T M_B_DQS1 4,9 VSS VSS
54 55 19 18
B DM2*/DBI2* DQS2_T M_B_DQS2 4,9 VSS VSS B
75 76 15 14
DM3*/DBI3* DQS3_T M_B_DQS3 4,9 VSS VSS
178 179 9 10 C342 C341 C314 C315
DM4*/DBI4* DQS4_T M_B_DQS4 4,9 VSS VSS
199 200 5 6
DM5*/DBI5* DQS5_T M_B_DQS5 4,9 VSS VSS
220 221 W> d, Wt/d,/EϮϬϬD/>^ 1 2 10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04
DM6*/DBI6* DQS6_T M_B_DQS6 4,9 &ZKD d, ^K/DDͲϭ VSS VSS
241 242
DM7*/DBI7* DQS7_T M_B_DQS7 4,9
96 97
DM8*/DBI8* DQS8_T DDR4_DRAMRST#
11
DQS0_C M_B_DQS#0 4,9 D4AR0-26001-1P40 VTT_MEM
32 C684
DQS1_C M_B_DQS#1 4,9
53
DQS2_C M_B_DQS#2 4,9
74 *0.1u_10V_X7R_04
DQS3_C M_B_DQS#3 4,9
177
DQS4_C M_B_DQS#4 4,9
198 C297 C271
DQS5_C M_B_DQS#5 4,9
219
DQS6_C M_B_DQS#6 4,9
240 10u_6.3V_X5R_06 1u_6.3V_X5R_04
DQS7_C M_B_DQS#7 4,9
95
162 DQS8_C
165 S2*/C0
S3*/C1
D4AR0-26001-1P40
A A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
7,8,9,47 2.5V
[10] DDR4 CHB SO-DIMM_1
5,7,8,9,18,44 VDDQ
Size Document Number Rev
7,8,9,44
7,8,9,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51
VTT_MEM
3.3VS A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 10 of 69
5 4 3 2 1
DDR4 CHB SO-DIMM_1 B - 11
Schematic Diagrams
Panel, Inverter, CRT
5 4 3 2 1
PANEL CONNECTOR (For coaxial cable) PANEL POWER
PJ45
*OPEN_2A
2 1
PLVDD
Q49A
VIN MTS3572G6 VLED
R927 4 3
S2 D2
D D
Q6 10K_04 C564 C565
G2
2SK3018S3 C554
FRAME_LOCK#_R
0.1u_50V_Y5V_06
0.1u_50V_Y5V_06
S D 0.22u_50V_Y5V_06
15 FRAME_LOCK#
5
R534
R54 4.7K_06
G
R563
3.3VS R928 *10K_04 *100K_04
R562 150K_1%_04
VGA_ENAVDD 100K_04
B.Schematic Diagrams
R564 3.3V
100K_04
VLED
6
2A R58 *10K_04 R535
PLVDD
Q49B
D1
BRIGHTNESS_R R521 *10mil_short_04 MTS3572G6 10K_04
VGA_BKLPW M 15 VGA_ENAVDD
5VS PJ46 1
Sheet 11 of 69 G1
6
R561 C563 C562 D
S1
R950 100K_04 1 2 Q50A
*4.7K_06 0.01u_50V_X7R_04 0.1u_50V_Y5V_06 LVDD_EN# 2G MTDK5S6R
2
*3mm S
Panel, Inverter,
1
3
D
NV3V3 PJ47 Q50B
5G MTDK5S6R
C 1 2 S C
CRT
4
*3mm
3.3VS
PLVDD PLVDD
PJ54 PANEL_PW R
3.3VS U6
1 2
2A 5 1 >80 mil
VIN VOUT
C
A
R59 3mm C42 4
VIN/SS
DEFAULT 1u_6.3V_X5R_04 C58 C59 C916
R79 *1K_04 3 2
1K_04 EN GND *1u_6.3V_X5R_04 *22u_6.3V_X5R_06
AC
HPD_L UP7553PMA5-25 10u_6.3V_X5R_06
EDP_HPD 15
D9 R55
*BAV99 RECTIFIER VGA_ENAVDD 6-02-07553-9C0
15 VGA_ENAVDD
R81 C90 R80 100K_04
*100K_04 *220p_50V_X7R_04 *100K_1%_04 㬌
㕁嘇 䁢3A , ⤪ 䓐 2nd source㗪 天 㲐 シㅱ䓐
1/30
PLVDD
2A 1
2
J_EDP1
1
2
eDP
3
B 4 3 B
1A 5 4
PANEL_PW R 5
6
7 6 3.3V
8 7
9 8
R53 1K_04 GSYNC 10 9 3.3V
16 GSYNC_ID 10
11 GND5 R65 100K_04
FRAME_LOCK#_R 12 11 GND5 GND4 U8C
14
13 12 GND4 GND3 74LVC08APW U8B
14
14 13 GND3 GND2 9 74LVC08APW
14 GND2 30 BKL_EN
15 GND1 8 BLON1 4
16 15 GND1 10 6 3.3V
16 15 VGA_BKLTEN
17 5
18 17 R78 100K_04
7
C57 0.1u_10V_X7R_04 DRX0# 19 18 U8A
14
15 DP_TXN0
7
C56 0.1u_10V_X7R_04 DRX0 20 19 74LVC08APW
15 DP_TXP0 20
21 BLON2 1
C55 0.1u_10V_X7R_04 DRX1# 22 21 3 INV_BLON
15 DP_TXN1 22 16 SB_BLON LID_SW #1
C54 0.1u_10V_X7R_04 DRX1 23 2
15 DP_TXP1 23 3.3V
24 R66 *100K_04
C53 0.1u_10V_X7R_04 DRX2# 25 24 U8D R67
14
15 DP_TXN2
7
C52 0.1u_10V_X7R_04 DRX2 26 25 74LVC08APW C78
15 DP_TXP2 26
27 12 100K_04 0.1u_10V_X7R_04
27 30,33 LID_SW #
C51 0.1u_10V_X7R_04 DRX3# 28 11
15 DP_TXN3 28
C50 0.1u_10V_X7R_04 DRX3 29 13
15 DP_TXP3 29 21,30 ALL_SYS_PW RGD
30
C48 0.1u_10V_X7R_04 DAUX# 31 30
15 DP_AUX#
7
C49 0.1u_10V_X7R_04 DAUX 32 31
A 15 DP_AUX 32 A
GSYNC 33
R57 *100K_04 BRIGHTNESS_R 34 33
R56 *100K_04 INV_BLON 35 34
PANEL_PW R HPD_L 35
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
36
37 36
38 37
39 38 Title
VLED 40 39
40 12,13,14,36,47 NV3V3 [11] PANEL,INVERTER,CRT
15,29,30,43,44,45,46,47,48,49,50,51,52 VIN
LVDFH-04008-TP00+ Size Document Number Rev
PCB Footprint = lvdfh-04008-tp
14,15,16,27,29,30,32,34,44,46,47
2,15,17,24,25,27,38,42,43,44,46,47,51
5VS
3.3V A3 SCHEMATIC1 6-71-P77F0-D02 2.0
7,8,9,10,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51 3.3VS
Date: W ednesday, October 25, 2017 Sheet 11 of 69
5 4 3 2 1
B - 12 Panel, Inverter, CRT
Schematic Diagrams
Display Port A
5 4 3 2 1
DISPLAY PORT A
3.3VS_FUSE
U2
NV3V3 3 1
OC# VOUT
5 C25
VIN
D 4 2 10u_6.3V_X5R_06 D
14,15,44,46,51 SUSB EN# GND
C24
UP7549UMA5-20
*10u_6.3V_X5R_06 PCB Footprint = M-SOT23-5A
L27
HCB1005KF-121T20
R569 1K_04 . DPA_DHPD_R
36 DP_A_HPD
B.Schematic Diagrams
AC
C566
R570 D41 3.3VS_FUSE
BAV99 RECTIFIER 220p_50V_NPO_04
3
*100K_1%_04
PLEASE CLOSE TO CONNECTOR D39 GND1 3.3VS_FUSE
C
3.3VS_FUSE BAT54CW (lision) GND2
Sheet 12 of 69
1 A
2 A
PWR 20
R36 0_04 Close to Display PORT 20
GND 19
Display Port A
19
LP8 2 1 18 AUX_CHN
36 DP_A#3 D_DP_A#3 36 OUT1_AUXn_SDA 18
C22 0.1u_10V_X7R_04
D_DP_A3 36 OUT1_AUXp_SCL D_DP_A#2J 17
3 4 C21 0.1u_10V_X7R_04 17 LANE_2N AUX_CHP 16 OUT1_AUXp_SCL
36 DP_A3 D_DP_A2J 16
*DVI2012F2SF-900T05_08 15 LANE_2P
15
C R35 0_04 14
GND 14 C
13
GND 13
R34 0_04 D_DP_A#3J 12 LANE_3N
12
LP7 2 1 D_DP_A3J 10 LANE_3P LANE_1N 11 D_DP_A#1J
36 DP_A#2 D_DP_A#2 11
C20 0.1u_10V_X7R_04 10
3 4 C19 0.1u_10V_X7R_04 D_DP_A2 D_DP_A1J 9 LANE_1P
36 DP_A2 9
*DVI2012F2SF-900T05_08 7 GND 8
GND 8
R33 0_04 7
G_DPA_CEC 6 CONFIG2
6
R32 0_04 G_DPA_MODE 4 CONFIG1 LANE_0N 5 D_DP_A#0J
36 G_DPA_MODE 5
LP6 2 1
36 DP_A#1 D_DP_A#1 D_DP_A0J 4
C18 0.1u_10V_X7R_04 3 LANE_0P
3
3 4 C17 0.1u_10V_X7R_04 D_DP_A1 1 GND HPD 2 DPA_DHPD_R
36 DP_A1 2
*DVI2012F2SF-900T05_08 R509 1
R31 0_04 6-20-42K00-210
1M_04 J_DP1
R30 0_04 C17714-101 GND3
LP5 2 1 GND4
36 DP_A#0 D_DP_A#0
C16 0.1u_10V_X7R_04
3 4 C15 0.1u_10V_X7R_04 D_DP_A0 GND
36 DP_A0
*DVI2012F2SF-900T05_08
R29 0_04 GND
inductor for EMI USB ESD ⎗
䔁
枸
暨
⃰ᶵ ᶲ,NET ⎗ S W I T
CH
B D5 B
D_DP_A0 6 5 D_DP_A0J
D_DP_A#0 7 4 D_DP_A#0J
8 3
D_DP_A1 9 2 D_DP_A1J
D_DP_A#1 10 1 D_DP_A#1J
DT1140-04LP-7
D6
D_DP_A2 6 5 D_DP_A2J
D_DP_A#2 7 4 D_DP_A#2J
8 3
D_DP_A3 9 2 D_DP_A3J
D_DP_A#3 10 1 D_DP_A#3J
DT1140-04LP-7
A A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[12] DISPLAY PORTA
7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51 3.3VS Size Document Number Rev
11,13,14,36,47
13
NV3V3
3.3VS_FUSE A3
6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 12 of 69
5 4 3 2 1
Display Port A B - 13
Schematic Diagrams
Display Port B
5 4 3 2 1
DISPLAY PORT B
PLEASE CLOSE TO CONNECTOR
D R14 1K_04 R963 0_04 DPB_DHPD_R D
15 DP_B_HPD
AC
C4
R13 D1 3.3VS_FUSE
BAV99 RECTIFIER 220p_50V_NPO_04
*100K_1%_04
3
D40 GND1 3.3VS_FUSE
C
BAT54CW (lision) GND2
3.3VS_FUSE
1 A
2 A
20
PWR 20
19
GND 19
DPB_AUX#_R
B.Schematic Diagrams
18 AUX_CHN
18
DPB_AUX_R
R28 0_04 Close to Display PORT D_DP_B#2J 17 LANE_2N
16
17
AUX_CHP 16 DPB_AUX_R
LP4 4 3 D_DP_B2J 15 LANE_2P
15 DP_B#3 D_DP_B#3 15
C14 0.1u_10V_X7R_04 14
GND 14
1 2 C13 0.1u_10V_X7R_04 D_DP_B3 GND 13
15 DP_B3 D_DP_B#3J 13
*DVI2012F2SF-900T05_08 12 LANE_3N
12
R27 0_04 D_DP_B3J 10 LANE_3P LANE_1N 11 D_DP_B#1J
11
Sheet 13 of 69
10
R26 0_04 D_DP_B1J 9 LANE_1P 9
LP3 4 3 7 GND GND 8
15 DP_B#2 D_DP_B#2 8
C12 0.1u_10V_X7R_04 7
1 2 C11 0.1u_10V_X7R_04 D_DP_B2 G_DPB_CEC 6 CONFIG2
Display Port B 15 DP_B2 6
*DVI2012F2SF-900T05_08 G_DPB_MODE 4 CONFIG1 LANE_0N 5 D_DP_B#0J
5
R25 0_04 4
R496 D_DP_B0J 3 LANE_0P
3
C R24 0_04 1 GND HPD 2 DPB_DHPD_R C
2
LP2 4 3 1M_04
15 DP_B#1 D_DP_B#1 1
C10 0.1u_10V_X7R_04 6-20-42K00-210
1 2 C9 0.1u_10V_X7R_04 D_DP_B1 J_DP2
15 DP_B1
*DVI2012F2SF-900T05_08 C17714-101 GND3
R23 0_04 GND4
R22 0_04 GND
LP1 4 3
15 DP_B#0 D_DP_B#0
C8 0.1u_10V_X7R_04 GND
1 2 C7 0.1u_10V_X7R_04 D_DP_B0
15 DP_B0
*DVI2012F2SF-900T05_08
R21 0_04
inductor for EMI
USB ESD ⎗
䔁
枸
暨⃰ᶵ ᶲ,NET ⎗ S W I T
CH
D4
B C511 B
G2
NV3V3 D_DP_B#3J 6 5 D_DP_B#3
G
0.01u_16V_X7R_04 D_DP_B3J 7 4 D_DP_B3
6 1 4 3 8 3
D_DP_B#2J 9 2 D_DP_B#2
D_DP_B2J D_DP_B2
S
R513 10 1
D
Q39A Q39B
MTDK5S6R MTDK5S6R 100K_1%_04
DT1140-04LP-7
C514 0.1u_10V_X7R_04 DPB_AUX#_R
15 DP_B_AUX#
D3
R494 NV3V3 D_DP_B#1J 6 5 D_DP_B#1
D_DP_B1J 7 4 D_DP_B1
*100K_1%_04 8 3
D_DP_B#0J 9 2 D_DP_B#0
R497 NV3V3 D_DP_B0J 10 1 D_DP_B0
C482
G2
10K_04
G
0.01u_16V_X7R_04 DT1140-04LP-7
6 1 4 3 R510
6
S
D 10K_04
D
Q40A Q40B Q41A
MTDK5S6R MTDK5S6R MTDK5S6R G2
S
3
C515 0.1u_10V_X7R_04 DPB_AUX_R D
15 DP_B_AUX
Q41B
MTDK5S6R G5 G_DPB_MODE
A A
R495 R514 S
4
*100K_1%_04 100K_1%_04
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
11,12,14,36,47 NV3V3
[13] DISPLAY PORTB
12 3.3VS_FUSE Size Document Number Rev
7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51 3.3VS
A3
6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 13 of 69
5 4 3 2 1
B - 14 Display Port B
Schematic Diagrams
HDMI
5 4 3 2 1
HDMI CONNECTOR
FOR NV
L26 HDMI_5VS_A
HCB1005KF-121T20
. R486 1K_04 HDMI_HPD-C
For ESD
C481
C
A
A
HDMI_5VS J_HDMI1 220p_50V_NPO_04
D 5VS 3
U5
1
C12822-11908-L D
OC# VOUT D37 D38 D36
AC
AC
AC
22u_6.3V_X5R_08
22u_6.3V_X5R_08
5 C34 C35 BAV99 RECTIFIER BAV99 RECTIFIER
VIN BAV99 RECTIFIER
4 2
12,15,44,46,51 SUSB EN# GND HDMI_HPD-E HDMI_SCL-C
19
uP7549UMA5-20 18 HOT PLUG DETECT
PCB Footprint = M-SOT23-5A +5V 17 HDMI_SDA-C
HDMI_SDA-C 16 DDC/CEC GND
SDA 15 HDMI_SCL-C HDMI_HPD-C
14 SCL
R52 499_1%_04 RESERVED 13 HDMI_CEC
TMDS_CLOCK#-R TMDS_CLOCK#J R48 6.04_1%_04 TMDS_CLOCK#R 12 CEC
TMDS CLOCK-
B.Schematic Diagrams
11
TMDS_CLOCK-R TMDS_CLOCKJ R47 6.04_1%_04 TMDS_CLOCKR 10 CLK SHIELD R44 499_1%_04
R51 499_1%_04 TMDS CLOCK+ 9 TMDS_DATA0#L R46 6.04_1%_04 TMDS_DATA0#J TMDS_DATA0#-R
8 TMDS DATA0-
R38 499_1%_04 SHIELD0 7 TMDS_DATA0L R45 6.04_1%_04 TMDS_DATA0J TMDS_DATA0-R
TMDS_DATA1#-R TMDS_DATA1#J R42 6.04_1%_04 TMDS_DATA1#R 6 TMDS DATA0+ R43 499_1%_04
TMDS DATA1- 5
TMDS_DATA1-R TMDS_DATA1J R41 6.04_1%_04 TMDS_DATA1R 4 SHIELD1 R39 499_1%_04
Sheet 14 of 69
R37 499_1%_04 TMDS DATA1+ 3 TMDS_DATA2#L R40 6.04_1%_04 TMDS_DATA2#J TMDS_DATA2#-R
2 TMDS DATA2-
SHIELD2 1 TMDS_DATA2L R16 6.04_1%_04 TMDS_DATA2J TMDS_DATA2-R
TMDS DATA2+ R15 499_1%_04
GND_HDMI HDMI
GND2 G1
GND3 G2
GND4 G3
G4
D
5VS
C Q5
GND GND
GND_HDMI C
GND1
2SK3018S3 G PIN GND1~4=GND
6-21-14200-019
S
R50
1M_04
GND
HDMI_5VS TMDS_CLOCK#R TMDS_DATA0#L
R966 *180_1%_04 R964 *180_1%_04
A
D2 TMDS_CLOCKR TMDS_DATA0L
RB551V-30S2
TMDS_DATA1#R TMDS_DATA2#L
C
NV3V3 HDMI_5VS_A R967 *180_1%_04 R965 *180_1%_04
TMDS_DATA1R TMDS_DATA2L
R7 R18 BY PLATEFORM ℞ ῤ
㔜
婧
R8 R19
2K_04 2K_04
G
10K_04 10K_04 Q1
S D R6 33_04 HDMI_SDA-C
15 HDMI_CTRLDATA
G
Q4 2SK3018S3
B 3.3VS B
S D R17 33_04 HDMI_SCL-C
15 HDMI_CTRLCLK
SCL/SDA 暨 䪗)
PULL HIGH (CHECK PCH 2SK3018S3 FOR NV
R489 USB ESD ⎗
䔁
枸
暨
⃰ᶵ ᶲ
,NET ⎗ S W I T
CH
1M_04 D8
G
TMDS_DATA0-R 6 5 TMDS_DATA0J
S D HDMI_HPD-C TMDS_DATA0#-R 7 4 TMDS_DATA0#J
15 HDMI_HPD
8 3
C23 0.1u_10V_X7R_04 TMDS_DATA2-R TMDS_CLOCK-R 9 2 TMDS_CLOCKJ
15 HDMI_DATA0P TMDS_DATA2#-R Q37 TMDS_CLOCK#-R TMDS_CLOCK#J
C31 0.1u_10V_X7R_04 10 1
15 HDMI_DATA0N 2SK3018S3 R490
C29 0.1u_10V_X7R_04 TMDS_DATA1-R
15 HDMI_DATA1P TMDS_DATA1#-R
C30 0.1u_10V_X7R_04 *100K_04 DT1140-04LP-7
15 HDMI_DATA1N TMDS_DATA0-R
C32 0.1u_10V_X7R_04
15 HDMI_DATA2P TMDS_DATA0#-R
C33 0.1u_10V_X7R_04 D7
15 HDMI_DATA2N
C36 0.1u_10V_X7R_04 TMDS_CLOCK-R TMDS_DATA2-R 6 5 TMDS_DATA2J
15 HDMI_CLOCKP TMDS_CLOCK#-R TMDS_DATA2#-R TMDS_DATA2#J
C37 0.1u_10V_X7R_04 7 4
15 HDMI_CLOCKN
⮵
⛘旣ῤ B Y P L A T FRO M ᾖ㬋 TMDS_DATA1-R
8 3
TMDS_DATA1J
9 2
TMDS_DATA1#-R 10 1 TMDS_DATA1#J
DT1140-04LP-7
A A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[14] HDMI
11,12,13,36,47 NV3V3
Size Document Number Rev
7,8,9,10,11,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51
11,15,16,27,29,30,32,34,44,46,47
3.3VS
5VS A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 14 of 69
5 4 3 2 1
HDMI B - 15
Schematic Diagrams
MXM PCI-E
5 4 3 2 1
VDD3 3.3VS
1V8_AON_EN 47
PWR_SRC PWR_SRC R20 *0_04
MXM 3.0 J_MXM1A C555 0.1u_16V_Y5V_04
5
E1-1 E2-1 U3 3.3VS
PW R_SRC PW R_SRC E2-2
5
E1-2 1 J_MXM1B
PW R_SRC PW R_SRC E2-3 30 DGPU_PWR_EN MXM_CLKREQ# 19
E1-3 4 1V8_AON_EN 19 CLK_PCIE_MXM# 153 154 1 PLT_RST# 16,42
E1-4 PW R_SRC PW R_SRC E2-4 2 155 PEX_REFCLK# CLK_REQ# 156 R526 *10mil_short MXM_RST# 4
PWR_SRC(10A)--7-20V E1-5 PW R_SRC PW R_SRC21,28,29,31,37,43,44,46,48
E2-5 SUSB#
R504
19 CLK_PCIE_MXM
157 PEX_REFCLK PEX_RST# 158 2
E1-6 PW R_SRC PW R_SRC E2-6 74AHC1G32GW 159 GND VGA_DDC_DAT 160
5VRUN(2.5A)--5V
3
E1-7 PW R_SRC PW R_SRC E2-7 10K_04 161 RSVD VGA_DDC_CLK 162 R525
3
E1-8 PW R_SRC PW R_SRC E2-8 163 RSVD VGA_VSYNC 164
3VRUN(1A)--3.3V E1-9 PW R_SRC PW R_SRC E2-9 165 RSVD VGA_HSYNC 166 100K_04 U38
E1-10 PW R_SRC PW R_SRC E2-10 167 RSVD GND 168 U74AHC1G08G-AL5-R
D
PCH CONTROL D
D
E3-1 PW R_SRC PW R_SRC E4-1 R10 *0_04 Q2 LVDS-UCLKN 169 RSVD VGA_RED 170 R536 *0_04
GND GND E4-2 19,30 GPU_PWR_EN# LVDS_UCLK# VGA_GREEN
E3-2 LVDS-UCLKP 171 172
E3-3 GND GND E4-3 DGPU_PWR_EN# R9 *0_04 G 173 LVDS_UCLK VGA_BLUE 174
GND GND E4-4 *2SK3018S3 GND GND
E3-4 EC CONTROL 175 176 LVDS-LCLKN EC CONTROL
S
E3-5 GND GND E4-5 177 LVDS_UTX3# LVDS_LCLK# 178 LVDS-LCLKP
GND GND E4-6 LVDS_UTX3 LVDS_LCLK DGPU_RST# 30
E3-6 179 180
E3-7 GND GND E4-7 R499 47K_04 LVDS-U2N 181 GND GND 182 R600 0_04
GND GND E4-8 3V3_RUN LVDS_UTX2# LVDS_LTX3# DGPU_RST#_PCH 19
戭㞙ᶲẞ 5V_RUN E3-8
GND GND E4-9
R503 LVDS-U2P 183
LVDS_UTX2 LVDS_LTX3
184 PCH CONTROL
H32 H31 E3-9 *10mil_short 185 186 VDD3
DGPU_PRSNT# 19
MXM 3.0 MODULE BOARD CONNECTOR
MXM 3.0 MODULE BOARD CONNECTOR
H6_0B4_0D4_0 H6_0B4_0D4_0 E3-10 GND GND E4-10 LVDS-U1N 187 GND GND 188 LVDS-L2N
1 GND GND 2 R500 0_04 LVDS-U1P 189 LVDS_UTX1# LVDS_LTX2# 190 LVDS-L2P
5V PRSNT_R# 4 NV3V3_EN 47 LVDS_UTX1 LVDS_LTX2
3 R502 0_04 191 192
5V W AKE# 6 DGPU_PWRGD_VGA R501 DGPU_PWRGD 15,17,30 GND GND
5 *10K_04 LVDS-U0N 193 194 LVDS-L1N R4
7 5V PW R_GOOD 8 MXM_PWR_EN 3V3_RUN 195 LVDS_UTX0# LVDS_LTX1# 196
LVDS-U0P LVDS-L1P
9 5V PW R_EN 10 R522 10K_04 197 LVDS_UTX0 LVDS_LTX1 198 *10K_04
5V RSVD 12 3.3VS GND GND
Display Port C (HDMI)
11 C483 *10u_6.3V_X5R_06 199 200 LVDS-L0N
G
13 GND RSVD 14 5V_RUN 14 HDMI_DATA0N 201 DP_C_L0# LVDS_LTX0# 202 DGPU_PWR_EN#
LVDS-L0P
GND RSVD 16 14 HDMI_DATA0P DP_C_L0 LVDS_LTX0
3.3VS R516 *100K_1%_04 HDMI_CEC_MXM 15 Q42 203 204
D
GND RSVD 18 GND GND
B.Schematic Diagrams
17 S D 2SK3018S3 205 206
GND PW R_LEVEL 20 14 HDMI_DATA1N DP_C_L1# DP_D_L0# DP_TXN0 11
0_04 PEX_STD_SW#1
Display Port D (eDP)
R515 19 207 208 Q3
PEX_STD_SW # TH_OVERT# 22 TH_OVERT#1 17,30 14 HDMI_DATA1P DP_C_L1 DP_D_L0 DP_TXP0 11
R520 *0_04 MXM_VGA_DISABLE# 21 R505 100K_1%_04 209 210 DGPU_PWR_EN G
*2SK3018S3 C3
23 VGA_DISABLE# TH_ALERT# 24 R506 100K_1%_04 211 GND GND 212
11 VGA_ENAVDD
S
25 PNL_PW R_EN TH_PW M 26 3.3VS 14 HDMI_DATA2N 213 DP_C_L2# DP_D_L1# 214 DP_TXN1 11
11 VGA_BKLTEN TH_ALERT#1 30 *0.1u_16V_Y5V_04
27 PNL_BL_EN GPIO0 28 14 HDMI_DATA2P 215 DP_C_L2 DP_D_L1 216 DP_TXP1 11
11 VGA_BKLPWM R11
R523 100K_1%_04 HDMI_CEC_MXM29 PNL_BL_PW M GPIO1 30 217 GND GND 218
3.3VS HDMI_CEC GPIO2 32 SMD_VGA_THERM_R R507 14 HDMI_CLOCKN DP_C_L3# DP_D_L2# DP_TXN2 11
31 100K_1%_04 219 220 *100K_04
LVDS_DDC_DATA 33 DVI_HPD SMB_DAT 34 SMC_VGA_THERM_R R508 3.3VS 14 HDMI_CLOCKP 221 DP_C_L3 DP_D_L2 222 DP_TXP2 11
100K_1%_04
LVDS_DDC_CLK 35 LVDS_DDC_DAT SMB_CLK 36 R866 *100K_04 223 GND GND 224
Sheet 15 of 69 3.3VS 37 LVDS_DDC_CLK GND 38 NV_SUSB# 3.3VS 14 HDMI_CTRLDATA 225 DP_C_AUX# DP_D_L3# 226 DP_TXN3 11
C R780 *100K_04 C
GND OEM 40 14 HDMI_CTRLCLK DP_C_AUX DP_D_L3 DP_TXP3 11
R518 4.3K_1%_04 39 227 228
41 OEM OEM 42 GPU_EVENT# R49 NV_MXM_ID 30 229 RSVD GND 230
R517 4.3K_1%_04 0_04 GPU_EVENT#_R 17 DP_AUX# 11
R524 0_04 GC6_FB_EN_R 43 OEM
OEM
OEM 44
OEM 46
1V8_AON_EN 3.3VS 3.3V_ON 231 RSVD
RSVD
DP_D_AUX#
DP_D_AUX
232
DP_AUX 11 3V3_RUN
MXM PCI-e 11 FRAME_LOCK#
45
47 OEM
GND
GND 48
PEX_TX15# 50 PEG_TX#15 2
233
235 RSVD
RSVD
DP_C_HPD
DP_D_HPD
234
236 HDMI_HPD
EDP_HPD
14
11
5
49 PEG_TX15 2 U37 237 238 3.3VS 3V3_RUN
2 PEG_RX#15 PEX_RX15# PEX_TX15 52 RSVD RSVD
51 1 239 240 R511 *0_04 PJ48
2 PEG_RX15 PEX_RX15 GND 54 AC/BATL# 52 RSVD RSVD 3V3_RUN
GC6_FB_EN 53 4 241 242 R512 *0_04 OPEN-2mm
55 GND PEX_TX14# 56 PEG_TX#14 2
2 3V3_RUN 243 RSVD RSVD 244
2A 1 2
2A
2 PEG_RX#14 PEX_RX14# PEX_TX14 58 PEG_TX14 2 VGA_THROTTLE 30 RSVD GND
Display Port B (DP)
57 245 246
2 PEG_RX14 PEX_RX14 GND 60 RSVD DP_B_L0# DP_B#0 13
59
PEG_TX#13 2 74AHC1G32GW R873 *10K_04 247 248
DP_B0 13 DEFAULT
3
61 GND PEX_TX13# 62 R874 0_04 249 RSVD DP_B_L0 250
2 PEG_RX#13 PEX_RX13# PEX_TX13 64 PEG_TX13 2 15,17,30 DGPU_PWRGD RSVD GND
63 251 252
2 PEG_RX13 PEX_RX13 GND 66 GND DP_B_L1# DP_B#1 13
Display Port A (DP)
65 253 254
PEG_TX#12 2 36 MUX_0N DP_B1 13
2
2
PEG_RX#12
PEG_RX12
67
69
71
GND
PEX_RX12#
PEX_RX12
PEX_TX12# 68
PEX_TX12 70
GND 72
PEG_TX12 2 5V_RUN
36 MUX_0P
255
257
259
DP_A_L0#
DP_A_L0
GND
DP_B_L1
GND
DP_B_L2#
256
258
260 DP_B#2 13
5VS
5V_RUN 5V_RUN
GND PEX_TX11# 74 PEG_TX#11 2 36 MUX_1N DP_A_L1# DP_B_L2 DP_B2 13
73 PEG_TX11 2 261 262 PJ49
2 PEG_RX#11 PEX_RX11# PEX_TX11 76 36 MUX_1P DP_A_L1 GND
75 C520 C519 263 264 *OPEN-3mm
2 PEG_RX11
77
79
PEX_RX11
GND
GND 78
PEX_TX10# 80 PEG_TX#10 2 36 MUX_2N
265
267
GND
DP_A_L2#
DP_B_L3#
DP_B_L3
266
268
DP_B#3
DP_B3
13
13
2A 1 2 2A
2 PEG_RX#10 PEG_TX10 2 22u_6.3V_X5R_08 *22u_6.3V_X5R_08
81 PEX_RX10# PEX_TX10 82 36 MUX_2P 269 DP_A_L2 GND 270
2 PEG_RX10 PEX_RX10 GND 84 GND DP_B_AUX# DP_B_AUX# 13
83 271 272
GND PEX_TX9# 86 PEG_TX#9 2 36 MUX_3N DP_A_L3# DP_B_AUX DP_B_AUX 13
85 PEG_TX9 2 273 274 5V
2 PEG_RX#9 PEX_RX9# PEX_TX9 88 36 MUX_3P DP_A_L3 DP_B_HPD DP_B_HPD 13
87 CLOSE TO MXM CONN. 275 276 PJ55
2 PEG_RX9 PEX_RX9 GND 90 GND DP_A_HPD MUX_HPD 36
89 277 278 *OPEN-3mm
2 PEG_RX#8
91
93
GND
PEX_RX8#
PEX_TX8# 92
PEX_TX8 94
PEG_TX#8
PEG_TX8 2
2 36
36
MUX_AUXN_DDC_SDA
MUX_AUXP_DDC_SCL
279
281
DP_A_AUX#
DP_A_AUX
3V3
3V3
280
3V3_RUN
2A 1 2 2A
2 PEG_RX8 PEX_RX8 GND 96 PRSNT_L#
B 95 3V3_RUN B
GND PEX_TX7# 98 PEG_TX#7 2
97 PEG_TX7 2 91782-3140M-NV-01
2 PEG_RX#7 PEX_RX7# PEX_TX7 100
99 VIN
2 PEG_RX7 PEX_RX7 GND 102
101 PWR_SRC 3.3VS 3.3VS
GND PEX_TX6# 104 PEG_TX#6 2
103 C512 C516
2 PEG_RX#6
105 PEX_RX6# PEX_TX6 106 PEG_TX6 2
C908 *22u_25V_X5R_12
14A
2 PEG_RX6 PEX_RX6 GND 108
107 4.7u_25V_X5R_08 *4.7u_25V_X5R_08 8 5VS
GND PEX_TX5# 110 PEG_TX#5 2
109 3 7 R491 R492
2 PEG_RX#5
111 PEX_RX5# PEX_TX5 112 PEG_TX5 2 14A 2 6
2 PEG_RX5 PEX_RX5 GND 114
5
113 1 5 R533 R519 5VS Q38B 2.2K_04 2.2K_04
G
GND PEX_TX4# 116 PEG_TX#4 2
115 PEG_TX4 2 CLOSE TO MXM CONN. C561
2 PEG_RX#4 PEX_RX4# PEX_TX4 118 SMD_VGA_THERM_R
117 *0.01u_50V_X7R_04 Q45 20K_06 *100K_04 4 3
2 PEG_RX4 SMD_VGA_THERM 28,30,32
4
119 PEX_RX4 GND 120 MEP4435Q8
GND PEX_TX3# 122 PEG_TX#3 2
D
121 8 MTDK5S6R
G
2 PEG_RX#3 PEX_RX3# PEX_TX3 124 PEG_TX3 2
123 VDD3 3 7
2 PEG_RX3 PEX_RX3 GND 134 SMC_VGA_THERM_R 1
125 R559 2 6 6
GND GND 136 SMC_VGA_THERM 28,30,32
133 100K_04 1 5
GND PEX_TX2# 138 PEG_TX#2 2
D
135 PEG_TX2 2 R875 10K_04 R876 0_04 5V R532 MTDK5S6R
2 PEG_RX#2 PEX_RX2# PEX_TX2 140 Q38A
137 20K_04 Q46
2 PEG_RX2
D
4
PEX_RX2 GND 142
139
141 GND PEX_TX1# 144 PEG_TX#1 2 Q62 MEP4435Q8 Battery mode㗪
ⷞ暣 ㍺ ㉼ LCD c a b l e
,性 an
dVG A
Q48
2 PEG_RX#1
143 PEX_RX1# PEX_TX1 146 PEG_TX1 2 1V8_AON_ENG
2SK3018S3 G 2SK3018S3
card ἄ
㤕 ,⭡
㖻 䅺 ⢆ MX MVG A ⌉ .
2 PEG_RX1 PEX_RX1 GND 148
145 R560
PEG_TX#0 2
S
GND PEX_TX0# 150
3
147 PEG_TX0 2 10K_04 D 3.3V
2 PEG_RX#0 PEX_RX0# PEX_TX0 152
149 Q47B
2 PEG_RX0 PEX_RX0 GND 47 5V_RUN
151 5G MTDK5S6R
GND S 47 3.3V_ON
2,11,17,24,25,27,38,42,43,44,46,47,51 3.3V
4
6
91782-3140M-NV-01 DGPU_PWR_EN# R3 *0_04 D R877 PWR_SRC
21,24,27,39,40,43,44,46,47,49,50,51 5V
Q47A
2G 16,17,18,20,21,25,26,30,31,33,35,43,45,46,47,51,52 VDD3
A R2 *0_04 MTDK5S6R *10K_04 J_DC1 A
12,14,44,46,51 SUSB S NV_SUSB# 11,14,16,27,29,30,32,34,44,46,47 5VS
R879
11,29,30,43,44,45,46,47,48,49,50,51,52 VIN
1
R878 *0_04 1
24,27,46 DD_ON# 2 7,8,9,10,11,14,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51 3.3VS
6
10K_04 D
PWR_SRC PWR_SRC PWR_SRC Q63A 3
4 FOR GXX
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
2G MTDK5S6R 5
S 775DM only
1
6
1
3
D
C558 C559 C518 C541 C560 C517 C557 + PC199 + PC200 + PC198 C904 C905 C906 Q63B 7 Title
10u_25V_X5R_08 4.7u_25V_X5R_08 0.1u_50V_Y5V_06 EEEFZ1E101P EEEFZ1E101P 22u_25V_X5R_12 22u_25V_X5R_12
SUSB# 5G
S
MTDK5S6R
8
9 CABLE_DET 30
[15] MXM PCI-E
2
4
4.7u_25V_X5R_08 10u_25V_X5R_08 0.1u_50V_Y5V_06 0.01u_50V_X7R_04 EEEFZ1E101P 22u_25V_X5R_12 Size Document Number Rev
50299-00901-004
P/N = ?
Custom SCHEMATIC1 6-71-P77F0-D02 2.0
CLOSE TO MXM PIN E1
Date: Monday, August 28, 2017 Sheet 15 of 69
5 4 3 2 1
B - 16 MXM PCI-E
Schematic Diagrams
Lynix Point 1/7
5 4 3 2 1
VCCPGPPA
Lynx Point - M (SPI,GPP)
U17A
C640 0.1u_10V_X7R_04
3.3VS
U7E1
5
R215 10K_04 PME# BF15 BD24 PLT_RST#
GPP_A11/PME# GPP_B13/PLTRST# PLT_RST# 15,42
1
AH16 TBT_FRC_PW R 4
PCH_SPI_IO3 RSVD_18 T43 TBT_FRC_PW R 37 PLT_RST# BUF_PLT_RST# 25,26,30,31,35,37,41
R700 1K_04 AH14 GPP_G16/GSXCLK TBCIO_PLUG_EVENT 2
RSVD_19 AC39
AG17 GPP_G12/GSXDOUT TBCIO_PLUG_EVENT 37
RSVD_20 Y36
AF17 GPP_G13/GSXSLOAD U47 R189
Y43
3
RSVD_21
D
婳㬋側䔲 AU19
TP2
GPP_G14/GSXDIN
GPP_G15/GSXSRESET#
U44
U74AHC1G08G-AL5-R
100K_04 D
AP17
Co_Lay TP1
AP41 EXTTS_SNI_DRV0_PCH
SSPI_SI R194 *20mil_04 SPI_MOSI BF27 GPP_E3/CPU_GP0
SSPI_SO SPI_MISO BE27 SPI0_MOSI AK43 TCH_PNL_INTR_N DESIGN NOTE:
R193 *20mil_04 GPP_E7/CPU_GP1
SSPI_CS0# SPI_CS_0# SPI0_MISO BF21
R188 *20mil_04 BF28 GPP_B3/CPU_GP2 EXTTS_SNI_DRV1_PCH ESPI FLASH SHARING MODE
SSPI_SCLK SPI_SCLK_R SPI0_CS0# BF22 0: MASTER ATTACHED FLASH SHARING
R184 *20mil_04 BE29 GPP_B4/CPU_GP3
SPI_CS_1# SPI0_CLK 1: SLAVE ATTACEHD FLASH SHARING
BA27 PCH HAS INTERNAL WEAK PD
SPI0_CS1# BF34
SSPI_W P#0 R196 33_04 PCH_SPI_IO2 BF26 GPP_H18/SML4ALERT# BF32 M.2_W IGIG_RST_R
SSPI_HOLD#0 R185 33_04 PCH_SPI_IO3 BD27 SPI0_IO2 GPP_H17/SML4DATA BD36 M.2_W IGIG_W AKE_R_N
SPI0_IO3 GPP_H16/SML4CLK 3.3VS
AY27 BD33
SPI0_CS2# GPP_H15/SML3ALERT# AV31
AY39 GPP_H14/SML3DATA EXTTS_SNI_DRV0_PCH R679 8.2K_04
3.3VA R703 *10K_04 SPI_CS_2# GPP_D1/SPI1_CLK BE33 TCH_PNL_INTR_N
AV41 GPP_H13/SML3CLK GPP_H_12 R162 10K_04
GPP_D0/SPI1_CS# BF33 EXTTS_SNI_DRV1_PCH R206
AV43 GPP_H12/SML2ALERT# 8.2K_04
GPP_D3/SPI1_MOSI AU31
R919 *0_04 BB44 GPP_H11/SML2DATA TP_GPP_H_10_SML2CLK
30,39,40 TBTA_HRESET GPP_D2/SPI1_MISO BE32
R920 *0_04 AM42 GPP_H10/SML2CLK
30,39,40 TBTA_MRESET SPI1_TCHPNL_IO2 GPP_D22/SPI1_IO3 SM_INTRUDER#
B.Schematic Diagrams
AM44 BF9 R216 1M_04 RTCVCC
R698 *10mil_short SPI_SCLK_R GPP_D21/SPI1_IO2 INTRUDER#
30 HSPI_SCLK 1 OF 13
30 HSPI_MSO R697 *10mil_short SPI_MISO DESIGN NOTE:
R699 *10mil_short SPI_MOSI KBL_PCH_H
30 HSPI_MSI SPI_CS_0# TOUCH PANEL
30 HSPI_CE# R686 *10mil_short REV = 0.7
DESIGN NOTE:
U17K
DESIGN NOTE:
JTAG ODT IS DISABLED IF LOW
LPSS_GSPI1_MOSI AR24
AP24
BF24
GPP_B22/GSPI1_MOSI
GPP_B21/GSPI1_MISO
U7E1
GPP_D9
AT45
AV39
TBTA_ACE_GPIO2
TBTA_ACE_GPIO3
39,40
39,40
SMB RESUME/MAIN LOGIC
5VS
R657
SMB_DATA
1K_04
18,28,34,44 Sheet 16 of 69
GPP_D10 AT38 3.3VA
D
GPP_B20/GSPI1_CLK
Lynix Point 1/7
C PCH HAS INTERNAL WEAK PU 28 PCM_INT_1863 BF25 TBTA_ACE_GPIO0 39,40 3.3VA C
GPP_D11 AT41
GPP_B19/GSPI1_CS# TPM_DET# 42 Q56
LPSS_GSPI0_MOSI BE26 GPP_D12
GPP_B18/GSPI0_MOSI R641 G 2SK3018S3
BG25 AT39
25 LPSS_GSPI0_MISO GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS# R637 1K_04 3.3VS
AY24 AT44
S
GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS# R643 1K_04
AV22 AP43 GSYNC_ID
GPP_B15/GSPI0_CS# GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C2_SCL AP44
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C2_SDA 1K_04
BG39 SMB_DATA_MAIN 7,8,9,10
BA39 GPP_C9/UART0_TXD SMB_CLK 18,28,34,44
3
GPP_C8/UART0_RXD D
BC45
GPP_C11/UART0_CTS# R658 1K_04 3.3VA
BF39
D
GPP_C10/UART0_RTS# 5G
S Q57
BA35 BE36
4
6
GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H20/ISH_I2C0_SCL D Q55B G 2SK3018S3
BA45 AY31
GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_H19/ISH_I2C0_SDA SATA_PW R_EN2 51 Q55A MTDK5S6R R642 1K_04 3.3VS
BA44
S
GPP_C13/UART1_TXD/ISH_UART1_TXD 2G MTDK5S6R
BB45 BF36 17,18,21,30 PM_PCH_PW ROK S
GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL BF37
1
DESIGN NOTE: DESIGN NOTE: AW42 GPP_H21/ISH_I2C1_SDA SMB_CLK_MAIN 7,8,9,10
AW43 GPP_C23/UART2_CTS#
BOOT HALT ENABLED IF LOW BOOT SELECT STRAP UART2_TXD BA33 GPP_C22/UART2_RTS#
PCH HAS INTERNAL WEAK PU IF SAMPLED HIGH, LPC IS SELECTED
ELSE SPI PCH HAS INTERNAL WEAK PD. UART2_RXD AY44 GPP_C21/UART2_TXD BE19 GPP_A23
GPP_C20/UART2_RXD GPP_A23/ISH_GP5 BG16 GPP_A22
AW44 GPP_A22/ISH_GP4 BF18
31 I2C1_SCL GPP_C19/I2C1_SCL GPP_A21/ISH_GP3 PS8330B_PCH 36
AY35 BF19 GPP_A20 DESIGN NOTE: DESIGN NOTE: DESIGN NOTE:
31 I2C1_SDA GPP_C18/I2C1_SDA GPP_A20/ISH_GP2
AY33 BE18 3.3VA 3.3VA 3.3VA
GPP_C17/I2C0_SCL GPP_A19/ISH_GP1 SATA_PW R_EN1 51 MB det MB det FM/FM1 det
AY45 BD19 H: L: H:P77 L:P75 H:FM1 L:FM
GPP_C16/I2C0_SDA GPP_A18/ISH_GP0 SB_BLON 11
BE17
AU44 GPP_A17/ISH_GP7
AN44 GPP_D4/ISH_I2C2_SDA/ISH_I2C3_SDA
GPP_D23/ISH_I2C2_SCL/ISH_I2C3_SCL R930 R709 R711
B 11 OF 13 B
RE RA RC
10K_04 10K_04 10K_04
KBL_PCH_H
REV = 0.7 GPP_A20 GPP_A22 GPP_A23
R929 R710 R712
RF RB RD
*10K_04 *10K_04 *10K_04
3.3VS
R82
100K_04 BOARD ID RA RB PROJECT NAME
VDD3
BIOS DEBUG PORT
ME+ BIOS ROM 8MB GSYNC_ID 11
UART2_TXD
UART2_RXD
GND
VDD3
V1.0
V1.0
10K
X
RC
X
10K
RD
P775FM
P750FM
RTC Wake UP 䄏
⍇ỵ L A Y OU T⬴,㉱⬴ 㷔溆⼴ V1.0 10K X FM1
ℵ
⇒㌱ J _ 8 0 D E B UG2 J_80DEBUG2 V1.0 X 10K FM
PJ7 OPEN-1mm SPI_* = 0.5"~2" VDD3 R869 10K_04 RE RF
2 1 UART2_TXD 1
VDD3 2
V1.0 10K X
UART2_RXD V1.0 X 10K
R868 10K_04 3
VDD3 4
DEFAULT
*85204-04001
A A
3.3V_SPI
U16
8
VDD SI
5 R692 33_04 SSPI_SI
SSPI_SO
BIOS ROM 4MB
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
2 R716 33_04
SO 2,11,15,17,24,25,27,38,42,43,44,46,47,51 3.3V
C656
3,17,18,20,21,46 3.3VA
R714 1K_1%_04 SSPI_W P#0 3 1 SSPI_CS0#
WP# CE# 11,14,15,27,29,30,32,34,44,46,47 5VS
0.1u_10V_X7R_04 Title
SCK
6 R693 33_04 SSPI_SCLK 15,17,18,20,21,25,26,30,31,33,35,43,45,46,47,51,52
7,8,9,10,11,14,15,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51
VDD3
3.3VS
[16] Lynx 1/7-SPI/GPP
18,21 RTCVCC
R694 1K_1%_04 SSPI_HOLD#0 7 4 Size Document Number Rev
HOLD#
GD25B64CSIGR
VSS 21 VCCPGPPA
A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: W ednesday, October 25, 2017 Sheet 16 of 69
5 4 3 2 1
Lynix Point 1/7 B - 17
Schematic Diagrams
Lynix Point 2/7
5 4 3 2 1
3.3VS
R155
R664
10K_04
10K_04
FB_CLAMP_PCH
DGPU_PW RGD
Lynx Point -CLINK/FAN/SATA/HOST
U17C
R149 10K_04 SCI#
R668 10K_04 GPU_EVENT#_R U7E1
GPIO2_FB_TGL_REQ_PCH 25 CL_CLK1 AU2
R154 10K_04 CL_CLK G31
PCH_RSVD 25 CL_DATA1 AU4 PCIE9_RXN/SATA0A_RXN PCIE_RXN9_SSD 26
R661 10K_04 CL_DATA H31
25 CL_RST#1 AW2 PCIE9_RXP/SATA0A_RXP PCIE_RXP9_SSD 26
CL_RST# D31 C193 0.22u_10V_X5R_04
PCIE9_TXN/SATA0A_TXN PCIE_TXN9_SSD 26
TP_GPP_G_8_PW M0 C31 C186 0.22u_10V_X5R_04
W44 PCIE9_TXP/SATA0A_TXP PCIE_TXP9_SSD 26
D TP_GPP_G_9_PW M1 Y44 GPP_G8/FAN_PWM_0 D
R662 10K_04 PCH_SATAHDD_LED# GPP_G9/FAN_PWM_1
1st M KEY NGFF
SATA_GP2 AC35 G29
R678 10K_04 TP_GPP_G_11_PW M3 GPP_G10/FAN_PWM_2 PCIE10_RXN/SATA1A_RXN PCIE_RXN10_SSD 26
SATA_GP5 AC41 E29
R659 10K_04 GPP_G11/FAN_PWM_3 PCIE10_RXP/SATA1A_RXP PCIE_RXP10_SSD 26
SATA_GP6 B31 C181 0.22u_10V_X5R_04
R175 10K_04 PCIE10_TXN/SATA1A_TXN PCIE_TXN10_SSD 26
SATA_GP7 A32 C189 0.22u_10V_X5R_04
R160 10K_04 R172 *0_04 FB_CLAMP_PCH AA43 PCIE10_TXP/SATA1A_TXP PCIE_TXP10_SSD 26
30 GPIO_FB_CLAMP GPP_G0/FAN_TACH_0
AB44 SATA2_RXN
DGPU_PW RGD GPP_G1/FAN_TACH_1 E41 SATA2_RXN 51
AC36 PCIE15_RXN/SATA2_RXN SATA2_RXP
3.3VA 15,30 DGPU_PW RGD GPP_G2/FAN_TACH_2 C42 SATA2_RXP 51
30 SCI# SCI# T44 PCIE15_RXP/SATA2_RXP SATA2_TXN
GPU_EVENT#_R GPP_G3/FAN_TACH_3 C38 SATA2_TXN 51 main HDD
AC33 PCIE15_TXN/SATA2_TXN SATA2_TXP
15 GPU_EVENT#_R GPP_G4/FAN_TACH_4 B38 SATA2_TXP 51
R170 10K_04 SW I# V43 PCIE15_TXP/SATA2_TXP
36 PS8338B_SW GPP_G5/FAN_TACH_5
SW I# Y42
18,30 SW I# GPP_G6/FAN_TACH_6 D42
R171 *0_04 GPIO2_FB_TGL_REQ_PCH AA44 PCIE16_RXN/SATA3_RXN SATA3_RXN 34
15,30 TH_OVERT#1 GPP_G7/FAN_TACH_7 E43
B.Schematic Diagrams
PCIE16_RXP/SATA3_RXP SATA3_RXP 34
B39 SATA3_TXN 34 2nd HDD
C185 0.22u_10V_X5R_04 B32 PCIE16_TXN/SATA3_TXN
26 PCIE_TXP11_SSD PCIE11_TXP A39 SATA3_TXP 34
C184 0.22u_10V_X5R_04 C32 PCIE16_TXP/SATA3_TXP
26 PCIE_TXN11_SSD PCIE11_TXN
1st M KEY NGFF 26
26
PCIE_RXP11_SSD
PCIE_RXN11_SSD
K31
L31 PCIE11_RXP
PCIE11_RXN
PCIE17_RXN/SATA4_RXN
J41
K39
PCIE_RXN17_SSD2 26
PCIE17_RXP/SATA4_RXP PCIE_RXP17_SSD2 26
E45 C811 0.22u_10V_X5R_04 PCIE_TXN17_SSD2 26
19 PCH_CONFIG_JUMPER AE30 PCIE17_TXN/SATA4_TXN
PCH_RSVD GPP_F10/SCLOCK F45 C844 0.22u_10V_X5R_04 PICE_TXP17_SSD2 26
AH35 PCIE17_TXP/SATA4_TXP
GP39_GFX_CRB_DETECT AE43 GPP_F11/SLOAD 2nd M KEY NGFF
M39
Sheet 17 of 69 SV_ADVANCE_GP48 AE44
A37
B37
GPP_F13/SDATAOUT0
GPP_F12/SDATAOUT1
PCIE14_TXN/SATA1B_TXN
PCIE18_RXN/SATA5_RXN
PCIE18_RXP/SATA5_RXP
PCIE18_TXN/SATA5_TXN
M41
G45
G44
C809
C810
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PCIE_RXN18_SSD2
PCIE_RXP18_SSD2
PCIE_TXN18_SSD2
26
26
26
PCIE14_TXP/SATA1B_TXP PCIE18_TXP/SATA5_TXP PCIE_TXP18_SSD2 26
Lynix Point 2/7 C183 0.1u_10V_X7R_04
E37
G37
C36
PCIE14_RXN/SATA1B_RXN
PCIE14_RXP/SATA1B_RXP GPP_E8/SATALED#
GPP_E0/SATAXPCIE0/SATAGP0
AJ44
AM36
PCH_SATAHDD_LED#
PCH_SATAHDD_LED#
M.2_SSD1_DET_N 26
26
C 25 PCIE_TXN13_W LAN PCIE13_TXN/SATA0B_TXN AM35 SATA_GP1 R677 10K_04 C
C182 0.1u_10V_X7R_04 B36 3.3VS
WLAN 25
25
PCIE_TXP13_W LAN
PCIE_RXN13_W LAN
G35
E35
PCIE13_TXP/SATA0B_TXP
PCIE13_RXN/SATA0B_RXN
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
AM38
AK36
SATA_GP2
25 PCIE_RXP13_W LAN GPP_F0/SATAXPCIE3/SATAGP3 AK33
PCIE13_RXP/SATA0B_RXP M.2_SSD2_DET_N 26
GPP_F1/SATAXPCIE4/SATAGP4 AK38 SATA_GP5
C180 0.22u_10V_X5R_04 B33 GPP_F2/SATAXPCIE5/SATAGP5 SATA_GP6
26 PCIE_TXP12_SSD PCIE12_TXP AH43
C179 0.22u_10V_X5R_04 C33
1st M KEY NGFF 26
26
PCIE_TXN12_SSD
PCIE_RXP12_SSD
G33
E33
PCIE12_TXN
PCIE12_RXP
GPP_F3/SATAXPCIE6/SATAGP6
GPP_F4/SATAXPCIE7/SATAGP7
AE42 SATA_GP7
26 PCIE_RXN12_SSD PCIE12_RXN AE36 L_BKLTCT R269 619_1%_04 H_THRMTRIP# H_THRMTRIP# 3
C769 0.22u_10V_X5R_04 J44 GPP_F21/EDP_BKLTCTL AE35 L_BKLTEN
26 PCIE_TXP20_SSD2 PCIE20_TXP/SATA7_TXP GPP_F20/EDP_BKLTEN
C768 0.22u_10V_X5R_04 J43 AC42 L_VDDEN DESIGN NOTE:
26 PCIE_TXN20_SSD2 PCIE20_TXN/SATA7_TXN GPP_F19/EDP_VDDEN
P36
26 PCIE_RXP20_SSD2 PCIE20_RXP/SATA7_RXP
P38 AH4 H_THRMTRIP#_PCH R272 1K_04 PECI TO PCH OPTION
26 PCIE_RXN20_SSD2
2nd M KEY NGFF 26 PCIE_TXP19_SSD2
C771
C770
0.22u_10V_X5R_04
0.22u_10V_X5R_04
H45
H44
PCIE20_RXN/SATA7_RXN
PCIE19_TXP/SATA6_TXP
THRMTRIP#
PECI
AK4 PCH_PECI
AH3 R268 30.1_1%_04
R270 *0_04
H_PM_SYNC 3
H_PECI 3,30
26 PCIE_TXN19_SSD2 PCIE19_TXN/SATA6_TXN PM_SYNC
P41 AK3 R976 *10mil_short PLTRST_CPU_N 3
26 PCIE_RXP19_SSD2 PCIE19_RXP/SATA6_RXP PLTRST_PROC#
P39 AH2 H_PM_DOW N 3
26 PCIE_RXN19_SSD2 PCIE19_RXN/SATA6_RXN PM_DOWN
3 OF 13
GFX SELECT TABLE KBL_PCH_H
REV = 0.7
GFX STYLE 3.3VA SV ADVANCE MENU TABLE
DESIGN NOTE: VDD3
1 CUSTOMER GFX BOARD STYLE
V3P3A PWRGD CIRCUIT R240
0 NORMAL GFX 1 NORMAL MENU (DEFAULT)
R242 10K_04
3.3VA 0 SV ADVANCE MENU
100K_04 VCC_3P3A_PW RGD 43
B R159 10K_04 GP39_GFX_CRB_DETECT B
3.3VS
DESIGN NOTE:
3
R241 D
6
D SV ADVANCE MENU JUMPER
100K_04 5 G Q18B R158 20K_04 SV_ADVANCE_GP48
3.3VS
2 G Q18A S MTDK5S6R
4
S MTDK5S6R
1
C245
0.01u_16V_X7R_04
3.3V Function Table
OPTION PCH_PWRGD & VCCST_PWRGD
DESIGN NOTE: A Y
SCHMITT-TRIGGER INVERTER C316 L H
R301
U7E1 *0.1u_10V_X7R_04 H L
U17M *22K_04
T39 U21
PCIE_21_RXN T41
PCIE_21_RXP 1 5
K43 Q20 2 NC VCC
PCIE_21_TXN
D
K44 *2SK3018S3 A R299 *249_1%_04
PCIE_21_TXP V35 VCCST_PW RGD 3,21
PCIE_22_RXN V36
PCIE_22_RXP R280 *0_04 G 3 4 R300 *249_1%_04
L43 21,51 VR_READY GND Y PM_PCH_PW ROK 16,18,21,30
PCIE_22_TXN
S
L44 C303 *74LVC1G14
PCIE_22_TXP V39
A PCIE_23_RXN V41 A
PCIE_23_RXP *1u_6.3V_X5R_04
N44
PCIE_23_TXN N45
PCIE_23_TXP Y39
PCIE_24_RXN Y41
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
PCIE_24_RXP P43
PCIE_24_TXN P44
PCIE_24_TXP
Title
KBL_PCH_H
13 OF 13
3,16,18,20,21,46 3.3VA
[17] Lynx 2/7-CLINK/FAN/SATA
REV = 0.7 15,16,18,20,21,25,26,30,31,33,35,43,45,46,47,51,52 VDD3
Size Document Number Rev
2,11,15,24,25,27,38,42,43,44,46,47,51
7,8,9,10,11,14,15,16,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51
3.3V
3.3VS A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: W ednesday, October 25, 2017 Sheet 17 of 69
5 4 3 2 1
B - 18 Lynix Point 2/7
Schematic Diagrams
Lynix Point 3/7
5 4 3 2 1
IF SAMPLED HIGH,FLASH
DVDDIO_AUDIO
R762
DESCRIPTOR SECURITY
IS OVERIDEN
*1K_04 AZA_SDO
SPT-H (HDA,SMB,JTAG,GPIO)
U17D
3.3VA
C244 22p_50V_NPO_04 L35
U7E1
FCM1005MF-600T01
AZA_BCLK BB3 BD15 SX_EXIT_HOLDOFF R214 *10K_04
27 HDA_BITCLK AZA_RST# HDA_BCLK GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF# PM_CLKRUN#
R742 33_04 BC1 BA15
27,28 HDA_RST# HDA_RST# GPP_A8/CLKRUN# PM_CLKRUN# 30,42
BA2
27 HDA_SDIN0 AZA_SDI_1 BB1 HDA_SDI0 BC11 LANPHYPC
D HDA_SDI1 GPD11/LANPHYPC D
R763 33_04 AZA_SDO BC3 BA9 SLP_W LAN#
27 HDA_SDOUT AZA_SYNC_R HDA_SDO GPD9/SLP_WLAN#
R739 33_04 BG6
27 HDA_SYNC HDA_SYNC DRAM_CRESETB
BD10
TP_PCH_BD1 BF1 DRAM_RESET# BG21 VRALERTB_PU '1' 1.20V
TP_PCH_BE2 BG2 RSVD_2 GPP_B2/VRALERT# AV19
DESIGN NOTE: '0' 1.35V
RSVD_1 GPP_B1 AY22
GPP_B0 DDR_VOLTAGE_SEL 44
R273 33_04 AUD_AZACPU_SDO AM3 V42 TP_GPP_G_17
3 AUD_AZACPU_SDO_R AUD_AZACPU_SDI DISPA_SDO GPP_G17/ADR_COMPLETE AMP_FAULTZ
AN2 AR17
VDD3 3 AUD_AZACPU_SDI R274 33_04 AUD_AZACPU_SCLK AM2 DISPA_SDI GPP_B11 AW3 SYS_PW ROK AMP_FAULTZ 28
3 AUD_AZACPU_SCLK_R DISPA_BCLK SYS_PWROK SYS_PW ROK 21
R362 1.5K_1%_04 R361 45.3K_1%_04 BE9 PCIE_W AKE#
SSP0_SCLK AU42 WAKE# PCIE_W AKE# 25,26,35,37,41
GPP_D8/I2S0_SCLK BE13 SLP_A#_N
AV44 GPD6/SLP_A# SLP_LAN#
GPP_D7/I2S0_RXD AV11
B.Schematic Diagrams
AU43 SLP_LAN# SLP_S0#
GPP_D6/I2S0_TXD BE24
RTCVCC AP36 GPP_B12/SLP_S0#
DMIC_DATA0 GPP_D5/I2S0_SFRM BA11
AM43 GPD4/SLP_S3# SUSB#_PCH 30,31
GPP_D20/DMIC_DATA0 BF13
VDD3_RTC
AP38 GPD5/SLP_S4# SUSC#_PCH 30,31
ijıŮŪŭŴ AN43 GPP_D19/DMIC_CLK0
GPD10/SLP_S5#
BB7 SLP_S5#
C343 1u_6.3V_X5R_04 DMIC_CLK1 GPP_D18/DMIC_DATA1
AP42 SUS_CLK
D27 GPP_D17/DMIC_CLK1 AV13
GPD8/SUSCLK BATLOW _N SUS_CLK 25
R756 BF11
1 A 20K_1%_04 GPD0/BATLOW# BD17 SUSACK# R207 *0_04
2 A
C 3 RTC_RST#
SRTC_RTC#
BE8
BF8 RTCRST#
SRTCRST#
GPP_A15/SUSACK#
GPP_A13/SUSWARN#/SUSPWRDNACK
BF17 SUS_PW R_ACK
Sheet 18 of 69
1
C243
BAT54CW (lision) JOPEN1 BE4 BE10 PCH_LAN_W AKE# R153 *0_04
RTC_VBAT_1
1u_6.3V_X5R_04 *CV_40mil
16,17,21,30 PM_PCH_PW ROK
30 RSMRST#
BG5 PCH_PWROK
RSMRST#
GPD2/LAN_WAKE#
GPD1/ACPRESENT
BD13
BF10
AC_PRESENT
AC_PRESENT 30
R743
SW I#
*0_04
17,30
Lynix Point 3/7
2
SLP_SUS# PW R_BTN# PCH_SLP_SUS# 30
R738 BC5 R741 *0_04
C RSMRST# R758 0_04 PCH_DPW ROK BD4 GPD3/PWRBTN# SYS_RESET# PW R_BTN# 30 SLP_SUS# 30,45,46 C
20K_1%_04 PCH_PORT80_LED DSW_PWROK AV3
BE41 SYS_RESET#
IJıŮŪŭŴ SMB_CLK BE38 GPP_C2/SMBALERT#
GPP_B14/SPKR
AU24 HDA_SPKR
H_PW RGD_R HDA_SPKR 27
16,28,34,44 SMB_CLK SMB_DATA GPP_C0/SMBCLK AL2 R808 0_04
16,28,34,44 SMB_DATA BC42 PROCPWRGD H_PW RGD 3
R360 C242 GPP_C_5 GPP_C1/SMBDATA
BC35 ITP_PMODE
SMLINK0_CLK GPP_C5/SML0ALERT# AR2
BE37 ITP_PMODE PCH_JTAGX
1K_04 1u_6.3V_X5R_04 SMLINK0_DATA GPP_C3/SML0CLK AP3
BC33 JTAGX PCH_JTAG_TMS
PCH_HOT_R_N GPP_C4/SML0DATA AP4
ME RTC CLEAR BA22 JTAG_TMS
SMC_CPU_THERM_R BC43 GPP_B23/SML1ALERT#/PCHHOT#
JTAG_TDO
AN3 PCH_JTAG_TDO
PCH_JTAG_TDI
PU/PD for JTAG signals
SMD_CPU_THERM GPP_C6/SML1CLK AP2 VCCST_VCCPLL
BF38 JTAG_TDI PCH_JTAG_TCK
J_RTC1 GPP_C7/SML1DATA AN1
4 OF 13 JTAG_TCK
1 PCH_JTAG_TMS R587 51_04
2 KBL_PCH_H PCH_JTAG_TDI R589 51_04
R807 PCH_JTAG_TDO
REV = 0.7 R588 51_04
50271-0020N-001
85204-02R *51_04
JOPEN2
6-20-43130-102 1.0VA
*CV_40mil
3.3VA R760 1K_04 1 2 R761 1K_04
ME_W E 30
R806 *910_04 A C AZA_SDO ITP_PMODE R275 1K_04
D50 RB751V-40(lision)
3.3VS
3.3VA 3.3VA PM_CLKRUN# R722 8.2K_04
DESIGN NOTE: DESIGN NOTE: Function Table SYS_PW ROK R278 *1K_04
3.3VA TLS CONFIDENTIALITY ENABLED 3.3VA ESPI/LPC SELECT STRAP SYS_RESET# R276 2.2K_04
IF SAMPLED HIGH(DEFAULT) IF SAMPLED HIGH, ESPI IS DESIGN NOTE: VDDQ
A B Y
B PCH HAS INTERNAL WEAK PD SELECTED ELSE LPC B
PCH HAS INTERNAL WEAK PD R166 R654 PLATFORM RST BUFFER L L L
STUFF FOR NON-DEEP SX
R655 R656 499_1%_04 499_1%_04 SUS_PW R_ACK R210 *1K_04
L H L
4.7K_04 *4.7K_04 SMLINK0_CLK SMLINK0_DATA R717 C693 RSMRST# R757 10K_04
H L L
U48
PCH_PORT80_LED GPP_C_5 C174 C624 *MC74VHC1G08DFT2G 470_04 0.1u_10V_X7R_04
5
H H H
*100PF_50V_X7R_04 *100PF_50V_X7R_04 DRAM_CRESETB 1 VDD3
4 DDR4_DRAMRST# 7,8,9,10
31,44,46,47 SUSC# 2
PCIE_W AKE# R213 1K_04
BATLOW _N R212 10K_04
3
PCH_LAN_W AKE# R217 4.7K_04
AC_PRESENT R740 *10K_04
PW R_BTN# R755 3K_1%_04
R720 0_04
R719 C694 3.3VA
DESIGN NOTE: DESIGN NOTE: 3.3VA 3.3VA
3.3VS TOP SWAP OVERRIDE STRAP 3.3VA EXI BOOT STALL BYPASS IS *10K_04 *0.1u_10V_X7R_04 AMP_FAULTZ R718 10K_04
HIGH:TOP SWAP ENABLED ENABLED IF SAMPLED HIGH VRALERTB_PU R209 10K_04
LOW:TOP SWAP DISABLED(DEFAULT) PCH HAS INTERNAL WEAK PD
PCH HAS INTERNAL WEAK PD
R164 R165
R197 R701
1K_04 1K_04
*4.7K_04 *4.7K_04 OD PLL VR ENABLE: DISABLED WHEN SAMPLED LOW
SMC_CPU_THERM_R SMD_CPU_THERM SUS_CLK R744 1.5K_04
HDA_SPKR PCH_HOT_R_N
A A
C172 C173
*100PF_50V_X7R_04 *100PF_50V_X7R_04
3,16,17,20,21,46
21,43,46
5,7,8,9,10,44
3.3VA
1.0VA
VDDQ
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
3,5,46,49
15,16,17,20,21,25,26,30,31,33,35,43,45,46,47,51,52
VCCST_VCCPLL
VDD3
[18] Lynx 3/7-HDA/SMB/JTAG/GPI
7,8,9,10,11,14,15,16,17,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51 3.3VS
Size Document Number Rev
21 DVDDIO_AUDIO
16,21 RTCVCC A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: W ednesday, October 25, 2017 Sheet 18 of 69
5 4 3 2 1
Lynix Point 3/7 B - 19
Schematic Diagrams
Lynix Point 4/7
5 4 3 2 1
SPT-H (CLK,REQ,GPP,DDP) TEST SETUP MENU TABLE
BOARD STYLE
U17G 1 DISABLED (DEFAULT)
C737
15p_50V_NPO_04 3.2*2.5 TP_CLKOUT_48 BC17
GPP_A16/CLKOUT_48 U7E1 0 TEST SETUP MENU ENABLED
L2 PCH_XDP_CLK_R_DN
3 PCH_CPU_NSSC_CLK_DP G2 CLKOUT_ITPXDP PCH_XDP_CLK_R_DP
CLKOUT_CPUNSSC_P L3
1
4
3 PCH_CPU_NSSC_CLK_DN G1 CLKOUT_ITPXDP_P
X5 CLKOUT_CPUNSSC J3 DESIGN NOTE:
D CLKOUT_CPUPCIBCLK PCH_CPU_PCIBCLK_DN 3 D
FSX3M_24MHZ R768 3 PCH_CPU_BCLK_DP H1 J2 PCH_CPU_PCIBCLK_DP 3 TEST SETUP MENU JUMPER
H2 CLKOUT_CPUBCLK_P CLKOUT_CPUPCIBCLK_P
3 PCH_CPU_BCLK_DN CLKOUT_CPUBCLK
C736 1M_1%_04 3.3VS
XTAL_24M_PCH_OUT P5
15p_50V_NPO_04 R769 *20mil_04 A5 CLKOUT_PCIE_N0 CLK_PCIE_GLAN# 35
P7
2
3
R767 *20mil_04 XTAL_24M_PCH_IN E1 XTAL24_OUT CLK_PCIE_GLAN 35
CLKOUT_PCIE_P0
XTAL24_IN
M7 R669 10K_04 TEST_SETUP_MENU
C273 R254 2.7K_1%_04 XCLK_RBIAS F1 CLKOUT_PCIE_N1 CLK_PCIE_CARD# 41
V1P0A_VCCF24_1P0 XCLK_BIASREF M5
12p_50V_NPO_04 CLKOUT_PCIE_P1 CLK_PCIE_CARD 41
RTC_X1 BF7
RTC_X2 RTCX1 H7
BG7 CLKOUT_PCIE_N2
RTCX2 G7
CLKOUT_PCIE_P2
2
1
R234 GLAN_CLKREQ# BE22
35 GLAN_CLKREQ# CR_CLKREQ# GPP_B5/SRCCLKREQ0# K7
X3 BA24 CLKOUT_PCIE_N3
41 CR_CLKREQ# GPP_B6/SRCCLKREQ1# K5
10M_06 BA19 CLKOUT_PCIE_P3
B.Schematic Diagrams
C274 BE23 GPP_B7/SRCCLKREQ2#
E3
3
4
12p_50V_NPO_04 BD22 GPP_B8/SRCCLKREQ3# TBT_REFCLK_100_N 37
37 TBT_CLKREQ# CLKOUT_PCIE_N4 E4
PRSNT# BF23 GPP_B9/SRCCLKREQ4# TBT_REFCLK_100_P 37
CLKOUT_PCIE_P4
1TJS125DJ4A420P_32.768KHz W IGIG_CLKREQ# AR29 GPP_B10/SRCCLKREQ5#
25 W IGIG_CLKREQ# MXM_REQ# GPP_H0/SRCCLKREQ6# C5
AU27 CLKOUT_PCIE_N5
SSD_CLKREQ# GPP_H1/SRCCLKREQ7# C6
BG30 CLKOUT_PCIE_P5
26 SSD_CLKREQ# GPP_H2/SRCCLKREQ8#
BF30
GPP_H3/SRCCLKREQ9# T8
BD29 CLKOUT_PCIE_N6 CLK_PCIE_W IGIG# 25
GPP_H4/SRCCLKREQ10# T7
BE31 CLKOUT_PCIE_P6 CLK_PCIE_W IGIG 25
Sheet 19 of 69 25 W LAN_CLKREQ#
AY29
AV29
BD31
GPP_H5/SRCCLKREQ11#
GPP_H6/SRCCLKREQ12#
GPP_H7/SRCCLKREQ13#
CLKOUT_PCIE_N7
CLKOUT_PCIE_P7
V5
V7
CLK_PCIE_MXM#
CLK_PCIE_MXM
15
15
DESIGN NOTE:
RECOVER/CONFIGURE
* DEFAULT JUMPER SETTING
HEADER MODE
SSD2_CLKREQ# BF31 GPP_H8/SRCCLKREQ14#
Lynix Point 4/7 C
3.3VS
CR_CLKREQ#
26 SSD2_CLKREQ#
26 CLK_PCIE_SSD2#
T13
T11
GPP_H9/SRCCLKREQ15#
CLKOUT_PCIE_N15
CLKOUT_PCIE_N8
CLKOUT_PCIE_P8
Y10
Y11
CLK_PCIE_SSD#
CLK_PCIE_SSD
26
26
FOR SOP ENABLE AND FLASH
STUFF FOR RECOVERY USAGE ONLY
R688 STUFF
R218 STUFF, R688 REMOVE
NORMAL
CONFIGURE C
R721 10K_04 26 CLK_PCIE_SSD2 CLKOUT_PCIE_P15 M2
R183 10K_04 SSD_CLKREQ# CLKOUT_PCIE_N9 M1
SSD2_CLKREQ# R3 CLKOUT_PCIE_P9 R208 STUFF, R688 REMOVE RECOVERY
R187 10K_04 CLKOUT_PCIE_N14
MXM_CLKREQ# R2
R934 10K_04 CLKOUT_PCIE_P14 P3
R935 *47K_04 DGPU_PRSNT# CLKOUT_PCIE_N10 P2
Y7 CLKOUT_PCIE_P10
AA5 CLKOUT_PCIE_N13
CLKOUT_PCIE_P13 T2
CLKOUT_PCIE_N11 T3
U1 CLKOUT_PCIE_P11
25 CLK_PCIE_W LAN# CLKOUT_PCIE_N12
U2
25 CLK_PCIE_W LAN CLKOUT_PCIE_P12
3.3VS
7 OF 13
KBL_PCH_H
REV = 0.7
R660 1K_04 PCH_CONFIG_JUMPER 17
R931 0_04 PRSNT#
15 DGPU_PRSNT#
R680
R932 *0_04
R933 0_04 MXM_REQ# 10K_04
15 MXM_CLKREQ#
U17E
U7E1
AT5
AP7 GPP_I7/DDPC_CTRLCLK BA6
AT8 GPP_I0/DDPB_HPD0 GPP_I8/DDPC_CTRLDATA AW5
AP8 GPP_I1/DDPC_HPD1 GPP_I5/DDPB_CTRLCLK AV7
R764 10K_04 SMC_EXTSMI_R_N AT7 GPP_I2/DDPD_HPD2 GPP_I6/DDPB_CTRLDATA AY1
3.3VS GPP_I3/DDPE_HPD3 GPP_I9/DDPD_CTRLCLK AY2
B GPP_I10/DDPD_CTRLDATA B
AD44
GPP_F14 AE39 R663 10K_04 H_SKTOCC_N 3
GPP_F23 3.3VS
DDSP_1_HPD0 AB45
R283 100K_04 BA1 GPP_F22 DGPU_RST#_PCH 15
GPP_I4/EDP_HPD
R44 IVCAM_DFU R147 10K_04 3.3VS
GPP_G23 R45
GPP_G22 GPU_PW R_EN# 15,30
AC30 GC6_FB_EN
GPP_G21 GC6_FB_EN 15,30
Y35 TEST_SETUP_MENU R156 10K_04 3.3VS
GPP_G20 BG34
GPP_H23 TBTA_ACE_GPIO7 39,40
5 OF 13
KBL_PCH_H
REV = 0.7
DESIGN NOTE:
SYS_PWROK NORMAL POWER DOWN
TRIGGERED BY PCH
A A
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Title
3,16,17,18,20,21,46 3.3VA
[19] Lynx 4/7-CLK,REQ,GPP
21 V1P0A_VCCF24_1P0
Size Document Number Rev
2,11,15,17,24,25,27,38,42,43,44,46,47,51
7,8,9,10,11,14,15,16,17,18,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51
3.3V
3.3VS A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: W ednesday, October 25, 2017 Sheet 19 of 69
5 4 3 2 1
B - 20 Lynix Point 4/7
Schematic Diagrams
Lynix Point 5/7
5 4 3 2 1
SPT-H (DMI,PCIe,USB,LPC)
U17B
L27
2 DMI_TXN0 DMI_RXN0 U7E1 AH5 USB_PN1 24
N27 USB2N_1
2 DMI_TXP0 DMI_RXP0 AH7 USB_PP1 24 USB3 PORT3 (J_USB3_3)
D27 USB2P_1
2 DMI_RXN0 DMI_TXN0 AE5 USB_PN2 34
C27 USB2N_2
D 2 DMI_RXP0 DMI_TXP0 AE7 USB_PP2 34 FINGER D
E24 USB2P_2
2 DMI_TXN1 DMI_RXN1 AH8 USB_PN3 25
G24 USB2N_3
2 DMI_TXP1 DMI_RXP1 AH10 USB_PP3 25 NGFF 3G
B27 USB2P_3
PCI-E x1 Usage 2 DMI_RXN1 DMI_TXN1 AE2 USB_PN4 23
A28 USB2N_4
2 DMI_RXP1 DMI_TXP1 AE3 USB_PP4 23 USB3 PORT1 (J_USB3_1)
G27 USB2P_4
2 DMI_TXN2 DMI_RXN2 AC2 USB_PN5 27
E26 USB2N_5
Lane 1 2 DMI_TXP2 DMI_RXP2 AC3 USB_PP5 27
B28 USB2P_5
2 DMI_RXN2 DMI_TXN2 AF2
Lane 2 2 DMI_RXP2
C28 USB2N_6 AF1
USB_PN6 27
Lane 3 Thunder (4X) L29 DMI_TXP2
USB2P_6 USB_PP6 27 USB3 PORT4 (J_USB3_4)
2 DMI_TXN3 DMI_RXN3 AB2
K29 USB2N_7
Lane 4 2 DMI_TXP3 C29 DMI_RXP3
USB2P_7
AB1
2 DMI_RXN3 DMI_TXN3 AM8 3.3VA
Lane 5 2 DMI_RXP3
B29 USB2N_8 AM7
DMI_TXP3
Lane 6 䔁
枸 PCIECOMP_N
USB2P_8 Y3 RN1
R204 100_1%_04 B10 USB2N_9 USB_OC0_R_N
Lane 7 M key (4X) PCIECOMP_P C10 PCIE_RCOMPN Y2 5 4
USB2P_9 AK8 USB_OC1_R_N 6 3
Lane 8 PCIE_RCOMPP
USB2N_10 USB_PN10 24 USB_OC2_R_N
AK7 USB_PP10 24 CCD 7 2
G15 USB2P_10 W2 USB_OC4_R_N 8 1
37 PCIE_RXN1_TBT PCIE1_RXN/USB3_7_RXN USB2N_11 USB_PN11 25
E15 W1 NGFF WLAN+BT
B.Schematic Diagrams
37 PCIE_RXP1_TBT PCIE1_RXP/USB3_7_RXP USB2P_11 USB_PP11 25
C202 0.22u_10V_X5R_02 A18 AD3 10K_8P4R_04
37 PCIE_TXN1_TBT PCIE1_TXN/USB3_7_TXN USB2N_12
C241 0.22u_10V_X5R_02 B18 AD2 RN2
37 PCIE_TXP1_TBT PCIE1_TXP/USB3_7_TXP USB2P_12
C201 0.22u_10V_X5R_02 B19 V3 5 4
37 PCIE_TXN2_TBT PCIE2_TXN/USB3_8_TXN USB2N_13 USB_OC5_R_N
C200 0.22u_10V_X5R_02 C19 V2 6 3
37 PCIE_TXP2_TBT PCIE2_TXP/USB3_8_TXP USB2P_13 USB_OC6_R_N
E17 AK11 7 2
37 PCIE_RXN2_TBT G17 PCIE2_RXN/USB3_8_RXN USB2N_14 AK13 GPIO_PCIESLOT_RST_R 8 1
37 PCIE_RXP2_TBT PCIE2_RXP/USB3_8_RXP USB2P_14
ůƉŝŶĞZŝĚŐĞ
L17
37 PCIE_RXN3_TBT K17 PCIE3_RXN/USB3_9_RXN 10K_8P4R_04
C
37
37
37
PCIE_RXP3_TBT
PCIE_TXN3_TBT
PCIE_TXP3_TBT
C203
C205
0.22u_10V_X5R_02 B20
0.22u_10V_X5R_02 C20
E19
PCIE3_RXP/USB3_9_RXP
PCIE3_TXN/USB3_9_TXN
PCIE3_TXP/USB3_9_TXP
GPP_E9/USB2_OC0#
AJ43 USB_OC0_R_N
USB_OC1_R_N
DESIGN NOTE:
DFX TEST MODE
XTAL INPUT IS SINGLE ENDED IF SAMPLED LOW ELSE DIFFERENTIAL C
Sheet 20 of 69
37 PCIE_RXN4_TBT PCIE4_RXN/USB3_10_RXN AH44
Lynix Point 5/7
G19 GPP_E10/USB2_OC1# USB_OC2_R_N
37 PCIE_RXP4_TBT PCIE4_RXP/USB3_10_RXP AM39 R176 *10K_04
C192 0.22u_10V_X5R_02 B21 GPP_E11/USB2_OC2# VISACH2_D3
37 PCIE_TXN4_TBT PCIE4_TXN/USB3_10_TXN AK42 R161 10K_04 3.3VA
C204 0.22u_10V_X5R_02 A21 GPP_E12/USB2_OC3# USB_OC4_R_N
37 PCIE_TXP4_TBT PCIE4_TXP/USB3_10_TXP AD43
K19 GPP_F15/USB2_OCB_4 USB_OC5_R_N
PCIE5_RXN AC44
L19 GPP_F16/USB2_OCB_5 USB_OC6_R_N
PCIE5_RXP AH42
D22 GPP_F17/USB2_OCB_6 GPIO_PCIESLOT_RST_R
PCIE5_TXN AC43
C22 GPP_F18/USB2_OCB_7
G22 PCIE5_TXP
25 PCIE_RXN6_W IGIG PCIE6_RXN
E22 USB2_COMP
WIGIG 25
25
PCIE_RXP6_W IGIG
PCIE_TXN6_W IGIG
C699
C698
0.1u_10V_X7R_04 B22
0.1u_10V_X7R_04 A23
PCIE6_RXP
PCIE6_TXN
USB2_COMP
USB2_VBUSSENSE
AG3
AE10 USB2_VBUSSENSE
TP_PCH_AB13
R255
R765
113_1%_04
1K_04
DESIGN NOTE:
USB2 COMP RES: PLACE WITHIN 1 INCH
25 PCIE_TXP6_W IGIG PCIE6_TXP AC13
L22 RSVD_3 USB2_ID
35 PCIE_RXN7_GLAN PCIE7_RXN AG2 R267 1K_04
K22 USB2_ID
GLAN 35
35
PCIE_RXP7_GLAN
PCIE_TXN7_GLAN
C194
C195
0.1u_10V_X7R_04 C23
0.1u_10V_X7R_04 B23
PCIE7_RXP
PCIE7_TXN
35 PCIE_TXP7_GLAN PCIE7_TXP RSVD_PCH_BD14_N
K24 BG11 R205 1K_04
41 PCIE_RXN8_CARD PCIE8_RXN GPD7/RSVD
L24
CARD READER 41
41
PCIE_RXP8_CARD
PCIE_TXN8_CARD
C190
C191
0.1u_10V_X7R_04 C24
0.1u_10V_X7R_04 B24
PCIE8_RXP
PCIE8_TXN VDD3
41 PCIE_TXP8_CARD PCIE8_TXP 2 OF 13
DESIGN NOTE:
KBL_PCH_H
REV = 0.7 USED TO DETECT 2X4 PRESENCE
JA PIN 4 WILL PULL GPIO TO GND
WHEN 2X4 PLUG IN
CONNECT TO GPIO
3.3VS
U17F
B D13 2X4_POW ER_DETECT R151 *10K_04 B
24 USB3_TXN1 USB3_1_TXN AR15
C13 U7E1 GPP_A1/LAD0/ESPI_IO0 LPC_AD0 30,31,42
24 USB3_TXP1 USB3_1_TXP AY15
B7 GPP_A2/LAD1/ESPI_IO1 LPC_AD1 30,31,42
24 USB3_RXN1 USB3_1_RXN AV17
A7 GPP_A3/LAD2/ESPI_IO2 LPC_AD2 30,31,42
24 USB3_RXP1 USB3_1_RXP BE14
B13 GPP_A4/LAD3/ESPI_IO3 LPC_AD3 30,31,42
25 USB3TXN2_SSICTXN1 USB3_2_SSIC_1_TXN 3.3VS
25 USB3TXP2_SSICTXP1 A14 L_FRAME_N_R
USB3_2_SSIC_1_TXP BF14 R211 *20mil_04 LPC_FRAME# 30,31,42
25 USB3RXN2_SSICRXN1 C8 GPP_A5/LFRAME#/ESPI_CS0#
USB3_2_SSIC_1_RXN BC13 SERIRQ SERIRQ 30,31,42 SERIRQ R715 10K_04
25 USB3RXP2_SSICRXP1 B8 GPP_A6/SERIRQ/ESPI_CS1# GPP_A7
USB3_2_SSIC_1_RXP AY13 R723 10K_04 3.3VS SB_KBCRST# R713 10K_04
C17 GPP_A7/PIRQA#/ESPI_ALERT0# AU15 SB_KBCRST# PCH_SMI_N
27 USB3_TXN6 USB3_6_TXN GPP_A0/RCIN#/ESPI_ALERT1# SB_KBCRST# 30 R146 10K_04
D17 BF16 SUS_STAT# R150 *10K_04
27 USB3_TXP6 USB3_6_TXP GPP_A14/SUS_STAT#/ESPI_RESET#
H15
27 USB3_RXN6 USB3_6_RXN
K15 LPC_0_ESPI_CLK_EC
27 USB3_RXP6 USB3_6_RXP BE15 R208 22_04 PCLK_KBC 30,31
A16 GPP_A9/CLKOUT_LPC0/ESPI_CLK AY17 PCH_CLK_PCI_TPM R724 22_04
27 USB3_TXN5 USB3_5_TXN GPP_A10/CLKOUT_LPC1 PCLK_TPM 42
B16
27 USB3_TXP5 USB3_5_TXP PCH_SMI_N 3.3VA
27 USB3_RXN5
E13
USB3_5_RXN GPP_G19/SMI#
R43 R148 *20mil_04 SMI# 30,31 DESIGN NOTE:
G13 U45 2X4_POW ER_DETECT R152 *20mil_04
27 USB3_RXP5 USB3_5_RXP GPP_G18/NMI# PCH_MUTE# 28 PD FOR I2S MODE
DEFAULT PU HDA MODE
C14
B14 USB3_3_SSIC_2_TXP AK44 R682
A9 USB3_3_SSIC_2_TXN GPP_E6/DEVSLP2 AL45 TP_GPP_E_5
B9 USB3_3_SSIC_2_RXP GPP_E5/DEVSLP1 AL44 100K_04
USB3_3_SSIC_2_RXN GPP_E4/DEVSLP0 SSD_SATA_DEVSLP 26 PCH_CODEC_IRQ
AF45
C15 GPP_F9/DEVSLP7 AH36
23 USB3_TXP4 USB3_4_TXP GPP_F8/DEVSLP6 TP_GPP_F_7 R681
B15 AH39
23 USB3_TXN4 USB3_4_TXN GPP_F7/DEVSLP5
G11 AG41 SSD2_SATA_DEVSLP 26
23 USB3_RXP4 USB3_4_RXP GPP_F6/DEVSLP4 PCH_CODEC_IRQ *100K_04
E11 AF44
23 USB3_RXN4 USB3_4_RXN GPP_F5/DEVSLP3
6 OF 13
A A
KBL_PCH_H
REV = 0.7
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
3,16,17,18,21,46
15,16,17,18,21,25,26,30,31,33,35,43,45,46,47,51,52
3.3VA
VDD3
[20] Lynx 5/7-DMI,PCIe,USB
7,8,9,10,11,14,15,16,17,18,19,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51 3.3VS
Size Document Number Rev
A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 20 of 69
5 4 3 2 1
Lynix Point 5/7 B - 21
Schematic Diagrams
Lynix Point 6/7
5 4 3 2 1
DESIGN NOTE:
1.0VA
SPT -H (POWER) EDGE CAP FOR VCCMPHY_1P0 AND VCCDUSB_1P0
1.0VA 1.0VA 1.0VA
U17H
AA23 +P1V0_PRIME_PCH_FUSE_2V8
VCCPRIM_1P0_4 U7E1 AM22 R726 *20mil_04
AA25 VCCPRIM_1P0_3
DESIGN NOTE: VCCPRIM_1P0_5 VCCPGPPA 3.3VA C659 C697
AB23
DESIGN NOTE: VCCPRIM_1P0_6 BC24 VDD3
PLACE HOLDER FOR VCCAUSB_1P0 AND VCCAAZPLL_1P0 FILTER
AB26 VCCPDSW_3P3
VCCPRIM_1P0_7 1u_6.3V_X5R_04 22u_6.3V_X5R_08
BOARD CAP FOR VCCDSW_1P0
AB28 BC31 R687 *20mil_04
AD23 VCCPRIM_1P0_8 VCCPGPPA
1.0VA V1P0A_VCCAPLL VCCPRIM_1P0_9 BE40
VCCDSW _1P0 AD26 VCCPGPPBCH_1 3.3VA
D VCCPRIM_1P0_10 BF42 D
AD28 VCCPGPPBCH_2
R766 *15mil_short_06 VCCPRIM_1P0_11
VCCDSW _1P0 AK23
VCCPRIM_1P0_16 AK41 DESIGN NOTE:
AK25 VCCPGPPEF_1
C734 C735 VCCPRIM_1P0_17 AM41
AF23 VCCPGPPEF_2 3.3VA
C658 VCCPRIM_1P0_12 BOARD CAP FOR VCCPRTCPRIM_3P3
AF26
*22u_6.3V_X5R_08 22u_6.3V_X5R_08 VCCPRIM_1P0_13 AE41
AK20 VCCPGPPG
1u_6.3V_X5R_04 VCCPRIM_1P0_14
AK21
VCCPRIM_1P0_15 AP5 C696
VCCPRIM_3P3_4
NEAR AJ5,AL5 1.0VA N17
VCCCLK1 AE16 1u_6.3V_X5R_04
T19 VCCPRIM_1P0_1 1.0VA
V20 VCCCLK3
VCCCLK4 AE13
NEAR BA20
W17 VCCATS 3.3VS
DESIGN NOTE: T17 VCCCLK2_2
VCCCLK2_1 BC20 3.3VA
PLACE HOLDER FOR VCCMPHYPLL_1P0 FILTER K1 VCCRTCPRIM_3P3 BC22
V1P0A_VCCF24_1P0
K2 VCCCLK5_1 VCCRTC VCCPRTC_3P3 DESIGN NOTE:
1.0VA V1P0A_VCCAMPHYPLL VCCCLK5_2 BC27 VCC_RTCEXT_CAP 3.3VA EDGE CAP FOR VCCPHVC_3P3
DCPRTC (PLACE HOLDER)
B.Schematic Diagrams
1.0VA V21 C657
R145 *15mil_short_06 V23 VCCMPHY_1P0_1 BC29 VCCDSW _1P0 0.1u_10V_X7R_04
V25 VCCMPHY_1P0_2 DCPDSW_1P0
C164 C171 V26 VCCMPHY_1P0_3 BG41 R178 *15mil_short_06 C643
VCCMPHY_1P0_4 VCCSPI_1 3.3V_SPI
V28 BG43 0.1u_10V_X7R_04
*22u_6.3V_X5R_08 22u_6.3V_X5R_08 V29 VCCMPHY_1P0_5 VCCSPI_3 BG42 V3P3A_V1P8A_PCH_SPI
VCCMPHY_1P0 VCCSPI_2
A43
NEAR AJ41,AL41
NEAR A42,A43,B43 V1P0A_VCCAMPHYPLL
B43 VCCAMPHYPLL_1P0_2
VCCPGPPD_1
BE44 VCCPGPPD
BE45
Sheet 21 of 69
VCCAMPHYPLL_1P0_1
VCCPGPPD_3 BD45
1.0VA W28 VCCPGPPD_2 DESIGN NOTE:
AD17 VCCAPLLEBB_1P0 3.3VS
C
DESIGN NOTE: AK5 VCCPRIM_1P0_2 BOARD CAP FOR VCCATS C
V1P0A_VCCAPLL +VCCPFUSE_3P3
Lynix Point 6/7 VCCUSB2PLL_1P0_1 BF3 R282 *15mil_short_06 3.3VA
PLACE HOLDER FOR VCCMPHYPLL_1P0 FILTER AM5 VCCPRIM_3P3_1
VCCUSB2PLL_1P0_2 BG3
AR19 VCCPRIM_3P3_3 C718
1.0VA V1P0A_VCCF24_1P0 VCCHDAPLL_1P0 BG4
VCCPRIM_3P3_2
BC15 1u_6.3V_X5R_04
R266 *15mil_short_06
DVDDIO_AUDIO VCCHDA
VCCPCIE3PLL_1P0_1
C44 V1P0A_VCCAMPHYPLL
NEAR AD13
C45
Y16 VCCPCIE3PLL_1P0_2
VDD3 VCCDSW_3P3
C300 C299
8 OF 13
*22u_6.3V_X5R_08 22u_6.3V_X5R_08 KBL_PCH_H
REV = 0.7
NEAR K2,K3 VDD3
ALL_SYS_PW RGD 11,30
VCCIO_EN=(VDDQ_PWRGD & SUSB#) VDD3 VDD3
VDD3 U54D
14
U54C 74LVC08APW
14
U54B 74LVC08APW 12
14
30 PM_PW ROK SYS_PW ROK_R
U54A 74LVC08APW 9 11 R279 1K_04
14
17,51 VR_READY SYS_PW ROK 18
74LVC08APW 4 8 13
43,49,51 VCCIO_PW RGD
1 6 10
47 5VS_PW RGD
3 5 R277
7
2 R858 R281
15,28,29,31,37,43,44,46,48 SUSB#
7
R828 C812 10K_04
7
7
10K_04 *0.1u_10V_X7R_04
33_04 EC DELAY 99ms(UP)
33_04
B B
PM_PCH_PW ROK 16,17,18,30
1.0VA->SUSC#->VDDQ->DDR1.2V_PWRGD->VCCIO VCCST_PW RGD 3,17
DESIGN NOTE:
BOARD CAP FOR VCCPRTC_3P3
DESIGN NOTE: DESIGN NOTE:
EDGE CAP FOR VCCPGPPBCH (PLACE HOLDER) EDGE CAP FOR VCCPGPPG(PLACE HOLDER)
RTCVCC VCCPRTC_3P3 3.3VA 3.3VA
DESIGN NOTE:
3.3VA BOARD GENERAL DCPL CAPS R725 *20mil_04
C695 C641 C733
*0.1u_10V_X7R_04 0.1u_10V_X7R_04
C165 C644 C166 C175 C627 1u_6.3V_X5R_04
10u_6.3V_X5R_06 1u_6.3V_X5R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04 *0.1u_10V_X7R_04
NEAR BA22 NEAR AD41
NEAR BC42,BD40
DESIGN NOTE: DESIGN NOTE: DESIGN NOTE:
RTCVCC 5V
DESIGN NOTE: EDGE CAP FOR VCCPUSBDSW_3P3 EDGE CAP FOR VCCPGPPEF(PLACE HOLDER) EDGE CAP FOR VCCPHVC_3P3
GROUP D POWER DVDDIO_AUDIO PLACE HOLDER (PLACE HOLDER)
SPT-H :1.8V VDD3 3.3VA V1P0A_VCCF24_1P0
3.3VA R759 *20mil_04
C344 C89 C270
VCCPGPPD C719 C272
0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 C642
A 3.3VA R177 *15mil_short_06 1u_6.3V_X5R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04 A
NEAR W15 NEAR AN5 NEAR K2,K3
3,16,17,18,20,46 3.3VA
19
16
16,18
VCCPGPPA
RTCVCC
V1P0A_VCCF24_1P0
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
18 DVDDIO_AUDIO
18,43,46 1.0VA
[21] Lynx 6/7-POWER
15,24,27,39,40,43,44,46,47,49,50,51 5V
Size Document Number Rev
15,16,17,18,20,25,26,30,31,33,35,43,45,46,47,51,52
7,8,9,10,11,14,15,16,17,18,19,20,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51
VDD3
3.3VS A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: W ednesday, October 25, 2017 Sheet 21 of 69
5 4 3 2 1
B - 22 Lynix Point 6/7
Schematic Diagrams
Lynix Point 7/7
5 4 3 2 1
SPT -H (RSVD,GND)
D D
U17L U7E1
U17I BD34 AB18
A25 A42 BD39 VSS_156 VSS_3 AB20
A30 VSS_1 U7E1 VSS_299 D45 BD7 VSS_158 VSS_6 AB21
P22 VSS_4 VSS_300 BG44 BE2 VSS_160 VSS_9 AB25
AV38 VSS_297 VSS_301 BF44 BF43 VSS_162 VSS_12 AB29
AV45 VSS_157 VSS_302 BF45 BF5 VSS_164 VSS_15 AB4
AV8 VSS_159 VSS_303 BF2 BG18 VSS_166 VSS_18 AB42
B.Schematic Diagrams
AY11 VSS_161 VSS_304 W29 BG23 VSS_168 VSS_21 AC10
AY19 VSS_163 VSS_305 A35 BG28 VSS_170 VSS_24 AC11
AY37 VSS_165 VSS_7 A40 BG32 VSS_172 VSS_27 AC14
AY4 VSS_167 VSS_10 A41 BG37 VSS_174 VSS_30 AC16
AY42 VSS_169 VSS_13 AA17 BG40 VSS_176 VSS_33 AC38
AY8 VSS_171 VSS_16 AA18 BG9 VSS_178 VSS_36 AC4
B25 VSS_173 VSS_19 AA20 C1 VSS_181 VSS_39 AC5
B3 VSS_175 VSS_22 AA21 A12 VSS_183 VSS_42 AC7
B30
B35
B4
VSS_177
VSS_179
VSS_180
VSS_25
VSS_28
VSS_31
AA26
AA28
AA29
C2
C37
A6
VSS_185
VSS_187
VSS_189
VSS_45
VSS_48
VSS_50
AC8
AD1
AD18
U17J Sheet 22 of 69
B41 VSS_182 VSS_34 AB17 C9 VSS_191 VSS_52 AD20 U7E1
C
BA13
BA17
BA29
VSS_184
VSS_186
VSS_188
VSS_37
VSS_40
VSS_43
AC32
AE4
AE8
D1
D10
D12
VSS_193
VSS_195
VSS_197
VSS_54
VSS_56
VSS_58
AD21
AD25
AD29
M11
L42 VSS_47 RSVD_11
AU22
V11
C Lynix Point 7/7
BA31 VSS_190 VSS_46 AF18 D15 VSS_199 VSS_60 AD45 L4 VSS_44 RSVD_15 V13
BA37 VSS_192 VSS_49 AF20 D16 VSS_201 VSS_62 AE11 L35 VSS_41 RSVD_14
VSS_194 VSS_51 VSS_203 VSS_64 VSS_38 M33
BA4 AF21 B12 AE14 L15 RSVD_13
VSS_196 VSS_53 VSS_205 VSS_66 VSS_35 N33
BA42 AF25 D19 AE32 L13 RSVD_12
BB40 VSS_198 VSS_55 AF28 D21 VSS_207 VSS_68 AE33 K8 VSS_32 P27
BC38 VSS_200 VSS_57 AF29 D24 VSS_209 VSS_70 AE38 K45 VSS_29 RSVD_10 T27
BC40 VSS_202 VSS_59 AF4 D25 VSS_211 VSS_72 AK29 K38 VSS_26 RSVD_9 N29
BC9 VSS_204 VSS_61 AF42 D29 VSS_213 VSS_74 AK30 K36 VSS_23 RSVD_8 P29
BD11 VSS_206 VSS_63 AG18 D30 VSS_215 VSS_76 AK32 K35 VSS_20 RSVD_7 AP29
BD16 VSS_208 VSS_65 AG20 D33 VSS_217 VSS_78 AK35 K33 VSS_17 RSVD_4 T24
BD2 VSS_210 VSS_67 AG21 D35 VSS_219 VSS_80 AK39 K3 VSS_14 RSVD_6 P24
BD21 VSS_212 VSS_69 AG23 D36 VSS_221 VSS_82 AL4 K27 VSS_11 RSVD_5
BD25 VSS_214 VSS_71 AG25 D39 VSS_223 VSS_84 AL42 K13 VSS_8 AU3
F2 VSS_216 VSS_73 AG26 D44 VSS_225 VSS_86 AM10 K11 VSS_5 PREQ# AR1
E31 VSS_218 VSS_75 AG28 D7 VSS_227 VSS_88 AM11 VSS_2 PRDY# AV2
E6 VSS_220 VSS_77 AG29 P13 VSS_229 VSS_90 AM13 T33 CPU_TRST# AL1 R271 30.1_1%_04
E8 VSS_222 VSS_79 AH11 P15 VSS_231 VSS_92 AM17 T35 RSVD_17 PCH_TRIGOUT AJ2 PCH_2_CPU_TRIGGER 2
F39 VSS_224 VSS_81 AH13 P17 VSS_233 VSS_94 AM19 RSVD_16 PCH_TRIGIN CPU_2_PCH_TRIGGER 2
F43 VSS_226 VSS_83 AH30 P19 VSS_235 VSS_96 AM24 10 OF 13
G4 VSS_228 VSS_85 AH32 P31 VSS_237 VSS_98 AM27
G40 VSS_230 VSS_87 AH33 P33 VSS_239 VSS_100 AM29 KBL_PCH_H
G42 VSS_232 VSS_89 AH38 P35 VSS_241 VSS_102 AM32 REV = 0.7
F6 VSS_234 VSS_91 AJ1 P4 VSS_243 VSS_104 AM33
G9 VSS_236 VSS_93 AJ17 P42 VSS_245 VSS_106 AM4
H11 VSS_238 VSS_95 AJ18 P8 VSS_247 VSS_108 AN45
H13 VSS_240 VSS_97 AJ20 R1 VSS_249 VSS_110 AP10
H17 VSS_242 VSS_99 AJ21 R32 VSS_251 VSS_112 AP11
B H19 VSS_244 VSS_101 AJ23 T10 VSS_253 VSS_114 AP13 B
H22 VSS_246 VSS_103 AJ25 T14 VSS_255 VSS_116 AP15
H24 VSS_248 VSS_105 AJ26 T22 VSS_257 VSS_118 AP22
H27 VSS_250 VSS_107 AJ28 T29 VSS_259 VSS_120 AP27
H29 VSS_252 VSS_109 AJ29 T32 VSS_261 VSS_122 AP31
H33 VSS_254 VSS_111 AJ45 T36 VSS_263 VSS_124 AP33
H35 VSS_256 VSS_113 AK10 T38 VSS_265 VSS_126 AP34
H38 VSS_258 VSS_115 AK14 Y38 VSS_267 VSS_128 AP39
H4 VSS_260 VSS_117 AK16 Y4 VSS_324 VSS_130 T4
H42 VSS_262 VSS_119 AK17 Y8 VSS_325 VSS_269 W26
H9 VSS_264 VSS_121 AK18 T42 VSS_326 VSS_316 V16
J4 VSS_266 VSS_123 AK26 T5 VSS_327 VSS_271 V17
M36 VSS_268 VSS_125 AK28 U4 VSS_328 VSS_273 V18
M38 VSS_270 VSS_127 AM14 U42 VSS_329 VSS_275 V30
M4 VSS_272 VSS_129 AN14 V10 VSS_330 VSS_277 V32
M8 VSS_274 VSS_131 AP19 V14 VSS_331 VSS_279 V33
M9 VSS_276 VSS_133 AR22 W3 VSS_332 VSS_281 V38
N13 VSS_278 VSS_135 AR27 AR13 VSS_317 VSS_283 V4
N15 VSS_280 VSS_137 AU29 AR31 VSS_132 VSS_285 V8
N19 VSS_282 VSS_139 AU33 AR33 VSS_134 VSS_287
N22 VSS_284 VSS_141 AV1 AR4 VSS_136 W18
N24 VSS_286 VSS_143 AV10 AT10 VSS_138 VSS_290 W20
N31 VSS_288 VSS_145 AV15 AT13 VSS_140 VSS_292 W21
N42 VSS_289 VSS_147 AV24 AT35 VSS_142 VSS_294 W23
P10 VSS_291 VSS_149 AV27 AT37 VSS_144 VSS_296 W25
P12 VSS_293 VSS_151 AV33 AT42 VSS_146 VSS_298
AV35 VSS_295 VSS_153 AU11 VSS_148 A44
VSS_155 AU17 VSS_150 VSS_306 BE1
9 OF 13 VSS_152 VSS_307
A KBL_PCH_H BD30 BD1 A
REV = 0.7 W45 VSS_154 VSS_308 B1
Y13 VSS_318 VSS_309 A2
Y14 VSS_319 VSS_310 B2
Y30 VSS_320 VSS_311 A3
VSS_321 VSS_312
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Y32 A4
Y33 VSS_322 VSS_313 B44
BG14 VSS_323 VSS_314 B45
VSS_333 12 OF 13 VSS_315 Title
KBL_PCH_H
[22] Lynx 7/7-RSVD/GND
REV = 0.7
Size Document Number Rev
A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 22 of 69
5 4 3 2 1
Lynix Point 7/7 B - 23
Schematic Diagrams
USB Charging
5 4 3 2 1
D D
B.Schematic Diagrams
Sheet 23 of 69 C C
USB Charging
USB3.0 PORT4
C415 22u_6.3V_X5R_08
CLOSE TO CONNECTOR
C416 22u_6.3V_X5R_08
USBVCC_CH
J_USB3_1
SLG55583 USB Charging PORT USB3_TXP4_RJ 9
SSTX+ SHIELD
GND1
Standard-A
1
USB3_TXN4_RJ 8 VBUS GND2
USB_PN4_RJ 2 SSTX- SHIELD
W/ USB CHARGER VDD5
USB_PP4_RJ
A_URXP_CMJ
4
3
6
D-
GND
D+
SHIELD
GND3
GND4
B 7 SSRX+ SHIELD B
A_URXN_CMJ 5 GND_D
SSRX-
R449 USB3_TXP4 C432 0.1u_10V_X7R_04 USB3_TXP4_R C19007-90905-L NEW
20 USB3_TXP4
10K_04
USB3_TXN4 C441 0.1u_10V_X7R_04 USB3_TXN4_R
20 USB3_TXN4
U34 Default LowUSB_DD_ON#
8 1
30,45,46 DD_ON CB PRE#
7 2 USB_PN4_A
20 USB_PN4 TDM DM USB3_RXP4
R442
USB_PP4_A 20 USB3_RXP4
6 3 100K_04
20 USB_PP4 TDP DP USB3_RXN4
GND
20 USB3_RXN4
VDD5 5 4
VCC CDP
C452 SLG55593VTR USBVCC_CH
9
PCB Footprint = TDFN8-2X2MM U32
0.1u_16V_Y5V_04 䚖⇵ἧ䓐㬌㕁 VDD5 3 1
OC# VOUT
SLG55593VTR :
6-02-55593-9D0 5 C417 C431 C430
VIN
USB_DD_ON# 4 2 0.1u_16V_Y5V_04 22u_6.3V_X5R_08 22u_6.3V_X5R_08
EN# GND
C451 UP7549UMA5-20
PCB Footprint = M-SOT23-5A
10u_6.3V_X5R_06
A A
D32 D33
USB_PP4_RJ 10 1 USB_PP4_A USB3_RXN4 6 5 A_URXN_CMJ
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
USB_PN4_RJ 9 2 USB_PN4_A USB3_RXP4 7 4 A_URXP_CMJ
8 3 8 3
7 4 USB3_TXN4_R 9 2 USB3_TXN4_RJ
6 5 USB3_TXP4_R 10 1 USB3_TXP4_RJ USB3.0 Max Trace Title
3.3V 2,11,15,17,24,25,27,38,42,43,44,46,47,51 length < 4" [23] USB Charging
VDD5 43,44,45,46 Size Document Number Rev
DT1140-04LP-7
DT1140-04LP-7
5V
3.3VS
15,21,24,27,39,40,43,44,46,47,49,50,51
7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51
A3 6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 23 of 69
5 4 3 2 1
B - 24 USB Charging
Schematic Diagrams
CCD, USB Port3
5 4 3 2 1
CCD_PW R
U9
1A 1A 48 mil
3.3VS R76 0_06 4 1
5 VIN VOUT
VIN
CCD C85
1u_6.3V_X5R_04
3
EN GND
2
C88
UP7553PMA5-25 2.2u_6.3V_X5R_04
D 30 CCD_EN D
From KBC default HI
Port 5 J_CCD1
R77 *0_04 1
27 INT_MIC 20 USB_PN10 2
20 USB_PP10 3
L3 C84 47p_50V_NPO_04
B.Schematic Diagrams
FCM1005KF-121T03 4
MIC_DATA_L 3.3VS 5
1 2
27 MIC_DATA MIC_CLK_L 6
1 2
27 MIC_CLK 7
FCM1005KF-121T03 C77 47p_50V_NPO_04 8
L2 W B247H-008S11M
BEAD & CAP FOR EMI 6-21-C3A00-108
Sheet 24 of 69
CCD, USB Port3
C C
USBVCC3.0_3
USB3.0 PORT1 3
U24
1
100 MIL
C364
OC# VOUT
5 0.1u_16V_Y5V_04
3.3V 5V VIN
4 2
R451 *4.7K_04 R450 *0_04 C397 EN# GND
R453 4.7K_04 R452 *0_04 10u_6.3V_X5R_06 UP7549UMA5-20
R455 4.7K_04 R454 *0_04 PCB Footprint = M-SOT23-5A
2A/90mohm
R457 *4.7K_04 R456 2K_1%_04
15,27,46 DD_ON#
C365 22u_6.3V_X5R_08
CLOSE TO CONNECTOR
R459 *4.7K_04 R458 0_04 C366 22u_6.3V_X5R_08
USBVCC3.0_3
J_USB3_3
GND
1
U33 USB3_TXP1 USB3_TXP1_RJ 9 GND1
20 USB3_TXP1 SSTX+ SHIELD
Standard-A
25 GND 1
EQ1
DE1
OS1
VCC
EN_RXD
GND
I2C_SDA_20 24 GND 7 I2C_SCK_20 USB3_TXN1 USB3_TXN1_RJ 8 VBUS GND2
USB CONNECTOR SIDE NC NC 20 USB3_TXN1
4 3 USB_PN1_R USB_PN1_RJ 2 SSTX- SHIELD
USB3_TXN1_R 20 USB_PN1 D-
0.1u_10V_X7R_04 C443 23 8 C446 0.1u_10V_X7R_04 USB3_TXN1 L24 4 GND3
B TX1- RX1- 1 2 *W CM2012F2S-161T03-short USB_PP1_R USB_PP1_RJ 3 GND SHIELD B
USB3_TXP1_R 20 USB_PP1 D+
0.1u_10V_X7R_04 C442 22 9 C445 0.1u_10V_X7R_04 USB3_TXP1 USB3_RXP1 USB3_RXP1_RJ 6 GND4
TX1+ RX+ 20 USB3_RXP1 SSRX+ SHIELD
7
R443 *0_04 21 10 USB3_RXN1 USB3_RXN1_RJ 5 GND_D
GND GND GND GND PCH SIDE 20 USB3_RXN1 SSRX-
USB3_RXN1_R 0.1u_10V_X7R_04 C434 20 11 C444 0.1u_10V_X7R_04 USB3_RXN1
RX2- TX2- C19007-90905-L NEW
USB3_RXP1_R 0.1u_10V_X7R_04 C433 19 12 C436 0.1u_10V_X7R_04 USB3_RXP1
GND
VCC
EQ2
OS2
DE2
RX2+ TX2+
CM
3.3V
18
17
16
15
14
13
ASM1464
PCB Footprint = QFN24-4X4MM 3.3V
R423 0_04 R422 *4.7K_04
R431 *0_04 R430 *4.7K_04
R429 *0_04 R428 4.7K_04 R447 R445 D30 D31
R427 *0_04 R426 4.7K_04 *4.7K_04 *4.7K_04 USB3_RXN1_R 6 5 USB3_RXN1_RJ 6 5
R425 *0_04 R424 *4.7K_04 USB3_RXP1_R 7 4 USB3_RXP1_RJ 7 4
8 3 8 3
I2C_SCK_20 USB3_TXN1_R 9 2 USB3_TXN1_RJ USB_PN1_RJ 9 2 USB_PN1_R
GND I2C_SDA_20 USB3_TXP1_R 10 1 USB3_TXP1_RJ USB_PP1_RJ 10 1 USB_PP1_R
3.3V
R446 R444 DT1140-04LP-7 DT1140-04LP-7
*4.7K_04 *4.7K_04
A A
C435 C453 C454
0.01u_16V_X7R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04
GND GND
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[24] CCD,USB PORT3
GND
3.3V 2,11,15,17,25,27,38,42,43,44,46,47,51 Size Document Number Rev
5V
3.3VS
15,21,27,39,40,43,44,46,47,49,50,51
7,8,9,10,11,14,15,16,17,18,19,20,21,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51
A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 24 of 69
5 4 3 2 1
CCD, USB Port3 B - 25
Schematic Diagrams
M.2 3G+USB & WLAN+BT
5 4 3 2 1
HUAWEI MU736㬌 䁢1.8 V LEVEL
PIN
㬌⋨
ᶵ ᶲẞ
HI: Present
{ P775 } 䓐NORMA L CLOSED (㉱GN )
CONNECTORἧ D
3G CARD { W/O 3G 㗪
㬌
⋨ᶵ ᶲ ẞ}
⤪ᶵἧ䓐婳䡢
嬘
HIGH,⺢
娵⺈ ⓮ 㗗 ⏎ 暨 天 P UL L
䶂嶗 䃉 P U L L HIG H 暣 旣
CURRENT2A㗪
,DON'T DROP BELOW 3.135V
3G_3.3V 80 mils W/O ᶲẞ
3Gᶵ
J_3G1 C853 *EEFCX0J221YR
+
GND
D
3G_CONFIG2 75 74 C358 *0.1u_16V_Y5V_04 D
73 CONFIG_2 3.3V4 72 C357 *0.1u_16V_Y5V_04
31 3G_RST# GND10 3.3V3
71 70
3G_CONFIG1 69 GND9 3.3V2 68
R244 *10K_04 1.8V LEVEL 3G_RST# 67 CONFIG_1 SUSCLK(32Khz)(O) 66 C304 *470p_50V_X7R_04
3G_3.3V Reset#(O)1.8V SIM Detect(O)
R243 *8.2K_1%_04 65 64
C246 *33p_50V_NPO_04 63 ANTCTL3(I)1.8V COEX1(I/O)1.8V 62
GND ANTCTL2(I)1.8V COEX2(I/O)1.8V
61 60
CLOSE CONNECTOR 59 ANTCTL1(I)1.8V COEX3(I/O)1.8V 58 GND
57 ANTCTL0(I)1.8V NC1 56
55 GND8 NC0 54
53 REFCLKP PEWake#(IO) 52 R284 10K_04
REFCLKN CLKREQ#(IO) 3.3VS
51 50
B.Schematic Diagrams
49 GND7 PERST#(O) 48
47 PETp0/SATA-A+ GPIO_4(IO)1.8V 46
3G POWER Q60
3G_3.3V
45
43
41
PETn0/SATA-A-
GND6
PERp0/SATA-B-
GPIO_3(IO)1.8V
GPIO_2(IO)1.8V
GPIO_1(IO)1.8V
44
42
40 C317 *0.1u_16V_Y5V_04
PERn0/SATA-B+ GPIO_0(IO)1.8V GND
>120 mil *AO3415 >120 mil C355 *0.1u_10V_X7R_04 L19 1 2 39 38
20 USB3TXP2_SSICTXP1 GND5 DEVSLP(O)
S D 37 36
3.3V PETp1/USB3.0-Tx+/SSIC-TxP UIM_PWR(I) UIM_PW R 34
*W CM2012F2S-SHORT 4 3 35 34
20 USB3TXN2_SSICTXN1 PETn1/USB3.0-Tx-/SSIC-TxN UIM_DATA(IO) UIM_DATA 34
Sheet 25 of 69 C276
20 USB3RXP2_SSICRXP1
C356 *0.1u_10V_X7R_04
L20
1 2 33
31 GND4 UIM_CLK(I)
32
30
UIM_CLK
UIM_RST
34
34
G
C851 *1u_6.3V_X5R_04 *W CM2012F2S-SHORT 4 3 29 PERp1/USB3.0-Rx+/SSIC-RxP UIM_RESET(I) 28
1u_6.3V_X5R_04
20 USB3RXN2_SSICRXN1 PERn1/USB3.0-Rx-/SSIC-RxN GPIO_8(IO)1.8V GPS_DISABLE#
*0.1u_16V_Y5V_04 27 26 R337 *0_04 GND
GND3 GPIO_10(IO)1.8V
M.2 3G+USB & HUAWEI PINDEFAULT
MU736㬌 HIGH BODYSAR_N
W AKE_ON_W W AN#
25
GPIO_12(IO)1.8V GPIO_7(IO)1.8V
24
C852
R863 R855 R857 *0_04 23 22
18,25,26,35,37,41 PCIE_W AKE# 3G_CONFIG0 GPIO_11(IO)1.8V GPIO_6(IO)1.8V
21 20
*100K_04 *10_06 HUAWEI MU736㬌 䁢O D PI N
PIN CONFIG_0 GPIO_5(IO)1.8V HUAWEI MU736 ⎗
㍍⍿ 3.
3
V
WLAN+BT C
R864 *330K_04
need pull high
B KEY
C
3
D
6
D 11 10 M2B_3GSSD_LED#R
5 G Q61B 9 GND2 GPIO_9/DAS/DSS#(I)(OD) 8
20 USB_PN3 USB_D- W_DISABLE#1(O) PW R_ON_OFF R363 3G_EN 30
2 G Q61A S *MTDK5S6R 7 6 *10K_04
30 3G_PW R_EN
4
20 USB_PP3 USB_D+ Full_Card_Power_Off#(O)1.8V
S *MTDK5S6R 5 4 80 mils
1
3 GND1 3.3V1 2
3G_CONFIG3 GND0 3.3V0 3G_3.3V
1
R625 CONFIG_3
+ C362 C842 C275
*10K_04 *NFSB0-S6701-TP40
PCB Footprint = NXSB0-S67XX-XX40 *EEFCX0J221YR *10u_6.3V_X5R_06 *0.1u_16V_Y5V_04
GND W/O ᶲẞ
3Gᶵ
GND W/ 3G 㗪
㬌⋨ᶲ
ẞ GND GND GND
40 mil
W LAN_3.3V
WLAN+BT J_W LAN1
C385
0.1u_16V_Y5V_04
C372
22u_6.3V_X5R_08
C866
22u_6.3V_X5R_08
W IGIG_CLKREQ# R328 10K_04 W LAN_3.3V
75 74
R330 0_04 73 GND10 3.3V3 72
B 19 CLK_PCIE_W IGIG# Reserved/REFCLKN1 3.3V2 B
R329 0_04 71 70 R373 0_04
19 CLK_PCIE_W IGIG Reserved/REFCLKP1 UIM_Power_In/Gpio1/PEWake1# PCIE_W AKE# 18,25,26,35,37,41
69 68
GND9 UIM_Power_Out/CLKREQ1# W IGIG_CLKREQ# 19
R326 0_04 67 66 R356 0_04
20 PCIE_RXN6_W IGIG Reserved/PERn1 UIM_SWP/PERST1# BUF_PLT_RST# 16,25,26,30,31,35,37,41
R327 0_04 65 64 R358 10K_04
20 PCIE_RXP6_W IGIG Reserved/PERp1 Reserved1 W LAN_3.3V
63 62 R359 10K_04
61 GND8 ALERT#(I) 60 D03 ᾖ
㬋 R192 *0_04
20 PCIE_TXN6_W IGIG Reserved/PETn1 I2C CLK(O) 6/29 LPSS_GSPI0_MISO 16
59 58
20 PCIE_TXP6_W IGIG Reserved/PETp1 I2C DATA(IO)
57 56 R708 0_04 3.3V PJ50 2 1 *OPEN_2A
GND7 W_DISABLE#1(O) W LAN_EN 30
R354 *0_04 55 54
18,25,26,35,37,41 PCIE_W AKE# PEWake0#(IO) Reserved/W_DISABLE#2(O) BT_EN 30 VDD3 W LAN_3.3V
53 52
19 W LAN_CLKREQ# CLKREQ0#(IO) PERST0#(O) BUF_PLT_RST# 16,25,26,30,31,35,37,41 U28
3.3VS R355 10K_04 51 50 >120 mil >120 mil
49 GND6 SUSCLK(32Khz)(O) 48 5 1
19 CLK_PCIE_W LAN# REFCLKN0 COEX1(I/O)1.8V VIN VOUT
47 46 SUSCLK R978 *0_04
19 CLK_PCIE_W LAN REFCLKP0 COEX2(I/O)1.8V SUS_CLK 18
45 44 4
43 GND5 COEX3(I/O)1.8V 42 R357 *0_04 C386 VIN/SS C337
17 PCIE_RXN13_W LAN PERn0 VENDOR DEFINED2 CL_CLK1 17
41 40 R371 *0_04 3 2
17 PCIE_RXP13_W LAN PERp0 VENDOR DEFINED1 CL_DATA1 17 EN GND
39 38 R372 *0_04 1u_6.3V_X5R_04 0.1u_16V_Y5V_04
GND4 VENDOR DEFINED0 CL_RST#1 17
37 36 UP7553PMA5-25
17 PCIE_TXN13_W LAN PETn0 NC8
35 34
17 PCIE_TXP13_W LAN PETp0 NC7
33 32
GND3 NC6
30 W LAN_PW R_EN
E KEY ㍍⇘ E C ,枰 冯EC䡢娵
23 22
21 NC5 NC4 20
19 NC3 NC2 18
17 NC1 GND2 16
NC0 LED#2(I)(OD)
A A
A KEY
7 6
GND1 LED#1(I)(OD)
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
5 4 40 mil
20 USB_PN11 USB_D- 3.3V1
3 2
20 USB_PP11 USB_D+ 3.3V0 W LAN_3.3V
1
GND0 Title
15,16,17,18,20,21,26,30,31,33,35,43,45,46,47,51,52 VDD3 [25] M.2 3G+USB3 & WLAN+BT
NFSA0-S6701-TP40
7,8,9,10,11,14,15,16,17,18,19,20,21,24,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51 3.3VS
Size Document Number Rev
15,21,24,27,39,40,43,44,46,47,49,50,51
2,11,15,17,24,27,38,42,43,44,46,47,51
5V
3.3V A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: W ednesday, October 25, 2017 Sheet 25 of 69
5 4 3 2 1
B - 26 M.2 3G+USB & WLAN+BT
Schematic Diagrams
M.2 PCIE4X SSD1 & SSD2
5 4 3 2 1
3.3VS 1st M2 NGFF (PCIE 4X)
>120 mil
R387 3.3VS
10K_04 C429 C428 C864
J_SSD1
R394 0_04
17 M.2_SSD1_DET_N 75 0.1u_10V_X7R_04 0.1u_10V_X7R_04 22u_6.3V_X5R_08
D
73 GND13 74
䞍PC H Mul ti PC IE OR SA TA SSD
忂 Q29 71 GND12 3.3V8 72 GND GND GND
D D
G 69 GND11 3.3V7 70
H:SATA *2SK3018S3 PEDET(NC-PCIe/GND-SATA) 3.3V6
67 68
L:PCIE
S
NC18 SUSCLK(32Khz)(O)
GND M KEY
57 58
55 GND10 NC17 56
19 CLK_PCIE_SSD 53 REFCLKP NC16 54 R421 0_04
19 CLK_PCIE_SSD# 51 REFCLKN PEWake#(IO) 52 PCIE_WAKE# 18,25,26,35,37,41
49 GND9 CLKREQ#(IO) 50 SSD_CLKREQ# 19
17 PCIE_TXP9_SSD 47 PETp0/SATA-A+ PERST#(O) 48 BUF_PLT_RST# 16,25,26,30,31,35,37,41
17 PCIE_TXN9_SSD 45 PETn0/SATA-A- NC15 46
43 GND8 NC14 44
17 PCIE_RXN9_SSD 41 PERp0/SATA-B- NC13 42
17 PCIE_RXP9_SSD 39 PERn0/SATA-B+ NC12 40
37 GND7 NC11 38 R163 0_04
17 PCIE_TXP10_SSD 35 PETp1 DEVSLP(O) 36 SSD_SATA_DEVSLP 20
B.Schematic Diagrams
17 PCIE_TXN10_SSD 33 PETn1 NC10 34
31 GND6 NC9 32
17 PCIE_RXP10_SSD 29 PERp1 NC8 30
17 PCIE_RXN10_SSD 27 PERn1 NC7 28
GND5 NC6 >120 mil
25 26
17 PCIE_TXP11_SSD PETp2 NC5 3.3VS
23 24
17 PCIE_TXN11_SSD 21 PETn2 NC4 22 C413 C412 C865
19 GND4 NC3 20
17 PCIE_RXP11_SSD 17 PERp2 NC2 18 0.1u_10V_X7R_04 0.1u_10V_X7R_04 22u_6.3V_X5R_08
17 PCIE_RXN11_SSD 15 PERn2 3.3V5 16
13 GND3 3.3V4 14
17 PCIE_TXP12_SSD PETp3 3.3V3
Sheet 26 of 69
11 12 GND GND GND
17 PCIE_TXN12_SSD 9 PETn3 3.3V2 10 M2M_SSD1_LED#
7 GND2 DAS/DSS#(I)(OD) 8
17 PCIE_RXP12_SSD 5 PERp3 NC1 6
17 PCIE_RXN12_SSD PERn3 NC0 80 mils
3 4
GND1 3.3V1 3.3VS
1 2
M.2 PCIE4X SSD1 &
GND0 3.3V0 C414
NFSM0-S6701-TP40 0.1u_10V_X7R_04
GND
GND
SSD2
C C
3.3VS
R865
10K_04
2nd M2 NGFF (PCIE 4X)
J_SSD2
R395 0_04
17 M.2_SSD2_DET_N 75 >120 mil
D
73 GND13 74
GND12 3.3V8 3.3VS
Q59 71 72
G 69 GND11 3.3V7 70 C855 C854 C843
*2SK3018S3 PEDET(NC-PCIe/GND-SATA) 3.3V6
67 68
S
NC18 SUSCLK(32Khz)(O) 0.1u_10V_X7R_04 0.1u_10V_X7R_04 22u_6.3V_X5R_08
GND M KEY
䞍PC H Mul ti PC IE OR SA TA SSD
忂 GND GND GND
H:SATA 57 58
55 GND10 NC17 56
L:PCIE 19 CLK_PCIE_SSD2 53 REFCLKP NC16 54 R856 0_04
19 CLK_PCIE_SSD2# 51 REFCLKN PEWake#(IO) 52 PCIE_WAKE# 18,25,26,35,37,41
49 GND9 CLKREQ#(IO) 50 SSD2_CLKREQ# 19
17 PICE_TXP17_SSD2 47 PETp0/SATA-A+ PERST#(O) 48 BUF_PLT_RST# 16,25,26,30,31,35,37,41
R951 0_04
17 PCIE_TXN17_SSD2 45 PETn0/SATA-A- NC15 46 3.3VS EC_SSD_LED# 30
43 GND8 NC14 44
17 PCIE_RXN17_SSD2 41 PERp0/SATA-B- NC13 42
17 PCIE_RXP17_SSD2 39 PERn0/SATA-B+ NC12 40
5
37 GND7 NC11 38 R827 0_04
17 PCIE_TXP18_SSD2 35 PETp1 DEVSLP(O) 36 SSD2_SATA_DEVSLP 20 1 default IRST CONTROL
R952 0_04 VDD3
17 PCIE_TXN18_SSD2 33 PETn1 NC10 34 3IN1 LED_HDD# 4
R953 0_04 DEBUG PORT
31 GND6 NC9 32 3IN1 30 33 LED_HDD# 2
R954 0_04 80CLK
B 17 PCIE_RXP18_SSD2 29 PERp1 NC8 30 80CLK 30 PCH_SATAHDD_LED# 17 B
17 PCIE_RXN18_SSD2 27 PERn1 NC7 28 >120 mil
3
25 GND5 NC6 26 U18
17 PCIE_TXP19_SSD2 PETp2 NC5 3.3VS
23 24 U74AHC1G08G-AL5-R A C M2M_SSD1_LED#
17 PCIE_TXN19_SSD2 21 PETn2 NC4 22 C767 C766 C765 D72
19 GND4 NC3 20 RB751V-40(lision)
17 PCIE_RXP19_SSD2 17 PERp2 NC2 18 A C M2M_SSD2_LED#
0.1u_10V_X7R_04 0.1u_10V_X7R_04 22u_6.3V_X5R_08
17 PCIE_RXN19_SSD2 15 PERn2 3.3V5 16 D73
13 GND3 3.3V4 14 RB751V-40(lision)
17 PCIE_TXP20_SSD2 11 PETp3 3.3V3 12 GND GND GND
17 PCIE_TXN20_SSD2 9 PETn3 3.3V2 10 M2M_SSD2_LED#
7 GND2 DAS/DSS#(I)(OD) 8
17 PCIE_RXP20_SSD2 5 PERp3 NC1 6
17 PCIE_RXN20_SSD2 3 PERn3 NC0 4
80 mils
GND1 3.3V1 3.3VS
1 2
GND0 3.3V0 C732
NFSM0-S6701-TP85 0.1u_10V_X7R_04
GND
GND
A A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[26] M.2 PCIE4X SSD1 & SSD2
2,11,15,17,24,25,27,38,42,43,44,46,47,51 3.3V
Size Document Number R ev
7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51
15,16,17,18,20,21,25,30,31,33,35,43,45,46,47,51,52
3.3VS
VDD3 A2 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Wednesday, October 25, 2017 Sheet 26 of 69
5 4 3 2 1
M.2 PCIE4X SSD1 & SSD2 B - 27
Schematic Diagrams
Realtek ALC898
5 4 3 2 1
C247 0.1u_16V_Y5V_04
Layout Note:
U43 pin 1 ~ pin 11 and pin 47 and pin 48 C286 0.1u_16V_Y5V_04
are Digital signals.
The others are Analog signals.
3.3VS 3.3VS_AUD 5VS_AUD
40mil 40mil AUDG GND_AUDIO
L16 HCB1005KF-121T20 L17 *HCB1005KF-121T20
D
Layout Note: 5VS
D
(1)MIC1-L (U13.21) (2)MIC1-R (U13.22) C345 C281 C278 C280 C279 C307 C250 R246 *20mil_P_04
(3)LINE-L (U13.23) (4)LINE-R (U13.24)
*0.1u_16V_Y5V_04 10u_6.3V_X5R_06 *10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04
␐⚵⽭枰 ⊭ 央 AUDG, ᶼ⃀ 慷 性 嶐 崲 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
+5VS & +VIN plane. R291 *20mil_P_04 R302 *20mil_P_04
GND_AUDIO AUDG AUDG
GND_AUDIO
25
38
7
1
9
U49
VREF_CODEC AUDG
LDO-OUT1
LDO-OUT2
DVDD-IO
DVSS
DVDD
MIC_CLK L38 2 1 HCB1005KF-121T20 GND_AUDIO
24 MIC_CLK MIC_DATA L37 2 1 HCB1005KF-121T20 C252 0.1u_16V_Y5V_04 DEFAULT SHORT
24 MIC_DATA
2
C755 47p_50V_NPO_04 C282 10u_6.3V_X5R_06 4 GPIO0/DMIC-CLK/SPDIFO2 27 C251 2.2u_6.3V_X5R_04
B.Schematic Diagrams
GND_AUDIO GND_AUDIO GPIO0/DMIC_DATA VREF
GND_AUDIO C725 47p_50V_NPO_04 3 MIC2-VREFO
REGREF
5 28 MIC1-VREFO-L AUDG
18 HDA_SDOUT SDATA-OUT VREFOOUT-B_L
R752 33_04 6 32 MIC1-VREFO-R R261
18 HDA_BITCLK BIT-CLK VREFOUT-B_R
R751 33_04 8
18 HDA_SDIN0 SDATA-IN
10 39 2.2K_04
DIGITAL
SRUW$
18 HDA_SYNC SYNC SURR-OUT-L
11 41
18,28 HDA_RST# RESET# SURR-OUT-R INT_MIC
Max: 0.5inch EAPD_MODE 24 INT_MIC
Sheet 27 of 69 PC BEEP
1
D14
A
28 EAPD_MODE
SPDIFO
47
48
EAPD/SPDIFI
SPDIFO1
MIC2-VREFO
LINE2-VREFO
30
31
35
MIC2-VREFO
ALC898_VREFO
FRONT_L
T29
C283
330p_50V_X7R_04
30 KBC_BEEP
SRUW' FRONT-OUT-R
FRONT-OUT-L FRONT_L 28,29
Realtek ALC898 C 3 BEEP R245 47K_04 C712 1u_6.3V_X5R_04 12 36 FRONT_R
PCBEEP FRONT_R 28,29
2 A R729 4.7K_04
18 HDA_SPKR
C713 *0.1u_10V_X7R_04 14 HEADPHONE-L
C L14
*HCB1005KF-121T20
BAT54CW (lision)
13
SRUW( LINE2-R
LINE2-L 15 HEADPHONE-R
AUDG
C
27 JD_SENSEA Sense A
GND_AUDIO 34 43
SRUW*
5VS 5VS_AUD 27 JD_SENSEB Sense B CEN
L15 44
HCB1005KF-121T20 R288 0_04 VPR 37 LFE
LDO_IN 29 VRP 45 SIDE-L_R C754 10u_6.3V_X5R_06 R781 75_1%_04
5V LDO_IN ANALOG SIDE-OUT-L SIDE-R_R
SIDE_L 27
SRUW+ SIDE-OUT-R 46 C799 10u_6.3V_X5R_06 R815 75_1%_04
C
MIC2_L SIDE_R 27
C248 4.7u_6.3V_X5R_06 16
D54
C285 INT_MIC R247 1K_04 INT_MIC_R C249 4.7u_6.3V_X5R_06 MIC2_R 17 MIC2-L
MIC2-R SRUW) GPIO2
33 ALC898_GPIO2
INTERNAL PU 50K
22u_6.3V_X5R_06 18 40
*RB751V-40(lision) 19 CD-L JDREF R286 20K_1%_04
AUDG BluRay content
A
20 CD-GND 23
AUDG CD-R
SRUW& LINE1-R
LINE1-L 24 R287 *5.1K_1%_04
protection
AVSS1
AVSS2
AUDG MIC1-L R249 1K_04 C710 4.7u_6.3V_X5R_06 21
SRUW%
27 MIC1-L MIC1-L
MIC1-R R248 1K_04 C711 4.7u_6.3V_X5R_06 22
27 MIC1-R MIC1-R C306 *100p_50V_NPO_04
Connect standby power(for ALC898
26
42
LINE_L_C C709 4.7u_6.3V_X5R_06 R748 75_1%_04
pop noise) LINE-L 27
SPDIFO LINE_R_C C724 4.7u_6.3V_X5R_06 R749 75_1%_04
LINE-R 27
C309 AUDG
*100p_50V_NPO_04 MIC1-VREFO-L
AUDIO JACK FOR Audio JACK BOARD R750
MIC1-VREFO-R
R782
B 2.2K_04 B
2.2K_04
MIC1-L
J_AUDIO1 MIC1-R
5V 1 2 C752
1 2 USB_PP6 20
3 4 C753
3 4 USB_PN6 20
5 6 *680p_50V_X5R_04
7 5 6 8 *680p_50V_X5R_04
7 8 USB3_TXP6 20
9 10
9 10 USB3_TXN6 20
11 12 AUDG
13 11 12 14 AUDG
13 14 USB3_RXP6 20
5VS 15 16
15 16 USB3_RXN6 20
17 18
19 17 18 20
19 20 USB3_TXP5 20
21 22
21 22 USB3_TXN5 20
3.3VS 23 24
25 23 24 26
3.3V 25 26 USB3_RXP5 20
27 28
31 HP_PLUG 27 28 USB3_RXN5 20
31 I2C_CLK 29 30 C206 0.1u_16V_Y5V_04
31 29 30 32
31 I2C_DATA 31 32 USB_PP5 20
33 34 USB_PN5 20 C797 0.1u_16V_Y5V_04
15,24,46 DD_ON# 33 34
SPDIFO 35 36 R256 0_04
37 35 36 38 C751 0.1u_16V_Y5V_04
ALC898_GPIO2 39 37 38 40
ALC898_VREFO 39 40 LINE-L 27
41 42 C324 0.1u_16V_Y5V_04
41 42 LINE-R 27
27 SIDE_L 43 44
45 43 44 46 C798 0.1u_16V_Y5V_04
27 SIDE_R 45 46 MIC1-R 27
47 48 MIC1-L 27
27 JD_SENSEA 47 48
A
49 50 A
27 JD_SENSEB 49 50 GND AUDG
51049-05041-001
戭㞙ᶲẞ
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
AUDG AUDG
H15 H19
H6_0B3_7D3_7 H6_0B3_7D3_7
Title
VIN 11,15,29,30,43,44,45,46,47,48,49,50,51,52 [27] Realtek ALC898
3.3V 2,11,15,17,24,25,38,42,43,44,46,47,51
Size Document Number Rev
3.3VS
5V
7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51
15,21,24,39,40,43,44,46,47,49,50,51 SCHEMATIC1 6-71-P77F0-D02 2.0
5VS 11,14,15,16,29,30,32,34,44,46,47
Date: Monday, August 28, 2017 Sheet 27 of 69
5 4 3 2 1
B - 28 Realtek ALC898
Schematic Diagrams
PCM1861 + TAS5766DCA
5 4 3 2 1
AMP_PW R
AUDIO AMP FOR SPEAKER AMP_3.3VS AUDG_5766 AUDG_5766 C600 C117 C116 C603 C147 NEAR 5766 PIN6/PIN7
R111 *22_04
AMP_3.3VS 3.3VS 15,30,32 SMD_VGA_THERM
R619 22_04 1u_25V_X5R_06 10u_25V_X5R_08 10u_25V_X5R_08 10u_25V_X5R_08 10u_25V_X5R_08
16,18,28,34,44 SMB_DATA
R611 *20mil_P_04 L9
20K_1%_04
100K_1%_04
1u_25V_X5R_06
1u_6.3V_X5R_04
0.22u_16V_X7R_06
0.22u_16V_X7R_06
R110 *20mil_P_04 HCB1608KF-121T30 R107 *22_04
15,30,32 SMC_VGA_THERM
R575 *20mil_P_04 R621 22_04 AUDG_5766 AUDG_5766 C139 AUDG_5766 L8 AUDG_5766 AUDG_5766
16,18,28,34,44 SMB_CLK
R574 *20mil_P_04 0.22u_16V_X7R_06 HCB1608KF-121T30
5766_BSPR 5766_OUTR+
C151 C122 C152 .
AUDG_5766 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 22u_6.3V_X5R_08 C138
D
5766_OUTPR R106 D
1000p_50V_X7R_04
AUDG_5766 C140
AUDG_5766 R626
AUDG_5766 AUDG_5766 AUDG_5766 3.3_06
AMP_3.3VS
C150
C149
5766_GVDD R627
C148
AUDG_5766
AUDG_5766 C146
AUDG_5766
AUDG_5766
3.3VS ADC_MCLK
5766_OUTNR
5766_DACR
0.01u_50V_X7R_04
5766_INNR
5766_GAIN
5766_INPR
5766_SDA
5766_SCL
ADC_BCLK C131
ADR2
R598 R609 0.22u_16V_X7R_06 L7
C598 ADC_DOUT 5766_BSNR HCB1608KF-121T30 AUDG_5766
5766_OUTR-
R607
*0.1u_10V_X7R_04
10K_04 10K_04 .
100K_1%_04 ADR1 ADR2 C129
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
1
U10
C A 1000p_50V_X7R_04 R102
GPIO3
ADR2
GPIO2
GPIO1
SCL
GND3
GND2
GAIN/FSW
PVCC2
PVCC1
GND1
DIN
BCLK
SCLK
SDA
AVDD
DACR
INPR
INNR
GVDD
BSPR
OUTPR
OUTNR
BSNR
30 KBC_MUTE#
B.Schematic Diagrams
D43 R599 R610
RB751V-40(lision) 3.3_06
C A *10K_04 *10K_04 AUDG_5766
15,21,29,31,37,43,44,46,48 SUSB#
D44
20 PCH_MUTE#
C
RB751V-40(lision)
D45
A
AUDG_5766 AUDG_5766
2W
C137
0.01u_50V_X7R_04
Sheet 28 of 69
5
*RB751V-40(lision) R608 Front Speaker R / L
TAS5766DCA
18,27
27 EAPD_MODE
HDA_RST#
R606 0_04 1
2
4
1K_04
AMP_EN
AMP_EN 29
PowerPAD
49
J_SPK1
4
AUDG_5766 PCM1861 +
C599
3
TAS5766DCA
XSMT/UVP
U42 AUDG_5766
3
FAULTZ
U74AHC1G08G-AL5-R *0.1u_16V_Y5V_04
CPVDD
OUTNL
PVCC3
PVCC4
OUTPL
LRCLK
1
CAPM
VNEG
DVDD
LDOO
AVCC
GND4
GND5
GND6
GND7
CAPP
ADR1
DACL
BSNL
BSPL
C C
INNL
INPL
R97 0_04 TAS5766MDCA 85204-04001
3.3VS R98 0530 CHANGE VALUE
*10K_04 X1 4 Ohm Speaker
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
5766_OUTPL 45
46
5766_OUTNL 47
48
1 2
G GND
ADC_LRCK
5766_CAPM
5766_LDOO
5766_VNEG
5766_CAPP
5766_DACL
C130 L6
5766_BSPL
5766_INNL
ADR1
5766_INPL
4 3 R103 22_04 ADC_MCLK 0.22u_16V_X7R_06 HCB1608KF-121T30
VCC OUT 5766_BSNL 5766_OUTL-
AUDG_5766
.
AUDG_5766
AUDG_5766
C132 C133 FCO-536B 24.576000MBA R104 22_04 ADC_MCLK1
AUDG_5766
C127
0.1u_16V_Y5V_04 1u_6.3V_X5R_04 R101
AMP_EN AMP_3.3VS 1000p_50V_X7R_04
1u_25V_X5R_06
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
0.22u_16V_X7R_06
0.22u_16V_X7R_06
3.3_06
PCM1861 AUDG_5766 C128
PCM1863 MD6/MD5/MD2 Analog MUX and Gain Select 0.01u_50V_X7R_04
MD0 Control Method Select Terminal: 0 0 0 SE Ch 1 (VINL1 / VINR1)
PCM1861
R824ᶲẞ
PCM1863
R824ᶵ
ᶲẞ
SPI (tied high) or I2C (tied low)
MD1 SPI-Mode Chip Select or
0 0 1
0 1 0
SE Ch 2 (VINL2 / VINR2)
SE Ch 3 (VINL3 / VINR3) C115
0.22u_16V_X7R_06
L5
HCB1608KF-121T30 AUDG_5766
0 1 1 SE Ch 4 (VINL4 / VINR4)
MD0 R271ᶵ
ᶲẞ R271ᶲẞ
I2C-Mode Address Terminal
MD2 SPI-Mode Master Out, Slave IN or 1 0 0
1 0 1
SE Ch 4 with 12dB gain
SE Ch 4 with 32dB gain
. 5766_OUTL+
C124
C123
C121
C120
C119
C118
I2C-Mode SDA
MD1 R272ᶲ
R274ᶲ
ẞ
ẞ
R272ᶲẞ MD3 SPI-ModeSerial Bit Clock I2C-Mode
Serial Bit Clock
1 1 0 Diff Ch1(VIN1P/VIN1M,VIN2P/VIN2M)
1 1 1 Diff Ch2(VIN3P/VIN3M,VIN4P/VIN4M) AMP_PW R C125
MD2 R821ᶵ
ᶲẞ
R273ᶲẞ
R274ᶵ
ᶲẞ
MD4 SPI-Mode Master In, Slave Out or
I2C-Mode GPIO0,
with 12dB gain
MD4 Audio Format
high = Left Justified, low = I2S AUDG_5766 AUDG_5766 AUDG_5766 AUDG_5766 C601 C590 C589 C588 C602
1000p_50V_X7R_04
MD5 GPIO 1, Interrupt A or
MD3 R822ᶵ
ᶲẞ R273ᶵ
ᶲẞ Digital Microphone Input
MD6 GPIO 2, Interrupt B or
MD3 Filter Select
0 = FIR Decimation Filter,
R96 *0_04 1u_25V_X5R_06 10u_25V_X5R_08 10u_25V_X5R_08 10u_25V_X5R_08 10u_25V_X5R_08 AUDG_5766
R100
3.3_06
B
MD4 R293ᶲẞ R293ᶵ
ᶲẞ Digital Microphone Clock Output 1 = IIR Short Latency Decimation Filter
MD1/MD0 Audio Interface Mode
18 AMP_FAULTZ
B
0 0 Slave Mode,256fS,384fS,512fS Auto Detect
MD5 R294ᶲẞ R294ᶵ
ᶲẞ 0
1
1 Master Mode (512fS)
0 Master Mode (384fS)
AUDG_5766 AUDG_5766 AUDG_5766 AUDG_5766 AUDG_5766 C126
0.01u_50V_X7R_04
MD6 R295ᶲẞ R295ᶵ
ᶲẞ 1 1 Master Mode (256fS)
NEAR 5766 PIN41/PIN42/PIN43
AUDG_5766
C308 R260 C323 R310 U53
1u_16V_X7R_06 7.5K_1%_04 1u_16V_X7R_06 100_1%_04 3.3VS 3.3VS 3.3VS
ADC_VINR PC171 2.2u_6.3V_X5R_04 1 30 PC163 2.2u_6.3V_X5R_04
27,29 FRONT_R AUDG_1861 VINL2/VIN1M VINR3/VIN3P AUDG_1861
C322 AUDG_1861 PC170 2.2u_6.3V_X5R_04 2 29 PC164 2.2u_6.3V_X5R_04 AUDG_1861
R285 VINR2/VIN2M VINL3/VIN4P R304 R306 R850 R846 R843
3900P_50V_X7R_04 ADC_VINL 3 28 PC165 2.2u_6.3V_X5R_04
VINL1/VIN1P VINR4/VIN3M AUDG_1861
*22K_04
ADC_VINR 4 27 PC166 2.2u_6.3V_X5R_04 3.3VS
VINR1/VIN2P VINL4/VIN4M AUDG_1861
C284 R259 C305 R309 AUDG_1861 *10K_04 10K_04 *10K_04 *10K_04 *2.2K_04
1u_16V_X7R_06 7.5K_1%_04 AUDG 1u_16V_X7R_06 100_1%_04 Mic_Bias 5 26 PCM_MD0 PCM_MD1 PCM_MD4 Mic_Bias
ADC_VINL Mic Bias MD0
27,29 FRONT_L PCM_MD1 PCM_MD0 PCM_MD3
AUDG_1861 PC172 2.2u_6.3V_X5R_04 6 25 R854 R852 R848
C321 VREF MD1
R258 7 24 PCM_MD3
ADC_3.3VS_D 3.3VS AUDG_1861 AGND MD3
3900P_50V_X7R_04 *10K_04 *10K_04 *10K_04
*22K_04 8 23 PCM_MD2 PCM_MD6 R305 R307 R849 R845 R844 C840
ADC_3.3VS_A AVDD MD2
R341 3.3_06
AUDG_1861 9 PCM1861DBTR 22 PCM_MD4 PCM_MD5
C318 C319 AUDG XO MD4
10 21 PCM_MD5 PCM_MD2 10K_04 *10K_04 10K_04 10K_04 *10K_04 4.7u_6.3V_X5R_06
0.1u_16V_Y5V_04 10u_6.3V_X5R_06 XI MD5
A A
R785 *0_04 PCM_INT PC173 2.2u_6.3V_X5R_04 11 20 PCM_MD6 R853 R851 R847
16 PCM_INT_1863 GND_AUDIO LDO MD6 GND_AUDIO GND_AUDIO AUDG_1861
GND_AUDIO GND_AUDIO 12 19 PCM_INT GND_AUDIO GND_AUDIO AUDG_1861
GND_AUDIO DGND INT
ADC_DOUT
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
ADC_3.3VS_A 3.3VS 13 18 R783 10K_04 10K_04 10K_04
ADC_3.3VS_D DVDD DOUT
R342 3.3_06 R338 *20mil_P_04 R308 *20mil_P_04 14 17 ADC_BCLK
R862 *20mil_P_04 C320 *1000p_50V_X7R_04 IOVDD BCK GND_AUDIOGND_AUDIO Title
C841 C347
16,18,28,34,44 SMB_DATA
R340 *22_04 PCM_MD2 R303 *20mil_P_04 C346 *0.1u_16V_Y5V_04 ADC_MCLK1 15
SCKI LRCK
16 ADC_LRCK 10K_04 GND_AUDIO [28] PCM1861+TAS5766DCA
0.1u_16V_Y5V_04 10u_6.3V_X5R_06 for EMI Size Document Number Rev
16,18,28,34,44 SMB_CLK
R339 *22_04 PCM_MD3 GND_AUDIO AUDG_1861 GND_AUDIO
29 AMP_PW R A3 SCHEMATIC1 6-71-P77F0-D02 2.0
7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51 3.3VS
AUDG_1861 AUDG_1861 Date: Monday, August 28, 2017 Sheet 28 of 69
5 4 3 2 1
PCM1861 + TAS5766DCA B - 29
Schematic Diagrams
Subwoofer
5 4 3 2 1
AMP POWER 10V VIN
MP8715DN-LF-Z PR216 PC151 PL9
PU14 4.7_06 0.1u_10V_X7R_04 BCIHP0730-4R7M 10V AMP_PW R
PR215
1
IN BST
3 4.7UH_6.8*7.3*3.5
PCB Footprint = BCIHP0735A 10V/6A PJ40
OPEN-5mm
4 2 2 1
EN/SYNC SW
R826
PR219
3K_1%_04
PC162
PC175
D 7 5 PR223 D
100K_1%_04 VCC FB
1
4.7u_25V_X5R_08
PR208
POK
8 9 *0_04 + + *0_12
PR214 SS GND
*100K_1%_04
115K_1%_04
10u_25V_X5R_08
10u_25V_X5R_08
10u_25V_X5R_08
*1000p_50V_X7R_04
0.1u_25V_X7R_06
6
180u_16V_6.3*5.8
180u_16V_6.3*5.8
PC167
2
PC161
100K_1%_04 PC174
PR222
0.01u_25V_X7R_04
*0.01u_50V_X7R_04
PR221
PC146
PC147
PC145
PQ35A
PC142
PC148
100K_1%_04
3
MTDK5S6R D D
PJ51 PR211
10K_1%_04
SUSB# 2G *CV-40mil 5G
15,21,28,31,37,43,44,46,48 SUSB# S S PQ35B
100K_1%_04
4
B.Schematic Diagrams
MTDK5S6R
PR220
10V 10V
Sheet 29 of 69 SUB WOOFER { ẞ
FOR P775DMᶲ }
{ ᶲẞ
FOR P750DMᶵ } C729 C804 C807 C730 C808 C728 C731
Subwoofer
10
16
26
32
U52
1
R825
10u_25V_X5R_08
10u_25V_X5R_08
4.7u_25V_X5R_08
0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
C AMP_3V3LDO *10K_04 C
VLDO
LVDDN
LVPPD
RVDDP
RVDDN
AMP_EN 17 21 OSCIN
28 AMP_EN SD OSCIN
R822 *10mil_short 19 20
MUTE OSOC R821
R802 R803 R804 R805 R824 AUDG_2607 C764 0.1u_10V_X7R_04 6 11
*10K_04 *10K_04 *10K_04 *10K_04 120K_04 RINN ROUTP1 12
R797 C802 0.1u_10V_X7R_04 7 ROUTP2 10K_04 AUDG_2607 AUDG_2607 AUDG_2607
6.34K_1%_04 20 Mil RINP 13 AUDG_2607 AUDG_2607
2CH_SUBW OOFER_RC C762 0.1u_10V_X7R_04 4 RGND AUDG_2607 AUDG_2607 10V
GAIN1_R LINN 14
GAIN0_R C761 0.1u_10V_X7R_04 3 APA2607QBI ROUTN1 15
DRC1_R AUDG_2607 LINP ROUTN2 L39
DRC0_R R795 R796 PFLAG 18 31 HCB1005KF-121T20 J_SUBW OOF1 C805 C806 C727 C803
GAIN1_R PFLAG LOUTP2 40 mil
PFLAG 25 30 SUBW OOFER+
100K_1%_04 *100K_1%_04 GAIN0_R 24 GAIN1 LOUTP1 2
10u_25V_X5R_08
10u_25V_X5R_08
10u_25V_X5R_08
10u_25V_X5R_08
DRC1_R 23 GAIN0 29 L40 1
R798 R799 R800 R801 R823 AMP_3V3LDO DRC0_R 22 DRC1 LGND HCB1005KF-121T20 88266-02001
10K_04 10K_04 10K_04 10K_04 *120K_04 DRC0 27 SUBW OOFER-
LOUTN1 4 Ohm Speaker
Case_GND
C859
C860
AUDG_OP AUDG_2607 2 28
3V3LDO LOUTN2
40 mil
AGND
VREF
R820 18K_1%_04 PMAX 9
PMAX
10V 5VS OP_PW R
1000p_50V_X7R_04
1000p_50V_X7R_04
AUDG_2607 AUDG_2607 AUDG_2607 AUDG_2607 AUDG_2607
AUDG_2607 AUDG_2607 C760 R819 AUDG_2607 AUDG_2607
33
R736 *0_06
R737 0_06 0.1u_10V_X7R_04 10K_04
R917 㒢
婳
⛐R9㕩(妋WO OFER NO I S E )
11
B C763 R817 *20mil_P_04 B
R787 AUDG_2607 AUDG_2607 0.1u_10V_X7R_04
100K_04 R867 *20mil_P_04 R818 *20mil_P_04
OP_PW R
C801 0.1u_16V_Y5V_04
OP_PW R AUDG_2607 GND_AUDIO
R786 C800 0.1u_16V_Y5V_04
8
33K_1%_04
3 R784 FILTER C716 0.47u_6.3V_X5R_04 AUDG_OP
FC: 440Hz
V+
27,28 FRONT_R +
C756 3.32K_1%_04 AUDG_2607 GND_AUDIO
0.1u_10V_X7R_04 1 SUB_R R790 *0_04 OP_PW R
R788 OUT R754 R732 U51B
8
100K_04 2 U50A 1.4K_1%_04 1.4K_1%_04
V-
- LM358G C757 0.1u_10V_X7R_04 OUTPUT1 INPUT2+ 5 SUB Woofer out
V+
+
4
OP_PW R R735 C717 7 2CH_SUBW OOFER_RC
AUDG_OP R789 R793 U51A C726 OUT
8
R731 AUDG_OP 3.32K_1%_04 3.32K_1%_04 6
*4.3K_1%_04
0.1u_10V_X7R_04
V-
100K_04 SUB_L 3 *0.1u_10V_X7R_04 - R733
V+
+ LM358G
OP_PW R
4
OP_PW R 1 0_04
R730 OUT AUDG_OP
8
33K_1%_04 C758 R794 C759 2 INPUT2- AUDG_OP
V-
5 - OP_PW R OP_PW R
*0.1u_10V_X7R_04
V+
27,28 FRONT_L +
C714 LM358G R791
*4.3K_1%_04
0.1u_10V_X7R_04
4
0.1u_10V_X7R_04 7 0_04 R734
R753 OUT C277 C715 AUDG_OP
100K_04 6 U50B AUDG_OP *100K_04
0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
V-
- LM358G
A A
4
R792
*100K_04 AUDG_OP
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
AUDG_OP AUDG_OP
AUDG_OP AUDG_OP
Title
R816 *20mil_P_04 AUDG_OP AUDG_OP AUDG_OP [29] SUBWOFFER
Size Document Number Rev
AUDG_OP GND_AUDIO
11,15,30,43,44,45,46,47,48,49,50,51,52
28
VIN
AMP_PW R A3 SCHEMATIC1 6-71-P77F0-D02 2.0
11,14,15,16,27,30,32,34,44,46,47 5VS
Date: Monday, August 28, 2017 Sheet 29 of 69
5 4 3 2 1
B - 30 Subwoofer
Schematic Diagrams
EC IT8587
1 2 3 4 5 6 7 8
IT8587 KBC_AVDD
MODEL_ID RA RB PROJECT NAME
VDD3 VDD3
L10 V1.0 10K X P775FM 5VS
HCB1005KF-121T20 R629 R628
R672 *10mil_short . V1.0 X 10K P750FM
VDD3 VDD3
2
5VS Q11A 2.2K_04 2.2K_04
G
C607 C623 C610 C609 C160 V1.0 10K 10K
1 6 KBC_SMBus_CLK1
15,28,32 SMC_VGA_THERM
10u_10V_Y5V_08 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
D
VDD3 MTDK5S6R
G
RA
C613 MODEL_ID R138 10K_04 4 3 KBC_SMBus_DAT1
15,28,32 SMD_VGA_THERM
A KBC_AGND A
D
L28 HCB1005KF-121T20 0.1u_16V_Y5V_04 R139 *10K_04 MTDK5S6R
Q11B
3.3VS
.
EMI Solution P775 RA&RBᶲ
ẞ RB R955 0_04
ACE_I2C_SCL2 39,40
114
121
127
R956 0_04
11
26
50
92
74
ACE_I2C_SDA2 39,40
3
U44A OPTION ẍ
嬲≽ὅ
(⎗ EC㍸ ὃ䘬 E X E C L 堐)
㛒⛐ E X E CL堐ᷕ䘬≇傥⎗ẍ冒 埴 ␥ ⎵ U44B R636
VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VSTBY6
VCC
AVCC
VBAT
10 58 10K_04
20,31,42 LPC_AD0 GPM0/LAD0 KSI0/STB#
9 59 76 100 VDD3
20,31,42 LPC_AD1 GPM1/LAD1 KSI1/AFD# 15 VGA_THROTTLE GPJ0/TACH2 5VT/SSCE0#/GPG2
8 60 80
20,31,42 LPC_AD2 GPM2/LAD2 KSI2/INIT# 31 KBC2_ADC GPJ4/DAC4/DCD0#
7 61 81
20,31,42 LPC_AD3 GPM3/LAD3 KSI3/SLIN# 33 VGA_FAN GPJ5/DAC5/RIG0#
13 62
20,31 PCLK_KBC GPM4/LPCCLK KSI4
6 LPC 63 78 56
20,31,42 LPC_FRAME# GPM5/LFRAME# KSI5 GPJ2/DAC2//TACH0B KSO16/SMOSI/GPC3 BT_EN 25
R622 *0_04 5 64 57
B.Schematic Diagrams
20,31,42 SERIRQ GPM6/SERIRQ KSI6 KSO17/SMISO/GPC5 W LAN_EN 25
16,25,26,31,35,37,41 BUF_PLT_RST#
22
GPD2/LPCRST#/5VT KSI7
65
31 KBC2_DAC
68
GPI2/ADC2
⚢⭂ἧ 䓐 FOR WLAN
K/B MATRIX IT8587
VDD3 R639 100K_04 KBC_W RESET# 14 36
C612 0.1u_16V_Y5V_04 WRST# KSO0/PD0 37 71 93
KSO1/PD1 25 3G_EN GPI5/ADC5/DCD1# 5VT/CLKRUN#/ID0/GPH0 PM_CLKRUN# 18,42
126 38 72 R921 *0_04
GPB5/GA20 KSO2/PD2 15,17 TH_OVERT#1 GPI6/ADC6/DSR1# TBTA_HRESET 16,39,40
4 39 94
52 AC_IN# GPB6/KBRST# KSO3/PD3 5VT/CRX1/SIN1/SMCLK3/ID1/GPH1 EC_CTRL_EN# 32
OPTION 16 40 R949 0_04
33 LED_ACIN GPC7/PWUREQ#/BBO/SMCLK2ALT KSO4/PD4 GPU_PW R_EN# 15,19
20 41
16,17,18,21
18 AC_PRESENT
PM_PCH_PW ROK
R653 *0_04
23
GPE7/L80LLAT/5VT KSO5/PD5
KSO6/PD6
KSO7/PD7
42
43
44
31 KBC_SMBus_CLK1
KBC_SMBus_CLK1 115
KBC_SMBus_DAT1 116 GPC1/SMCLK1/5VT
5VT/ID3/GPH3
5VT/ID4/GPH4
96
97
98
KBC2_GPIO0
KBC2_GPIO1
31
31
Sheet 30 of 69
20,31 SMI# KBC_SCI# 15 GPD3/ECSCI#/5VT KSO8/ACK# 31 KBC_SMBus_DAT1 GPC2/SMDAT1/5VT 5VT/ID5/GPH5 KBC2_GPIO2 31
45 R922 *0_04 118 99
B
28 KBC_MUTE#
R971 10K_04
77
GPD4/ECSMI#
GPJ1
DAC
KSO9/BUSY
KSO10/PE
KSO11/ERR#
46
51
52
16,39,40 TBTA_MRESET
24
GPF7/SMDAT2/PECIRQT# 5VT/ID6/GPH6
5VT/EGAD/GPE1
82
83
W LAN_PW R_EN
ECPIN82
ECPIN83
25
B
EC IT8587
KSO12/SLCT 26 EC_SSD_LED# GPA0/PWM0/5VT 5VT/EGCS#/GPE2
53 84
33 CPU_FAN
C618
CPU_FAN
0.1u_16V_Y5V_04
79
GPJ3/DAC3/TACH1B
IT8587 KSO13
KSO14
54
55
33 CPU_FAN_PW M
28
29 GPA2/PWM2/5VT
5VT/EGCLK/GPE3
48
DGPU_PW R_EN 15
KSO15 31 EC_EN GPA3/PWM3/5VT TACH1/TMA1/GPD7 VGA_FANSEN 33
ADC 30 119
BAT_DET 33 VGA_FAN_PW M GPA4/PWM4/5VT 5VT/CRX0/GPC0 ALL_SYS_PW RGD 11,21
66
BAT_VOLT 67 GPI0/ADC0 2
GPI1/ADC1 CK32KE/GPJ7 GPIO_FB_CLAMP 17
69 128
2 THERM_VOLT GPI3/ADC3 CK32K/GPJ6
70 125 R948 0_04
52 TOTAL_CUR GPI4/ADC4 31 KBC2_INT# GPE4/PWRSW GC6_FB_EN 15,19
106
MODEL_ID 5VT/SSCE1#/VCEN/TM/GPG0 CCD_EN 24
73 IT8587E/FX
GPI7/ADC7/CTS1# 3G_PW R_EN 25
107 EC pin 128 CK32K/GPJ6 婳
EC 姕
⭂䁢GP
O
I
5VT/( PD )DTR1#/SBUSY/ID7/GPG1 DD_ON 23,45,46
SMBUS
31,52 SMC_BAT
R132 47_04 KBC_SMBus_CLK0 110
GPB3/SMCLK0/5VT
RSMRST# PCH & EC ⎒PUL
暨 ᶨ
L DOW
N 怲,
㑯
1
31,52 SMD_BAT
R134 47_04 KBC_SMBus_DAT0 111
GPB4/SMDAT0/5VT 5VT/CTX1/SOUT1/DAT3/ID2/GPH2
95
BKL_EN 11 DEFAULT㓡
ᶲẞ ,(⤪
㰺 㚱 ᶲẞ
, R T C 便 暣忶
⣏)
EC_PECI117 R671 10K_04 VDD3
R632 43_1%_04 GPF6/SMCLK2/PECI 35 EC_RSMRST#
3,17 H_PECI 5VT/RTS1#/GPE5 17
DEBUG PORT 3G_EN R118 10K_04
5VT/LPCPD#/GPE6 SB_KBCRST# 20 TH_OVERT#1
C608 *5PF_50V_X5R_04 VDD3 R137 *10K_04
PWM 47 KBC2_ADC R640 10K_04
TACH0A/GPD6 CPU_FANSEN 33
27 KBC_BEEP
25
GPA1/PWM1/5VT
Pin 㓡gpi o
66~73䔞 ⎒傥in pu t SMC_BAT R130 1.5K_04
SMD_BAT
33 LED_BAT_CHG
31
GPA5/PWM5/5VT TMRI0/GPC4
120
USB_CHARGE_EN 45,46
J_80DEBUG1 㱽oupu t ᶼ
䃉 ⢾悐天 pull hi gh . R136 1.5K_04
32 124 BAT_DET R374 10K_1%_04
33 LED_BAT_FULL GPA6/PWM6/SSCK/5VT TMRI1/GPC6 PM_PW ROK 21 1
34 3IN1
33 LED_PW R GPA7/PWM7/RIG1#/5VT 2
80CLK
123 3
PS/2 CTX0/TMA0/GPB2 LAN_W AKE# 35 4
80CLK 85 CABLE_DET R674 100K_04
C 26 80CLK GPF0/PS2CLK0/TMB0/CEC/5VT C
3IN1 87 *85204-04001
26 3IN1 GPF2/PS2CLK1/DTR0#/5VT KBC_SMBus_CLK0
19 R129 *1.5K_04
5VT/L80HLAT/BAO/GPE0 SW I# 17,18 KBC_SMBus_DAT0
86 R135 *1.5K_04
18,31 SUSB#_PCH GPF1/PS2DAT0/TMB1/5VT
88
18,31 SUSC#_PCH GPF3/PS2DAT1/RTS0#/5VT 112 R235 0_04
BATT_BOOST# 89 5VT/RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 SLP_SUS# 18,45,46
R676 *0_04 90 GPF4/PS2CLK2/5VT R968 0_04
18 PCH_SLP_SUS# GPF5/PS2DAT2/5VT ME_W E 18
R675 0_04 ECPIN82 R289 *0_04
15 CABLE_DET NV_MXM_ID 15
WAKE UP R290 *0_04
DGPU_PW RGD 15,17
18 R601 *0_04
31,46 PW R_SW # GPD0/RI1# DGPU_RST# 15
21 ECPIN83 R312 *0_04
11,33 LID_SW # GPD1/RI2#/5VT VDD3 EC_NV3V3_EN 47
101 ALSPI_CE# R635 0_04
5VT/FSCE#/GPG3 ALSPI_MSI HSPI_CE# 16
GP INTERRUPT 102 R634 0_04
5VT/FMOSI/GPG4 ALSPI_MSO HSPI_MSI 16 VDD3 VDD3
33 103 R633 0_04
18 PW R_BTN# GPD5/GINT/CTS0#/5VT 5VT/FMISO/GPG5 ALSPI_SCLK HSPI_MSO 16 VDD3
105 R631 0_04 R684
5VT/FSCK/GPG7 HSPI_SCLK 16
UART U46
5
108 104 47K_04 U74AHC1G08G-AL5-R C
32 TP_PW R_EN GPB0/RXD/SIN0/5VT 5VT/DSR0#/GPG6 AIRPLAN_LED# 33
109 R673 1 AC
3 H_PROCHOT_EC GPB1/TXD/SOUT0/5VT 30,31,52 SMC_BAT
4 D47 A
D
RSMRST# 18
47K_04 2 BAV99 RECTIFIER
Q58 C
VCORE
AVSS
VSS1
VSS3
VSS4
VSS5
VSS6
VSS7
G 2SK3018S3 AC
3
30,31,52 SMD_BAT
D46 A
C
S
D13 BAV99 RECTIFIER
IT8587E/FX VIN C A R199 90.9K_1%_04 B Q14 C
12
1
27
49
91
113
122
75
RB751V-40(lision) D10 3.3VS BTN3904 AC
KBC_SCI# 52 BAT_DET
A C ZD5231BS2 D29 A
17 SCI#
E
Q54 EC_RSMRST# C858 1u_6.3V_X5R_04 BAV99 RECTIFIER
G
D 52 BAT_VOLT D
C158 R128 2SK3018S3 R198
3.3VS *10mil_short BAV99: 6-06-00993-011
0.1u_16V_Y5V_04 S D BATT_BOOST# 20K_1%_04
15 TH_ALERT#1
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
5
R618 *0_04
1 KBC_AGND
4
2 Title
U14
KBC2_SCI# 31
J_FLASH1
KBC_SMBus_CLK0 VIN 11,15,29,43,44,45,46,47,48,49,50,51,52
[30] EC IT8587
*MC74VHC1G08DFT2G R131 33_04
3
2 KBC_SMBus_DAT0 5VS 11,14,15,16,27,29,32,34,44,46,47 Size Document Number Rev
R133 33_04
1 3.3VS
VDD3
7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,31,32,33,34,36,38,41,42,43,44,46,47,49,51
15,16,17,18,20,21,25,26,31,33,35,43,45,46,47,51,52
A3 SCHEMATIC1 6-71-P77F0-D02 2.0
88266-02001
Date: W ednesday, October 25, 2017 Sheet 30 of 69
1 2 3 4 5 6 7 8
EC IT8587 B - 31
Schematic Diagrams
Second EC IT8587
5 4 3 2 1
KBC_AVDD2 L31
R140 *10mil_short HCB1005KF-121T20
VDD3 3.3V 2,11,15,17,24,25,27,38,42,43,44,46,47,51
. VDD3 3.3VS 7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,32,33,34,36,38,41,42,43,44,46,47,49,51
C653 C617 C622 C161
VDD3 15,16,17,18,20,21,25,26,30,33,35,43,45,46,47,51,52
C655 C654 C639
0.1u_16V_Y5V_04 10u_10V_Y5V_08 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04
C621 P770 ᶲ
ẞ
L29 HCB1005KF-121T20 0.1u_16V_Y5V_04 KBC_AGND
EC_VCC
3.3VS
. Backlight KB 15" Backlight KB 17"
D
EMI Solution D
114
121
127
11
26
50
92
74
3
U45
VCC
AVCC
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VBAT
10 58 KB-SI0 KB-SI0 25 KB-SI0 25
20,30,42 LPC_AD0 LAD0 KSI0/STB#
9 59 KB-SI1 KB-SI1 24 KB-SI1 24
20,30,42 LPC_AD1 LAD1 KSI1/AFD#
8 60 KB-SI2 KB-SI2 23 KB-SI2 23
20,30,42 LPC_AD2 LAD2 KSI2/INIT#
7 61 KB-SI3 KB-SI3 22 KB-SI3 22
20,30,42 LPC_AD3 LAD3 KSI3/SLIN#
13 62 KB-SI4 KB-SI4 21 KB-SI4 21
20,30 PCLK_KBC LPCCLK KSI4
6 63 KB-SI5 KB-SI5 20 KB-SI5 20
20,30,42 LPC_FRAME# LFRAME# KSI5
R620 0_04 5 LPC K/B MATRIX 64 KB-SI6 KB-SI6 19 KB-SI6 19
20,30,42 SERIRQ SERIRQ KSI6
22 65 KB-SI7 KB-SI7 18 KB-SI7 18
16,25,26,30,35,37,41 BUF_PLT_RST# LPCRST#/WUI4/GPD2 KSI7
B.Schematic Diagrams
R683 100K_04 KBC2_W RESET# 14 36 KB-SO0 KB-SO0 1 KB-SO0 1
VDD3 WRST# KSO0/PD0
C620 0.1u_16V_Y5V_04 37 KB-SO1 KB-SO1 2 KB-SO1 2
15 KSO1/PD1 38 KB-SO2 KB-SO2 3 KB-SO2 3
30 KBC2_SCI# ECSMI#/GPD4 KSO2/PD2 39 KB-SO3 KB-SO3 4 KB-SO3 4
KSO3/PD3 40 KB-SO4 KB-SO4 5 KB-SO4 5
KSO4/PD4 41 KB-SO5 KB-SO5 6 J_BLKB15_1 KB-SO5 6 J_BLKB17_1
KSO5/PD5 42 KB-SO6 KB-SO6 7 *85219-2607N KB-SO6 7 85219-2607N
DAC KSO6/PD6
76 43 KB-SO7 KB-SO7 8 KB-SO7 8
27 HP_PLUG
Sheet 31 of 69 3.3VS 30 KBC2_DAC
77
78
79
GPJ0
GPJ1
DAC2/GPJ2
DAC3/GPJ3
KSO7/PD7
KSO8/ACK#
KSO9/BUSY
KSO10/PE
44
45
46
KB-SO8
KB-SO9
KB-SO10
KB-SO8
KB-SO9
KB-SO10
9
10
11
KB-SO8
KB-SO9
KB-SO10
9
10
11
80 51 KB-SO11 KB-SO11 12 KB-SO11 12
Second EC IT8587 81 DAC4/GPJ4
DAC5/GPJ5
KSO11/ERR#
KSO12/SLCT
KSO13
KSO14
52
53
54
KB-SO12
KB-SO13
KB-SO14
KB-SO12
KB-SO13
KB-SO14
13
14
15
KB-SO12
KB-SO13
KB-SO14
13
14
15
55 KB-SO15 KB-SO15 16 KB-SO15 16
*100K_04
*100K_04
ADC
IT8587 KSO15
R219
R220
C 56 KB-SO16 KB-SO16 17 KB-SO16 17 C
66 KSO16/GPC3 57 KB-SO17 KB-SO17 26 KB-SO17 26
30 KBC2_ADC ADC0/GPI0 KSO17/GPC5
67
KB-SO23 R970 *0_04 68 ADC1/GPI1
25 3G_RST# ADC2/GPI2
69 108 KB-SO18 KB-SO18 1 KB-SO18 1
KB-SO24 70 ADC3/GPI3 RXD/GPB0 109 KB-SO19 KB-SO19 2 KB-SO19 2
71 ADC4/GPI4 TXD/GPB1 123 KB-SO20 KB-SO20 3 KB-SO20 3
ADC5/GPI5 K/B 2" CTX/GPB2
72 126 KB-SO21 KB-SO21 4 KB-SO21 4
73 ADC6/GPI6 GA20/GPB5 4 KB-SO22 KB-SO22 5 KB-SO22 5
ADC7/GPI7 KBRST#/GPB6 119 KB-SO23 6 KB-SO23 6
CRX/GPC0 16 KB-SO24 7 KB-SO24 7
KBC2_SMBus_CLK0
SMBUS PWUREQ#/GPC7
R649 *47_04 110 18 KB-SO25 KB-SO25 8 KB-SO25 8
30,52 SMC_BAT KBC2_SMBus_DAT0 SMCLK0/GPB3 RI1#/WUI0/GPD0
R648 *47_04 111
30,52 SMD_BAT KBC2_SMBus_CLK1 SMDAT0/GPB4
R646 0_04 115 21 KB-SO26 KB-SO26 9 KB-SO26 9
30 KBC_SMBus_CLK1 KBC2_SMBus_DAT1 SMCLK1/GPC1 RI2#/WUI1/GPD1
R645 0_04 116 23 KB-SO27 KB-SO27 10 J_BLKB15_2 KB-SO27 10 J_BLKB17_2
30 KBC_SMBus_DAT1 EC2_SMB_CLK SMDAT1/GPC2 ECSCI#/GPD3
117 33 KB-SO28 KB-SO28 11 *50584-0260N-001 KB-SO28 11 50584-0260N-001
EC2_SMB_DAT 118 SMCLK2/GPF6 GINT/GPD5 47 KB-SO29 KB-SO29 12 KB-SO29 12
SMDAT2/GPF7 TACH0/GPD6 48 KB-SO30 KB-SO30 13 KB-SO30 13
TACH1/GPD7 19 KB-SO31 KB-SO31 14 KB-SO31 14
PWM L80HLAT/GPE0
24 82 KB-SO32 KB-SO32 15 KB-SO32 15
R691 *0_04 25 PWM0/GPA0 EGAD/GPE1 83 KB-SO33 KB-SO33 16 KB-SO33 16
20,30 SMI# PWM1/GPA1 EGCS#/GPE2
VDD3 28 125 KB-SO34 KB-SO34 17 KB-SO34 17
33 LED_SCROLL# PWM2/GPA2 PWRSW/GPE4
29 35 KB-SO35 KB-SO35 18 KB-SO35 18
33 LED_NUM# PWM3/GPA3 WUI5/GPE5
30 17 KB-SO36 KB-SO36 19 KB-SO36 19
33 LED_CAP# PWM4/GPA4 LPCPD#/WUI6/GPE6
R650 1.5K_04 KBC2_SMBus_CLK0 31 20 KB-SO37 KB-SO37 20 KB-SO37 20
R647 1.5K_04 KBC2_SMBus_DAT0 32 PWM5/GPA5 L80LLAT/GPE7 85 KB-SO38 KB-SO38 21 KB-SO38 21
34 PWM6/GPA6 PS2CLK0/GPF0 86 KB-SO39 KB-SO39 22 KB-SO39 22
R961 1.5K_04 EC2_SMB_CLK PWM7/GPA7 PS2DAT0/GPF1 87 KB-SO40 KB-SO40 23 KB-SO40 23
R962 1.5K_04 EC2_SMB_DAT PS2CLK1/GPF2 88 KB-SO41 KB-SO41 24 KB-SO41 24
B
PS/2 PS2DAT1/GPF3 B
89 93 KB-SO42 KB-SO42 25 KB-SO42 25
34 TP_CLK PS2CLK2/GPF4 ID0/GPH0
90 94 KB-SO43 KB-SO43 26 KB-SO43 26
34 TP_DATA PS2DAT2/GPF5 ID1/GPH1 95 KB-SO23
ID2/GPH2
PWM/COUNTER
120 FLASH 100 R652 100K_04
30,46 PW R_SW # TMRI0/WUI2/GPC4 FLFRAME#/GPG2 KBC2_SPI_CE# VDD3
124 101 For Auto load code
30 KBC2_INT# TMRI1/WUI3/GPC6 FLAD0/SCE# KBC2_SPI_SI
J_FLASH2 102 VDD3
R124 33_04 KBC2_SMBus_CLK0 FLAD1/SI 103 KBC2_SPI_SO U15
2 KBC2_SMBus_DAT0
EXT GPIO FLAD2/SO KBC2_SPI_SI
R123 33_04 84 104 8 5 R167 47_04
1 18,30 SUSC#_PCH EGCLK/GPE3 FLAD3/GPG6 KBC2_SPI_SCLK VDD SI KBC2_SPI_SO
105 2 R180 15_1%_04
88266-02001 FLCLK/SCK 106 C168 SO 1 R651 15_1%_04 KBC2_SPI_CE#
LPC/WAKE UP FLRST#/WUI7/TM/GPG0 CE# KBC2_SPI_SCLK
112 6 R168 47_04
18,30 SUSB#_PCH RING#/PWRFAIL#/LPCRST#/GPB7 SCK
R181 1K_04 3
0.1u_16V_Y5V_04
96 WP# C167
CLOCK GPIO ID3/GPH3 KBC2_GPIO0 30
2 97
CK32KE ID4/GPH4 KBC2_GPIO1 30
128 98 *20p_50V_NPO_04
CK32K ID5/GPH5 KBC2_GPIO2 30
99 KB-SO24 R169 4.7K_04 7 4
ID6/GPH6 HOLD# VSS
R644 107 GD25D10BTIGR
( PD )ID7/GPG1
AVSS
M-SO8 6-04-02510-A91
VSS
VSS
VSS
VSS
VSS
VSS
VSS
10K_04
VDD3
IT8587E/FX U59
12
1
27
49
91
113
122
75
5
U74AHC1G08G-AL5-R
GND 1
30 EC_EN
4
SUSC#_PCH SUSC# 18,44,46,47
C619 2
EC2_SMB_CLK R120 0_04 NC1 SHORT
EC2_SMB_DAT R122 0_04 0.1u_16V_Y5V_04
A A
3
R957 *0_04
16 I2C1_SCL R119 *0_04 I2C_CLK 27 KBC_AGND
VDD3
U60
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
5
U74AHC1G08G-AL5-R
R121 *0_04 1 Title
16 I2C1_SDA I2C_DATA 27
SUSB#_PCH 2
4
SUSB# 15,21,28,29,37,43,44,46,48 [31] SECOND EC IT8587
Size Document Number Rev
6-71-P77F0-D02 2.0
3
A3 SCHEMATIC1
R958 *0_04 Date: Monday, August 28, 2017 Sheet 31 of 69
5 4 3 2 1
B - 32 Second EC IT8587
Schematic Diagrams
Backlight Keyboard
5 4 3 2 1
BACKLIGHT KEYBOARD
D D
3.3VS
R467 *15mil_short
5VS U35
DEFAULT PJ11 SHORT 9
R468 *0_06 32 7 KBZONE1_B J_KBLED_1
VDD LED0 8 KBZONE1_R 1 2 KB_LED_PW R R250 *28mil_06 KBPW R_G
LED1 KBZONE1_G 5VS_2 1
C449 C455 10 PJ13 OPEN_2A R200 49.9_1%_06 KBPW R_R
2 LED2 R201 *28mil_06 KBPW R_B 2
A0 KBZONE2_B KBZONE1_B 3
0.1u_10V_X7R_04
*0.1u_10V_X7R_04
3 11
R463 R464 R465 4 A1 LED3 12 KBZONE2_R C294 KBZONE1_R 4
5 A2 LED4 13 KBZONE2_G 4.7u_25V_X5R_08 KBZONE1_G 5
B.Schematic Diagrams
*10K_04
*10K_04
*10K_04
6 A3 LED5 KBZONE2_B 6 NC2
28 A4 15 KBZONE3_B KBZONE2_R 7
29 A5 LED6 16 KBZONE3_R KBZONE2_G 8 NC1
A6 LED7 17 KBZONE3_G KBZONE3_B 9
27 LED8 KBZONE3_R 10
R461 0_04 30 OE# 18 TPLED_B KBZONE3_G 11
15,28,30 SMC_VGA_THERM SCL LED9 TPLED_R 12
R460 0_04 31 20
15,28,30 SMD_VGA_THERM SDA LED10 TPLED_G
21 FP225H-012S10M
R462 1
9
14
VSS
VSS
LED11
LED12
22
23
TPLED_B1
TPLED_R1
ἧ䓐ᶳ ㍍ 妠 CO NN
Sheet 32 of 69
VSS LED13 TPLED_G1
10K_04
19 25
Backlight
R466
24 VSS LED14 26
*0_04
VSS LED16
C C
PCA9622
30 EC_CTRL_EN# Keyboard
ᶵ
㝄
⤪枸 䔁EC p in ㍏⇞PC A 96 22 ,
,OE# 天pull low.
5VS_TP
5VS_2 Q35 5VS_TP
>120 mil *AO3415 >120 mil J_TPLED1
S D
1
2
C456 C465 TPLED_B 3
G
C467 *1u_6.3V_X5R_04 TPLED_R 4
*1u_6.3V_X5R_04
*0.1u_16V_Y5V_04 *4.7u_6.3V_X5R_06 TPLED_G 5
B 6 B
7
C466
R476 R475
8
*20K_1%_04 *10_06 9
*FP225H-009S10M
R483 *100K_04 PCB Footprint = fp225h-009xxxm
3
D
6
ẞ
D
5 G Q36B { FOR P750DMᶲ }
ᶲẞ }
2 G Q36A S *MTDK5S6R
30 TP_PW R_EN
{ FOR P775DMᶵ
4
S *MTDK5S6R
1
A A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[32] BACKLIGHT KEYBOARD
Size Document Number Rev
11,14,15,16,27,29,30,34,44,46,47
34,47,51
5VS
5VS_2 SCHEMATIC1 6-71-P77F0-D02 2.0
7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,33,34,36,38,41,42,43,44,46,47,49,51 3.3VS
Date: Monday, August 28, 2017 Sheet 32 of 69
5 4 3 2 1
Backlight Keyboard B - 33
Schematic Diagrams
LID SW, Fan, LED Conn
5 4 3 2 1
CPU FAN CONTROL VGA FAN CONTROL
CPU_FAN_PW R CPU_FAN_OUT CPU FAN VGA_FAN_PW R VGA_FAN_OUT VGA FAN
D U13 U41 D
2A 1 8 12V FAN PWM FAN 2A 1 8 12V FAN PWM FAN
2 VOUT GND 7 2 VOUT GND 7
T-PAD
T-PAD
C_EN 3 VIN GND 6 U13 R959 V_EN 3 VIN GND 6
EN GND EN GND U41 R960
C163 C162 4 5 J_CPUFAN1 J_CPUFAN2 C606 C597 4 5
VSET GND VSET GND J_VGAFAN1 J_VGAFAN2
0.1u_16V_Y5V_04 4.7u_25V_X5R_08 NCT3941S 0.1u_16V_Y5V_04 4.7u_25V_X5R_08 NCT3941S
9
CPU_FAN 30 VGA_FAN 30
B.Schematic Diagrams
CPU_FAN VGA_FAN
CPU_FAN_OUT
J_CPUFAN1 VGA_FAN_OUT
J_VGAFAN1
1
C921 C616 2 1
3 C924 C568 2
Sheet 33 of 69 10u_25V_X5R_08 50273-0037N-001 3
*10u_25V_X5R_08 10u_25V_X5R_08 85204-03001
*10u_25V_X5R_08
J_FAN1
LID SW, Fan, 30 CPU_FANSEN
3.3VS
R638 4.7K_04
3
1
㬋㍺
30 VGA_FANSEN
3
J_FAN1
“㍺
R571 4.7K_04
LED Conn 3.3VS 1
C C
CPU_PWM_FAN VGA_PWM_FAN
VGA_FAN_PW R VGA_FAN_OUT
CPU_FAN_PW R CPU_FAN_OUT J_VGAFAN2
J_CPUFAN2 R960 *0_06
R959 *0_06 1
1 VGA_FANSEN 2
CPU_FANSEN 2 3
3 30 VGA_FAN_PW M 4
30 CPU_FAN_PW M 4 *85204-04001
*85205-04001 C926 C925 PCB Footprint = 85205-0400M
C923 C922
*100p_50V_NPO_04
*100p_50V_NPO_04 *100p_50V_NPO_04
*100p_50V_NPO_04
B B
CHARGE LED BOARD
J_CHARGE_LED1
6 LED_ACIN 30
POWER LED BOARD CONN (W/ LID) 5
4
3
LED_PW R 30
2 LED_BAT_FULL 30
1 LED_BAT_CHG 30
J_LED1 3.3VS FP225H-006S10M
M_BTN# 46 PCB Footprint = fp225h-006xxxm
1
2
3 LID_SW # 11,30 For EMI
4 AIRPLAN_LED# 30
A 5 LED_HDD# 26 A
C136
NC2 6 LED_NUM# 31
7 LED_CAP# 31
*0.01u_16V_X7R_04
NC1 8 LED_SCROLL# 31
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
9
10 VDD3
11
12 3.3VS Title
FP225H-012S10M
CPU_FAN_PW R 48
[33] LID SW,FAN,LED CONN
VGA_FAN_PW R 48 Size Document Number Rev
VDD3
3.3VS
15,16,17,18,20,21,25,26,30,31,35,43,45,46,47,51,52
7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,34,36,38,41,42,43,44,46,47,49,51
A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: W ednesday, October 25, 2017 Sheet 33 of 69
5 4 3 2 1
B - 34 LID SW, Fan, LED Conn
Schematic Diagrams
Fan, TP, FP, Multi-Con
5 4 3 2 1
FOR CLICK BOARD
FOR HDD BOARD
TP_VCC
J_SATA2 5VS TP_VCC
3.3VS 1 2
冲 ἧ䓐5 V S
3 1 2 4 R332 *0_04
5 3 4 6
TP (J_TP1) R334 R333 C340
5 6 SATA3_TXP 17
7 8
9 7 8 10 3.3VS 10K_04 10K_04 *10u_6.3V_X5R_06
D SATA3_TXN 17 D
㕘 ἧ䓐3.3
11 9 10 12
13 11 12 14 R331 0_04
TP (TM02706) VS TP_CLK TP_DATA
13 14 SATA3_RXN 17
15 16
17 15 16 18 C339 C338
5VS_2 17 18 SATA3_RXP 17
19 20
21 19 20 22 47p_50V_NPO_04
23 21 22 24 47p_50V_NPO_04
23 24 UIM_CLK 25
25 26
25 26 UIM_DATA 25
27 28
27 28 UIM_RST 25
29 30
29 30 UIM_PW R 25 TP_VCC
51049-03041-001
B.Schematic Diagrams
FOR 䔁
ESD枸
TP_VCC C313
*V15AVLC0402 2 1 D24 R335 R336 0.1u_10V_X7R_04
*V15AVLC0402 2 1 D23
TP_VCC *V15AVLC0402 2 1 D25 10K_04 10K_04
J_TP1
*V15AVLC0402 2 1 D26
1 TP_DATA Q21 Sheet 34 of 69
G
2 TP_CLK TP_DATA 31
2SK3018S3
3 TP_CLK 31
4
5
SMB_DATA_T
SMB_CLK_T Q22
S D SMB_DATA 16,18,28,44
Fan, TP, FP, Multi-
G
6 2SK3018S3
C 戭㞙ᶲẞ W/3G 戭
㞙ᶲẞ FP225H-006S10M C
H14
H8_0D2_8
H34
H6_0D3_8
H33
H6_0D3_8
H18
H6_0D3_7
M5
M-MARK
M7
M-MARK
M8
M-MARK
M6
M-MARK
PCB Footprint = fp225h-006xxxm S D SMB_CLK 16,18,28,44
Con
PCB Footprint = H6_0D3_8 PCB Footprint = H6_0D3_7 M1 M3 M2 M4
PCB Footprint = H6_0D3_8 M-MARK M-MARK M-MARK M-MARK
戭㞙ᶲẞ FOR SECURE PAD
H20 H3 H36 H1 H29 H2 H28 H27
H6_0B3_7D3_7 H3_0D2_3 H3_0D2_3 C111D111N C111D111N C111D111N C111D111N H3_0D2_3
3.3VS
J_FP1
1
2
3
4
戭㞙ᶲẞ 5 USB_PN2 20
H21 H24
6 USB_PP2 20
H6_0B3_7D3_7 H6_0B3_7D3_7 H11 H30
H8_0D5_2 H6_0b4_0d4_0 FP225H-006S10M
PCB Footprint = fp225h-006xxxm
B B
H9 H7 H10 H12 H16 H17 H8
H6_0D4_0 H6_0D4_0 H6_0D4_0 H6_0D2_8 H8_0D2_8 H8_0D2_8 H8_0D5_2
H26 H25 H35
H5 H4 H13 H6_0D2_8 H6_0D2_8 H8_0B6_0D2_8
2 2
R918 *0_06 1 3 3
4 1 4 1
5 5
A H8_0D2_8-NP MTH8_0D2_8 MTH8_0D2_8 A
3.3VS 7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,36,38,41,42,43,44,46,47,49,51
5VS 11,14,15,16,27,29,30,32,44,46,47
5VS_2 32,47,51
H23 H22 H6
2 2 2
3
4 1
3
4 1
3
4 1 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
5 5 5 Title
MTH8_0D2_8 MTH8_0D2_8 MTH8_0D2_8
[34] FAN,TP,FP,MULT CON
Size Document Number Rev
A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: W ednesday, October 25, 2017 Sheet 34 of 69
5 4 3 2 1
Fan, TP, FP, Multi-Con B - 35
Schematic Diagrams
LAN E2500
1 2 3 4 5 6 7 8
Qualcomm LAN (E2500) > ͺ>/E<ͺ
/Ĩ ƐǁŝƚĐŚ ƌĞŐƵůĂƚŽƌ ĂƉƉůŝĞĚ͕ ŵŽƵŶƚ ZĂ
VDD3
/Ĩ>KĂƉƉůŝĞĚ͕ŵŽƵŶƚ Zď
PR159 ȱȱŗ VDD33
AVDDVCO_A
VDD33
*15mil_short_06
0.1u_16V_X7R_04
0.1u_16V_X7R_04
C384 *4.7u_6.3V_X5R_06
1u_6.3V_X5R_04
*1u_6.3V_X5R_04
A A
VDD33
R418 R414 R439
C448 C447 C398 C399
4.7K_04 4.7K_04 4.7K_04
C421 Ra
10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04 0.1u_16V_X7R_04
R436 PU 10K on EC side
*1000P_50V_X7R_04
*10K_04 LED2_A
C400
C381
C401
C383
LED_ACT_A
LAN WAKE UP LED_LINK_A
R435 0_04
LAN_W AKE# 30
R440
PCIE_TXN7_GLAN
PCIE_TXP7_GLAN
CLK_PCIE_GLAN#
CLK_PCIE_GLAN
B.Schematic Diagrams
*10K_04
LAN_W AKEUP#_A C A PCIE_W AKE# FOR S5 WAKE UP ON LAN Rb
AVDDVCO_A
LED_LINK_A
LED_ACT_A
D34 RB751S-40C2 C402
DVDDL_A
AVDDL_A
LX_A
ȱȱŚŖ L22 La
LX_A
R926 *0_04
. 0.1u_16V_X7R_04
C382 C380 C379 SW F2520CF-4R7M-M
Cc Cb Ca
41
40
39
38
37
36
35
34
33
32
31
Sheet 35 of 69 1000P_50V_X7R_04 0.1u_16V_X7R_04 10u_6.3V_X5R_06 U31
AVDDL
AVDDL
DVDDL_REG
GND
LX
LED[1]
LED[0]
RX_N
RX_P
REFCLK_P
REFCLK_N
LAN E2500 B
DVDDL_A
VDD33 B
If AVDDL/DVDDL comes from internal SWR:
mount La,Ca,Cb,Cc VDD33 1 30 LAN_TXP C403 0.1u_16V_X7R_04 PCIE_RXP7_GLAN
If AVDDL/DVDDL comes from internal LDO: BUF_PLT_RST# R434 *10mil_short RSTn_A 2 VDD33 TX_P 29 LAN_TXN C404 0.1u_16V_X7R_04 PCIE_RXN7_GLAN
LAN_W AKEUP#_A 3 PERSTn TX_N 28
no mount La,Ca,Cb,Cc WAKEn NC
19 GLAN_CLKREQ#
R977 *0_04 CLKREQn_A 4
DEBUGMODE[0]_A 5
AVDDL_A
XTLO_A
6
CLKREQn
DEBUGMODE[0]
AVDDL_REG
Atheros TESTMODE[2]
TESTMODE[1]
TESTMODE[0]
27
26
25
7 24 R417 *499_04 PPS_A
XTLO PPS
C422
1u_6.3V_X5R_04 0.1u_16V_X7R_04
C423 XTLI_A
AVDDH_A
RBIAS_A
8
9
10
XTLI
AVDDH_REG
RBIAS
E2500 LED[2]
AVDDH
TRXN3
23
22
21
LED2_A
AVDDH_A C426 0.1u_16V_X7R_04
R416
2.37K_1%_04
AVDD33
AVDDL
AVDDL
TRXN0
TRXN1
TRXN2
TRXP0
TRXP1
TRXP2
TRXP3
C420 C424
R437 4.7K_04 CLKREQn_A 0.1u_16V_X7R_04 1u_6.3V_X5R_04
VDD33
E2500
11
12
13
14
15
16
17
18
19
20
30K_1%_04 DEBUGMODE[0]_A
LAN_MDI0+_A
LAN_MDI1+_A
LAN_MDI2+_A
LAN_MDI3+_A
R438
ȱ ȱ
LAN_MDI0-_A
LAN_MDI1-_A
LAN_MDI2-_A
LAN_MDI3-_A
VDD33
0.1u_16V_X7R_04 AVDDL_A
0.1u_16V_X7R_04 AVDDL_A
VDD33
BUF_PLT_RST#
BUF_PLT_RST# 16,25,26,30,31,37,41
C
LDO MODE PCIE_W AKE#
PCIE_W AKE# 18,25,26,37,41
C
VDD33 PCIE_RXP7_GLAN
R396 0_06 R413 0_06 ȱȱŗŜ PCIE_RXN7_GLAN PCIE_RXP7_GLAN 20
Lc VDD33 PCIE_RXN7_GLAN 20
Lb
0.1u_16V_X7R_04
1u_6.3V_X5R_04
AVDDVCO_A L23 AVDDL_A L25 DVDDL_A PCIE_TXP7_GLAN
PCIE_TXN7_GLAN PCIE_TXP7_GLAN 20
*BLM18KG601SN1 *BLM18KG601SN1
600ohm/1.3A PCIE_TXN7_GLAN 20
CLK_PCIE_GLAN#
If AVDDL/DVDDL comes from internal SWR: mount Lb; CLK_PCIE_GLAN CLK_PCIE_GLAN# 19
C425
C440
4 L30 3 DLMX1-
CLK_PCIE_GLAN 19
If AVDDL/DVDDL comes from internal LDO: no mout Lb
L36 1 2 DLMX1+
*W CM2012F2S-161T03-short
LAN_MDI0-_A
C438
C439
12 13 LMX1-
LAN_MDI0+_A 11 TD4- MX4- 14 LMX1+ 1 L11 2 DLMX2- J_RJ1
meet realtek Freq tolerance 50ppm LAN_MDI1-_A 9 TD4+ MX4+ 16 LMX2- DLMX1+ 1 GND1
XTLO_A LAN_MDI1+_A 8 TD3- MX3- 17 LMX2+ 4 3 DLMX2+ DLMX1- 2 DA+ shield GND2
TD3+ MX3+ *W CM2012F2S-161T03-short DLMX2+ 3 DA- shield
R415 *1M_04 XTLI_A DLMX2- 6 DB+
LAN_MDI2-_A 6 19 LMX3- 4 L32 3 DLMX3- DB-
X4 LAN_MDI2+_A TD2- MX2-
5 20 LMX3+
LAN_MDI3-_A 3 TD2+ MX2+ 22 LMX4- 1 2 DLMX3+ DLMX3+ 4
2 1 LAN_MDI3+_A 2 TD1- MX1- 23 LMX4+ *W CM2012F2S-161T03-short DLMX3- 5 DC+
TD1+ MX1+ DLMX4+ 7 DC-
3 4 10 15 4 L33 3 DLMX4- DLMX4- 8 DD+
7 TCT4 MCT4 18 DD-
C418 FSX3L 25MHZ 4 TCT3 MCT3 21 1 2 DLMX4+ RJ08E36BAA012
C419 TCT2 MCT2
1 24 *W CM2012F2S-161T03-short Main 6-21-B4080-008
12p_50V_NPO_04 TCT1 MCT1
D 12p_50V_NPO_04 D
40 mil NS892402
NMCT_4 R224 75_1%_04 NMCT_R C721
C265 C263 C264 C266 C267 NMCT_3 R225 75_1%_04 MA1206CG-101J-202ER
NMCT_2 R226 75_1%_04
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
0.1u_16V_X7R_04 0.1u_16V_X7R_04 0.1u_16V_X7R_04 NMCT_1 R227 75_1%_04
0.1u_16V_X7R_04 0.01u_16V_X7R_04
Title
[35] LAN E2500
15,16,17,18,20,21,25,26,30,31,33,43,45,46,47,51,52 VDD3 Size Document Number Rev
2,11,15,17,24,25,27,38,42,43,44,46,47,51
7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49,51
3.3V
3.3VS A3 6-71-P77F0-D02 2.0
Date: W ednesday, October 25, 2017 Sheet 35 of 69
1 2 3 4 5 6 7 8
B - 36 LAN E2500
Schematic Diagrams
PS8338B + PS8330B
3 Levels Input: 5 3.3VS 4
Programmable input equalization levels; Internal pull down at 3 3.3VS 2 1 3.3VS
L: Low ~150K㫉, 3.3V I/O. PC10 R72 *4.7K_04 AUX interception disable for Port y (y = 1, 2). Internal pull down at ~150K㫉 , 9,2
PSPEQ R538 *4.7K_04 L: default, LEQ, compensate channel loss up to 11.5dB @ HBR2 L: AUX interception enable, driver configuration is set by link training (default)
H: High H: HEQ, compensate channel loss up to 14.5dB @ HBR2 H: AUX interception disable, driver output with fixed 800mV and 0dB
M: VDD33/2, connect both R537 *4.7K_04 M: LLEQ, compensate channel loss up to 8.5dB @ HBR2 R69 *4.7K_04 M: AUX interception disable, driver output with fixed 400mV and 0dB
pull-up and pull-down resistors 3.3VS PC20 R74 *4.7K_04
$XWRPDWLF(4GLVDEOH ,QWHUQDOSXOOGRZQDWa.㫉
, 3.3V IO C336 C360
PI0 R62 *4.7K_04 L: Automatic EQ enable (default) R71 *4.7K_04
H: Automatic EQ disable Output swing adjustment for Port y (y = 1, 2). Internal pull down at ~150K㫉, 9,2
3.3VS
0.1u_10V_X7R_04
0.01u_16V_X7R_04
L: default
3.3VS PC11 R73 *4.7K_04 H: +20%
PSCFG0 R63 *4.7K_04 $XWRWHVWHQDEOH ,QWHUQDOSXOOGRZQDWa.㫉 , 3.3V I/O. M: -16.7%
PI1 R527 *4.7K_04 L: Auto test disable & input offset cancellation enable (default) R70 *4.7K_04
H: Auto test enable & input offset cancellation enable
R528 *4.7K_04 M: Auto test disable & input offset cancellation disable
Chip operational mode configuration; R75
Internal pull down at ~150K㫉 , 3.3V I/O. PC21 *4.7K_04
D L: Control switching mode (default)
H: Automatic switching mode
3.3VS
R68 *4.7K_04 3.3VS
D
3.3VS
R366
3.3VS C83 R369 *4.7K_04 PS8330B_CFG0
PSCFG0
3.3VS
0.01u_16V_X7R_04 R351 100K_04
3.3VS
PC10
PC11
PC20
PC21
R539 *4.7K_04 C87 R367 *4.7K_04
PI0
17 PS8338B_SW
0.1u_16V_X7R_04 OUT2_AUXp_SCL 37
*4.7K_04 PS8330B_CFG1
10K_04
Port switching control or priority configuration; R384
Internal pull down at ~150K㫉 , 3.3V I/O. 3.3VS
U7
61
60
59
58
57
56
55
54
53
52
51
L: Port1 is selected or with higher priority (default) OUT2_AUXn_SDA 37
H: Port2 is selected or with higher priority R383 *4.7K_04
R350 100K_04
PI0/SDA_CTL
CFG0
CFG1
VDD33
PC10
PC11
PC20
PC21
VDD33
EPAD
GND
OUT2_AUXn_SDA
3.3VS
OUT2_AUXp_SCL
PS8330B_AUXp
PS8330B_AUXn
R370 *4.7K_04 PEQ
IN_DDC_SDA
IN_DDC_SCL
3.3VS
B.Schematic Diagrams
PI1 1 50 DP_A0 R368 *4.7K_04 C359 R880 *0_04 PS8330B_PCH
2.2u_6.3V_X5R_04
2 PI1/SCL_CTL OUT1_D0p 49 DP_A#0 DP_A0 12
3 I2C_CTL_EN OUT1_D0n 48 DP_A_HPD DP_A#0 12
15 MUX_HPD IN_HPD OUT1_HPD DP_A_HPD 12
IN_CA_DET 4 47 DP_A1 3.3VS 3.3VS 3.3VS
C75 0.1u_10V_X7R_04 3.3VS 5 IN_CA_DET OUT1_D1p 46 DP_A#1 DP_A1 12
VDD33 OUT1_D1n DP_A#1 12
PD PIN: 8330
C74 0.1u_10V_X7R_04 IN_D0p 6 45 DP_A2 HI ->DEFAULT
15 MUX_0P IN_D0n IN_D0p OUT1_D2p DP_A#2 DP_A2 12
C73 0.1u_10V_X7R_04 7 44 U26 LOW->CHIP PWR DOWN
15 MUX_0N IN_D0n OUT1_D2n DP_A#2 12
PSPEQ 8 43 PS8330B
Sheet 36 of 69
36
35
34
33
32
31
30
29
28
27
26
25
IN_D1p PEQ OUT1_CA_DET DP_A3 G_DPA_MODE 12
C72 0.1u_10V_X7R_04 9 42
15 MUX_1P IN_D1n IN_D1p OUT1_D3p DP_A#3 DP_A3 12
C71 0.1u_10V_X7R_04 10 41
PS8338B
VDD33
RST#
VDD33
AUX_SRCp
AUX_SRCn
AUX_SNKp
AUX_SNKn
PD#
VDD33
SDA_DDC
SCL_DDC
GND
15 MUX_1N IN_D1n OUT1_D3n PS8330B_IN_D0p DP_A#3 12
11 40
C70 0.1u_10V_X7R_04 IN_D2p 12 GND OUT2_D0p 39 PS8330B_IN_D0n
15 MUX_2P IN_D2n IN_D2p OUT2_D0n HPD_SRC_R
C69 0.1u_10V_X7R_04 13 38 R565 *0_04 HPD_SRC
15 MUX_2N IN_D2n OUT2_HPD PS8330B_IN_D1p
8338PD 14 37 R566 0_04 OUT2_HPD
C68 0.1u_10V_X7R_04 IN_D3p 15 PD OUT2_D1p 36 PS8330B_IN_D1n
15 MUX_3P IN_D3n IN_D3p OUT2_D1n PS8330B_IN_D2p
C 15 MUX_3N
C67 0.1u_10V_X7R_04 16 35 37 24
C
OUT1_AUXn_SDA
OUT2_AUXn_SDA
IN_D3n OUT2_D2p NC GND
OUT1_AUXp_SCL
OUT2_AUXp_SCL PS8330B_IN_D2n
17 34
PS8338B_SW 18 CEXT OUT2_D2n 33 CAD_SRC PS8330B_IN_D0p C569 0.1u_10V_X7R_04 IN0P_R 38 23 OUT2_D0p 37
IN_DDC_SDA
SW OUT2_CA_DET IN0p OUT0p
IN_DDC_SCL
19 32 PS8330B_IN_D3p
C66 20 GND OUT2_D3p 31 PS8330B_IN_D3n PS8330B_IN_D0n C570 0.1u_10V_X7R_04 IN0N_R 39 22 OUT2_D0n 37
IN_AUXp
IN_AUXn
REXT OUT2_D3n IN0n OUT0n
VDD33
VDD33
PS8330B_CFG1 40 21
2.2u_6.3V_X5R_04 R542 CFG1 NC
PD PIN: 8338 PS8330B_IN_D1p C576 0.1u_10V_X7R_04 IN1P_R 41 20
IN1p OUT1p OUT2_D1p 37
L:(default)
21
22
23
24
25
26
27
28
29
30
PS8330B_IN_D1n C575 0.1u_10V_X7R_04 IN1N_R 42 19
H:Chip power down IN1n OUT1n OUT2_D1n 37
4.99K_1%_04 3.3VS 3.3VS 3.3VS
PS8330B
MUX_AUXN_DDC_SDA
MUX_AUXP_DDC_SCL
43 18
NC GND
PS8330B_IN_D2p C574 0.1u_10V_X7R_04 IN2P_R 44 17
IN_AUXp
IN_AUXn
IN2p OOUT2p OUT2_D2p 37
PS8338B_PD R923 *0_04 8338PD C86
C65 R567 PS8330B_IN_D2n C573 0.1u_10V_X7R_04 IN2N_R 45 16
IN2n OUT2n OUT2_D2n 37
0.01u_16V_X7R_04
0.1u_10V_X7R_04 100K_04 46 15
IN_DDC_SDA NC NC
IN_DDC_SCL PS8330B_IN_D3p C572 0.1u_10V_X7R_04 IN3P_R 47 14
IN3p OUT3p OUT2_D3p 37
DESIGN NOTE:CFG1 PS8330B_IN_D3n
R543 C571 0.1u_10V_X7R_04 IN3N_R 48 13 OUT2_D3n 37
3.3VS IN3n OUT3n
Configuration pin for auto test and input offset
SDA_CLTCFG0
100K_04
cancellation,3.3V IO, internal pull up at 150K
SCL_CTLPEQ
I2C_ADDR
R541
CAD_SRC
HPD_SRC
49
CAD_SNK
HPD_SNK
H: default, auto test disable and input offset cancellation EPAD
enable
VDD33
VDD33
VDD33
CEXT
REXT
100K_04
L: auto test enable and input offset cancellation enable
B OUT1_AUXn_SDA
OUT1_AUXp_SCL
12
12
B
M: auto test disable and input offset cancellation disable
10
11
12
R540
2.2u_6.3V_X5R_04
HPD_SRC
100K_04
CAD_SRC
PS8330B_CFG0
CAD_SNK
NV3V3 NV3V3 NV3V3
3.3VS
PEQ
3.3VS 3.3VS
4.99K_1%_04
OUT2_HPD 37
1M_04
R529 R530 R531
4.7K_04 4.7K_04 4.7K_04
C82 0.1u_10V_X7R_04 IN_AUXp 3.3VS
15 MUX_AUXP_DDC_SCL
PD PIN: 8338
0.1u_10V_X7R_04 IN_AUXn
C361
R352
C81 L:default
15 MUX_AUXN_DDC_SDA
R353
H:Chip power down
D
Q7 DEFAULT:LOW R924
S
G G 2SK3018S3
Hybrid DDC/AUX AO3415 AO3415
G IN_CA_DET 3.3VS *10K_04
Q44 Q43
S
PD PIN: 8330 PS8338B_PD
D
GND
HI ->DEFAULT
D
check IN_CA,1/13 R544 R546 R545 LOW->CHIP PWR DOWN
MUX_AUXP_DDC_SCL 4.7K_04 4.7K_04 4.7K_04 Q65
MUX_AUXN_DDC_SDA G *2SK3018S3 C909
IN_DDC_SCL 16 PS8330B_PCH
C556 0.1u_10V_X7R_04PS8330B_AUXp
S
*0.1u_16V_Y5V_04
IN_DDC_SDA C567 0.1u_10V_X7R_04PS8330B_AUXn R925
DESIGN NOTE:CFG0
Configuration pin for automatic EQ and DESIGN NOTE:PEQ Q53 *100K_04
A A
D
S
Aux interception; Internal pull down at AO3415 G AO3415 G 2SK3018S3
150Kohm,3.3V I/O Programmalbe input equalization levels;internal pull
down at 150k ,3.3v I/O
Q51 Q52 G CAD_SRC
D
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
IN_DDC_SCL
L: default, automatic EQ enable and Aux interception enable L: default, LEQ, compensate channel loss up to 12dB at IN_DDC_SDA
HBR2
H: automatic EQ disable and AUX interception enable
H: HEQ, compensate channel loss up to 15dB at HBR2 Title
M: automatic EQ disable and AUX interception [36] AR_PS8338B+PS8330B
disable,no pre-emphasis, 600mVpp swing M:LLEQ, compensate channel loss up to 5dB at HBR2
Size Document Number Rev
11,12,13,14,47
7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,38,41,42,43,44,46,47,49,51
NV3V3
3.3VS A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 36 of 69
5 4 3 2 1
PS8338B + PS8330B B - 37
Schematic Diagrams
TBT
5 4 3 2 1
NOTE:
XTAL TBT_XTAL_25_OUT SNK0_DDC_data/clk ? connect to 2k PU only if SRC0 is connected and support HDMI (a.i HDMI or DP++ connector). Otherwise can be 100k PD.
X2 SNK1_DDC_data ? connect to 100k PD. If SRC0 support HDMI, connect as SNK0_CFG1 to GPU and/or appropriate AUX/DDC demux control
TBT_XTAL_25_IN
2 1 SNK1_DDC_clk ? connect to 100k PD.
3 4 Y23 V23 PET0_P C290 0.22u_10V_X5R_02
20 PCIE_TXP1_TBT PCIE_RX0_P PCIE_TX0_P PET0_N PCIE_RXP1_TBT 20
C216 C217 Y22 V22 C312 0.22u_10V_X5R_02
FSX3L 25MHZ 20 PCIE_TXN1_TBT PCIE_RX0_N PCIE_TX0_N PCIE_RXN1_TBT 20
CPU PCIE RX
6p_50V_NPO_04 6p_50V_NPO_04 T23 P23 PET1_P C292 0.22u_10V_X5R_02
PCIe GEN3
20 PCIE_TXP2_TBT PCIE_RX1_P PCIE_TX1_P PET1_N PCIE_RXP2_TBT 20
T22 P22 C293 0.22u_10V_X5R_02
CPU PCIE TX
20 PCIE_TXN2_TBT PCIE_RX1_N PCIE_TX1_N PCIE_RXN2_TBT 20
M23 K23 PET2_P C260 0.22u_10V_X5R_02
20 PCIE_TXP3_TBT PCIE_RX2_P PCIE_TX2_P PET2_N PCIE_RXP3_TBT 20
M22 K22 C291 0.22u_10V_X5R_02
20 PCIE_TXN3_TBT PCIE_RX2_N PCIE_TX2_N PCIE_RXN3_TBT 20
D D
H23 F23 PET3_P C261 0.22u_10V_X5R_02
20 PCIE_TXP4_TBT PCIE_RX3_P PCIE_TX3_P PET3_N PCIE_RXP4_TBT 20
AR/PPS COMMON FLASH VCC3V3_FLASH 20 PCIE_TXN4_TBT
H22
PCIE_RX3_N PCIE_TX3_N
F22 C262 0.22u_10V_X5R_02
PCIE_RXN4_TBT 20
V19 L4 BUF_PLT_RST#_AR
19 TBT_REFCLK_100_P PCIE_REFCLK_100_IN_P PERST_N
T19
19 TBT_REFCLK_100_N TBT_CLKREQ#_N PCIE_REFCLK_100_IN_N PCIe_RBIAS
C437 AC5 N16 R810 3.01K_1%_04
PCIE_CLKREQ_N PCIE_RBIAS
R432 R410 0.1u_10V_X7R_04 R411 R412 C328 0.1u_6.3V_X5R_02 DPSNK1_ML0_P AB7 R2
36 OUT2_D0p DPSNK1_ML0_N DPSNK0_ML0_P DPSRC_ML0_P
C329 0.1u_6.3V_X5R_02 AC7 R1
36 OUT2_D0n DPSNK0_ML0_N DPSRC_ML0_N VCC3V3_SX_SYS
C330 0.1u_6.3V_X5R_02 DPSNK1_ML1_P AB9 N2
3.3K_1%_04
2.2K_1%_04
2.2K_1%_04
3.3K_1%_04
36 OUT2_D1p DPSNK1_ML1_N DPSNK0_ML1_P DPSRC_ML1_P
B.Schematic Diagrams
C331 0.1u_6.3V_X5R_02 AC9 N1 C350 0.1u_16V_Y5V_04
DDI(MUX)
SOURCE PORT 0
36 OUT2_D1n DPSNK0_ML1_N DPSRC_ML1_N
U30
SINK PORT 0
5
8 5 TBT_EE_DI C332 0.1u_6.3V_X5R_02 DPSNK1_ML2_P AB11 L2
VDD SI 36 OUT2_D2p DPSNK1_ML2_N AC11 DPSNK0_ML2_P DPSRC_ML2_P
C333 0.1u_6.3V_X5R_02 L1 1
TBT_EE_DO 36 OUT2_D2n DPSNK0_ML2_N DPSRC_ML2_N BUF_PLT_RST#_AR 4
2
SO C334 0.1u_6.3V_X5R_02 DPSNK1_ML3_P AB13 J2 2
TBT_EE_W P_N 3 TBT_EE_CS_N 36 OUT2_D3p DPSNK1_ML3_N AC13 DPSNK0_ML3_P DPSRC_ML3_P BUF_PLT_RST# 16,25,26,30,31,35,41
1 C335 0.1u_6.3V_X5R_02 J1
WP# CE# 36 OUT2_D3n DPSNK0_ML3_N DPSRC_ML3_N
3
6 TBT_EE_CLK C353 0.1u_6.3V_X5R_02 DPSNK1_AUX_P Y11 W19
36 OUT2_AUXp_SCL
Sheet 37 of 69
SCK C352 0.1u_6.3V_X5R_02 DPSNK1_AUX_N W11 DPSNK0_AUX_P DPSRC_AUX_P Y19 U23
TBT_HOLD_N 36 OUT2_AUXn_SDA DPSNK0_AUX_N DPSRC_AUX_N
7 4 U74AHC1G08G-AL5-R
HOLD# VSS R837 100K_04 AA2 G1 TBT_SRC_HPD
36 OUT2_HPD DPSNK0_HPD DPSRC_HPD
W 25Q80DV
TBT TBT_SNK0_DDC_CLK
TBT_SNK0_DDC_DATA
Y5
R4 DPSNK0_DDC_CLK
DPSNK0_DDC_DATA
DPSRC_RBIAS
GPIO_0
N6
U1
DPSRC_RBIAS
TBT_I2C_SDA
R813 14K_1%_04
TBT_I2C_SDA 39,40
R812 100K_04 AB15 U2 TBT_I2C_SCL
DPSNK1_ML0_P GPIO_1 TBT_EE_W P_N TBT_I2C_SCL 39,40
C AC15 V1 C
LC GPIO
DPSNK1_ML0_N GPIO_2 V2 TBT_TMU_CLK_OUT
VCC3V3_S0_SYS AB17 GPIO_3 W1 TBT_PCIe_W AKE_N R348 0_04
TBT_HDMI_DDC_DATA 100K_04 DPSNK1_ML1_P GPIO_4 TBT_CIO_PLUG_EVENT_N R321 PCIE_W AKE# 18,25,26,35,41
R292 AC17 W2 0_04 TBCIO_PLUG_EVENT 16
TBT_HDMI_DDC_CLK R293 100K_04 DPSNK1_ML1_N GPIO_5 Y1 TBT_HDMI_DDC_DATA
TBT_CLKREQ#_N R296 10K_04 AB19 GPIO_6 Y2 TBT_HDMI_DDC_CLK
SINK PORT 1
TBT_SNK0_DDC_CLK R840 *2.2K_04 AC19 DPSNK1_ML2_P GPIO_7 AA1 TBT_SRC_CFG1
TBT_SNK0_DDC_DATA R747 *2.2K_04 R320 0_04 TBT_CLKREQ#_N DPSNK1_ML2_N GPIO_8 J4 TBTA_I2C_INT
RTD3_CIO_PW R_EN 19 TBT_CLKREQ# POC_GPIO_0 TBTB_I2C_INT TBTA_I2C_INT 39
R345 *10K_04 AB21 E2
POC GPIO
RTD3_USB_PW R_EN DPSNK1_ML3_P POC_GPIO_1 RTD3_USB_PW R_EN TBTB_I2C_INT 40
R776 *10K_04 AC21 D4
VCC3V3_SX_SYS DPSNK1_ML3_N POC_GPIO_2 H4 TBT_FORCE_PW R R777 0_04
POC_GPIO_3 TBT_BATLOW _N TBT_FRC_PW R 16
Y12 F2
TBT_I2C_SDA R316 2.2K_04 W12 DPSNK1_AUX_P POC_GPIO_4 D2 TBT_SLP_S3_N R773 *0_04
Manager
TBT_I2C_SCL DPSNK1_AUX_N POC_GPIO_5 RTD3_CIO_PW R_EN SUSB# 15,21,28,29,31,37,43,44,46,48
Policy
R347 2.2K_04 F1
CPU /
TBT_PCIe_W AKE_N R349 *10K_04 DPSNK1_HPD Y6 POC_GPIO_6
TBT_CIO_PLUG_EVENT_N
R318 10K_04 DPSNK1_HPD E1 TBT_TEST_EN R343 100_04
TBT_SLP_S3_N R779 10K_04 TBT_SNK1_DDC_CLK Y8 TEST_EN
Misc
TBT_BATLOW _N R314 10K_04 SINK0_CFG1 N4 DPSNK1_DDC_CLK AB5 TBT_TEST_PW G R297 100_04
TBTA_I2C_INT R778 10K_04 DPSNK1_DDC_DATA TEST_PWR_GOOD
TBTB_I2C_INT R313 10K_04 R834 14K_1%_04 DPSNK_RBIAS Y18 F4
DPSNK_RBIAS RESET_N TBT_RESET_N 39
TBT_TDI Y4 D22 TBT_XTAL_25_IN NOTE:
RTD3_USB_PW R_EN R775 100K_04 TBT_TMS V4 TDI XTAL_25_IN D23 TBT_XTAL_25_OUT
TMS XTAL_25_OUT
ASSEMBLE R1305, R1368 if DPSRC
RTD3_CIO_PW R_EN R344 100K_04 TBT_TCK T4
TBT_TMU_CLK_OUT TBT_TDO W4 TCK NOT IN USE
R317 100K_04 MISC AB3
TBT_FORCE_PW R R774 100K_04 TDO EE_DI AC4 TBT_EE_DI 39 TBT_SRC_CFG1 R294 1M_04
OUT2_HPD R295 100K_04 R772 4.75K_0.5%_04 TBT_RBIAS H6 EE_DO AC3 TBT_EE_DO 39 TBT_SRC_HPD R346 1M_04
TBTA_LSRX R746 1M_04 +/-0.5% TBT_RSENSE J6 RBIAS EE_CS_N AB4 TBT_EE_CS_N 39
TBTA_LSTX R223 1M_04 RSENSE EE_CLK TBT_EE_CLK 39
B TBTA_HPD R811 100K_04 A15 B7 B
TBT_SNK1_DDC_CLK 39 TBTA_CA2HD_1_P PA_RX1_P PB_RX1_P TBTB_CA2HD_1_P 40
R835 100K_04 B15 A7
SINK0_CFG1 39 TBTA_CA2HD_1_N PA_RX1_N PB_RX1_N TBTB_CA2HD_1_N 40
R814 100K_04
TBTB_LSTX R221 1M_04 C212 0.22u_10V_X5R_02 TBTA_TX1_P A17 A9 TBTB_TX1_P C869 0.22u_10V_X5R_02
TBTB_LSRX R222 1M_04 39 TBTA_HD2CA_1_P C213 0.22u_10V_X5R_02 TBTA_TX1_N B17 PA_TX1_P PB_TX1_P B9 TBTB_TX1_N C870 0.22u_10V_X5R_02 TBTB_HD2CA_1_P 40
TBTB_HPD R315 100K_04 39 TBTA_HD2CA_1_N PA_TX1_N PB_TX1_N TBTB_HD2CA_1_N 40
DPSNK1_HPD R836 100K_04 C215 0.22u_10V_X5R_02 TBTA_TX0_P A19 A11 TBTB_TX0_P C871 0.22u_10V_X5R_02
TBT USB TYPE C
TBT USB TYPE C
39 TBTA_HD2CA_0_P C214 0.22u_10V_X5R_02 TBTA_TX0_N B19 PA_TX0_P PB_TX0_P B11 TBTB_TX0_N C872 0.22u_10V_X5R_02 TBTB_HD2CA_0_P 40
39 TBTA_HD2CA_0_N PA_TX0_N PB_TX0_N TBTB_HD2CA_0_N 40
TBT PORTS
VCC3V3_LC B21 A13
TBT_TDI 39 TBTA_CA2HD_0_P PA_RX0_P PB_RX0_P TBTB_CA2HD_0_P 40
R841 10K_04 A21 B13
Port A
PORT B
TBT_TMS 39 TBTA_CA2HD_0_N PA_RX0_N PB_RX0_N TBTB_CA2HD_0_N 40
R839 10K_04
TBT_TCK R838 10K_04 C835 0.1u_10V_X7R_04 TBTA_AUX_P Y15 Y16 TBTB_AUX_P C873 0.1u_10V_X7R_04
TBT_TDO 39 TBTA_DPSRC_AUX_P TBTA_AUX_N W15 PA_DPSRC_AUX_P PB_DPSRC_AUX_P TBTB_AUX_N TBTB_DPSRC_AUX_P 40
R842 10K_04 C783 0.1u_10V_X7R_04 W16 C874 0.1u_10V_X7R_04
39 TBTA_DPSRC_AUX_N PA_DPSRC_AUX_N PB_DPSRC_AUX_N TBTB_DPSRC_AUX_N 40
E20 E19
39 TBTA_USB2_D_P PA_USB2_D_P PB_USB2_D_P TBTB_USB2_D_P 40
IF SOME OF GPIOs ARE NOT IN USE FOLLOW TABLE BELOW: D20 D19
39 TBTA_USB2_D_N PA_USB2_D_N PB_USB2_D_N TBTB_USB2_D_N 40
GPIO | TERMINATION | Power Rail
TBTA_LSTX A5 B4 TBTB_LSTX
---------------------------------------------------- 39 TBTA_LSTX PA_LSTX PB_LSTX TBTB_LSTX 40
POC
TBTA_LSRX TBTB_LSRX
POC
GPIO_0 | 10K PU | VCC3V3_LC A4 B5
39 TBTA_LSRX TBTA_HPD PA_LSRX PB_LSRX TBTB_HPD TBTB_LSRX 40
GPIO_1 | 10K PU | VCC3V3_LC M4 G2
39 TBTA_HPD PA_DPSRC_HPD PB_DPSRC_HPD TBTB_HPD 40
GPIO_2 | 100K PD | R771 499_1%_04 PA_USB2_RBIAS H19 F19 PB_USB2_RBIAS R770 499_1%_04
GPIO_3 | 100k PD | DEBUG PINs: PA_USB2_RBIAS PB_USB2_RBIAS
GPIO_4 | 10K PU | VCC3V3_LC AC23 D6
GPIO_5 | 10K PU | VCC3V3_LC AB23 THERMDA MONDC_SVR
PIN | TERMINATION THERMDA
GPIO_6 | 100K PD | ------------------------------- A23
GPIO_7 | 100K PD | V18 ATEST_P B23
MONDC_SVR | GND VCC3V3_SX_SYS PCIE_ATEST ATEST_N
A GPIO_8 | 100K PD | MONDC_DPSNK_0 | GND 39,40 VCC3V3_FLASH A
POC_GPIO_0 | 10K PU | VCC3V3_TBT_SX MONDC_DPSNK_1 AC1 DEBUG E18
| GND C351 0.1u_16V_Y5V_04 TEST_EDM USB2_ATEST 38 VCC3V3_LC
POC_GPIO_1 | 10K PU | VCC3V3_TBT_SX MONDC_DPSRC | GND 38,39,40 VCC3V3_SX_SYS
POC_GPIO_2 | 100K PD | L15 W13
FUSE_VQPS_64 MONDC_DPSNK_0 38 VCC3V3_S0_SYS
5
MONDC_CIO_0 | GND N15
POC_GPIO_3 | 100K PD | FUSE_VQPS_128
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MONDC_CIO_1 | GND 1 W18
POC_GPIO_4 | 10K PU | VCC3V3_TBT_SX TEST_EDM | GND TBT_SLP_S3_N 4 C23 MONDC_DPSNK_1
POC_GPIO_5 | 10K PU | VCC3V3_TBT_SX FUSE_VQPS_64 2 C22 MONDC_CIO_0 AB2
| GND MONDC_CIO_1 MONDC_DPSRC
POC_GPIO_6 | 100K PD | Title
FUSE_VQPS_128
ATEST_P/N
| GND
| FLOATING U20A [37] AR_TBT
3
USB2_ATEST | FLOATING DSL6540
U22 Y Size Document Number Rev
PCIE_ATEST | FLOATING U74AHC1G08G-AL5-R
SUSB# 15,21,28,29,31,37,43,44,46,48 A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: W ednesday, October 25, 2017 Sheet 37 of 69
5 4 3 2 1
B - 38 TBT
Schematic Diagrams
Power
5 4 3 2 1
VCC3V3_LC VCC3V3_SX_SYS
VCC3V3_S0_SYS
VCC0V9_DP
VCC3V3_S0
C796
C745 C747 C744 C207 C208 C259 C209
1u_6.3V_X5R_04 1u_6.3V_X5R_04
C837 C791 C838 C793 C746 C789
C839 1u_6.3V_X5R_04 *1u_6.3V_X5R_04
R13
R6
H9
10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04
F8
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
1u_6.3V_X5R_04
L8 A2
VCC3P3_S0
VCC3P3_LC
VCC3P3_SX
VCC3P3A
L11 VCC0P9_DP VCC3P3_SVR A3
L12 VCC0P9_DP VCC3P3_SVR B3
M8 VCC0P9_DP VCC3P3_SVR VCC0V9_SVR
D D
VCC0V9_PCIE T11 VCC0P9_DP
T12 VCC0P9_DP L9
L6 VCC0P9_DP VCC0P9_SVR M9
M6 VCC0P9_ANA_DPSRC VCC0P9_SVR E12 C792 C795 C741 C742 C255 C256 C253
C784 C782 C785 C781 V11 VCC0P9_ANA_DPSRC VCC0P9_SVR_ANA E13
V12 VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F11 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 V13 VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F12
VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F13
VCC0V9_USB M13 VCC0P9_SVR_ANA F15
M15 VCC0P9_PCIE VCC0P9_SVR_ANA J9
M16 VCC0P9_PCIE VCC0P9_SVR_SENSE TBT_SVR_IND
L19 VCC0P9_PCIE XFL4012-601MEC
B.Schematic Diagrams
C787 C788 N19 VCC0P9_ANA_PCIE_1 C1 L13 PCB Footprint = XFL4012-2
L18 VCC0P9_ANA_PCIE_1 SVR_IND C2
1u_6.3V_X5R_04 1u_6.3V_X5R_04 M18 VCC0P9_ANA_PCIE_2 SVR_IND D1
N18 VCC0P9_ANA_PCIE_2 SVR_IND C258 C257 C254
VCC
VCC0P9_ANA_PCIE_2
R15 A1
VCC0V9_CIO R16 VCC0P9_USB SVR_VSS B1 47uF_6.3V_X5R_08 47uF_6.3V_X5R_08 47uF_6.3V_X5R_08
VCC0P9_USB SVR_VSS B2
C836 C794 C790
R8
R9
R11
VCC0P9_CIO
VCC0P9_CIO
VCC0P9_CIO
SVR_VSS
VCC0V9_LVR_OUT
SVR_VSS_GND
Sheet 38 of 69
R12 F18
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
VCC3V3_ANA_PCIE
VCC3V3_ANA_USB2
L16
J16
VCC0P9_CIO
VCC3P3_ANA_PCIE
VCC0P9_LVR
VCC0P9_LVR
VCC0P9_LVR
H18
J11
H11
C722 C739 C743 C738 Power
VCC3P3_ANA_USB2 VCC0P9_LVR_SENSE 10u_6.3V_X5R_04 10u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
C786 C740
C A6 V5 SVR_VSS_GND C
A8 VSS_ANA VSS_ANA V6
1u_6.3V_X5R_04 1u_6.3V_X5R_04 VSS_ANA VSS_ANA
A10 V8
A12 VSS_ANA VSS_ANA V9
A14 VSS_ANA VSS_ANA V15
A16 VSS_ANA VSS_ANA V16
A18 VSS_ANA VSS_ANA V20
A20 VSS_ANA VSS_ANA W5
A22 VSS_ANA VSS_ANA W6
B6 VSS_ANA VSS_ANA W8
B8 VSS_ANA VSS_ANA W9
PJ60 B10 VSS_ANA VSS_ANA W20
*2mm B12 VSS_ANA VSS_ANA W22
>120 mil VSS_ANA VSS_ANA
1 2 B14 W23
3.3V VSS_ANA VSS_ANA
B16 Y9
VCC3V3_SX_SYS B18 VSS_ANA VSS_ANA Y13
B20 VSS_ANA VSS_ANA Y20
R909 0_06 B22 VSS_ANA VSS_ANA AA22
R728 0_06 D8 VSS_ANA VSS_ANA AA23
D9 VSS_ANA VSS_ANA AB6
D11 VSS_ANA VSS_ANA AB8
D12 VSS_ANA VSS_ANA AB10
D13 VSS_ANA VSS_ANA AB12
PJ61 VCC3V3_S0 L34 VCC3V3_S0_SYS D15 VSS_ANA VSS_ANA AB14
2mm CPI160809UF-1R0M D16 VSS_ANA VSS_ANA AB16
>120 mil >120 mil
GND
VSS_ANA VSS_ANA
3.3VS
1 2 . D18
E8 VSS_ANA VSS_ANA
AB18
AB20
E9 VSS_ANA VSS_ANA AB22
C708 C707 C706 E11 VSS_ANA VSS_ANA AC6
B E15 VSS_ANA VSS_ANA AC8 B
E16 VSS_ANA VSS_ANA AC10
1u_6.3V_X5R_04 47uF_6.3V_X5R_08 47uF_6.3V_X5R_08 E22 VSS_ANA VSS_ANA AC12
E23 VSS_ANA VSS_ANA AC14
F9 VSS_ANA VSS_ANA AC16
F16 VSS_ANA VSS_ANA AC18
F20 VSS_ANA VSS_ANA AC20
G22 VSS_ANA VSS_ANA AC22
G23 VSS_ANA VSS_ANA D5
H1 VSS_ANA VSS E4
H2 VSS_ANA VSS E5
H12 VSS_ANA VSS E6
H13 VSS_ANA VSS F5
H15 VSS_ANA VSS F6
H16 VSS_ANA VSS H5
H20 VSS_ANA VSS H8
J5 VSS_ANA VSS J8
J18 VSS_ANA VSS J12
J19 VSS_ANA VSS J13
J20 VSS_ANA VSS J15
J22 VSS_ANA VSS L13
J23 VSS_ANA VSS M11
K1 VSS_ANA VSS M12
K2 VSS_ANA VSS N8
L5 VSS_ANA VSS N9
L20 VSS_ANA VSS N11 37 VCC3V3_LC
L22 VSS_ANA VSS N12 37,39,40 VCC3V3_SX_SYS
VSS_ANA VSS 37 VCC3V3_S0_SYS
L23 N13 2,11,15,17,24,25,27,42,43,44,46,47,51 3.3V
M1 VSS_ANA VSS T6
A VSS_ANA VSS 7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,41,42,43,44,46,47,49,51 3.3VS A
M2 T8
M5 VSS_ANA VSS T9
M19 VSS_ANA VSS T13
VSS_ANA VSS
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M20 T15
N5 VSS_ANA VSS T16
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
N20 VSS_ANA VSS T18
N22 VSS_ANA VSS AB1 Title
N23 VSS_ANA
VSS_ANA
VSS
VSS
AC2 [38] AR_Power
U20B Size Document Number Rev
6-71-P77F0-D02
P1
P2
R5
R18
R19
R20
R22
R23
T1
T2
T5
T20
U22
U23
DSL6540 A3 SCHEMATIC1 2.0
Y
Date: W ednesday, October 25, 2017 Sheet 38 of 69
5 4 3 2 1
Power B - 39
Schematic Diagrams
TPS65982
5 4 3 2 1
VCC5V0_SYS
C373 C391 C374 C392
80Ohm, 0.01Ohm DCR, 8A Idc TBTA_VBUS
TBTA_LDO_BMC 22u_6.3V_X5R_06 22u_6.3V_X5R_06 22u_6.3V_X5R_06 22u_6.3V_X5R_06 L21 HCB2012KF-800T80
VCC1V8D_TBTA_LDO
VCC1V8A_TBTA_LDO
0_04
C
J_TYPEC1
C376 C395 C371 D48 DX07S024JJ2
R402
D Y D
2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04 close to pin,1/14 C367 A1 B12
CSOD140SH
GND GND
0_04
C394
A
TBTA_HD2CA_0_P A2 B11 TBTA_CA2HD_0_P
VCC_HV_SYS
1u_25V_X5R_06 TBTA_HD2CA_0_N A3 TX0_P RX0_P B10 TBTA_CA2HD_0_N
0.1u_10V_X7R_04 TX0_N RX0_N
R401
VCC3V3_SX_SYS C390 C750 1u_10V_X5R_02 A4 B9 C748 1u_10V_X5R_02
VBUS VBUS
TBTA_CC1 A5 B8 TBTA_SBU2
VCC3V3_SX_SYS 10u_6.3V_X5R_04 CC1 SBU2
C375 TBTA_USB2_P_T A6 B7 TBTA_USB2_N_B
B.Schematic Diagrams
R407 *3.3K_04 ACE_I2C_SDA2 C396 TBTA_USB2_N_T A7 USB2_P_T USB2_N_B B6 TBTA_USB2_P_B
R408 *3.3K_04 ACE_I2C_SCL2 1u_6.3V_X5R_04 USB2_N_T USB2_P_B
H10
C11
D11
A11
B11
B10
A10
*10K_04 TBTA_I2C_IRQ2Z TBTA_SBU1 TBTA_CC2
H1
R406 10u_6.3V_X5R_04 A8 B5
B1
K1
A2
E1
A6
A7
A8
B7
B9
A9
SBU1 CC2
R375 *10K_04 TBTA_ACE_GPIO6 R390 0_04 F1 C749 1u_10V_X5R_02 A9 B4 C723 1u_10V_X5R_02
VIN_3V3
PP_5V0
PP_5V0
PP_5V0
PP_5V0
HV_GATE1
HV_GATE2
VDDIO
LDO_1V8A
LDO_1V8D
LDO_BMC
PP_CABLE
PP_HV
PP_HV
PP_HV
PP_HV
SENSEP
SENSEN
I2C_ADDR VBUS VBUS
D1 TBTA_CA2HD_1_N A10 B3 TBTA_HD2CA_1_N
37,40 TBT_I2C_SDA I2C_SDA1 TBTA_CA2HD_1_P RX1_N TX1_N TBTA_HD2CA_1_P
D2 A11 B2
37,40 TBT_I2C_SCL I2C_SCL1 RX1_P TX1_P
CGND
CGND
CGND
CGND
C1
Sheet 39 of 69 30,40
37 TBTA_I2C_INT
ACE_I2C_SDA2
A5
B5
I2C_IRQ1Z
I2C_SDA2 3A 3A
A12
GND GND
B1
GND1
GND2
GND3
GND4
30,40 ACE_I2C_SCL2 I2C_SCL2
TPS65982 16,40 TBTA_ACE_GPIO0
40
R881
TBTA_I2C_IRQ2Z
*0_04
B6
TBTA_GPIO0 B2
C2
I2C_IRQ2Z
GPIO_0
VBUS
VBUS
VBUS
H11
J10
J11
K11 C377
R882 *0_04 D10 GPIO_1 VBUS 1u_6.3V_X5R_04
16,40 TBTA_ACE_GPIO2 GPIO_2
R883 *0_04 G11 H2
C
16,40 TBTA_ACE_GPIO3
37 TBTA_HPD C10
E10
GPIO_3
GPIO_4
GPIO_5
Primary VOUT_3V3 VCC3V3_FLASH C
G10 G1
40 TBTA_ACE_GPIO6 TBTA_GPIO7 D7 GPIO_6 LDO_3V3
19,40 TBTA_ACE_GPIO7 R884 *0_04
R376 0_04 H6 GPIO_7 C393
40 TBTB_I2C_IRQ2Z GPIO_8 K6 TBTA_USB2_P_T
C_USB_TP
37 TBT_EE_CLK
A3
B4 SPI_CLK
SPI_MOSI
C_USB_TN
L6 TBTA_USB2_N_T 10u_6.3V_X5R_04
NOTE:
TO AP SPI ROM 37 TBT_EE_DI A4
37
37
TBT_EE_DO
TBT_EE_CS_N
B3 SPI_MISO
SPI_SS_Z
PAY ATTENTION SYMBOL
37 TBTA_USB2_D_P
L5
K5 USB_RP_P K7 TBTA_USB2_P_B
OF TPS65982 BASED ON DS R0.92
37 TBTA_USB2_D_N USB_RP_N C_USB_BP
40 UART_MOSI
E2
UART_TX
C_USB_BN
L7 TBTA_USB2_N_B
AND MIGHT BE FUTURE CHANGES.
40 UART_MISO F2
UART_RX
R392 1M_04 F4 L9 TBTA_CC1
G4 SWD_DAT C_CC1 L10 TBTA_CC2 C369
SWD_CLK C_CC2 C368
WHEN CONNECT BUSPOWERZ TO GND, 220p_50V_NPO_04
R388 100K_04 CONNECT ALSO RPD_Gn to C_CCn 220p_50V_NPO_04
16,30,40 TBTA_MRESET R389 *0_04 E11 K9
R623 *0_04 D6 M_RESET RPD_G1 K10 R973 0_04
16,30,40 TBTA_HRESET HRESET RPD_G2 VCC3V3_FLASH TBTA_CA2HD_1_P
R624 100K_04 37 TBTA_CA2HD_1_P TBTA_CA2HD_1_N
E4 TBTA_DBG_CTL1 R393 *4.7K_04 37 TBTA_CA2HD_1_N
L4 DEBUG_CTL1 D5 TBTA_DBG_CTL2 R403 10K_04 TBTA_HD2CA_0_N
37 TBTA_LSTX LSX_R2P DEBUG_CTL2 37 TBTA_HD2CA_0_N TBTA_HD2CA_0_P
37 TBTA_LSRX K4 R972 4.7K_04 37 TBTA_HD2CA_0_P
B LSX_P2R B
R377 100K_04 TBTA_DIG_AUD_P L3
R378 100K_04 TBTA_DIG_AUD_N K3 DEBUG3 K8 TBTA_SBU1
DEBUG4 C_SBU1
1
R379 100K_04 TBTA_DEBUG1 L2 L8 TBTA_SBU2 D15 D18
R380 100K_04 TBTA_DEBUG2 K2 DEBUG1 C_SBU2
DEBUG2
1
R382 100K_04 R364 *3.3K_04 VCC3V3_SX_SYS
J1 CPDZC5V0SPC-HF D16 D17 CPDZC5V0SPC-HF
37 TBTA_DPSRC_AUX_P AUX_P
J2 F11 R365 0_04
37 TBTA_DPSRC_AUX_N
2
R381 100K_04 AUX_N RESETZ TBT_RESET_N 37
VCC3V3_FLASH R630 100K_04 F10 CPDZC5V0SPC-HF CPDZC5V0SPC-HF
BUSPOWERZ H7 TBTA_SS
2
TBTA_ROSC G2 SS
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
R_OSC
TBTA_HD2CA_1_P
37 TBTA_HD2CA_1_P
VCC3V3_SX_SYS R391 U27 C370 TBTA_HD2CA_1_N
37 TBTA_HD2CA_1_N
A1
B8
D8
E5
E6
E7
E8
F5
F6
F7
F8
G5
G6
G7
G8
H4
H5
H8
L1
15K_0.1%_04 TPS65982ABZQZ 0.22u_10V_X5R_04
R405 *10K_04 TBTA_GPIO0 Y 37 TBTA_CA2HD_0_P
TBTA_CA2HD_0_P
R404 *10K_04 TBTA_GPIO7
0.1% TBTA_CA2HD_0_N
37 TBTA_CA2HD_0_N
1
5V PJ29 VCC5V0_SYS D51 D53
3mm
1
1 2
CPDZC5V0SPC-HF D49 D52 CPDZC5V0SPC-HF
TBTA_CC2 TBTA_USB2_P_B
2
TBTA_CC1 TBTA_USB2_N_B
A CPDZC5V0SPC-HF CPDZC5V0SPC-HF A
TBTA_SBU1 TBTA_USB2_N_T
2
TBTA_SBU2 TBTA_USB2_P_T
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
1
D62 D64 D65 D66 D67 D68 D69 D70 1
Title
CPDZC5V0SPC-HF CPDZC5V0SPC-HF CPDZC5V0SPC-HF CPDZC5V0SPC-HF
[39] AR_TPS65982,TYPE C
CPDZC5V0SPC-HF CPDZC5V0SPC-HF CPDZC5V0SPC-HF CPDZC5V0SPC-HF
2
37,40 VCC3V3_FLASH Size Document Number Rev
37,38,40 VCC3V3_SX_SYS A3 SCHEMATIC1 6-71-P77F0-D02 2.0
15,21,24,27,40,43,44,46,47,49,50,51 5V
Date: W ednesday, October 25, 2017 Sheet 39 of 69
5 4 3 2 1
B - 40 TPS65982
Schematic Diagrams
TPS65982
5 4 3 2 1
VCC5V0_SYS2
C875 C876 C877 C878
80Ohm, 0.01Ohm DCR, 8A Idc TBTB_VBUS
TBTB_LDO_BMC 22u_6.3V_X5R_06 22u_6.3V_X5R_06 22u_6.3V_X5R_06 22u_6.3V_X5R_06 L41 HCB2012KF-800T80
VCC1V8D_TBTB_LDO
VCC1V8A_TBTB_LDO
0_04
6-21-B4K30-024
C
J_TYPEC2
C879 C880 C881 D56 UCF3T-21S01-0P11
R885
D Y D
2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04 close to pin,1/14 C882 A1 B12
CSOD140SH
GND GND
0_04
C883
A
TBTB_HD2CA_0_P A2 B11 TBTB_CA2HD_0_P
VCC_HV_SYS2
1u_25V_X5R_06 TBTB_HD2CA_0_N A3 TX0_P RX0_P B10 TBTB_CA2HD_0_N
0.1u_10V_X7R_04 TX0_N RX0_N
R886
VCC3V3_SX_SYS C885 C884 1u_10V_X5R_02 A4 B9 C886 1u_10V_X5R_02
VBUS VBUS
TBTB_CC1_J A5 B8 TBTB_SBU2_J
VCC3V3_TBTB_LDO 10u_6.3V_X5R_04 CC1 SBU2
C887 TBTB_USB2_P_TJ A6 B7 TBTB_USB2_N_BJ
C888 TBTB_USB2_N_TJ A7 USB2_P_T USB2_N_B B6 TBTB_USB2_P_BJ
1u_6.3V_X5R_04 USB2_N_T USB2_P_B
H10
C11
D11
A11
B11
B10
A10
B.Schematic Diagrams
*10K_04 TBTB_I2C_IRQ2Z TBTB_SBU1_J TBTB_CC2_J
H1
R887 10u_6.3V_X5R_04 A8 B5
B1
K1
A2
E1
A6
A7
A8
B7
B9
A9
*220K_1%_04 SBU1 CC2
R888 F1 C889 1u_10V_X5R_02 A9 B4 C891 1u_10V_X5R_02
VIN_3V3
PP_5V0
PP_5V0
PP_5V0
PP_5V0
HV_GATE1
HV_GATE2
VDDIO
LDO_1V8A
LDO_1V8D
LDO_BMC
PP_CABLE
PP_HV
PP_HV
PP_HV
PP_HV
SENSEP
SENSEN
I2C_ADDR VBUS VBUS
D1 TBTB_CA2HD_1_N A10 B3 TBTB_HD2CA_1_N
37,39 TBT_I2C_SDA I2C_SDA1 TBTB_CA2HD_1_P RX1_N TX1_N TBTB_HD2CA_1_P
D2 A11 B2
37,39 TBT_I2C_SCL I2C_SCL1 RX1_P TX1_P
C1
37 TBTB_I2C_INT I2C_IRQ1Z A12 B1
GND GND
30,39 ACE_I2C_SDA2
A5
I2C_SDA2
Sheet 40 of 69
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
B5 3A 3A
30,39 ACE_I2C_SCL2 B6 I2C_SCL2 H11
39 TBTB_I2C_IRQ2Z I2C_IRQ2Z VBUS J10
TPS65982
R889 *0_04 TBTB_GPIO0 B2 VBUS J11
16,39 TBTA_ACE_GPIO0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
C2 GPIO_0 VBUS K11 C890
R890 *0_04 D10 GPIO_1 VBUS 1u_6.3V_X5R_04
16,39 TBTA_ACE_GPIO2 GPIO_2
R891 *0_04 G11 H2
C
16,39 TBTA_ACE_GPIO3
37 TBTB_HPD C10
E10
GPIO_3
GPIO_4
GPIO_5
Secondary VOUT_3V3 VCC3V3_TBTB_LDO C
R892 0_04 G10 G1
39 TBTA_ACE_GPIO6 GPIO_6 LDO_3V3
19,39 TBTA_ACE_GPIO7 R893 *0_04 TBTB_GPIO7 D7
R894 0_04 H6 GPIO_7 C892
39 TBTA_I2C_IRQ2Z GPIO_8 K6 TBTB_USB2_P_T
C_USB_TP
R895
R896
100K_04
100K_04
A3
B4 SPI_CLK
SPI_MOSI
C_USB_TN
L6 TBTB_USB2_N_T 10u_6.3V_X5R_04
NOTE:
R897 100K_04 A4
VCC3V3_TBTB_LDO R908 3.3K_1%_04 B3 SPI_MISO
SPI_SS_Z
PAY ATTENTION SYMBOL
37 TBTB_USB2_D_P
L5
K5 USB_RP_P K7 TBTB_USB2_P_B
OF TPS65982 BASED ON DS R0.92
37 TBTB_USB2_D_N USB_RP_N C_USB_BP
39 UART_MISO
E2
UART_TX
C_USB_BN
L7 TBTB_USB2_N_B
AND MIGHT BE FUTURE CHANGES.
39 UART_MOSI F2
UART_RX
R898 1M_04 F4 L9 TBTB_CC1
G4 SWD_DAT C_CC1 L10 TBTB_CC2 C894
SWD_CLK C_CC2 C893
WHEN CONNECT BUSPOWERZ TO GND, 220p_50V_NPO_04
R900 100K_04 CONNECT ALSO RPD_Gn to C_CCn 220p_50V_NPO_04
16,30,39 TBTA_MRESET R899 *0_04 E11 K9
R915 *0_04 D6 M_RESET RPD_G1 K10 R975 0_04
16,30,39 TBTA_HRESET HRESET RPD_G2 VCC3V3_TBTB_LDO TBTB_CA2HD_1_P
R916 100K_04 37 TBTB_CA2HD_1_P TBTB_CA2HD_1_N
E4 TBTB_DBG_CTL1 R901 4.7K_04 37 TBTB_CA2HD_1_N
L4 DEBUG_CTL1 D5 TBTB_DBG_CTL2 R902 10K_04 TBTB_HD2CA_0_N
37 TBTB_LSTX LSX_R2P DEBUG_CTL2 37 TBTB_HD2CA_0_N TBTB_HD2CA_0_P
37 TBTB_LSRX K4 R974 *4.7K_04 37 TBTB_HD2CA_0_P
B LSX_P2R B
R903 100K_04 TBTB_DIG_AUD_P L3
R904 100K_04 TBTB_DIG_AUD_N K3 DEBUG3 K8 TBTB_SBU1
DEBUG4 C_SBU1
1
R905 100K_04 TBTB_DEBUG1 L2 L8 TBTB_SBU2 D19 D28
R906 100K_04 TBTB_DEBUG2 K2 DEBUG1 C_SBU2
DEBUG2
1
R907 100K_04
J1 CPDZC5V0SPC-HF D20 D21 CPDZC5V0SPC-HF
37 TBTB_DPSRC_AUX_P AUX_P
J2 F11
37 TBTB_DPSRC_AUX_N
2
R910 100K_04 AUX_N RESETZ
VCC3V3_FLASH
VCC3V3_TBTB_LDO R917 100K_04 F10 CPDZC5V0SPC-HF CPDZC5V0SPC-HF
BUSPOWERZ H7 TBTB_SS
2
TBTB_ROSC G2 SS
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
R_OSC
TBTB_HD2CA_1_P
37 TBTB_HD2CA_1_P
VCC3V3_SX_SYS R911 U56 C895 TBTB_HD2CA_1_N
37 TBTB_HD2CA_1_N
A1
B8
D8
E5
E6
E7
E8
F5
F6
F7
F8
G5
G6
G7
G8
H4
H5
H8
L1
15K_0.1%_04 TPS65982ABZQZ 0.22u_10V_X5R_04
R912 10K_04 TBTB_GPIO0 TBTB_CA2HD_0_P
0.1% Y 37 TBTB_CA2HD_0_P
R913 10K_04 TBTB_GPIO7 TBTB_CA2HD_0_N
37 TBTB_CA2HD_0_N
1
5V PJ56 VCC5V0_SYS2 D57 D58
3mm
1
1 2
CPDZC5V0SPC-HF D59 D60 CPDZC5V0SPC-HF
D63 D22
2
TBTB_CC2 10 1 TBTB_CC2_J TBTB_USB2_N_T 10 1 TBTB_USB2_N_TJ CPDZC5V0SPC-HF CPDZC5V0SPC-HF
A A
TBTB_CC1 9 2 TBTB_CC1_J TBTB_USB2_P_T 9 2 TBTB_USB2_P_TJ
2
8 3 8 3
TBTB_SBU1 7 4 TBTB_SBU1_J TBTB_USB2_P_B 7 4 TBTB_USB2_P_BJ
TBTB_SBU2 6 5 TBTB_SBU2_J TBTB_USB2_N_B 6 5 TBTB_USB2_N_BJ
DT1140-04LP-7 DT1140-04LP-7
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[40] AR_TPS65982,TYPE C
37,39 VCC3V3_FLASH Size Document Number Rev
37,38,39 VCC3V3_SX_SYS A3 SCHEMATIC1 6-71-P77F0-D02 2.0
15,21,24,27,39,43,44,46,47,49,50,51 5V
Date: W ednesday, October 25, 2017 Sheet 40 of 69
5 4 3 2 1
TPS65982 B - 41
Schematic Diagrams
Cardreader RTS5250
5 4 3 2 1
RTS5250
CARD READER
D
SD_CARD SUPPORT UHS-II D
LENGTH <2INCH MDIO0~5 攟
䞕ⶖ<2 00 m i
l
| CLK - DATA | <= 100mils
3.3V_IN | DATA.x - DATA.y | <= 100mils
3V3AUX 3.3VS
SD_W P/MS_BS CR1_LEDN R473 10K_04 CLK NEED DOUBLE SPACE THEN OTHER
B.Schematic Diagrams
SD_CD# R474 0_04 40 mil
MS_INS# CN1
50ohm +/- 15%
SD_LN0_P SD_W P/MS_BS 1
D35 A C RB751S-40C2 SD_LN0_M C475 C474 SD_D1/SD_RCLK_M 2 WP
18,25,26,35,37 PCIE_W AKE# SD_D0/SD_RCLK_P DAT1/RCLK-
100ohm +/- 15% 3
10u_6.3V_X5R_06 0.1u_16V_Y5V_04 4 DAT0/RCLK+
5 VSS5
SD_LN1_P 6 VSS2
32
31
30
29
28
27
26
25
16,25,26,30,31,35,37 BUF_PLT_RST# U36 SD_CLK/MS_D0 D1+
Sheet 41 of 69
7
SD_LN1_M 8 CLK
WAKE#
MS_INS#
SD_CD#
SP7
3V3aux
GPIO
SD_LN0_M
SD_LN0_P
9 D1-
VCC_CARD VDD1
10
SD_VDD2 VDD2
Cardreader 1
2 PERST# SDREG2
24
23
SDREG2
SD_LN1_M
20 mil C473 1u_6.3V_X5R_04
C868
4.7u_6.3V_X5R_06
C478
0.1u_16V_Y5V_04
C477
SD_CD#
SD_CMD/MS_D2
11
12
13
14
VSS1
CD
VSS4
19 CR_CLKREQ# CLKREQ# SD_LN1_M SD_LN1_P 100ohm +/- 15% CMD
RTS5250 C
20
20
19
PCIE_TXP8_CARD
PCIE_TXN8_CARD
CLK_PCIE_CARD
3
4
5
HSIP
HSIN
REFCLKP
RTS5250
QFN32
SD_LN1_P
SP6
SP5
22
21
20
SP6
SP5
R484
R482
*10mil_short_04 SD_D2/MS_CLK
*10mil_short_04 SD_D3/MS_D3
C867 *5P_50V_NPO_04
0.1u_16V_Y5V_04 SD_LN0_M
SD_D3/MS_D3
SD_LN0_P
15
16
17
D0-
CD/DAT3
D0+ GND1
21
C
6 19 SP4 R481 *10mil_short_04 SD_CMD/MS_D2 SD_D2/MS_CLK 18 22
19 CLK_PCIE_CARD# RTS5249_HSOP 7 REFCLKN SP4 DV33_18 DAT2 GND2
SP1/SD_RCLK_M
18 19 23
SP2/SD_RCLK_P
C464 0.1u_10V_X7R_04 20 mil C472 1u_6.3V_X5R_04
20 PCIE_RXP8_CARD RTS5249_HSON 8 HSOP DV33_18 VSS3 GND3
C463 0.1u_10V_X7R_04 17 20 24
20 PCIE_RXN8_CARD HSON SP3 SP3 R480 *10mil_short_04 SD_CLK/MS_D0 GND GND4
CARD_3V3
SD_VDD2
DV12_S
C476 PSDCT1-20GLBS1NN4H0
3V3_IN
RREF
33
AV12
GND 5/21 update PCB Footprint *0.1u_16V_Y5V_04
0618 VALUE UPDATE
9
10
11
12
13
14
15
16
RTS5250-GR
SP2 R479 *10mil_short_04 SD_D0/SD_RCLK_P 100ohm +/- 15%
SP1 R478 *10mil_short_04 SD_D1/SD_RCLK_M
R472 6.2K_1%_04 12 mil RREF
20 mil
DV12_S
L<200mils
DV12_S AV12 C468 C471
40 milPlace Near Conn
20 mil SD_VDD2
R471 0_04 4.7u_6.3V_X5R_06 0.1u_16V_Y5V_04
C469 C470
C460 C462
4.7u_6.3V_X5R_06 0.1u_16V_Y5V_04
4.7u_6.3V_X5R_06 0.1u_16V_Y5V_04
3.3VS 3.3V_IN CARD_3V3 Near Cardreader CONN
B 60 mil R470 0_06 60 mil 1.2A CARD_3V3 40 mil R477 0.2R_5%_06 40 mil B
VCC_CARD
C461 C459 C458
0.1u_16V_Y5V_04 10u_6.3V_X5R_06 0.1u_16V_Y5V_04
NEAR PIN11 VCC_CARD
SD Card Remove Fall time less than 1 ms
C479 C480
when SD card remove.
0.1u_16V_Y5V_04 4.7u_6.3V_X5R_06
Near Cardreader CONN
A A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[41] Cardreader RTS5250
Size Document Number Rev
A3 6-71-P77F0-D02 2.0
7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,42,43,44,46,47,49,51 3.3VS
Date: Monday, August 28, 2017 Sheet 41 of 69
5 4 3 2 1
B - 42 Cardreader RTS5250
Schematic Diagrams
TPM SLB9655TT & NPCT420
5 4 3 2 1
SLB9655TT & NPCT650 COLAY { W/O TPM 㗪
㬌
⋨
ᶵ ᶲ ẞ }
ἧ
䓐 S LB9 6 6 5 TT
D D
TPM_PWR
OQDU761 ҹ
R114 *0_04 3.3V
C153 C154
R115 0_04 3.3VS
U11 0.1u_16V_Y5V_04 10u_6.3V_X5R_06 TMC:766! ҹ
26 5
20,30,31 LPC_AD0 TMC:776! ҹ
for W/ TPM㗪 23 LAD0 VSB 10
20,30,31 LPC_AD1 LAD1 NC_2
PIN5 PIN5
R724 天
ᶲẞ (PAGE2 1 ) 20 19
B.Schematic Diagrams
20,30,31 LPC_AD2 LAD2 VDD3
17 24 3.3VS
20,30,31 LPC_AD3 LAD3 VDD4
21 TPM C134 C135 C196
20 PCLK_TPM LCLK
22 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 *10u_6.3V_X5R_06
20,30,31 LPC_FRAME# LFRAME#
15,16 PLT_RST#
PLT_RST#
TPM_BADD
16
9 LRESET#
GPIO3/BADD
PIN10 PIN19 PIN24 Sheet 42 of 69
27
C
20,30,31 SERIRQ
TPM_PP 7
SERIRQ
6 TPM_GPIO
C TPM SLB9655TT &
PP GPIO2/GPX
R617 4.7K_04 1
2 GPIO0/XOR_OUT
NPCT420
GPIO1
TMC:776! ҹ !5/8L`1 5 3
NC_1
TMC:766! ҹ !1`15 8
TEST
OQDU761 ҹ !1`15 12
NC_4 VSS_1
4
13 11
NC_5 NC_3
OQDU761 ҹ 14
NC_6 VSS_2
18 TMC:776! ό ҹ
18,30 PM_CLKRUN#
R595 *0_04 CLKRUN# 15
CLKRUN#/GPIO4 VSS_3
25 TMC:766! ҹ
LPCPD#_TPM 28
LPCPD#
OQDU761ό ҹ
SLB9665TT_5.61 PLT_RST# R615 *0_04 TPM_BADD
TMC:776UU! !
! ! ! 7.14.1:776.1I3 R616 *10K_04
LPC_SIRQ & PM_CLKRUN# 䡢PC
娵 䪗暨P
H ULL H
IGH OQDU761 ҹ
B B
F O R ℙ䓐䶂嶗 天 㯪
TPM_PWR
{ H:W TPM }
{ L:W/O TPM }
R113
2,11,15,17,24,25,27,38,43,44,46,47,51 3.3V
10K_04 7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,43,44,46,47,49,51 3.3VS
16 TPM_DET#
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
A
R112
*100K_04
Title
[42] TPM SLB9655TT & NPCT420
Size Document Number Rev
A4
SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 42 of 69
5 4 3 2 1
TPM SLB9655TT & NPCT420 B - 43
Schematic Diagrams
VCCIO / 1P0A
1 2 3 4 5 6 7 8
5.5A
VCCIO OPTION DEFAULT SHORT
1 2 VCCIO
PJ39 3mm
U43
1.0VA 9 8
C594 C595 VIN VOUT C605 C596 R602
7
10u_6.3V_X5R_06
10u_6.3V_X5R_06
A A
VOUT
6
10u_6.3V_X5R_06
10u_6.3V_X5R_06
VOUT
5
*200_04
VOUT
DEFAULT
1 2
15,21,28,29,31,37,44,46,48 SUSB#
PJ63 1mm M5938BRD1U
VCCIO_EN 1 2 VCCIO_EN_R 2 4
EN VBIAS 5V
PJ64 *1mm
R612
B.Schematic Diagrams
51 VCCIO_EN_R
*10K_04 C604
1u_6.3V_X5R_04
D42
*RB0540S2
C
Sheet 43 of 69 ON
C593
1
GATE GND
3
VCCIO / 1P0A B
0.01u_16V_X7R_04
B
V1P0A VCCIO_EN 3.3VS
3.3V R116
For CV test VIN
*100K_04
PR147 100K_04 1 2 PR154 820K_1%_06 R117
VDD5 3.3VS VCCIO_EN
PJ25 *CV-40mil
D
*100K_04
PC94 PC217 PC229 PC230 PC231 Q12
1
1 2 G *2SK3018S3
17 VCC_3P3A_PW RGD
PJ24 1mm PU9 + R127
4.7u_25V_X5R_08
4.7u_25V_X5R_08
0.1u_50V_Y5V_06
0.1u_50V_Y5V_06
*15u_25V_6.3*4.4
S
DEFAULT SHORT C411
*10K_04 Q13
2
*1u_6.3V_X5R_04 PR148 PC92 G *2SK3018S3
0_06 0.1u_10V_X7R_04
1V/13A
S
C VDD5_VREG5 VDD1.0_EN 15 13 R126 C159 C
EN_PSV BST
*100K_04 *0.01u_16V_Y5V_04
2
3
4
PR157
16
TON DH
12
1 PL14 V1.0A
15A 1.0VA
BCIH1040-2R2M 7/20 DEFAULT SHORT
1 11 9 1 2 1 2
2.2_04 VOUT LX
PR149 8 PCB Footprint = TMPC1004H PJ42 6mm
2 10 4.3K_1%_04 7/20 3.3VS
PC107
VCC ILIM
PR228 VCCIO_PWRGD
5
6
7
VDD5_VREG5
3 9 *0_12 PR84
VFB VDD 3.3V
PD8
PQ20
C
1u_6.3V_X5R_04 SM7320ESQG + PC207 100K_04
VCC_1P0A_PW RGD 4 8 PC201
PGOOD DL PR80
VCCIO_PW RGD 21,49,51
SCAR250-1
560u_2.5v_6.6*6.6*5.8
22u_6.3V_X5R_08
PC93
D
6 7 20mils-40mils 100K_04
CSOD140SH
A
AGND PGND 17 1u_6.3V_X5R_04 PQ5
PGND G 2SK3018S3
NC
NC
VDD3 R420 10K_04
S
PR79
C
1K_04
5
14
G5602R41U VCCIO B PQ6
330uF M 2.5V SMD 6.3*4.2 BTN3904
㨇㥳旸檀 PR78
E
D 100K_04 D
7/20
PR158 36K_1%_04
45 VDD5_VREG5
PC108 *15p_50V_NPO_04
5,51 VCCSA
PR153
15,21,24,27,39,40,44,46,47,49,50,51
2,11,15,17,24,25,27,38,42,44,46,47,51
5V
3.3V ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
2,3,5 VCCIO Title
100K_1%_04 18,21,46
11,15,29,30,44,45,46,47,48,49,50,51,52
1.0VA
VIN
[43] VCCIO/1P0A
23,44,45,46 VDD5 Size Document Number Rev
15,16,17,18,20,21,25,26,30,31,33,35,45,46,47,51,52
7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,44,46,47,49,51
VDD3
3.3VS A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: W ednesday, October 25, 2017 Sheet 43 of 69
1 2 3 4 5 6 7 8
B - 44 VCCIO / 1P0A
Schematic Diagrams
DDR 1.2V/0.6VS/VCCPLL_OC
5 4 3 2 1
1.2V/0.6VS 5V A
PD1
C
PQ7
MDU1516 PC75 PC76 PC232
VIN
D
1.2V
1
ULTRASO-8 PC77 PC141
4.7u_25V_X5R_08
4.7u_25V_X5R_08
0.1u_50V_Y5V_06
PU13 +
RB0540S2
0.1u_50V_Y5V_06
G
*15u_25V_6.3*4.4
UP6163
VTT_MEM PC155 VDDQ_R
VDDQ 16A
2
10u_10V_Y5V_08
PC149 0.1u_10V_X7R_04
23
VLDOIN VBST
22 DEFAULT
Short VTT_MEM_R
2
PJ10
1
1A 24 21
PR97
VDDQ_R Short
VTT_MEM VTT DRVH PL8
D 2mm 0_06 1.0UH_10*10*4.5 PJ41 D
DEFAULT PC154 PC156 PC157
1
VTTGND LL
20 1 2 1 2
VDDQ
PCB Footprint = TMPC1004H
PC144
PR95 PR209 8mm
PC143
22u_6.3V_X5R_08 *10u_10V_Y5V_08 *10u_10V_Y5V_08 0_06 2 19 PC153
VTTSNS DRVL
PD11
PQ34 + PC152 + PC140
C
0_06 *MDU1531 PQ36
3 18 ULTRASO-8 MDU1531 *1000p_50V_X7R_04 PR85
D
GND PGND
SCAR250-1
*560u_2.5V_6.6*6.6*5.9
0.1u_16V_Y5V_04
SCAR250-1
560u_2.5v_6.6*6.6*5.8
VDDQ_R PR96 0_06 17 PR210 0_06 ULTRASO-8 *0_12
CS_GND
0.1u_16V_Y5V_04
PR218
4 16 5V G G
CSOD140SH
5V PR94 *0_04 PR88 10K_1%_06
A
MODE CS
S
PR212 *0_04 PC158 0.1u_10V_X7R_04 15
5 PVCC5 14 PR87 2.2_04 *5.1_06
VTTREF VCC5
5V PR93 0_06 6 13 PC150 PC74
COMP PGOOD 3.3V
1u_10V_Y5V_06
1u_10V_Y5V_06
B.Schematic Diagrams
8 11
VDDQSNS S5
*1000p_X5R_06
PC159
*10_06
PR92
R727 PR217
9 10 47K_04
VDDQSET S3 0_06 VDDQ
EMI
VDDQSET
GND
*1000p_X5R_06
NC
NC
PC79
PC168 PC169
12
25
PR90
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
Sheet 44 of 69
PR91 4.75K_1%_04
DDR 1.2V/0.6VS/
5V
C *10K_1%_04 C
R202 43K_04
5V
PR213 8.06K_1%_06 PC160 *100p_50V_NPO_04
3
VTT_EN
VCCPLL_OC
R203 10K_04 D Q16B
3.3VS 3.3V 5V
C705
R745 *10K_04 C704 R230 100K_04 5 G
(6.02K/10K+1)*0.75=1.203V
5VS S 0.1u_10V_X7R_04
4
6
1
*0.1u_16V_Y5V_04 D
R809 R229 Q16A PJ8 MTDK5S6R
18,31,46,47 SUSC# SUSC# R228 0_04 2 G *CV-40mil
D
*100K_04 *100K_04 S
2
PQ8 3.3V MTDK5S6R
PR89 0_04 VTT_EN# G 2SK3018S3
2,14,15,46,51 SUSB
C197
C
3 DDR_VTT_CNTL
B PQ9
*BTN3904
3.3V PR105
*100K_04
*0.1u_10V_X7R_04 3.3V
1.5A
VDD5
VCCPLL_OC
E
PC138
PR104 VDDQ_PWRGD PC136 PC137 (FOR OCK 1.8V)
PU12 *1u_10V_Y5V_06
1A
D
*10u_6.3V_X5R_06
*0.1u_10V_X7R_04
PR98 *22_04 *100K_04 R105 *G9661-25ADJF11U
VTT_MEM VCCPLL_OC_1.8V VCCPLL_OC
PQ13 3 4
D
VIN VCNTL PJ38
G *2SK3018S3 *47K_04
PQ10 1 6 1 2
S
G PR106 POK VOUT
*2SK3018S3
C
*100_04 5 *CV-40mil
S
NC
1
B PQ14 PWRGD_VCCPLL_OC 2 PR207 PC132 PC134 PC133 PC135
VDDQ EN
PJ9 *BTN3904 Ra
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*82p_50V_NPO_04
8 7
*0.1u_16V_Y5V_04
*CV-40mil *12.7K_1%_04
E
9 GND VFB
2
GND
VDDQSET_R PR86 *0_04 VDDQSET
暣
⡻ὅ T A B LE
B PR206 B
DEFAULT SHORT
PJ52 *CV-40mil Rb
PR100 VDDQ_PWRGD 1 2 *10K_1%_04
*22.6K_1%_04
DDR GPIO OUTPUT VOLTAGE SELECT
3.3V PJ53 *CV-40mil
15,21,28,29,31,37,43,46,48 SUSB#
1 2 ON Vout = 0.8V ( 1 + Ra / Rb )
3.3V GPIO DDR Vout
PR99
D
*100K_04 PQ11 HI 1.2V
PR103 PJ12
G *CV-40mil
*100K_04 *2SK3018S3
D
PQ12 LO 1.35V
1
G PJ11
18 DDR_VOLTAGE_SEL
*2SK3018S3 *CV-40mil ADDRESS 0X6A 0X68 0X66 0X64 0X62 0X60
S
LOW
2
PR102 5V
*10K_04
R262 R1 OPEN 3.9K 3K 2.3K 1.3K 10K
PR101 *0_04 10_04
U19
1
2 VCC OUT
8
7
R253 R251
VDDQSET R2 10K 1.3K 2.3K 3K 3.9K OPEN
BUS_SEL NC 10K_04 0_04
3 6 C268
C269 C295 1804_SDA 4 GND NC 5 1804_SCL
R1 SDA SCL
1u_6.3V_X5R_04 *1u_6.3V_X5R_04 BUS_SLE VOL TAGE
A
1u_6.3V_X5R_04
R252
10K_04
UP1804AMA8
(% OF VCC) 0% 25% 40% 60% 75% 100% A
1804_SCL R264 22_04 SMB_CLK 16,18,28,34
1804_SDA R265 22_04 SMB_DATA 16,18,28,34 23,43,45,46 VDD5
R2
R263 5 VCCPLL_OC
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
*0_04 15,16,17,18,20,21,25,26,30,31,33,35,43,45,46,47,51,52 VDD3
TO DDR PWM FB Pin 15,21,24,27,39,40,43,46,47,49,50,51 5V
NOTE:DDR PWM↮⡻暣旣
暨ℵ 䡢 娵 婧 㔜 11,15,29,30,43,45,46,47,48,49,50,51,52
5,7,8,9,10,18 VDDQ
VIN
Title
2,11,15,17,24,25,27,38,42,43,46,47,51
7,8,9,10
3.3V
VTT_MEM
[44] DDR 1.2V/0.6VS/VCCPLL_OC
11,14,15,16,27,29,30,32,34,46,47 5VS Size Document Number Rev
7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,46,47,49,51 3.3VS Custom SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Wednesday, October 25, 2017 Sheet 44 of 69
5 4 3 2 1
DDR 1.2V/0.6VS/VCCPLL_OC B - 45
Schematic Diagrams
VDD3, VDD5
5 4 3 2 1
VREF
PR136 *0_04 PR135 0_04
PC213
1u_10V_Y5V_06
PR151 PR150 7/20
D
EN_3V EN_5V D
VIN PC222
140K_1%_04 80.6K_1%_04 PC215
PC211 PC216 PC225 1000p_50V_X7R_04 1000p_50V_X7R_04 VIN
1
PU16
VREG3
4.7u_25V_X5R_08
4.7u_25V_X5R_08
EN2
TONSEL
VFB2
VFB1
EN1
0.1u_50V_Y5V_06
VREF
PC275
PC97 PC208 PC95 PC96
1
7 24
VO2 VO1 +
+
4.7u_25V_X5R_08
4.7u_25V_X5R_08
0.1u_50V_Y5V_06
VDD3
*25TQC15MYFB
PC223
8 23 PR243
EEEFZ1E101P
SYS5V
2
1u_6.3V_X5R_04
PC98 9
LDO3 POK
22
PC224
10K_04
PQ43
MDU1516
VDD5
D
BOOT2 BOOT1
5
5
5
5
ULTRASO-8
TPS51125
B.Schematic Diagrams
Short PQ42 0.1u_10V_X7R_04 0.1u_10V_X7R_04
VDD3 6-19-41001-73C 4 10 21 G Short
SYS3V PL17 UGATE2 UGATE1 PL15 SYS5V VDD5
9A
3
2
1
S
PJ21 BCIHP0730-1R0M QM3004M3 BCIH1040-2R2M PJ14
2 1 2 1 11
PHASE2 PHASE1
20 1 2 12A 1 2
PCB Footprint = BCIHP0735A H = 4mm
PD16
5mm PQ44 PCB Footprint = TMPC1004H 8mm
C
5
5
5
5
DEFAULT DEFAULT
PC221
PC220
12 19
PD17
MDU1512 PR134
GND PAD
SKIPSEL
C
PC99 PQ21 LGATE2 LGATE1 ULTRASO-8 PC214
Sheet 45 of 69 R1 R1
VCLK
LDO5
PR241 PC212 4 G 30K_1%_06
GND
EN0
VIN
0.1u_16V_Y5V_04
PR138 *0_12 + + *1000p_50V_X7R_04 PC189 PC188
3
2
1
S
13.7K_1%_06 QM3006M3 PR115 *0_12
CSOD140SH
100p_50V_NPO_04
A
220u_6.3V_6.3*4.4
220u_6.3V_6.3*4.4
VDD3, VDD5
CSOD140SH
+ +
13
14
25
15
16
17
18
A
SCAR250-1
SCAR250-1
C PC82 C
SCAR250-1
220u_6.3V_6.3*4.4
SCAR250-1
220u_6.3V_6.3*4.4
PR249 PR133
R2 EN_ALL R2 0.1u_16V_Y5V_04
PR137 19.1K_1%_04
*680K_1%_04
20K_1%_04
VDD5 VDD5_VREG5
PR250 0_04
PR251
Vout VREF Vout
=2*(1+R1/R2) VREG5
=2*(1+R1/R2)
=2*(1+13.7K/20K) VREG5 PR155 *0_04 PR131 *0_06 =2*(1+30K/19.1K)
2.2_06
=3.37V =5.14V
VIN1 PR132 0_06
PC227 PC228 DEFAULT
VIN C A
4.7u_25V_X5R_08 1u_6.3V_X5R_04
PD9
RB751V-40(lision)
M-SOD323A
Qpxfs! po! WEE40WEE6! QXN
R399 *0_04 EN_3V
VREG5
EN_5V
EN_3V5V
R400 0_04
R419
3
B 10K_04 D B
Q32B
DD_ON_EN_VDD 5 G
S MTDK5S6R
4
1
D
Q32A PJ30 R441
2G MTDK5S6R *CV-40mil
30,46 USB_CHARGE_EN S 100K_04
2
D
Q31
G *2SK3018S3
18,30,46 SLP_SUS#
D
Q30
G 2SK3018S3
23,30,46 DD_ON
S
43 VDD5_VREG5
3,16,17,18,20,21,46 3.3VA
15,21,24,27,39,40,43,44,46,47,49,50,51 5V
A 15,16,17,18,20,21,25,26,30,31,33,35,43,46,47,51,52 VDD3 A
23,43,44,46 VDD5
46 VIN1
11,15,29,30,43,44,46,47,48,49,50,51,52 VIN
DMFWP!DP/!!ᙔ Ϻ ႝတ
Title
[45] VDD3,VDD5
Size Document Number Rev
A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: W ednesday, October 25, 2017 Sheet 45 of 69
5 4 3 2 1
B - 46 VDD3, VDD5
Schematic Diagrams
5V/5VS, 3V/3.3VS, 3.3VA
5 4 3 2 1
VDD3
VDD5 VDD5
C405 U29 EM5209 C410
R238
0.1u_16V_Y5V_04 1 6 0.1u_16V_Y5V_04
2 IN1 IN2 7 10K_04
IN1 IN2
5V 5V 6A 13
14 OUT1 OUT2
8
9
4A 5VS 5VS DD_ON#
DD_ON# 15,24,27
D
C409 OUT1 OUT2 C406 VDD3
12 10 Q34
0.1u_16V_Y5V_04 CT1 CT2 0.1u_16V_Y5V_04 G C457
23,30,45 DD_ON 2SK3018S3
VBIAS
For CV test For CV test
GND
GND
D D
S
EN1
EN2
C408 C407 *0.1u_16V_Y5V_04 R448
220p_50V_NPO_04 220p_50V_NPO_04 R584
PR123 10K_04 VDD3_R 1 2 2 1 VDD3_R 10K_04
VDD3
15
11
5
100K_04
PJ16 PJ19 SUSB
SUSB 12,14,15,44,51
*CV-40mil R398 R397 *CV-40mil
D
10K_04 10K_04
DD_ON 1 2 DD_ON_EN SUSB#_EN 2 1 SUSB# Q33
VDD5 G 2SK3018S3 C450
15,21,28,29,31,37,43,44,48 SUSB#
PJ17 C389 C388 C387 PJ18
S
OPEN_4mil 1u_6.3V_X5R_04 OPEN_4mil *0.1u_16V_Y5V_04
DEFAULT *0.1u_10V_X7R_04 *0.1u_10V_X7R_04 DEFAULT R469
100K_04
ON
ON
B.Schematic Diagrams
SUSB#_EN 47
1 2
18,30,45,46 SLP_SUS# VDD3 3.3VA VCCST_VCCPLL
PJ20
*CV-40mil
R239
R236 R95
10K_04 100_04
*100_04
Sheet 46 of 69
3
D
VDD3 1.0VA
㓦暣徜 嶗 枸䔁 ᶵᶲ
D
C
C611 U12 EM5209
C142 VCCST_VCCPLL SLP_SUS 5 G Q17B
S MTDK5S6R Q9 C
5V/5VS, 3V/3.3VS,
4
6
0.1u_16V_Y5V_04 1 6 D G *2SK3018S3
IN1 IN2 47 SUSC
2 7 0.1u_16V_Y5V_04
S
IN1 IN2
3.3VA 3.3VA 2A 13 8 1A VCCST_VCCPLL
SLP_SUS# 2 G Q17A
S MTDK5S6R
3.3VA
1
14 OUT1 OUT2 9
C157 OUT1 OUT2 C141
12 10
0.1u_16V_Y5V_04 CT1 CT2 0.1u_16V_Y5V_04
VBIAS
GND
GND
EN1
EN2
C156 C155
220p_50V_NPO_04 470p_50V_X7R_04
3
15
11
R109 R108
10K_04 10K_04
1 2 VDD3 2 1
18,30,45,46 SLP_SUS# SUSC# 18,31,44,47
PJ5 OPEN_4mil
PJ6 C145 C144 C143 DEFAULT
DEFAULT 1u_6.3V_X5R_04
*0.1u_10V_X7R_04 *0.1u_10V_X7R_04
VIN VA
VIN1
U40
R582 10K_04 1 8 R585 100K_04 DD_ON
VA VIN1
ON ON R581 1_1%_06 2
VIN DD_ON_LATCH
7 R586 *100K_04
USB_CHARGE_EN 30,45
B R583 10K_04 3 6 R597 10K_04 B
33 M_BTN# M_BTN# PWR_SW# VDD3
R594 *100K_04 4 5 R596 1K_1%_04
INSTANT-ON GND PW R_SW # 30,31
USB_CHARGE_EN R593 1K_1%_04 P2808B0
VDD3 VDD3
C856 U55 EM5209 C857
0.1u_16V_Y5V_04 1 6 0.1u_16V_Y5V_04
2 IN1 IN2 7
IN1 IN2
3.3V 3.3V 6A 13
14 OUT1 OUT2
8
9
4A 3.3VS 3.3VS
C845 OUT1 OUT2 C848
12 10
0.1u_16V_Y5V_04 CT1 CT2 0.1u_16V_Y5V_04
VBIAS
GND
GND
EN1
EN2
C846 C847
220p_50V_NPO_04 470p_50V_X7R_04
3
15
11
A A
R870
10K_04 18,21,43 1.0VA
DD_ON_EN R871 10K_04 SUSB#_EN
VDD3 3,5,18,49 VCCST_VCCPLL
C861 C862
1u_6.3V_X5R_04
C863
3,16,17,18,20,21
52
45
3.3VA
VA
VIN1
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
*0.1u_10V_X7R_04 *0.1u_10V_X7R_04 Title
23,43,44,45
11,15,29,30,43,44,45,47,48,49,50,51,52
VDD5
VIN
[46] 5V/5VS,3V/3.3VS,3.3VA
15,21,24,27,39,40,43,44,47,49,50,51 5V
11,14,15,16,27,29,30,32,34,44,47 5VS Size Document Number Rev
15,16,17,18,20,21,25,26,30,31,33,35,43,45,47,51,52 VDD3 A3 SCHEMATIC1 6-71-P77F0-D02 2.0
2,11,15,17,24,25,27,38,42,43,44,47,51 3.3V
7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,47,49,51 3.3VS Date: W ednesday, October 25, 2017 Sheet 46 of 69
5 4 3 2 1
5V/5VS, 3V/3.3VS, 3.3VA B - 47
Schematic Diagrams
5VS_2/2.5V/NV3V3/3.3V_ON/5V_RUN
1 2 3 4 5 6 7 8
5VS_2 PR145
5VS_2
180K_1%_04
PU8
VIN IMAX:4A
G5383A
23 VIN_PAD
25
3
OCP:8A
TON VIN 17
VIN PC101 PC106 PC105
18
VIN 19
VIN 1u_25V_X5R_06 4.7u_25V_X5R_08 4.7u_25V_X5R_08 5VS PJ26
20
VIN 21 PR146
VIN 2 1
1.5_04
A A
22 *3mm
BST
G5383A_V5V 2 PC102 PL16 V5S_2 5VS_2
V5V PJ15
BCIHP0420TB-2R2M
0.1u_10V_X5R_04
PC104 8 1 2 2 1
LX 9
PC218
LX
PC86
PC85
PC84
10 3mm
4.7u_6.3V_X5R_06 LX
1 16
PJ27 1mm AGND LX 26
PR245 1K_04 DEFAULT
1 2 LX_PAD +
46 SUSB#_EN
PC91
220u_6.3V_6.3*4.4
0.1u_50V_Y5V_06
22u_6.3V_X5R_06
22u_6.3V_X5R_06
RGB_KB_GND 0.1u_25V_X7R_06
PJ28 *CV-40mil 6 PR124
PR139 100K_04 1 2 5 PGND 11 PC219 *0_12
VDD3 EN PGND 12 100p_50V_NPO_04
B.Schematic Diagrams
PGND 13
C427 PGND 14
PGND 15
PGND PC226
0.1u_10V_X5R_04
1000p_50V_X7R_04
G5383A_V5V PR144 100K_04 4
Sheet 47 of 69 21 5VS_PW RGD
5VS_PW RGD
PGOOD
24
PR242
47K_1%_04
PR156
*28mil_06
FB
5VS_2/2.5V/NV3V3/ B
2.5V_LDO
VDD3
7
NC
PR244
RGB_KB_GND B
10K_1%_04
3.3V_ON/5V_RUN R94
10K_04
3.3V RGB_KB_GND
SUSC 46
3A
D
5V
Q10
G 2SK3018S3 C114 PC103
18,31,44,46,47 SUSC#
S *0.1u_16V_Y5V_04
PC100
10u_6.3V_X5R_06
PC90
0.1u_10V_X5R_04
PR152
PU7 1u_10V_Y5V_06
2.5V/3A
R99 *47K_04 G9661-25ADJF11U 天䦣月 役 PI N6 儛
3 4 V2.5_LDO 2.5V
100K_04 VIN VCNTL PJ43
2.5V_PG 1 6
3A 3A 1 2
POK VOUT
PJ23 *CV-40mil 5 OPEN_3mm
NC
VDD3 PR140 100K_04 1 2 PR141 0_04 2
EN
PR143 PC89 PC209 PC210 DEFAULT
8 7
Ra 21.5K_1%_04 Short
22u_6.3V_X5R_06
82p_50V_NPO_04
0.1u_16V_Y5V_04
9 GND VFB
GND PR240
PJ22 1 2 1mm *0_12
18,31,44,46,47 SUSC#
DEFAULT SHORT PC88 PR142
C Rb C
0.1u_16V_Y5V_04 10K_1%_04
NV3V3
3.3VS
Vout = 0.8V ( 1 + Ra / Rb )
1
C28 U4 EM5209
PJ35
*3mm 0.1u_16V_Y5V_04 1 6
2 IN1 IN2 7
3.3V_ON 5V_RUN IN1 IN2
2
NV3V3 6A 13
14 OUT1 OUT2
8
9
C27 OUT1 OUT2
3.3V 5V
12 10
CT1 CT2
1
C896 U57 EM5209 C897 0.1u_16V_Y5V_04
VBIAS
PJ57
DEFAULT
GND
GND
EN1
EN2
*3mm 0.1u_16V_Y5V_04 1 6 0.1u_16V_Y5V_04 C26
2 IN1 IN2 7 *470p_50V_X7R_04
2
IN1 IN2
2A 2A
15
11
5
3.3V_ON 13 8 5V_RUN
14 OUT1 OUT2 9
C898 OUT1 OUT2 C899 R12
12 10 10K_04
0.1u_16V_Y5V_04 CT1 CT2 0.1u_16V_Y5V_04
15 NV3V3_EN VDD3
VBIAS
C900
GND
GND
EN1
EN2
C901 C6 C5
*220p_50V_NPO_04 *470p_50V_X7R_04 1u_6.3V_X5R_04
EC *0.1u_10V_X7R_04
3
15
11
30 EC_NV3V3_EN
D D
15 5V_RUN
15 3.3V_ON
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
R914 56K_1%_04 5V
15 1V8_AON_EN 11,12,13,14,36 NV3V3
7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,49,51 3.3VS
D61 C903 C902
15,16,17,18,20,21,25,26,30,31,33,35,43,45,46,51,52 VDD3
A C 1u_6.3V_X5R_04 Title
7,8,9,10 2.5V
0.22u_10V_X5R_04
RB751V-40(lision)
11,14,15,16,27,29,30,32,34,44,46
11,15,29,30,43,44,45,46,48,49,50,51,52
5VS
VIN
[47] 5VS_2/2.5V/NV3V3/3.3V_0N/5V_RUN
15,21,24,27,39,40,43,44,46,49,50,51 5V Size Document Number Rev
2,11,15,17,24,25,27,38,42,43,44,46,51 3.3V A3 SCHEMATIC1 6-71-P77F0-D02 2.0
32,34,51 5VS_2
Date: Monday, August 28, 2017 Sheet 47 of 69
1 2 3 4 5 6 7 8
B - 48 5VS_2/2.5V/NV3V3/3.3V_ON/5V_RUN
Schematic Diagrams
Fan CPU, VGA Power
5 4 3 2 1
D
FAN CPU POWER 12V VIN
PL2
CPU_FAN_PW R
PU6 PR76 4.7_06 PC69 0.1u_10V_X7R_04 BCIHP0730-4R7M
1 3 4.7UH_6.8*7.3*3.5
PR69
IN BST PCB Footprint = BCIHP0735A 12V/6A
4 2
EN/SYNC SW
PR74 3K_1%_04
PC68
PR77
7 5 PR81
PC65
100K_1%_04 VCC FB
4.7u_25V_X5R_08
*0_04
POK
B.Schematic Diagrams
8 9
SS GND
143K_1%_04
10u_25V_X5R_08
10u_25V_X5R_08
10u_25V_X5R_08
*100K_1%_04
*1000p_50V_X7R_04
PR68 6 MP8715DN-LF-Z
0.1u_25V_X7R_06
PC63 PC70
PC64
PR83
100K_1%_04 0.01u_50V_X7R_04 *0.01u_50V_X7R_04
PR73
PC73
PC71
PC72
PQ4A 100K_1%_04
Sheet 48 of 69
6
3
MTDK5S6R D D
PR70
10K_1%_04
2G 5G
15,21,28,29,31,37,43,44,46,48 SUSB# S 100K_1%_04 S PQ4B
Fan CPU, VGA
1
4
2
PR82
MTDK5S6R
PJ4
*CV-40mil
C C
Power
1
FAN VGA POWER 12V VIN
PL1
VGA_FAN_PW R
PU5 PR65 4.7_06 PC59 0.1u_10V_X7R_04 BCIHP0730-4R7M
1 3 4.7UH_6.8*7.3*3.5
PR71
IN BST PCB Footprint = BCIHP0735A 12V/6A
4 2
EN/SYNC SW
PR66 3K_1%_04
PC130
PR203
7 5 PR204
PC61
B 100K_1%_04 VCC FB B
4.7u_25V_X5R_08
*0_04
8 POK 9
SS GND
143K_1%_04
10u_25V_X5R_08
10u_25V_X5R_08
10u_25V_X5R_08
*100K_1%_04
*1000p_50V_X7R_04
PR72 6 MP8715DN-LF-Z
0.1u_25V_X7R_06
PC60 PC131
PC62
PR202
100K_1%_04 0.01u_50V_X7R_04 *0.01u_50V_X7R_04
Modify value,
PR67
PC52
PC54
PC53
8/14 Tim
PQ33A 100K_1%_04
6
MTDK5S6R D D
PR205
10K_1%_04
2G 5G
15,21,28,29,31,37,43,44,46,48 SUSB# S 100K_1%_04 S PQ33B
1
4
2
PR201
MTDK5S6R
PJ37
*CV-40mil
1
A A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[48] FAN_CPU,VGA POWER 12V
11,15,29,30,43,44,45,46,47,49,50,51,52 VIN
Size Document Number Rev
33
33
CPU_FAN_PW R
VGA_FAN_PW R A3 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 48 of 69
5 4 3 2 1
Fan CPU, VGA Power B - 49
Schematic Diagrams
VCore
1 2 3 4 5 6 7 8
,QWHO6.</$.(,09332:(59&25(3+$6( PROG
4+0
VCCST_VCCPLL PR168
3.3VS 3.3VS VIN
CONFIGURATION
5V 75K_1%_04
VCORE PR169 PR172 PC112
A R488 R487 1u_6.3V_X5R_04 A
2.2_06 1K_1%_04
10K_04 10K_04
3.3VS PC1 PR163 PR166 PR164
PR294 PC2 PUT CLOSE
0.01u_50V_X7R_04 100_04 45.3_1%_04 *45_04 TO PWM
For CV test C1 *1K_04 4.7u_6.3V_X5R_06 VBOOT/ADDR
PR10 C2 PU2 For CV test
10K_04
1 2 *0.1u_10V_X7R_04 NCP81213PMNTXG
2
*CV-40mil PJ1
*0.1u_10V_X7R_04 6X6 52PIN QFN multi phase fun
9
PJ2 PJ3
3 PR4 10_04 *CV-40mil
VCC
VRMP
VR_ENABLE SDIO H_VIDSOUT_VR 3 OPEN_4mil
1 2 PR11 0_04 2 5 PR2 49.9_1%_04 NO CPU
21,43,51 VCCIO_PW RGD H_VIDSCK_VR 3
1
PJ34 EN SCLK 4 PR3 0_04 1.2V/21K
B.Schematic Diagrams
ALERT# H_VIDALERT_N_VR 3
OPEN_4mil VCORE VBOOT
6 35 PR40 PR41
51 VR_READY_VCORE VRDY DRVON 34
DRVON 50 SET AT 0V,
PWM1 PW M1 50 SVID
50 38 15K_1%_04 21K_1%_04
DIFF CSN1 CSN1 50
CSP1
39 PR28 *100K_1%_04 ADDRESS=00h
PR161 47.5_1%_04 PC115 470p_50V_X7R_04 PR7 4.02K_1%_04 PC15 2200p_50V_X7R_0448 CORE
COMP PR29 7.5K_1%_04 PC12 0.022u_25V_X7R_04
1/6 50 CSP1
PR6 1K_1%_04 PC13 47p_50V_NPO_04 33
Sheet 49 of 69 49
FB
PWM2
CSN2
CSP2
40
41 PR31 *100K_1%_04
CORE
PW M2
CSN2
50
50
IMAX
VCore
PR33 7.5K_1%_04 PC17 0.022u_25V_X7R_04
50 CSP2
32
PWM3 PW M3 50
B 42 VCORE PR190 B
CSN3 CSN3 50
PR9 0_04 51 43 PR30 *100K_1%_04
5 VCCCORE_SENSE
PC5 VSP CSP3 CORE IMAX SET 110K_1%_04
PR5 PR32 7.5K_1%_04 PC16 0.022u_25V_X7R_04 AT 138A
50 CSP3
PR8 0_04 1000p_50V_X7R_04 52
5 VSSCORE_SENSE VSN
1K_1%_04
PC4 45 12/25 PR175 57.6K_1%_06 CSP1
CSSUM PR177
4700p_50V_X7R_04 47 PR179 100K_1%_04 PR188 57.6K_1%_06 CSP2
CSCOMP 36K_1%_04
1 2 PR174 57.6K_1%_06 CSP3
PR27 NTC2 PC116 *220p_50V_NPO_04
1 46 100k_1%_04_NTC PR184 57.6K_1%_06 CSP2A
IOUT ILIM 38.3K_1%_04 PC117 1500p_50V_04
PR162 PC3 VCORE PORTION 44 1/6 PR191 10_04 CSN1
CSREF
O.C.P 180A
27K_1%_04 470p_50V_X7R_04 PR178 10_04 CSN2
PROG 10
VBOOT/ADDR 28 PH/FDm/FDa/SR/DDR PR176 10_04 CSN3
IMAX 36 VBOOT/ADDR
ICCMAX PR183 10_04 CSN2A
PC14 1000p_50V_X7R_04
16 30 5V
DIFFA PWM1A 26 PR26
18 CSN1A 25 月役烟烤 烀
COMPA CSP1A
2K_04
C PR24 0_04 17 C
FBA
月役烟烤 烀 31
PWM2A PW M2A 50
24
CSN2A CSN2A 50
23 PR22 *100K_1%_04
CSP2A CORE
PR21 7.5K_1%_04 PC11 0.022u_25V_X7R_04
50 CSP2A
PR23 0_04 15
VSPA
月役烟烤 烀 R498
14 21 CSSUMA 0_04
VSNA CSSUMA
19
CSCOMPA
FM1 PR182 45.3K
FM PR182 15.8K 20
PR1 0_04 13 ILIMA
IOUTA 22 PR25 0_04
VCCST_VCCPLL 月役烟烤 烀 CSREFA
27 3,5,18,46 VCCST_VCCPLL
PR165 PR182 45.3K_1%_04 PSYS_81203 29 VBOOTA/ADDRA
PSYS GT PORTION 5,6,50 VCORE
PR192 0_04 11,15,29,30,43,44,45,46,47,48,50,51,52 VIN
52 PSYS Charger
*1K_1%_04 15,21,24,27,39,40,43,44,46,47,50,51 5V
PR171 *100_04 12 2,11,15,17,24,25,27,38,42,43,44,46,47,51 3.3V
3 H_PROCHOT_N VRHOT
ROSC
EPAD
D
11 PR170 0_04 7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,51 3.3VS D
37 TSENSEA
TSENSE
PR180
8
53
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
4.12K_1%_04 PC24 BOTTOM PAD
CONNECT TO
0.1u_10V_X7R_04
PR167
1
PR181 GND Through Title
PUT CLOSE NTC1 Work F 20K_1%_04 5 VIAs [49] VCORE
9.31K_1%_04
TO VCORE 100k_1%_04
=300kHz Size Document Number Rev
6-71-P77F0-D02
2
HOT SPOT A3 SCHEMATIC1 2.0
Date: W ednesday, October 25, 2017 Sheet 49 of 69
1 2 3 4 5 6 7 8
B - 50 VCore
Schematic Diagrams
VCore Output Stage
8 7 6 5 4 3 2 1
VIN
for EMI VCORE OUTPUT STAGE
1
PC33 PC42 PC49 PC80 PC78 PC67 PC66 PC51 PC196 PC236 PC238 PC239 PC237
+ PC114 + PC118 + PC128
1u_25V_X5R_06
4.7u_25V_X5R_08
4.7u_25V_X5R_08
0.1u_25V_X7R_06
0.1u_25V_X7R_06
0.1u_25V_X7R_06
0.1u_25V_X7R_06
0.1u_25V_X7R_06
0.1u_25V_X7R_06
0.1u_25V_X7R_06
1000p_50V_X7R_04
0.01u_50V_X7R_04
0.01u_50V_X7R_04
5V
EEEFZ1E101P
EEEFZ1E101P
EEEFZ1E101P
2
2
PR19 PC10
2.2_06 PR20
2.2_06
0.22u_16V_X7R_06 D1 1 D1 1
D PU1 2 2 D
NCP81151MNTBG
INS128741265 INS128742633
1
BST HG
8 PR194 2.2_1%_06 3 G1 MLP08
COMMON
3 G1 MLP08
COMMON
PL6
0.9m ohm
0V~1.2V/120A
4
2 S1 S1 CMME063T-R15MS0R907
7
49 PWM1 PWM SW
6 6 2 1
*10K_1%_06 PR193 D2 D2
8 8 VCORE
3
49,50 DRVON EN GND 6
7 7
2.2_1%_06
*20mil_04
*20mil_04
PR44
PR50
PR51
4 5
VCC LG
PC40 PC35 PC39 PC37 PC127
PC9 PAD PQ29 PQ30 + + + + +
5 G2 CSD87350Q5D5 G2 CSD87350Q5D
470u_2V_SMD-V
470u_2V_SMD-V
470u_2V_SMD-V
470u_2V_SMD-V
470u_2V_SMD-V
PC36
2.2u_6.3V_X5R_04 S2 9 S2 9
2200p_50V_X7R_04
B.Schematic Diagrams
BOTTOM PAD
CONNECT TO 49 CSP1
GND Through
4 VIAs
VIN 49 CSN1
1
5V PC25 PC30 PC29 PC41
+
Sheet 50 of 69
1u_25V_X5R_06
4.7u_25V_X5R_08
4.7u_25V_X5R_08
25TQC15MYFB
PC18
2
PR34
PR12 2.2_06
2.2_06 0.22u_16V_X7R_06 1 1
VCore Output
D1 D1
PU3 2 2
NCP81151MNTBG
PR187 INS128747271 INS128747319
1 8 2.2_1%_06 3 G1 MLP08
COMMON
3 G1 MLP08
COMMON
0.9m ohm
BST HG
PL5
4
Stage
S1 S1
49 PWM2
2
PWM SW 7 CMME063T-R15MS0R907 Ceramic / 0805/X5R
C *10K_1%_06 PR189 D2 6 D2 6 2 1 C
3 8 8
49,50 DRVON EN GND 6
7 7
PC46
PC47
PR45
*20mil_04
*20mil_04
2.2_1%_06
4 5
VCC LG
PR52
PR53
PC6 PAD PQ28 PQ27
5 G2 CSD87350Q5D5 G2 CSD87350Q5D
PC38
2.2u_6.3V_X5R_04 9 9
*22u_6.3V_X5R_06
*22u_6.3V_X5R_06
S2 S2
2200p_50V_X7R_04
BOTTOM PAD
CONNECT TO
GND Through
4 VIAs
49 CSP2
VIN 49 CSN2
1
5V PC26 PC27 PC32 PC119
+
1u_25V_X5R_06
4.7u_25V_X5R_08
4.7u_25V_X5R_08
*25TQC15MYFB
PC19
2
PR35
PR13 2.2_06
2.2_06 0.22u_16V_X7R_06 D1 1 D1 1
PU4 2 2
NCP81151MNTBG
INS128749422 INS128749470
1 8 PR185 2.2_1%_06 3 G1 MLP08
COMMON
3 G1 MLP08
COMMON
0.9m ohm
BST HG
PL4
4
S1 S1
49 PWM3
2
PWM SW 7 CMME063T-R15MS0R907 Ceramic / 0805/X5R
*10K_1%_06 D2 6 D2 6 2 1
3 PR186 8 8
49,50 DRVON EN GND 6
7 7
*20mil_04
*20mil_04
PR47
PR46
PR54
PC58
PC45
2.2_1%_06
4 5
VCC LG
B B
PC7 PAD PQ25
5 G2 PQ26 5 G2 CSD87350Q5D
CSD87350Q5D PC31
2.2u_6.3V_X5R_04 9 9
*22u_6.3V_X5R_06
*22u_6.3V_X5R_06
S2 S2
2200p_50V_X7R_04
BOTTOM PAD
CONNECT TO
GND Through
4 VIAs
49 CSP3
5V VIN
49 CSN3
PC50 PC23 PC28 PC55
1
PR195 PC125 +
1u_25V_X5R_06
4.7u_25V_X5R_08
4.7u_25V_X5R_08
*25TQC15MYFB
2.2_06 PR196
2.2_06
2
0.22u_16V_X7R_06 D1 1 D1 1
PU11 2 2
NCP81151MNTBG
INS128751579 INS128751627
1 8 PR199 2.2_1%_06 3 G1 MLP08
COMMON
3 G1 MLP08
COMMON
0.9m ohm
BST HG
PL7
4
2 S1 S1 CMME063T-R15MS0R907
7
49 PWM2A PWM SW
6 6 2 1
*10K_1%_06 D2 D2
3 PR198 8 8
49,50 DRVON EN GND 6
7 7
*20mil_04
*20mil_04
PR43
PR48
PR49
PC56
PC57
2.2_1%_06
4 5
VCC LG
PC121 PAD PQ32
5 G2 PQ31 5 G2 CSD87350Q5D
A CSD87350Q5D PC34 A
2.2u_6.3V_X5R_04 9 9
*22u_6.3V_X5R_06
*22u_6.3V_X5R_06
S2 S2
2200p_50V_X7R_04
15,16,17,18,20,21,25,26,30,31,33,35,43,45,46,47,51,52 VDD3
2,11,15,17,24,25,27,38,42,43,44,46,47,51 3.3V
BOTTOM PAD 15,21,24,27,39,40,43,44,46,47,49,51 5V
CONNECT TO 49 CSP2A 11,15,29,30,43,44,45,46,47,48,49,51,52 VIN
GND Through 5,6 VCORE
4 VIAs
49 CSN2A ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[50] VCORE OUTPUT STAGE
Size Document Number R ev
A2 SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Monday, August 28, 2017 Sheet 50 of 69
8 7 6 5 4 3 2 1
VCore Output Stage B - 51
Schematic Diagrams
VCCSA / VCCGT
8 7 6 5 4 3 2 1
OPTANE PWR GATEING
DEFAULT SHORT
2.5A 2.5A
1 2 SATA_5VS
PJ62 3mm
D U58 J_SATA1 SATA PORT1 D
S1
9 8 S2 SATA2TXP C832 0.01u_16V_X7R_04 SATA2_TXP
5VS_2 VIN VOUT SATA2_TXN SATA2_TXP 17
C913 C911 C915 C912 S3 SATA2TXN C834 0.01u_16V_X7R_04 SATA2_TXN 17
7 S4
VOUT SATA2_RXN
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
S5 SATA2RXN C833 0.01u_16V_X7R_04 SATA2_RXN 17
6 S6 SATA2RXP C775 0.01u_16V_X7R_04 SATA2_RXP
VOUT SATA2_RXP 17
S7
5 3.3VS
VOUT
P1
SATA_5VS P2
P3
P4
R937 *0_04 P5
B.Schematic Diagrams
16 SATA_PWR_EN1 P6
R938 *0_04 SATA_PWR_EN 2 4 P7 SATA_5VS
16 SATA_PWR_EN2 EN VBIAS 5V
PR252 P8
P9
*220_06 P10
R936 P11
B Y ἧ䓐䘬廠↢暣 ⡻ 婧 㔜 , P12 C779 C780 C777 C776 C778 + C296
*10K_04 C914 ὅ≇䌯 ( 旣ῤ& ⊭ 墅 ⣏ ⮷ ) P13
P14 0.1u_16V_Y5V_04 10u_6.3V_X5R_06 22u_6.3V_X5R_08
*1u_6.3V_X5R_04
P15 1u_6.3V_X5R_04 22u_6.3V_X5R_08 EEFCX0J221YR
Sheet 51 of 69
D
D71 PQ45
ON
GND1
GND2
*RB0540S2 G
12,14,15,44,46 SUSB
*MTN2002ZG3
S
C
VCCSA / VCCGT 3.3V R939 *10K_04 SATA_PWR_EN
C910
1
GATE GND
3
15-02090-1A03-0
*M5938BRD1U
C *0.1u_10V_X7R_04 C
㓦暣徜 嶗 枸䔁 ᶵᶲ
VCCSA For CV test
VIN
PR36 820K_1%_06
VDD3 PR15 100K_04 PJ31 1 2 *CV-40mil
PU10 PQ3 PC22 PC233 PC44 PC120
MDU1516
D
PR14 10K_04 PJ33 1 2 *CV-40mil ULTRASO-8
43 VCCIO_EN_R
0.1u_50V_Y5V_06 0.1u_50V_Y5V_06 4.7u_25V_X5R_08 4.7u_25V_X5R_08
G
B
PJ32 1 2 1mm VCCSA_EN 15 13 PR173 0_06 B
21,43,49 VCCIO_PWRGD
S
EN_PSV BST PC20
DEFAULT 5V 0.1u_10V_X7R_04 11.1A
16 12 PR37 2.2_1%_06
PR17 TON DH PL3 VCCSA 1~1.1V
PC111 BCIHP0730-1R0M
2.2_04 1 11 1 2
*0.01u_16V_X7R_04 VOUT LX PCB Footprint = BCIHP0735A
PC126
PC48
PC129
2 10 PR38 4.3K_1%_04 PR197
VCC ILIM
PC110 2.2_1%_06
PD10
3 9 5V PQ24
C
VFB VDD MDU1512 PC124
1u_6.3V_X5R_04 ULTRASO-8 + +
560u_2.5v_6.6*6.6*5.8
*560u_2.5V_6.6*6.6*5.9
4 8 G
PGOOD DL
22u_6.3V_X5R_08
2200p_50V_X7R_04
S
PR18 10K_04 PC113
CSOD140SH
3.3VS
A
6 7
AGND PGND 17 1u_6.3V_X5R_04
PGND
NC
NC
5
14
3.3VS G5602R41U
5
1 VR_READY_SA PR160 40.2K_1%_04
4 PC109 *15p_50V_NPO_04 PR57 100_04
17,21 VR_READY
2
VR_READY_VCORE 49
PR16
32,34,47 5VS_2
3
2,11,15,17,24,25,27,38,42,43,44,46,47 3.3V
U1
A 15,16,17,18,20,21,25,26,30,31,33,35,43,45,46,47,52 VDD3 A
U74AHC1G08G-AL5-R 100K_1%_04 PR58 0_04 VCCSA_SENSE 5 5 VCCSA
3,5,18,46,49 VCCST_VCCPLL
PR56 0_04 VSS_SA_IO_SENSE 5
(40.2K/100K+1)*0.75=1.05V 15,21,24,27,39,40,43,44,46,47,49,50 5V
11,15,29,30,43,44,45,46,47,48,49,50,52 VIN
7,8,9,10,11,14,15,16,17,18,19,20,21,24,25,26,27,28,30,31,32,33,34,36,38,41,42,43,44,46,47,49 3.3VS
PR55
100_04
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[51] VCCSA/VCCGT/OPTANE PWR
Size Document Number Rev
Custom SCHEMATIC1 6-71-P77F0-D02 2.0
Date: Wednesday, October 25, 2017 Sheet 51 of 69
8 7 6 5 4 3 2 1
B - 52 VCCSA / VCCGT
Schematic Diagrams
Power Charger, DC-In
5 4 3 2 1
SMART CHARGER TI24780S
D
VIN
PQ50 PQ49
MDU1512 MDU1512
B.Schematic Diagrams
D S S D
A
PD18 PD19
MDL914S2 MDL914S2
G
G
ULTRASO-8ULTRASO-8 VDD3
C
PR255
EML1 VA1
HCB2012KF-800T80 4.7_04
EML2
HCB2012KF-800T80
PRS1
0.01_1%_32
PR257
ILIM
PR256
287K_1%_04 J_BATTA17_1
1
2
Sheet 52 of 69
VA PQ52 PQ53 3
GND1
GND2
GND3
J_AC1
5 1
6 2
EML3
HCB2012KF-800T80
PC240 PC241 C917 PD20
D
MDU1512
S
PC244
MDU1512
S D
PRS2
0.01_1%_32
45.3K_1%_04 4
5
6
7
Power Charger,
C
C PC242 PC243 PC245 PC246 PC251 PC247 PC248 PC249 PC250 BTJ-07AP0G-SD001
0.047u_16V_X7R_06
DC-In
7 3
1000p_50V_X7R_04
GND4 PR262 PC252
0.1u_25V_X7R_06
4.7u_25V_X7R_08
4.7u_25V_X7R_08
4.7u_25V_X7R_08
4.7u_25V_X7R_08
MESMAJ20A-G
8 4
1000p_50V_X7R_04
1500p_50V_04
GND5 PR258 PR259 PR260 PR261 10_1%_06 1u_25V_X5R_06
G
G
0.1u_25V_X7R_06
0.1u_25V_X7R_06
10u_25V_X5R_08
9
0.1u_25V_X7R_06
*0402_short *0402_short PQ54
2MJ-3432-008H ULTRASO-8ULTRASO-8
MDU1512
D
4.7_06
P/N = 6-20-B3H20-103 4.7_06 PR263 PR264
A
PCB Footprint = 2MJ-0402A120A 4.02K_1%_04
PC254 BATDRV G
4.7_04
PC253
S
PC255
2.2u_25V_X5R_08
0.1u_50V_Y5V_06
ULTRASO-8
PC257 PC258 2.2u_16V_X5R_06 PC256
0.1u_25V_X7R_06 REGN PQ56
QM3004M3 0.01u_25V_X7R_04
0.1u_50V_Y5V_06
5
5
5
5
PR265 PR266 BTST PR267 0_06
4.02K_1%_04 4.02K_1%_04 PL18 PRS3
29
28
27
26
25
24
23
22
PU15 HIDRV 4 BCIHP0730-4R7M 0.01_1%_32 J_BATTA15_1
2 1 V_BAT
GND_2
PHASE
HIDRV
LODRV
GND_1
VCC
BTST
REGN
5 1
5 2
5 3
PC259 PQ57 1
5
0.047u_25V_X7R_06 QM3006M3 PRS4 SMC_BAT PL19HCB1005KF-121T20 2
PACN 1 21 Phase SMD_BAT 3
PC260
PC261
PC262
PR268 0.01_1%_32 HCB1005KF-121T20
PACP 2 ACN ILIM 20 LODRV 4 PR269 PL20 4
470K_04 CMSRC 3 ACP BQ24780SRUYR SRP 19 5
1
2
3
ACDRV 4 CMSRC SRN 18 PC274 BAT_DET_C 6
ACDRV BATDRV 7
C918
C919
C920
5 17 SRP 10_04 PR270 *100p_50V_NPO_04 PR272 *20K_04
10u_25V_X5R_08
10u_25V_X5R_08
*10u_25V_X5R_08
ACDET 6 ACOK BATSRC 16 SRN *BTJ-07AP0G-SD001
PROCHOT#
*0402_short
C
IOUT 7 ACDET TB_STAT# 15 10_04 PR271
CMPOUT
IADP BATPRES# PR273 PD23 PD22
IDCHG
CMPIN
PMON
30p_50V_NPO_04
30p_50V_NPO_04
30p_50V_NPO_04
PC265 10_04 PR274 PC264 *0402_short
SDA
SCL
PR275 0.1u_25V_X7R_06
SS1040WG
SS1040WG
SMC_BAT 30,31
0.1u_25V_X7R_06
A
75K_1%_04 IDCHG TB_STAT PC268 PC266
8
9
10
11
12
13
14
SMD_BAT 30,31
PC267
0.1u_25V_X7R_06
0.1u_25V_X7R_06
100p_50V_NPO_04 PR276 PR277
10K_1%_04 *10K_1%_04 PR278
2.2_06
100p_50V_NPO_04
PC270
PC269 PR280 VDD3
10K_1%_04 4700p_50V_X7R_04
B PR281 0_04 PR282
49 PSYS
10K_1%_04
PL21 HCB1005KF-121T20 BAT_DET_C
30 BAT_DET
VDD3
SMD_BAT PR283 0_04
SMC_BAT PR284 0_04
VDD3
PQ58 PR287
MTE1K0P15KN3 300K_1%_04
PR285 PR286 0_04 V_BAT S D BATVLT
D02_0221_wey TOTAL_CUR 30 BAT_VOLT 30
10K_04
VDD3 PC271 PR289
AC/BATL# 15
G
100K_04 PR290 PC273
D
100p_50V_NPO_04
PQ59 60.4K_1%_04 0.1u_16V_Y5V_04
PR291 G 2SK3018S3 BATGS
D
S
47K_04
G PQ60
AC_IN# 30 VDD3
2SK3018S3
C
S
PD26
C A PR292 10K_04 B PQ61
VA
ZD5245BS2 BTN3904
E
M-SOT23-CBE
D02A modify PR293
10K_04
AC_IN
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[52] PWR CHARGER, DC IN
15,16,17,18,20,21,25,26,30,31,33,35,43,45,46,47,51 VDD3
11,15,29,30,43,44,45,46,47,48,49,50,51 VIN Size Document Number R ev
46 VA A2 SCHEMATIC1 6-71-P77F0-D02 2.
Date: Wednesday, October 25, 2017 Sheet 52 of 69
5 4 3 2 1
Power Charger, DC-In B - 53
Schematic Diagrams
P750DM HDD Board
5 4 3 2 1
HJ_SATA3
S1
S2 H_SATA_TXP1 HC5 0.01u_16V_X7R_04 HSATA_TXP1
S3 H_SATA_TXN1 HC6 0.01u_16V_X7R_04 HSATA_TXN1
S4
S5 H_SATA_RXN1 HC8 0.01u_16V_X7R_04 HSATA_RXN1
SATA PORT1 HJ_SATA2
S6 H_SATA_RXP1 HC9 0.01u_16V_X7R_04 HSATA_RXP1 1 2
H_3.3VS 1 2
S7 3 4
H_3.3VS 5 3 4 6 HSATA_TXP1
7 5 6 8
D D
P1 9 7 8 10 HSATA_TXN1
P2 11 9 10 12
HGND 11 12 HSATA_RXN1
P3 HC10 HC11 13 14
P4 15 13 14 16
P5 *0.01u_16V_X7R_04 *10u_6.3V_X5R_06 17 15 16 18 HSATA_RXP1
H_5VS 17 18
P6 19 20
P7 H_5VS 21 19 20 22
P8 HGND HGND 23 21 22 24 HUIM_CLK
P9 25 23 24 26 HUIM_DATA
P10 27 25 26 28 HUIM_RST
P11 29 27 28 30 HUIM_PW R
P12 HC15 HC14 HC13 HC16 HC17 + HC7 + HC12 29 30
B.Schematic Diagrams
P13 50185-03041-001
P14 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 10u_6.3V_X5R_06 220u_6.3V_6.3*6.3*4.2 *EEFCX0J221YR
P15 *22u_6.3V_X5R_08 HGND
*22u_6.3V_X5R_08
194502-1
GND1
GND2
HGND
PN: 6-20-43720-022
323AH22FRT0102C3 HGND
Sheet 53 of 69 PN: 6-20-43730-022
194502-1
P750DM HDD
C C
Board
{ W/O 3G 㗪
㬌
⋨
ᶵ ᶲ ẞ}
SIM CONN HR1 *4.7K_04
HJ_SIM1
(TOP VIEW) HR3
HR2 SW1 C8 *10mil_short
*10mil_short C4 DETECT_SW UIM_MCMD C7 HUIM_DATA_R HUIM_DATA
HUIM_CLK HUIM_CLK_R C3 UIM_DATA UIM_I/O C6 HUIM_VPP
HUIM_RST C2 UIM_CLK UIM_VPP C5
HUIM_PW R UIM_RST UIM_GND
GND1
GND2
GND3
GND4
C1
*22p_50V_NPO_04
*22p_50V_NPO_04
*22p_50V_NPO_04
UIM_PWR
*22p_50V_NPO_04
FLY-160429-02
GND1
GND2
GND3
GND4
HC3
HC4
HC1
HC2
6-86-2B010-004
HGND HGND HGND HGND
HGND
B B
Layout㗪 HH3 HH1 HH2
1. SIMᷳ
㚱
ᾉ嘇 䶂 ≈ 䰿( 1 0 m i l ) H2_3D2_3 H5_5D2_3 H5_5D2_3 HH4
2. 㚱ᾉ嘇䶂 ᷳ 攻 ≈ G ND 2
3. SIM hold 㛔
橼
⚃␐≈G N D⚵ 丆 3
4 1
4.SIM CONN 月役 MIN I CAR D CONN 5
5. S I M ᷳ㭷ᶨᾉ 嘇 䶂 䘬 Layou t 嵹䶂 暨 ⮷ 㕤10℔ ↮. MTH6_0D2_8
HGND HGND
HGND HGND
A A
Co-Lay
1HR1 *0_04 4HR1 *0_04 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
2HR1 *0_04 5HR1 *0_04 Title
[53] P750DM HDD BOARD
3HR1 *0_04 6HR1 *0_04
Size Document Number Rev
A3 SCHEMATIC1 6-71-P77FN-D02 2.0
Date: W ednesday, October 25, 2017 Sheet 53 of 69
5 4 3 2 1
B - 54 P750DM HDD Board
Schematic Diagrams
P750DM Power LED Board
5 4 3 2 1
L_3.3VS
POWER
D SWITCH D
POWER BUTTON LED
20mil
FOR 15" FOR 17" L_SW 1 LR3
TJE-532-Q-T/R
3 1 1K_04
4 2 LM_BTN#
LJ_LED15_1 LJ_LED17_1
5
6
LM_BTN# LM_BTN# 20mil LC2
1 1
1
2 L_LID_SW # LED_GND 2 L_LID_SW # LED_GND
LD1 LC1 *0.1u_16V_Y5V_04
3 L_W LAN_AIRPLANE# 3 L_W LAN_AIRPLANE#
B.Schematic Diagrams
4 LSATA_LED# 4 LSATA_LED# LED_GND 0.1u_50V_Y5V_06
5 LLED_NUM# 5 LLED_NUM# AVL18S02015
A
NC2 6 LLED_CAP# NC2 6 LLED_CAP# VARISTOR
2
7 LLED_SCROLL# 7 LLED_SCROLL# LD4 LED_GND
8 8 6-24-30003-008
NC1 NC1
9 LED_GND 9 LED_GND
RY-SP190DBW 71-5A
10 10 LED_GND
11 11
Sheet 54 of 69
C
12 12
FP225H-012S10M
L_VDD3
*FP225H-012S10M
L_VDD3 P 2 8 0 8 A1 , 㛔
幓㚫䅺 㭨 ,
P2808A1
䫾 D2 6 mount e d VARI S T OR.
⮵
L_3.3VS L_3.3VS LED_GND
P750DM Power
C C
LED Board
L_VDD3
LJ_LID15_1 L_VDD3
LJ_LID17_1
1 L_LID_SW #
2 1 L_LID_SW # LH4 LH3 LH1 LH2
3 2 H4_5D2_3 H4_5D2_3 C71D71N C71D71N
88266-03001 3
LED_GND *88266-03001
LED_GND
LED_GND LED_GND
L_3.3VS L_3.3VS L_3.3VS L_3.3VS L_3.3VS
LR6 SCROLL LR5 CAPS LOCK LR4 NUM LOCK LR2 HDD LED LR1 AIRPLANE LED
B B
1K_04
LOCK 1K_04
LED 1K_04
LED 1K_04 1K_04
LED
A
A
LD7 LD6 LD5 LD3 LD2 㕘
⡆ⶍ 䦳 I S SU E
RY-SP190DBW 71-5A RY-SP190DBW 71-5A RY-SP190DBW 71-5A RY-SP190DBW 71-5A RY-SP190DBW 71-5A 1LR1 *0_04 4LR1 *0_04
2LR1 *0_04 5LR1 *0_04
C
3LR1 *0_04 6LR1 *0_04
LLED_SCROLL# LLED_CAP# LLED_NUM# LSATA_LED# L_W LAN_AIRPLANE#
A A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[54] P750DM POWER LED BOARD
Size Document Number Rev
A3 SCHEMATIC1 6-71-P75DC-D02 2.0
Date: Monday, August 28, 2017 Sheet 54 of 69
5 4 3 2 1
P750DM Power LED Board B - 55
Schematic Diagrams
P750DM Click Board
5 4 3 2 1
TTP_VCC
TTP_VCC
TTP_VCC
TJ_TP3
TL3
TJ_TP1
.
FCM1005KF-121T03 1 TTP_CLK
TJ_CLICK1 1 TTP_CLK 2 TTP_DATA
2 TTP_DATA 3 TTPBUTTON_L
1 TTPBUTTON_L TGND 3 4 TTPBUTTON_R
D TJ_TP2 TGND D
2 4 TTPBUTTON_L 5
1 TTP_DATA 3 TTPBUTTON_R 5 TTPBUTTON_R 6 TTP_SMB_CLK TGND
2 TTP_CLK 4 6 7 TTP_SMB_DATA
3 8
4 FP226H-004S10M
TO ㊱挝
TTP_SMB_DATA *FP225H-006S10M FP225H-008S11M
5 TTP_SMB_CLK PCB Footprint = fp225h-006xxxm
6
FP225H-006S10M TGND TO T/P
PCB Footprint = fp225h-006xxxm
TO M/B
B.Schematic Diagrams
Sheet 55 of 69 T3.3V
FOR SECURE PAD㬌
⋨
ᶵᶲẞ
LAYOUT悐ấ婳䡢娵䚠斄㔯ẞ & 䴎 ⺈ ⓮ 䡢娵
TL1
P750DM Click
.
*FCM1005KF-121T03
Board C
TC1
0326 UPDATE PCB FOOTPRINT
QPOFZ-24R2-XD-Z-LD
C
*0.1u_10V_X7R_04
TJ_FP1 T_XIN TJ_FPB1
TGND
6 TR7 *1M_04 T_XOUT T2.5V 1 2
5 3 4
4 5 6
3 3 4 TGND
TR1 *26.1_1%_04 TUSB_PN10 7 8 TLED1
2 TR2 *26.1_1%_04 TUSB_PP10 9 10 TLED2
1 TGND 2 1 11 12 TDISCON
*FP225H-006S10M TGND TX1 13 14
PCB Footprint = fp225h-006xxxm TC5 *HSX321G_12Mhz TC4 T_XIN 15 16
T_XOUT 17 18
*15p_50V_NPO_04 *15p_50V_NPO_04 T_RST_N 19 20
21 22 TUSB_PN10_R
T3.3V 23 24 TUSB_PP10_R
It is strongly recommended that the TESD_GND has
a dedicated connection to the system chassis or *CON24A
cable shield. TGND TGND
TGND Place Botton TGND
B B
T3.3V
T2.5V T3.3V
S
G TDISCON
TU1
TQ1
1 10 *AO3415
D
2 9 TLED1 TR5 *10K_04
3 8 TC8 TC3 TC6 TC2 TUSB_PP10 TR3 *1.5K_04
TGND TUSB_PP10 4 TGND
7 TUSB_PP10_R
TUSB_PN10 5 6 TUSB_PN10_R *0.1u_10V_X7R_04 *4.7u_6.3V_X5R_06 *0.1u_10V_X7R_04 *4.7u_6.3V_X5R_06 TLED2 TR4 *10K_04
*PUSB3F96 TR6 *47K_04 T_RST_N
T3.3V
TGND
FOR ESD, 役FF
月 㒢 㓦
C CONNECTO
R TGND TGND
TC7
CLOSE TO SENSOR POWER PIN *1u_6.3V_X5R_04
TGND
A A
戭㞙ᶲẞ
TH2 TH1 TH3 TH4 㕘
⡆ⶍ 䦳 I S SU E
H3_7B5_5D3_7 H3_7B5_5D3_7 C197D197N C197D197N
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
1TR1 *0_04 4TR1 *0_04
2TR1 *0_04 5TR1 *0_04 Title
3TR1 *0_04 6TR1 *0_04 [55] P750DM CLICK BOARD
Size Document Number Rev
A3 2.0
TGND TGND SCHEMATIC1 6-71-P75D2-D02
Date: Monday, August 28, 2017 Sheet 55 of 69
5 4 3 2 1
B - 56 P750DM Click Board
Schematic Diagrams
P750DM Audio Board
5 4 3 2 1
AAJ_LINE1
5
AALINE_SENSE 4
AALINE-R AAL4 FCM1005KF-121T03 3
AALINE-L AAL5 FCM1005KF-121T03
6
2
LINE-IN
1
AAR31 *22K_04 2SJ-T351-018
A_AGND A_AUDG AAR32 *22K_04
D AAJ_AUDIO1 AAC18 AAC19 A_AUDG D
A_5V 1 2 680p_50V_X7R_04 680p_50V_X7R_04
1 2 AAUSB_PP9 59
3 4
3 4 AAUSB_PN9 59
5 6
7 5 6 8 A_AUDG
A_AUDG
7 8 AATXP6 59
9 10
9 10 AATXN6 59 AAJ_MIC1
11 12
13 11 12 14 5
13 14 AARXP6 59 AAMIC_SENSE
A_5VS 15 16 4
15 16 AARXN6 59
17 18 AAMIC1-R AAL2 HCB1608KF-121T30 3
19
21
17
19
18
20
20
22 AAMIC1-L AAL3 HCB1608KF-121T30
6
2
MIC
23 21 22 24 1
A_3.3VS 23 24
25 26 2SJ-T351-018
B.Schematic Diagrams
A_3.3V 25 26
56 AAHP_PLUG 27 28
29 27 28 30 AAC16 AAC17 A_AUDG
57 AAI2C_CLK 29 30
31 32
57 AAI2C_DATA 31 32 AAUSB_PP5 59
33 34 680p_50V_X7R_04 680p_50V_X7R_04
59 AADD_ON# 33 34 AAUSB_PN5 59
35 36 AAR40 0_04 A_AGND
57 AASPDIFO 35 36
37 38
39 37 38 40 AALINE-L A_AUDG A_AUDG
56 A_ALC898_GPIO2 39 40
41 42 AALINE-R
58 A_ALC898_VREFO AASIDE_L
AASIDE_R
AAJD_SENSEA
43
45
47
41
43
45
42
44
46
44
46
48
AAMIC1-R
AAMIC1-L A_AUDG 5
AAJ_HP1
LINE-OUT
Sheet 56 of 69
AAJD_SENSEB 49 47 48 50 AASIDE_SENSE 4
49 50
50185-05041-001
AASIDE_R
AASIDE_L
AAL8
AAL7
HCB1608KF-121T30
HCB1608KF-121T30
3
6
2
P750DM Audio
A_AUDG A_AUDG 1
Board
C C
AAR38 *22K_04 2SJ-T351-018
A_AUDG AAR39 *22K_04 AAC22 AAC23
AASMB_CLK 680p_50V_X7R_04 680p_50V_X7R_04 A_AUDG
AASMB_DATA
AA3DHEADPHONE-RC
AA3DHEADPHONE-LC A_AUDG A_AUDG
AA3DHP_AUDG
A_AMP_EN
AAHEADPHONE-R
AAHEADPHONE-L 1 2
A_AGND
AAD4 V15AVLC0402
56 AAHP_PLUG 2
1
A
C
3 SPDIFO/Hi-ReS
56 A_ALC898_GPIO2 A
HI RSE AUDIO AAJ_SPDIF1
AAD5 BAT54CW H 1
58 AAHEADPHONE-LC AAL9 FCM1005KF-121T03 2
58 AAHEADPHONE-RC AAL6 FCM1005KF-121T03 3
AAHP_SENSE 4
AAR29 *22K_04 AAC20 AAC21 5
AAR30 *22K_04 A_5VS
A_AUDG
A_AUDG 100p_50V_NPO_04 A
100p_50V_NPO_04 B DRIVE
AASPDIFO AAL10 HCB1608KF-121T30 C IC
TX
B AAC24 1.56 B
0.1u_16V_Y5V_04
AAR33 AAC25
*220_04 100p_50V_NPO_04
A_AGND A_AGND A_AUDG A_AGND
AAR34 10K_1%_04 AALINE_SENSE
AAJD_SENSEA AAR35 20K_1%_04 AAMIC_SENSE
AAR36 39.2K_1%_04 AAHP_SENSE
AAJD_SENSEB AAR37 5.1K_1%_04 AASIDE_SENSE
AAC68 0.1u_16V_Y5V_04
AAC26 0.1u_16V_Y5V_04
A A
AAC27 0.1u_16V_Y5V_04
AAH1 AAH2
H5_0D2_5 H5_0D2_5 AAH3 AAH4 AAH5 AAH6 AAC28 0.1u_16V_Y5V_04
H2_3D2_3 H2_3D2_3 2 2
1AAR1 *0_04 4AAR1 *0_04
3
4
5
1
3
4
5
1
AAC29 0.1u_16V_Y5V_04
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
2AAR1 *0_04 5AAR1 *0_04 A_AGND A_AUDG Title
MTH6_0D2_3 MTH6_0D2_3
57,58 A_5VS
[56] P750DM AUDIO BOARD
3AAR1 *0_04 6AAR1 *0_04
59 A_5V Size Document Number Rev
A_AGND A_AGND
A_AGND A_AGND
59
57,58
A_3.3V
A_3.3VS
A3 SCHEMATIC1 6-71-P75D8-D02A 2.0A
Date: Monday, August 28, 2017 Sheet 56 of 69
5 4 3 2 1
P750DM Audio Board B - 57
Schematic Diagrams
P750DM Audio ESS DAC
5 4 3 2 1
ESS DAC (ES9018-2M) UltraLow Noise REG (FOR ANALOG POWER)
3.3V ANALOG POWER A_5VS AESS_AVCC_R A_5VS AESS_AVCC_L
AAU3
A_5VS AAU5
AESS_VCCA 6 1
D 3.3V DIGITAL POWER AAU4 VIN VOUT 6 1 D
5 2 VIN VOUT
5 2
1u_6.3V_X5R_04
6 1 4 NC NC 3
4.7u_6.3V_X5R_04
1u_6.3V_X5R_04
VIN VOUT 4 NC NC 3
4.7u_6.3V_X5R_04
A_3.3VS 5 2 EN GND
4.7u_6.3V_X5R_04
AESS_DVCC EN GND
1u_6.3V_X5R_04
NC NC
AAL11 4 3 AAC30 LP5900SD-3.3/NOPB AAC31
HCB1005KF-121T20 EN GND AAC34 LP5900SD-3.3/NOPB AAC35
AAC32 LP5900SD-3.3/NOPB AAC33
A_AGND A_AGND
A_AGND
A_AGND
A_AUDG A_AGND A_AUDG
A_AGND
A_AUDG
B.Schematic Diagrams
2.2u_6.3V_X5R_04
AESS_DVCC
AAC36 AESS_VCCA
A_AGND AESS_AVCC_R
AESS_DVCC AESS_AVCC_L
Sheet 57 of 69 AAU6
21
20
19
18
17
16
15
INVERT/BUFFER A_AGND
AAR41 ES9018K2M
AAR42
P750DM Audio ESS
AVCC_L
DVDD
DGND
NC
DVCC
VCCA
AVCC_R
47K_04
10K_04 AARESETB ESS DAC OUTPUT
C AAR104 *0_04 C
SPDIF INPUT 58 AAOP1622_EN 22 14
DAC 4.7u_6.3V_X5R_04
AAC37
AAR43 1
AAU7
AESS_DVCC
5
23
24
25
NC
GPIO2
GPIO1
DACLB
DACL
AGND_L
13
12
11
AADACLB
AADACL
58
58
2 NC VCC DATA2 AGND_R
56 AASPDIFO AAR44 20_1%_04 26 10
3 A 4 AASPDIF_IN DATA1 DACRB AADACRB 58
75_04 AADCLK 27 9
GND Y DATA_CLK DACR AADACR 58
28 8
RESETB AGND
AAC39
AAR45 U74AHC1G04
AAR46
XI(MCLK)
AAC38
47K_04 AAR47
47K_04 AAR48
AAR49
A_AGND
75_04 footprint=SOT353-5
DGND
ADDR
EPAD
100K_04 4.7u_6.3V_X5R_04 A_AUDG
SDA
SCL
XO
NC
1u_6.3V_X5R_04
47K_04
29
1
2
3
4
5
6
7
AAESS_XI
A_AGND A_AGND A_AGND
AAESS_XO AAR50 *0_04
A_AGND EXT CLK OUT
58
AASMB_DATA_R
(ENABLE) A_AGND
58
AASMB_CLK_R
A_AGND
AAESS_XO
A_3.3VS AESS_DVCC AAR51 499K_1%_1/16W _04 AAESS_XI
3 4 A_AGND
AAR52
A_AGND 2 1
B 47K_04 AAX1 FSX3M 50.000000M18FDO
B
G2
AAQ1A ES9018/SV700A I2C
FROM EC
MTDK5S6R XTAL 50MHz
6 1 AASMB_CLK_R AAC41
G5
56 AAI2C_CLK AAC40
AAQ1B
S
3 4 AASMB_DATA_R
56 AAI2C_DATA 20p_50V_NPO_04 20p_50V_NPO_04
MTDK5S6R
D
S
AAR53 *0_04 AA9018_ADDR
A_AGND A_AGND
ADDR:0X90(LOW)
0x92(HIGH)
THIS TOPOLOGY SUPPORTS FUNDAMENTAL
ESS9018 ADD:0x90 AND 3RD OVERTONE CRYSTALS AS WELL AS
POWERED OSCILLATORS.
A_AGND
SHORT AND OPEN COMPONENTS AS NEEDED TO
ACCOMODATE DIFFEREHT CRYSTAS AND
OSCILLATORS.
USE 4-SMD PACKAGE OR COMPATIBLE.
CLOSE TO ES9018
AESS_DVCC AESS_VCCAAESS_AVCC_R AESS_AVCC_L
AAC42
0.1u_10V_X7R_04 AAC45
0.1u_10V_X7R_04 AAC43
0.1u_10V_X7R_04 AAC44
A A
1u_6.3V_X5R_04
AAR100 *54mil short-p
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Title
A_AGND A_AUDG 58 AESS_AVCC_R [57] P750DM AUDIO ESS DAC
58 AESS_AVCC_L
A_AGND A_AUDG A_AUDG A_AUDG Size Document Number Rev
56,58 A_5VS A3 SCHEMATIC1 6-71-P75D8-D02A 2.0A
56,58 A_3.3VS
Date: Monday, August 28, 2017 Sheet 57 of 69
5 4 3 2 1
B - 58 P750DM Audio ESS DAC
Schematic Diagrams
P750DM Audio HP AMP
5 4 3 2 1
Amplifier (LM49720+OPA1622) 600 ȍ HP Full-Scale setting
AAR59,AAR60 POS/NEG Vpk-pk OUTPUT(Vrms) Watt(mW)
A_+15V A_+15V A_-15V A_-15V
AAR54 100_1%_04 470p_50V_NPO_04 A_+15V AAR96,AAR97 VOLTAGE
4.7u_25V_X5R_08
0.1u_10V_X7R_04
0.1u_10V_X7R_04
4.7u_25V_X5R_08 A_-15V
AAPC4 AAC47 AAC48
Thin Film AAC46 768ȍ +-15V 24.1V 8.51V 120mW
AAPC14
AAR55 AAC85 AAPC18 AAC86 AAPC19
2.7K_0.1%_04
825ȍ +-15V 21.3V 7.55V 95mW
1u_25V_X5R_06
0.1u_50V_Y5V_06
1u_25V_X5R_06
0.1u_50V_Y5V_06
A_+15VA_-15V
A_AUDG A_AUDG A_AUDG A_AUDG 931ȍ +-12V 19.0V 6.71V 75mW
A_AUDG A_AUDG
4
AAU8 A_5VS
57 AADACLB
+V
-V
D Thin Film D
2
AAR56 10K_1%_04 AAR57 6.34K_1%_04 -IN A AAR108
AESS_AVCC_L 1 *10K_04
3 OUT A
+IN A AA65131PS
1u_25V_X5R_06
D
AAQ7
AAC49 AAC50 2200p_50V_NPO_06
5
+IN B G *2SK3018S3
7 806_0.1%_04
S
OUT B AAR58
6
-IN B
AALEFT_IN- AAR59 806_0.1%_04
A_3.3VS A_AGND
LME49720
A_3.3VS AAR69 *100K_04
AALEFT_IN+ AAR60 806_0.1%_04
57 AADACL LME49720PCB Footprint = sop8-154mil-lem49720 A_+15V A_-15V
A_AGND AAR74 100K_04 AAC65 0.1u_10V_X7R_04
AAR61 2.7K_0.1%_04
5
AAU12
B.Schematic Diagrams
AAR98 0_04
1 A_AGND
56 A_ALC898_VREFO
4
AAU9 4
AAR62 100_1%_04 AAC51 AAR72 *0_04
AAS700A_GPIO 2 AAOP1622_EN 57
V-
V+
470p_50V_NPO_04 AAR63 AAC52
Thin Film
806_0.1%_04 10 TC7SZ08FU
3
2200p_50V_NPO_06 -INA
9 AAR64 0_04 AARELAY-LC AAR101 0_04 AARELAY
OUTA
1 A_AGND
A_AUDG +INA
AAOP_EN AAOP1622_EN
AAR95 AAC84
5
6
+INB
OUTB 7 AAR65 0_04 AARELAY-RC
AAC57
AAR102
AAR109
*0_04
10K_04 A_3.3VS Sheet 58 of 69
AAR80 -INB
806_0.1%_04
2200p_50V_NPO_06 0.22u_16V_Y5V_04
P750DM Audio HP
PAD
*0_04 8 3
EN OPA1622 GND
AAOP_EN
OPA1622 A_AGND
11
AMP
C PCB Footprint = pson10-3x3mm-opa1622 C
A_+15V A_+15V A_-15V A_-15V
A_-15V
AAC53 470p_50V_NPO_04
4.7u_25V_X5R_08
4.7u_25V_X5R_08
0.1u_10V_X7R_04
0.1u_10V_X7R_04
AAR66 100_1%_04 AARIGHT_IN+AAR96 806_0.1%_04
AAC54 AAC55 A_AUDG
AAPC5 AAPC15
Thin Film
AAR67 2.7K_0.1%_04 AARIGHT_IN-AAR97 806_0.1%_04 AAC56 2200p_50V_NPO_06
AAR68 806_0.1%_04
A_AUDG A_AUDG A_AUDG A_AUDG A_+15V A_-15V
8
AAU10
57 AADACRB
+V
-V
Thin Film
2
AAR70 10K_1%_04 AAR71 6.34K_1%_04 -IN A
AESS_AVCC_R 1
3 OUT A
+IN A
1u_25V_X5R_06
AAC58 5
+IN B
7
6 OUT B
-IN B
LME49720
57 AADACR LME49720 PCB Footprint = sop8-154mil-lem49720
AAR73 2.7K_0.1%_04
AAC59 470p_50V_NPO_04
A_5VS +15V/ -15V PWM (-300mA/+400mA)
AASV3S700A_CH1
AAR75 100_1%_04 A_5VS
AAPR2 AAPR3 OUTPUT
Thin Film
AAR110 0_04
AAHEADPHONE-LC 56
110K 100K +12.2V/-12.0V
B AAL12 AAPD1 B
AAPQ1 EMB20P03V
AAPL1 88.7K 80.6K +14.8V/-15.0V AAPL3
HCB1005KF-121T20 BCIHP0420-4R7M CPI160809UF-1R0M
AARELAY-LC A_+15V
3
8
7
A C .
AAPC20
AAPC16
2 6 AAPC1
AAPC2 4.7u_25V_X5R_08
AAPC3 4.7u_25V_X5R_08
1 5 4.7u_6.3V_X5R_04 CSOD140SH AAPR1
1
AAU15 1M_1%_04
AAPU1
C
0.1u_50V_Y5V_06
4
0.1u_50V_Y5V_06
1
AAD6
A_3.3VS SV3S700A CSOD140SH
1
24
INP1 VPOS
23
22
8
AESS_PGND INP2 FBP
A
UD2-5NU
8
AAC61 10u_6.3V_X5R_06 17
VREF
80.6K_1%_04 1M_1%_04
AAC62 0.1u_16V_Y5V_04 AAC60 0.1u_10V_X7R_04 7 AAPR3 AAPC6 AAPR2
A_AGND
0.022u_16V_X7R_04
BSW
AARELAY-RC 88.7K_1%_04
AAR76 4.7K_04
D
9018/SV700A SMBUSA_AGND A_AGND AAQ8 5
6 INN1
A_3.3VS AACN
INN2 16
*0.022u_16V_X7R_04
AARELAY G 2SK3018S3
4.7u_6.3V_X5R_04
AACP AAC63 0.1u_10V_X7R_04 AACN AAC64 1u_6.3V_X5R_04 AAHEADPHONE-RC 56 FBN AESS_PGND
A_AGND AAPR5 AAPC7
AAPR4
13
14
15
16
A_3.3VS AAU11 100_06 AA65131VIN 4 AESS_PGND
AASV3S700A_CH0 VIN
AAR77
VEE
AAR78
REXT
CN
VERF
1 12 AASV3S700A_CH0 A_AGND AAPC9 AESS_PGND
AAPR10 0_04 15
2.2K_04 2.2K_04 VDD CH0 AAPC8 VNEG
AASV3S700A_CH1 AAPL4
COMMON WITH ES9018 AACP 2 11 8 13 AAPD2 CSOD140SH
CPI160809UF-1R0M
0.1u_10V_X7R_04
CP CH1 ENP OUTN1 A_-15V
3
GND 9 AAR88 22_1%_04 AAR79 9
10 PSP OUTN2
14 C A .
57 AASMB_CLK_R SCL CH2 *54mil short-p
ADC_LDO
AAPC17
AA65131PS 11 ENN 18
AAPC21
4 8 AAR105 499_1%_04 AESS_PGND PSN CN
AAPC12 4.7u_25V_X5R_08
AAPC13 4.7u_25V_X5R_08
57 AASMB_DATA_R SDA CH3 AAPL2
GPIO
21
AAPC10 0.01u_16V_X7R_04
AAPC11 4700p_50V_X7R_04
FLT
17 CP
EN
GND A_AGND AESS_PGND AAPR9 TPS65131 BCIHP0420-4R7M
0.1u_50V_Y5V_06
0.1u_50V_Y5V_06
A_AGND 0_04
G-PAD
19 2
5
10
SV3S700A VQFN-16P
NC1
NC2
AGND PGND1 3
A_AGND PGND2
AAS700A_GPIO PCB Footprint = qfn16-3x3mm-sv3s700a
AAR82 10K_04 TPS65131RGER AESS_PGND
12
20
25
A_3.3VS
SV700A GPIO(OD) AAC66 AAC67 AESS_PGND
AESS_PGND
A 1u_6.3V_X5R_04 4.7u_6.3V_X5R_06 AESS_PGND A
AESS_PGND AESS_PGND
ALC898_GPIO(5V) SV3S700A_GPIO Y (READ) OPA1622 EN
INTERNAL PU 50K OD(PU10K) (SV700A/HP ON) (H ENABLE) REMARK
AESS_PGND
A_AGND H H H L UNPLUG(NC) AESS_PGND
H -> L H -> L L H PLUG(600/32 ohm)
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
ALC898 : SENSE_A -> GPIO HIGH TO LOW Title
S700A : GPIO HIGH TO LOW AFTER DETECTING
[58] P750DM AUDIO HP AMP
57 AESS_AVCC_R
57 AESS_AVCC_L Size Document Number R ev
OPA1622 ENABLE: SV700A LOW AND RC DELAY 56,57 A_3.3VS A2 SCHEMATIC1 6-71-P75D8-D02A 2.0A
ALC898(DOS) : S/PDIF 30% VOLUME OUTPUT Date: Monday, August 28, 2017 Sheet 58 of 69
56,57 A_5VS
5 4 3 2 1
P750DM Audio HP AMP B - 59
Schematic Diagrams
P750DM Audio Board
5 4 3 2 1
USB3.0 / USB2.0 A_3.3V
A_3.3V A_USBVCC3.0_2
AAR1 *4.7K_04 AAR2 *0_04
AAR3 *4.7K_04 AAR4 *0_04 AAR8 AAR6 AAU1
AAR7 *4.7K_04 AAR5 *0_04 *4.7K_04 *4.7K_04 3 1 AAC1
OC# VOUT
5 0.1u_16V_Y5V_04
AAI2C_SCK_20 A_5V VIN
AAR9 *4.7K_04 AAR10 2K_1%_04
AAI2C_SDA_20 AAC2 4 2
10u_6.3V_X5R_06 EN# GND
D D
AAR11 *4.7K_04 AAR12 0_04 UP7549UMA5-20
AAR13 AAR15 PCB Footprint = M-SOT23-5A A_AGND
*4.7K_04 *4.7K_04 A_AGND
A_AGND AADD_ON# AAR14 *10mil_short_04
6
AAU2
25 A_AGND AAC3 22u_6.3V_X5R_08
EQ1
DE1
OS1
VCC
EN_RXD
GND
AAI2C_SDA_20 24 GND 7 AAI2C_SCK_20 A_AGND A_AGND
USB CONNECTOR SIDE NC NC AAC5 22u_6.3V_X5R_08
AAUSB3_TX6_N A_USBVCC3.0_2 A_AGND
0.1u_10V_X7R_04 AAC4 23 8 AAC6 0.1u_10V_X7R_04 AATXN6
TX1- RX1-
AAUSB3_TX6_P 0.1u_10V_X7R_04 AAC7 22 9 AAC8 0.1u_10V_X7R_04 AATXP6 AAJ_USB1
TX1+ RX+
AAR16 *0_04 21 10 AAUSB3_TX6_P AATXP6_RJ 9 10
PCH SIDE
Standard-A
A_AGND GND GND A_AGND SSTX+ SHIELD
1 11
AAUSB3_RX6_N 20 11 AAUSB3_TX6_N AATXN6_RJ 8 VBUS SHIELD
B.Schematic Diagrams
0.1u_10V_X7R_04 AAC9 AAC10 0.1u_10V_X7R_04 AARXN6
RX2- TX2- AAUSB_PN9 1 2 AAUSB_PN9_R AAUSB_PN9_RJ 2 SSTX-
AAUSB3_RX6_P 0.1u_10V_X7R_04 AAC11 19 12 AAC12 0.1u_10V_X7R_04 AARXP6 *W CM2012F2S-161T03-short 4 D-
GND
VCC
EQ2
OS2
DE2
RX2+ TX2+ AAUSB_PP9 AAL1 AAUSB_PP9_R AAUSB_PP9_RJ GND
CM
4 3 3
AAUSB3_RX6_P AAUSB3_RX6_PJ 6 D+
A_3.3V 7 SSRX+ GND1
18
17
16
15
14
13
ASM1464 AAUSB3_RX6_N AAUSB3_RX6_NJ 5 GND_D SHIELD GND2
PCB Footprint = QFN24-4X4MM SSRX- SHIELD
Sheet 59 of 69 AAR17 0_04 AAR18 *4.7K_04
A_AGND
93-0022-02
6-20-B4A30-009
93-0022-02 A_AGND
AAR19 *0_04 AAR20 *4.7K_04
P750DM Audio C AAR21
AAR23
AAR25
*0_04
*0_04
*0_04
AAR22
AAR24
AAR26
*4.7K_04
*4.7K_04
*4.7K_04
C
Board A_3.3V
A_AGND
DT1140-04LP-7
DT1140-04LP-7
AAUSB3_RX6_N 6 5 AAUSB3_RX6_NJ AAUSB_PP9_R 10 1 AAUSB_PP9_RJ
AAUSB3_RX6_P 7 4 AAUSB3_RX6_PJ AAUSB_PN9_R 9 2 AAUSB_PN9_RJ
A_AGND 8 3 A_AGND A_AGND 8 3 A_AGND
AAUSB3_TX6_N 9 2 AATXN6_RJ 7 4
AAC13 AAC14 AAC15 AAUSB3_TX6_P 10 1 AATXP6_RJ 6 5
0.01u_16V_X7R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04
AAD1 AAD2
A_AGND
B
USB2.0 PORT A_USBVCC2.0
100 mil B
AAC87
A_USBVCC2.0 0.1u_16V_Y5V_04
AAU14
100 MIL
A_5V 5 1
VIN VOUT AAJ_USB2
AAC88 2 AAC89 AAC90 AAC91 A_AGND 1
AAUSB_PP9 GND AAD3 V+
56 AAUSB_PP9 AAUSB_PN9 10u_6.3V_X5R_06 AADD_ON# 4 3 0.1u_16V_Y5V_04 22u_6.3V_X5R_08 22u_6.3V_X5R_08 AAUSB_PN5 6 5 USB_PN5_RJ 2
56 AAUSB_PN9 EN# OC# AAUSB_PP5 USB_PP5_RJ DATA_L
7 4
SY6288D20AAC 8 3 3
AATXP6 A_AGND SY6288D20AAC: 6-02-62882-9C0 9 2 DATA_H
56 AATXP6
GND1
GND2
GND3
GND4
AATXN6 uP7549UMA5-20: 6-02-75495-9C0 A_AGND A_AGND 10 1 4
56 AATXN6 GND
A_AGND A_AGND A_AGND
AARXP6 A_AGND US04N16BAC356
56 AARXP6
GND1
GND2
GND3
GND4
AARXN6 DT1140-04LP-7
56 AARXN6
PIN GND3~4=GND
AADD_ON#
56 AADD_ON#
A_AGND
AAUSB_PN5
56 AAUSB_PN5 AAUSB_PP5
56 AAUSB_PP5
A A
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Title
[59] P750DM AUDIO BOARD
Size Document Number Rev
56
56
A_5V
A_3.3V
A3 SCHEMATIC1 6-71-P75D8-D02A 2.0A
Date: Monday, August 28, 2017 Sheet 59 of 69
5 4 3 2 1
B - 60 P750DM Audio Board
Schematic Diagrams
P775DM Audio Board
5 4 3 2 1
LINE-IN
AJ_LINE1
5
ALINE_SENSE 4
AGND ALINE-R AL2 FCM1005KF-121T03 3
AJ_AUDIO1 6
D A5V 1 2 ALINE-L AL1 FCM1005KF-121T03 2 D
1 2 AUSB_PP9 63
3 4 1
3 4 AUSB_PN9 63
5 6 AR26 *22K_04 2SJ-T351-018
7 5 6 8 AR28 *22K_04
7 8 ATXP6 63 AAUDG
9 10 AC5 AC6 AAUDG
9 10 ATXN6 63
11 12 680p_50V_X7R_04 680p_50V_X7R_04
13 11 12 14
13 14 ARXP6 63
A5VS 15 16
15 16 ARXN6 63
17 18 AAUDGAAUDG
19
21
17
19
18
20
20
22
ATXP5 63
MIC
21 22 ATXN5 63 AJ_MIC1
A3.3VS 23 24
25 23 24 26 5
A3.3V 25 26 ARXP5 63 AMIC_SENSE
60 AHP_PLUG 27 28 4
27 28 ARXN5 63
61 AI2C_CLK 29 30 AMIC1-R AL8 HCB1608KF-121T30 3
31 29 30 32 6
B.Schematic Diagrams
61 AI2C_DATA 31 32 AUSB_PP5 63
33 34 AMIC1-L AL7 HCB1608KF-121T30 2
63 ADD_ON# 33 34 AUSB_PN5 63
35 36 AR41 0_04 AGND 1
61 ASPDIFO 35 36
37 38 2SJ-T351-018
39 37 38 40 ALINE-L
60 AALC898_GPIO2 39 40
41 42 ALINE-R AC4 AC3 AAUDG
62 AALC898_VREFO ASIDE_L 41 42
43 44
ASIDE_R 45 43 44 46 AMIC1-R 680p_50V_X7R_04 680p_50V_X7R_04
AJD_SENSEA 47 45 46 48 AMIC1-L
AJD_SENSEB 49 47
49
48
50
50
50185-05041-001
AAUDG AAUDG Sheet 60 of 69
C
AAUDG AAUDG
LINE-OUT AJ_HP1
C P775DM Audio
5
ASIDE_R AL9 HCB1608KF-121T30
AAUDG ASIDE_SENSE 4
3
6
Board
ASIDE_L AL4 HCB1608KF-121T30 2
1
AR40 *22K_04 2SJ-T351-018
AAUDG AR29 *22K_04 AC2 AC1
680p_50V_X7R_04 680p_50V_X7R_04 AAUDG
AAUDG AAUDG
1 2
AGND
AD5 V15AVLC0402 SPDIFO/Hi-ReS
60 AHP_PLUG 2
3
A
B 1
C B
60 AALC898_GPIO2 A
AJ_SPDIF1
HI RSE AUDIO AD6 BAT54CW H 1
62 AHEADPHONE-LC AL14 FCM1005KF-121T03 2
62 AHEADPHONE-RC AL13 FCM1005KF-121T03 3
AHP_SENSE 4
AR25 *22K_04 AC13 AC10 5
AR27 *22K_04 A5VS
AAUDG
AAUDG 100p_50V_NPO_04 A
100p_50V_NPO_04 B DRIVE
ASPDIFO AL3 HCB1608KF-121T30 C IC
TX
AC11 1.56
0.1u_16V_Y5V_04
AR22 AC12
*220_04 100p_50V_NPO_04
AR15 10K_1%_04 ALINE_SENSE
AJD_SENSEA AR14 20K_1%_04 AMIC_SENSE AGND AGND AAUDG AGND
AR13 39.2K_1%_04 AHP_SENSE
AJD_SENSEB AR21 5.1K_1%_04 ASIDE_SENSE
AC31 0.1u_16V_Y5V_04
AC15 0.1u_16V_Y5V_04
A A
AH5 AH6 AC14 0.1u_16V_Y5V_04
H6_5B5_5D2_3 H6_5B5_5D2_3 AH4 AH3 AH1 AH2
H2_3D2_3 H2_3D2_3 2 2 AC26 0.1u_16V_Y5V_04
3 3
4 4
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1 1 AC27 0.1u_16V_Y5V_04
5 5
1AR1 *0_04 4AR1 *0_04
MTH8_0D2_8 MTH8_0D2_8 AGND AAUDG Title
2AR1 *0_04 5AR1 *0_04
61,62 A5VS
[60] P775DM AUDIO BOARD
AGND AGND
63 A5V Size Document Number Rev
3AR1 *0_04 6AR1 *0_04 AGND AGND
63
61,62
A3.3V
A3.3VS
A3 SCHEMATIC1 6-71-P7758-D32 2.0
Date: Monday, August 28, 2017 Sheet 60 of 69
5 4 3 2 1
P775DM Audio Board B - 61
Schematic Diagrams
P775DM Audio ESS DAC
5 4 3 2 1
ESS DAC (ES9018-2M) UltraLow Noise REG (FOR ANALOG POWER)
3.3V ANALOG POWER A5VS ESS_AVCC_R A5VS ESS_AVCC_L
AU3
A5VS AU5
ESS_VCCA 6 1
D 3.3V DIGITAL POWER AU4 VIN VOUT 6 1 D
5 2 VIN VOUT
5 2
1u_6.3V_X5R_04
6 1 4 NC NC 3
4.7u_6.3V_X5R_04
1u_6.3V_X5R_04
VIN VOUT 4 NC NC 3
4.7u_6.3V_X5R_04
A3.3VS 5 2 EN GND
4.7u_6.3V_X5R_04
ESS_DVCC EN GND
1u_6.3V_X5R_04
NC NC
AL11 4 3 AC34 LP5900SD-3.3/NOPB AC35
HCB1005KF-121T20 EN GND AC36 LP5900SD-3.3/NOPB AC37
AC32 LP5900SD-3.3/NOPB AC33
AGND AGND
AGND
AGND
AAUDG AGND AAUDG
AGND
AAUDG
B.Schematic Diagrams
2.2u_6.3V_X5R_04
ESS_DVCC
AC38 ESS_VCCA
AGND ESS_AVCC_R
ESS_DVCC ESS_AVCC_L
AU6
21
20
19
18
17
16
15
INVERT/BUFFER AGND
AR45 ES9018K2M
Sheet 61 of 69 AR46
AVCC_L
DVDD
DGND
NC
DVCC
VCCA
AVCC_R
47K_04
10K_04 ARESETB ESS DAC OUTPUT
P775DM Audio C AR106 *0_04 C
SPDIF INPUT 62 OP1622_EN 22 14
ESS_DVCC NC DACLB ADACLB 62
AC39 23 13
AU7 GPIO2 DACL ADACL 62
24 12
4.7u_6.3V_X5R_04 GPIO1 AGND_L
ESS DAC 60 ASPDIFO
AR47
75_04
1
2
3
NC VCC
A
GND Y
5
4
AR48
ASPDIF_IN
20_1%_04
ADCLK
25
26
27
28
DATA2
DATA1
DATA_CLK
AGND_R
DACRB
DACR
11
10
9
8
ADACRB
ADACR
62
62
AC41
AR49 U74AHC1G04 RESETB AGND
AR50
XI(MCLK)
AR51
AR52
AR53
AGND
75_04 footprint=SOT353-5
DGND
ADDR
EPAD
100K_04 AC40 AAUDG
SDA
SCL
XO
NC
4.7u_6.3V_X5R_04
1u_6.3V_X5R_04
47K_04
47K_04
47K_04
29
1
2
3
4
5
6
7
AESS_XI
AGND AGND AGND
AESS_XO AR54 *0_04
AGND EXT CLK OUT
(ENABLE) AGND
62
62
ASMB_DATA_R
ASMB_CLK_R
AGND
AESS_XO
AR55 499K_1%_1/16W _04 AESS_XI
A3.3VS ESS_DVCC
3 4 AGND
AR56
AGND 2 1
B 47K_04 AX1
B
G2
AQ1A FSX3M 50.000000M18FDO
FROM EC ES9018/SV700A I2C
MTDK5S6R XTAL 50MHz
6 1 ASMB_CLK_R AC43
G5
60 AI2C_CLK AC42
S
AQ1B ASMB_DATA_R
3 4 20p_50V_NPO_04
60 AI2C_DATA 20p_50V_NPO_04
MTDK5S6R
D
S
AR57 *0_04 9018_ADDR
AGND AGND
ADDR:0X90(HIGH)
0x92(LOW)
THIS TOPOLOGY SUPPORTS FUNDAMENTAL
ESS9018 ADD:0x90 AND 3RD OVERTONE CRYSTALS AS WELL AS
POWERED OSCILLATORS.
AGND
SHORT AND OPEN COMPONENTS AS NEEDED TO
ACCOMODATE DIFFEREHT CRYSTAS AND
OSCILLATORS.
USE 4-SMD PACKAGE OR COMPATIBLE.
CLOSE TO ES9018
ESS_DVCC ESS_VCCA ESS_AVCC_R ESS_AVCC_L
AC44
AC47
AC45
AC46
A A
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
1u_6.3V_X5R_04
AR105 *54mil short-p
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AGND AAUDG Title
62 ESS_AVCC_R [61] P775DM AUDIO ESS DAC
62 ESS_AVCC_L
AGND AAUDG AAUDG AAUDG Size Document Number Rev
60,62 A5VS
60,62 A3.3VS A3 SCHEMATIC1 6-71-P7758-D32 2.0
Date: Monday, August 28, 2017 Sheet 61 of 69
5 4 3 2 1
B - 62 P775DM Audio ESS DAC
Schematic Diagrams
P775DM Audio HP AMP
5 4 3 2 1
Amplifier (LM49720+OPA1622) 600 ȍ HP Full-Scale setting
AR63,AR64 POS/NEG Vpk-pk OUTPUT(Vrms) Watt(mW)
A+15V A+15V A-15V A-15V
AR58 100_1%_04 470p_50V_NPO_04
AR72,AR74 VOLTAGE
4.7u_25V_X5R_08
4.7u_25V_X5R_08
0.1u_10V_X7R_04
0.1u_10V_X7R_04
Thin Film AC48
768ȍ +-15V 24.1V 8.51V 120mW
APC8 AC49 APC18 AC50 A+15V A-15V
AR59
825ȍ +-15V 21.3V 7.55V 95mW
2.7K_0.1%_04 AC87 APC22 AC88 APC23
A+15V A-15V
931ȍ +-12V 19.0V 6.71V 75mW
1u_25V_X5R_06
0.1u_50V_Y5V_06
1u_25V_X5R_06
0.1u_50V_Y5V_06
AAUDG AAUDG AAUDG AAUDG
4
AU8
61 ADACLB AAUDG AAUDG
+V
-V
D
A5VS D
Thin Film
2
AR60 10K_1%_04 AR61 6.34K_1%_04 -IN A
ESS_AVCC_L 1
3 OUT A AR138
+IN A
*10K_04
1u_25V_X5R_06
A65131PS
AC52 AC51 2200p_50V_NPO_06
5
D
+IN B AQ9
7 806_0.1%_04
OUT B AR62 G
6 *2SK3018S3
-IN B
806_0.1%_04
S
LEFT_IN- AR63
LME49720
A3.3VS AR78 *100K_04
LEFT_IN+ AR64 806_0.1%_04 AGND
61 ADACL LME49720PCB Footprint = sop8-154mil-lem49720 A3.3VS
A+15V A-15V
AR65 2.7K_0.1%_04 AGND AR103 100K_04
AC68 0.1u_10V_X7R_04
4
AU9
5
AU12
AR66 100_1%_04 AC53 AR101 0_04
1 AGND
V-
V+
AC54 60 AALC898_VREFO
470p_50V_NPO_04 AR67 4 AR79 *0_04
Thin Film AS700A_GPIO 2 OP1622_EN 61
806_0.1%_04 10
2200p_50V_NPO_06 -INA
B.Schematic Diagrams
9 AR68 0_04 ARELAY-LC
OUTA TC7SZ08FU
3
1 AR90 0_04 ARELAY
AAUDG +INA
AGND
5 OP_EN AR81 *0_04 OP1622_EN
+INB
AR87 7 AR70 0_04 ARELAY-RC
OUTB
AR69 AC55 6 AR91 10K_04 A3.3VS
*0_04 -INB
806_0.1%_04
Sheet 62 of 69
2200p_50V_NPO_06 AC60
PAD
8 3
EN OPA1622 GND 0.22u_16V_Y5V_04
OPA1622
OP_EN
11
C PCB Footprint = pson10-3x3mm-opa1622 AGND C
A+15V A+15V A-15V A-15V
AC56 470p_50V_NPO_04
A-15V
P775DM Audio HP
4.7u_25V_X5R_08
4.7u_25V_X5R_08
0.1u_10V_X7R_04
0.1u_10V_X7R_04
AR71 100_1%_04 RIGHT_IN+ AR72 806_0.1%_04
AC57 AC58 AAUDG
APC9 APC19
AMP
Thin Film
AR73 RIGHT_IN- AR74 806_0.1%_04 AC59 2200p_50V_NPO_06
2.7K_0.1%_04
AR75 806_0.1%_04
A+15V A-15V
AAUDG AAUDG AAUDG AAUDG
8
AU10
61 ADACRB
+V
-V
Thin Film
2
AR76 10K_1%_04 AR77 6.34K_1%_04 -IN A
ESS_AVCC_R 1
3 OUT A
+IN A
1u_25V_X5R_06
AC61 5
+IN B
7
6 OUT B
-IN B
LME49720
61 ADACR LME49720 PCB Footprint = sop8-154mil-lem49720
AR80 2.7K_0.1%_04
+15V/ -15V PWM (-300mA/+400mA)
AC62 470p_50V_NPO_04 A5VS
AR82 100_1%_04 A5VS
ASV3S700A_CH1 A-PR3 A-PR2 OUTPUT
Thin Film 110K 100K +12.2V/-12.0V
B APD1 88.7K 80.6K +14.8V/-15.0V B
AR139 0_04 AL12 APL1 APL3
AHEADPHONE-LC 60 APQ1 EMB20P03V
HCB1005KF-121T20 BCIHP0420-4R7M CPI160809UF-1R0M
ARELAY-LC 3
8
7
A C A+15V .
APC24
APC20
2 6 APC5
APC6
APC7
1 5 4.7u_6.3V_X5R_04 CSOD140SH A-PR1
1M_1%_04
APU1
1
0.1u_50V_Y5V_06
4
0.1u_50V_Y5V_06
4.7u_25V_X5R_08
4.7u_25V_X5R_08
AU17
C
SV3S700A
1
AD7 1 23
INP1 VPOS
A3.3VS
24 22
CSOD140SH ESS_PGND INP2 FBP
8
5
A
AC63 10u_6.3V_X5R_06 17
UD2-5NU VREF A-PR3
8
80.6K_1%_04 1M_1%_04
AC64 0.1u_16V_Y5V_04 AC65 0.1u_10V_X7R_04 7 A-PR2 APC10
AGND 88.7K_1%_04
0.022u_16V_X7R_04
BSW
AR83 4.7K_04 AGND 5
9018/SV700A SMBUSAGND ARELAY-RC INN1
D
A3.3VS ACN AQ8 6
INN2 16
*0.022u_16V_X7R_04
4.7u_6.3V_X5R_04
ACPAC66 0.1u_10V_X7R_04 ACN AC67 1u_6.3V_X5R_04 FBN ESS_PGND
AGND ARELAY G 2SK3018S3 A-PR5 APC11
A-PR4
13
14
15
16
A3.3VS AHEADPHONE-RC 60 100_06 A65131VIN 4 ESS_PGND
AU11 VIN
S
AR84 ASV3S700A_CH0
VEE
AR85
REXT
CN
VERF
1 12 ASV3S700A_CH0 APC13 ESS_PGND
2.2K_04 VDD CH0 AGND A-PR10 0_04 15
2.2K_04 APC12 VNEG
ASV3S700A_CH1 APL4
COMMON WITH ES9018 ACP 2 11 8 13 APD2 CSOD140SH
CPI160809UF-1R0M
0.1u_10V_X7R_04
CP CH1 ENP OUTN1
3
GND 9 AR94 22_1%_04
9
10 PSP OUTN2
14 C A A-15V .
61 ASMB_CLK_R SCL CH2 AR86 *54mil short-p
ADC_LDO
APC21
APC25
A65131PS 11 ENN 18
4 8 AR107 499_1%_04 ESS_PGND PSN CN
APC16 4.7u_25V_X5R_08
APC17 4.7u_25V_X5R_08
61 ASMB_DATA_R SDA CH3 APL2
GPIO
21
APC14 0.01u_16V_X7R_04
APC15 4700p_50V_X7R_04
FLT
17 CP
EN
GND AGND ESS_PGND A-PR7 TPS65131 BCIHP0420-4R7M
0.1u_50V_Y5V_06
0.1u_50V_Y5V_06
AGND
G-PAD
0_04 19 2
5
10
SV3S700A VQFN-16P
NC1
NC2
AGND PGND1 3
AGND PGND2
AS700A_GPIO PCB Footprint = qfn16-3x3mm-sv3s700a
AR89 10K_04 TPS65131RGER ESS_PGND
12
20
25
A3.3VS
SV700A GPIO(OD) AC69 AC70
ESS_PGND ESS_PGND
A 1u_6.3V_X5R_04 4.7u_6.3V_X5R_06 ESS_PGND A
ESS_PGND ESS_PGND
ALC898_GPIO(5V) SV3S700A_GPIO Y (READ) OPA1622 EN
INTERNAL PU 50K OD(PU10K) (SV700A/HP ON) (H ENABLE) REMARK
ESS_PGND
AGND H H H L UNPLUG(NC) ESS_PGND
H -> L H -> L L H PLUG(600/32 ohm)
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
ALC898 : SENSE_A -> GPIO HIGH TO LOW Title
S700A : GPIO HIGH TO LOW AFTER DETECTING
[62] P775DM AUDIO HP AMP
61 ESS_AVCC_R
61 ESS_AVCC_L Size Document Number R ev
OPA1622 ENABLE: SV700A LOW AND RC DELAY 60,61 A3.3VS A2 SCHEMATIC1 6-71-P7758-D32 2.0
ALC898(DOS) : S/PDIF 30% VOLUME OUTPUT 60,63 A3.3V
60,61 A5VS Date: Monday, August 28, 2017 Sheet 62 of 69
5 4 3 2 1
P775DM Audio HP AMP B - 63
Schematic Diagrams
P775DM Audio Board
5 4 3 2 1
A3.3V
A3.3V AUSBVCC3.0_2
AR11 *4.7K_04 AR33 *0_04
AR10 *4.7K_04 AR34 *0_04 AR39 AR32 AU1
AR9 *4.7K_04 AR35 *0_04 *4.7K_04 *4.7K_04 3 1 AC8
OC# VOUT
5 0.1u_16V_Y5V_04
AI2C_SCK_20 A5V VIN
AR8 *4.7K_04 AR36 2K_1%_04
AI2C_SDA_20 AC21 4 2
10u_6.3V_X5R_06 EN# GND
D AR7 *4.7K_04 AR37 0_04 UP7549UMA5-20 D
AR38 AR31 PCB Footprint = M-SOT23-5A AGND
*4.7K_04 *4.7K_04 AGND
AGND ADD_ON# AR30 *10mil_short_04
6
AU2
25 AGND AC17 22u_6.3V_X5R_08
EQ1
DE1
OS1
VCC
EN_RXD
GND
AI2C_SDA_20 24 GND 7 AI2C_SCK_20 AGND AGND
USB CONNECTOR SIDE NC NC AC16 22u_6.3V_X5R_08
AUSB3_TX6_N AUSBVCC3.0_2 AGND
0.1u_10V_X7R_04 AC23 23 8 AC29 0.1u_10V_X7R_04 ATXN6
TX1- RX1-
AUSB3_TX6_P 0.1u_10V_X7R_04 AC22 22 9 AC25 0.1u_10V_X7R_04 ATXP6 AJ_USB1
TX1+ RX+
AR6 *0_04 21 10 AUSB3_TX6_P ATXP6_RJ 9 10
PCH SIDE
Standard-A
AGND GND GND AGND SSTX+ SHIELD
1 11
AUSB3_RX6_N 0.1u_10V_X7R_04 AC19 20 11 AC24 0.1u_10V_X7R_04 ARXN6 AUSB3_TX6_N ATXN6_RJ 8 VBUS SHIELD
B.Schematic Diagrams
RX2- TX2- AUSB_PN9 1 2 AUSB_PN9_R AUSB_PN9_RJ 2 SSTX-
AUSB3_RX6_P 0.1u_10V_X7R_04 AC18 19 12 AC20 0.1u_10V_X7R_04 ARXP6 *W CM2012F2S-161T03-short 4 D-
GND
VCC
EQ2
OS2
DE2
RX2+ TX2+ AUSB_PP9 AL10 AUSB_PP9_R AUSB_PP9_RJ GND
CM
4 3 3
AUSB3_RX6_P AUSB3_RX6_PJ 6 D+
A3.3V 7 SSRX+ GND1
18
17
16
15
14
13
ASM1464 AUSB3_RX6_N AUSB3_RX6_NJ 5 GND_D SHIELD GND2
PCB Footprint = QFN24-4X4MM SSRX- SHIELD
AUSB_PP9
60 AUSB_PP9 AUSB_PN9 93-0022-02
Sheet 63 of 69 AR16
AR20
0_04
*0_04
AR5
AR1
*4.7K_04
*4.7K_04
60
60
60
AUSB_PN9
ATXP6
ATXN6
ATXP6
ATXN6
AGND
6-20-B4A30-009
93-0022-02 AGND
AR19 *0_04 AR2 *4.7K_04
P775DM Audio C AR18
AR17
*0_04
*0_04
AR3
AR4
*4.7K_04
*4.7K_04
60
60
ARXP6
ARXN6
ARXP6
ARXN6
C
ADD_ON#
Board A3.3V
AGND
60
60
ADD_ON#
AUSB_PP5
AUSB_PP5
AUSB_PN5 AUSB3_RX6_N
DT1140-04LP-7
6 5 AUSB3_RX6_NJ AUSB_PP9_R 10
DT1140-04LP-7
1 AUSB_PP9_RJ
60 AUSB_PN5 AUSB3_RX6_P AUSB3_RX6_PJ AUSB_PN9_R AUSB_PN9_RJ
7 4 9 2
ATXP5 AGND 8 3 AGND AGND 8 3 AGND
60 ATXP5 AUSB3_TX6_N ATXN6_RJ
ATXN5 9 2 7 4
60 ATXN5 AUSB3_TX6_P ATXP6_RJ
AC9 AC30 AC28 10 1 6 5
ARXP5
60 ARXP5
0.01u_16V_X7R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04 ARXN5
60 ARXN5 AD1 AD2
AGND
60 A3.3V
A3.3V 60 A5V
A3.3V AUSBVCC3.0_3
AR110 *4.7K_04 AR111 *0_04
AR112 *4.7K_04 AR113 *0_04 AR114 AR115 AU15
AR116 *4.7K_04 AR117 *0_04 *4.7K_04 *4.7K_04 3 1 AC89
OC# VOUT
B 5 0.1u_16V_Y5V_04 B
AI2C_SCK_20_1 A5V VIN
AR118 *4.7K_04 AR119 2K_1%_04
AI2C_SDA_20_1 AC90 4 2
10u_6.3V_X5R_06 EN# GND
AR120 *4.7K_04 AR121 0_04 UP7549UMA5-20
AR122 AR123 PCB Footprint = M-SOT23-5A AGND
*4.7K_04 *4.7K_04 AGND
AGND ADD_ON# AR124 *10mil_short_04
1
AU16
25 AGND AC92 22u_6.3V_X5R_08
EQ1
DE1
OS1
VCC
EN_RXD
GND
AI2C_SDA_20_1 24 GND 7 AI2C_SCK_20_1 AGND AGND
USB CONNECTOR SIDE NC NC AC93 22u_6.3V_X5R_08
AUSB3_TX5_N AUSBVCC3.0_3 AGND
0.1u_10V_X7R_04 AC94 23 8 AC95 0.1u_10V_X7R_04 ATXN5
TX1- RX1-
AUSB3_TX5_P 0.1u_10V_X7R_04 AC91 22 9 AC96 0.1u_10V_X7R_04 ATXP5 AJ_USB2
TX1+ RX+
AR125 *0_04 21 10 AUSB3_TX5_P ATXP5_RJ 9 10
PCH SIDE
Standard-A
AGND GND GND AGND SSTX+ SHIELD
1 11
AUSB3_RX5_N 0.1u_10V_X7R_04 AC97 20 11 AC98 0.1u_10V_X7R_04 ARXN5 AUSB3_TX5_N ATXN5_RJ 8 VBUS SHIELD
RX2- TX2- AUSB_PN5 1 2 AUSB_PN5_R AUSB_PN5_RJ 2 SSTX-
AUSB3_RX5_P 0.1u_10V_X7R_04 AC99 19 12 AC100 0.1u_10V_X7R_04 ARXP5 *W CM2012F2S-161T03-short 4 D-
GND
VCC
EQ2
OS2
DE2
RX2+ TX2+ AUSB_PP5 AL15 AUSB_PP5_R AUSB_PP5_RJ GND
CM
4 3 3
AUSB3_RX5_P AUSB3_RX5_PJ 6 D+
A3.3V 7 SSRX+ GND1
18
17
16
15
14
13
ASM1464 AUSB3_RX5_N AUSB3_RX5_NJ 5 GND_D SHIELD GND2
PCB Footprint = QFN24-4X4MM SSRX- SHIELD
A 93-0022-02 A
A3.3V AR126 0_04 AR127 *4.7K_04 6-20-B4A30-009
AGND AGND
AR128 *0_04 AR129 *4.7K_04 DT1140-04LP-7 93-0022-02
AR130 *0_04 AR131 *4.7K_04 DT1140-04LP-7
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
AR132 *0_04 AR133 *4.7K_04 AUSB3_RX5_N 6 5 AUSB3_RX5_NJ AUSB_PP5_R 10 1 AUSB_PP5_RJ
AC101 AC103 AC102 AR135 *0_04 AR134 *4.7K_04 AUSB3_RX5_P 7 4 AUSB3_RX5_PJ AUSB_PN5_R 9 2 AUSB_PN5_RJ
AGND 8 3 AGND AGND 8 3 AGND
0.01u_16V_X7R_04 1u_6.3V_X5R_04 AUSB3_TX5_N 9 2 ATXN5_RJ 7 4 Title
0.1u_10V_X7R_04 AGND AUSB3_TX5_P 10 1 ATXP5_RJ 6 5 [63] P775DM AUDIO BOARD
Size Document Number Rev
AD3 AD4 A3 SCHEMATIC1 6-71-P7758-D32 2.0
AGND
Date: Monday, August 28, 2017 Sheet 63 of 69
5 4 3 2 1
B - 64
Schematic Diagrams
P750DM BOT LED Board
5 4 3 2 1
TP LED BOARD
D D
GG_5VS
G 1 GGR4 100_1%_06 GG_G1
B.Schematic Diagrams
2 R 3 GGR3 150_1%_06 GG_R1
B 4 GGR1 100_1%_06 GG_B1
GGD2 FSL-3010040HPGRB-N8SNT1W 2TJY
G 1 GGR6 100_1%_06
C
2 R 3 GGR5 150_1%_06
C
Sheet 64
B 4 GGR2 100_1%_06
GGD1 FSL-3010040HPGRB-N8SNT1W 2TJY P775DM B
Boa
㕘
⡆ⶍ 䦳 I S SU E
1GGR1 *0_04 4GGR1 *0_04
2GGR1 *0_04 5GGR1 *0_04
3GGR1 *0_04 6GGR1 *0_04
GG_5VS
GGJ_TPLED1
9
8
GG_B1 7
GG_R1 6
B GG_G1 5 B
4
3 GGH3
2 GGH2 H6_0D2_8 GGH4 GGH1
1 HTC6_0BC5_5D2_8 C79D79N C79D79N
GG_GND FP225H-009S10M
PCB Footprint = fp225h-009xxxm
GG_GND GG_GND
A A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[64] P750DM BOT LED BOARD
Size Document Number Rev
A3 SCHEMATIC1 6-71-P7754-D32A 2.0A
Date: Monday, August 28, 2017 Sheet 64 of 69
5 4 3 2 1
P750DM BOT LED Board B - 65
Schematic Diagrams
P750DM LID Switch Board
5 4 3 2 1
D D
B.Schematic Diagrams
LID SWITCH IC
LL_VDD3
Sheet 65 of 69 C LLJ_LID1
LL_VDD3 LL_C4 *100K_04
C
P750DM LID 1
2
LL_LID_SW # 1
LL_U1
VCC OUT
2 LL_LID_SW #
GND
3
2
Switch Board 88266-03001
LL_GND
LL_C2 LL_C1 LL_C3 LL_D1
3
*1u_10V_Y5V_06 0.1u_16V_Y5V_04 MH-248 *100p_50V_NPO_04
YB8251 Hall-effect sensor *V15AVLC0402
1
LL_GND LL_GND
LL_GND LL_GND
㬌䁢ⶍ⺈枸䔁 LL_GND
( 06 SIZE )
LID
3
㕘
⡆ⶍ 䦳 I S SU E
1 2
1LLR1 *0_04 4LLR1 *0_04
LL_H1 LL_H3 LL_H2 2LLR1 *0_04 5LLR1 *0_04
C79D79N C79D79N H5_0D2_3
3LLR1 *0_04 6LLR1 *0_04
B B
LL_GND
A A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[65] P750DM LID SWITCH BOARD
Size Document Number Rev
A3 6-71-P75FS-D01 1.0
Date: Monday, August 28, 2017 Sheet 65 of 69
5 4 3 2 1
B - 66 P750DM LID Switch Board
Schematic Diagrams
P750DM Charge LED Board
5 4 3 2 1
D D
C_D1
C_LED_ACIN_R C_R1 220_04 1 2
Y
C_D3 C_LED_PW R_R SG
C_R2 220_04 3 4
CJ_LED1 C_LED_ACIN 1 10 C_LED_ACIN_R RY-SP195UHYUYG4
C_LED_ACIN C_LED_PW R C_LED_PW R_R 6-52-55002-04E
1 C_LED_PW R
2 9 AC IN/POWER ON LED
2 C_GND 3 8 C_GND
C_LED_BAT_FULL C_LED_BAT_FULL_R
B.Schematic Diagrams
3 C_GND 4 7
C_LED_BAT_CHG 5 6 C_LED_BAT_CHG_R C_GND
4 C_LED_BAT_FULL
5 C_LED_BAT_CHG
6
*TVUDF1004AD0
FP225H-006S10M
PCB Footprint = fp225h-006xxxm C_D2
C_LED_BAT_CHG_R C_R3 220_04 1 2
C_LED_BAT_FULL_R C_R4 220_04 3
Y
SG
4
Sheet 66
C
BAT CHARGE/FULL LED
RY-SP195UHYUYG4
6-52-55002-04E
C
P750DM C
C_GND LED Bo
C_H3 C_H1 C_H2 㕘
⡆ⶍ 䦳 I S SU E
H5_5D2_3 C79D79N C79D79N
1CR1 *0_04 4CR1 *0_04
B B
2CR1 *0_04 5CR1 *0_04
3CR1 *0_04 6CR1 *0_04
C_GND
A A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[66] P750DM CHARGE LED BOARD
Size Document Number Rev
A3 6-71-P75FE-D01 1.0
Date: Monday, August 28, 2017 Sheet 66 of 69
5 4 3 2 1
P750DM Charge LED Board B - 67
Schematic Diagrams
P775DM Charge LED Board
5 4 3 2 1
D D
CC_D1
CC_LED_ACIN_R CC_R1 220_04 1 2
Y
CC_LED_PW R_R SG
CC_R2 220_04 3 4
CCJ_LED1 CC_D3 RY-SP195UHYUYG4
CC_LED_ACIN 6-52-55002-04E
1 CC_LED_PW R
AC IN/POWER ON LED
CC_LED_ACIN 1 10 CC_LED_ACIN_R
2 CC_LED_PW R CC_LED_PW R_R
2 9
B.Schematic Diagrams
3 CC_GND
3 8 CC_GND
4 CC_LED_BAT_FULL CC_GND
CC_LED_BAT_CHG CC_GND
CC_LED_BAT_CHG_R
5 4 7
CC_LED_BAT_CHG CC_LED_BAT_FULL
5 6 CC_LED_BAT_FULL_R
6
FP225H-006S10M
PCB Footprint = fp225h-006xxxm *TVUDF1004AD0 CC_D2
CC_LED_BAT_CHG_R CC_R3 220_04 1 2
Y
Sheet 67 of 69 C
CC_LED_BAT_FULL_R CC_R4 220_04 3
SG
4
C
P775DM Charge
RY-SP195UHYUYG4
BAT CHARGE/FULL LED
6-52-55002-04E
LED Board CC_GND
CC_H2 CC_H3 CC_H1 㕘
⡆ⶍ 䦳 I S SU E
H5_5D2_3 H5_0D2_5 H5_0D2_5
1CCR1 *0_04 4CCR1 *0_04
B B
2CCR1 *0_04 5CCR1 *0_04
3CCR1 *0_04 6CCR1 *0_04
CC_GND CC_GND CC_GND
PCB Footprint = H5_0D2_5 PCB Footprint = H5_0D2_5
A A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[67] P775DM CHARGE LED BOARD
Size Document Number Rev
A3 6-71-P77FE-D01 1.0
Date: Monday, August 28, 2017 Sheet 67 of 69
5 4 3 2 1
B - 68 P775DM Charge LED Board
Schematic Diagrams
P775DM Power LED Board
5 4 3 2 1
S_3.3VS
POWER
D SWITCH D
POWER BUTTON LED
20mil
FOR P775DM S_SW 1 SR3
TJE-532-Q-T/R
3 1 1K_04
4 2 SM_BTN#
SJ_LED775_1
5
6
SM_BTN# 20mil SC2
1
1
2 S_LID_SW # SLED_GND
SD1 SC1 *0.1u_16V_Y5V_04
3 S_W LAN_AIRPLANE#
4 SSATA_LED# SLED_GND 0.1u_50V_Y5V_06
5 SLED_NUM# *V15AVLC0402
A
NC2 6 SLED_CAP# VARISTOR
2
7 SLED_SCROLL# SD4 SLED_GND
8 6-24-30003-006
B.Schematic Diagrams
NC1
9 SLED_GND
RY-SP190DBW 71-5A
10 SLED_GND
11
C
12
FP225H-012S10M
S_VDD3 P 2 8 0 8 A1 , 㛔
幓㚫䅺 㭨 ,
P2808A1
䫾 D2 6 mount e d VARI S T OR.
⮵
S_3.3VS SLED_GND
Sheet 68
C C
P775DM
S_VDD3
LED Bo
SJ_LID775_1
1 S_LID_SW # SH4 SH3 SH2 SH1
2 H5_0D2_3 H5_0D2_3 H3_5D1_8 H3_5D1_8
3
88266-03001
SLED_GND
SLED_GND SLED_GND SLED_GND SLED_GND
S_3.3VS
S_3.3VS S_3.3VS S_3.3VS S_3.3VS
SR6 SCROLL SR5 CAPS LOCK SR4 NUM LOCK SR2 HDD LED SR1 AIRPLANE LED
B B
1K_04
LOCK 1K_04
LED 1K_04
LED 1K_04 1K_04
LED
A
A
SD7 SD6 SD5 SD3 SD2 㕘
⡆ⶍ 䦳 I S SU E
RY-SP190DBW 71-5A RY-SP190DBW 71-5A RY-SP190DBW 71-5A RY-SP190DBW 71-5A RY-SP190DBW 71-5A 1SR1 *0_04 4SR1 *0_04
2SR1 *0_04 5SR1 *0_04
C
C
3SR1 *0_04 6SR1 *0_04
SLED_SCROLL# SLED_CAP# SLED_NUM# SSATA_LED# S_W LAN_AIRPLANE#
A A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[68] P775DM POWER LED BOARD
Size Document Number Rev
A3 SCHEMATIC1 6-71-P7754-D03 3.0
Date: Monday, August 28, 2017 Sheet 68 of 69
5 4 3 2 1
P775DM Power LED Board B - 69
Schematic Diagrams
Power On Sequence
5 4 3 2 1
DESIGN 㯪
GUIDE天
Power on
VDDQ <25ms
RTCRST#
VCCST
PWR_SW#
DD_ON 298ms VCCST_PWRGD >1ms
D D
3.3V 0.76ms
PCH_PWROK >0
1.62ms
VDD5
5V 1.7ms DDR_VTT_CNTL <100ns
SLP_SUS# 30.75ms <35us
DDR_VTT
3.3VA 0.7ms
1.0VA 2.1ms VCCIO >100ns
B.Schematic Diagrams
51.3ms
RSMRST# (=DPWROK)
VCCSA >100ns
102ms
PWR_BTN#
119ms
SUSC#
VCCPLL
Sheet 69 of 69 C
2.5V 2.43ms
PROCPWRGD
C
Power On VCCST_VCCPLL 0.49ms >1ms
VDDQ 1.375ms
Sequence SUSB# 35us
5VS 0.415ms
3.3VS 1.205ms
5VS_2 2.04ms
VCCIO_EN=SUSB#
VCCIO 1.495ms
VCCIO_PWRGD 1.275ms
B VCCSA 0.97ms B
VR_READY 2.115ms
ALL_SYS_PWRGD 1.66ms
PM_PCH_PWROK (=VCCST_PWRGD) 2.07ms
VTT_EN 1.23ms
VTT_MEM 1.45ms
180ms
EC DELAY_PWRGD (=PM_PWROK)
H_PWRGD 297ms
PLTRST# 2.7ms
A
VCORE 2.6ms A
Title
<Title>
Size Document Number Rev
Custom<Doc> <RevCode>
Date: Monday, August 28, 2017 Sheet 69 of 69
5 4 3 2 1
B - 70 Power On Sequence
BIOS Update
Appendix C:Updating the FLASH ROM BIOS
BIOS Version
To update the FLASH ROM BIOS, you must: Make sure you down-
• Download the BIOS update from the web site. load the latest correct
• Unzip the files onto a bootable CD/DVD/USB Flash Drive. version of the BIOS ap-
propriate for the com-
• Reboot your computer from an external CD/DVD/USB Flash Drive. puter model you are
• Use the flash tools to update the flash BIOS using the commands indicated below. working on.
• Restart the computer booting from the HDD and press F2 at startup enter the BIOS.
You should only
• Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer.
download BIOS ver-
• After rebooting the computer you may restart the computer again and make any required changes to the default BIOS sions that are
settings.
C:BIOS Update
V1.0X.XX or higher as
appropriate for your
Download the BIOS computer model.
1. Go to www.clevo.com.tw and point to E-Services and click E-Channel. Note that BIOS versions
2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files are not backward com-
(the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model patible and therefore
(see sidebar for important information on BIOS versions). you may not down-
grade your BIOS to an
older version after up-
Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive grading to a later ver-
1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the sion (e.g if you upgrade
a BIOS to ver 1.0X.05,
downloaded files.
you MAY NOT then go
2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB back and flash the BIOS
flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software). to ver 1.0X.04).
Set the computer to boot from the external drive
1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the
computer and press F2 (in most cases) to enter the BIOS.
2. Use the arrow keys to highlight the Boot menu.
3. Use the “+” and “-” keys to move boot devices up and down the priority order.
4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.
C - 1
BIOS Update
Use the flash tools to update the BIOS
1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you
see the message “Starting MS-DOS”. You will then be prompted to give “Y” or “N” responses to the programs
being loaded by DOS. Choose “N” for any memory management programs.
2. You should now be at the DOS prompt e.g: DISK C:\> (C is the designated drive letter for the CD/DVD drive/USB
flash drive).
3. Type the following command at the DOS prompt:
C:\> Flash.bat
4. The utility will then proceed to flash the BIOS.
5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but
make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer
C:BIOS Update
restarts.
Restart the computer (booting from the HDD)
1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from
the HDD.
2. Press F2 as the computer restarts to enter the BIOS.
3. Use the arrow keys to highlight the Exit menu.
4. Select Load Setup Defaults (or press F3) and select “Yes” to confirm the selection.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.
Your computer is now running normally with the updated BIOS
You may now enter the BIOS and make any changes you require to the default settings.
C-2
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