Digital Logic

DesignEEE241
Lab Report

Prepared by:
Name Husnain Zafar
Hashir Hamid
Hesham

Registration No SP20-BCS-039
SP20-BCS-033
SP20-BCS-037

Section BCS-2A
Course DLD-EEE241

Submitted to:
Lab Incharge Mr. Faisal Najeeb
LAB # 01
Introduction to Basic Logic Gate ICs on Digital Logic Trainer and
Proteus Simulation
Objective:
Part 1:
To know about the basic logic gates, their truth tables, input-output characteristics
and analyzing their functionality. Introduction to logic gate ICs, Integrated Circuits
pin configurations and their use.

Part 2:
Learn to use Proteus Software for Simulation of Digital Logic Circuits.

Pre-Lab:

Background Theory:
The Digital Logic Circuits can be represented in the form of (1) Boolean
Functions, (2) Truth Tables, and (3) Logic Diagram. Digital Logic Circuits may be
practically implemented by using electronic gates. The following points are
important to understand.

 Electronic gates are available in the form of IC’s and they require supply.
 Supply Gate INPUTS are driven by voltages having two nominal values, e.g.
0V and 5, 12V representing logic 0 and 1 respectively.
 The OUTPUT of a gate provides two nominal values of voltage only, e.g.
0V and 5, 12V representing logic 0 and 1 respectively.
 Truth tables are used to help show the function of a logic gate in terms of its
input and combination with the desired output.
 Logic Diagram is used to represent the Digital Logic Circuit in the form of
symbols connected with each other.
 Digital Logic Circuits can be simulated in the virtual environment called
simulation software.
The basic operations are described below with the aid of Boolean Functions, Logic
symbols and truth table.

AND gate:

Figure 1.1: AND gate

Table 1.1: Truth Table of 2 input AND gate

𝑨 𝑩 𝑭=𝑨.𝑩
0 0 0
0 1 0
1 0 0
1 1 1

The AND gate is an electronic circuit that gives a high output (1) only if all its
inputs are high. A dot (.) is used to show the AND operation i.e. A.B. Bear in mind
that this dot is sometimes omitted i.e. AB.

OR gate:

Figure 1.1: OR gate

Table 1.1: Truth Table of 2 input OR gate

 𝑨 𝑩 𝑭=𝑨+𝑩
0 0 0
0 1 1
1 0 1
1 1 1

The OR gate is an electronic circuit that gives a high output (1) if one or more of
its inputs are high. A plus (+) is used to show the OR operation.

NOT gate:

Figure 1.1: NOT gate

Table 1.1: Truth Table of NOT gate

𝑨 𝑭 = 𝑨̅
0 1
1 0

The NOT gate is an electronic circuit that produces an inverted version of the input
at its output. It is also known as an inverter.

NAND gate:

Figure 1.1: NAND gate

 Table 1.1: Truth Table of 2 input NAND gate

𝑨 𝑩 𝑭 = ̅𝑨̅.̅𝑩̅
0 0 1
0 1 1
1 0 1
1 1 0

This is a NOT-AND gate which is equal to an AND gate followed by a NOT gate.
The output of NAND gate is high if any of the inputs are low. The symbol is an
AND gate with a small circle on the output. The small circle represents inversion.

NOR gate:

Figure 1.1: NOR gate

Table 1.1: Truth Table of 2 input NOR gate

̅
𝑨 𝑩 𝑭 = ̅𝑨̅+̅𝑩̅
0 0 1
0 1 0
1 0 0
1 1 0

This is a NOT-OR gate which is equal to an OR gate followed by a NOT gate. The
output of NOR gate is low if any of the inputs are high. The symbol is an OR gate
with a small circle on the output. The small circle represents inversion.
XOR gate:

Figure 1.1: XOR gate

Table 1.1: Truth Table of 2 input XOR gate

𝑨 𝑩 𝑭=𝑨
⊕𝑩
0 0 0
0 1 1
1 0 1
1 1 0

The 'Exclusive-OR' gate is a circuit which will give a high output if odd numbers
of inputs are high. An encircled plus sign “+” is used to show the EORoperation.

XNOR gate:

Figure 1.1: XNOR gate

Table 1.1: Truth Table of 2 input XNOR gate

𝑨 𝑩 𝑭=̅𝑨̅⊕̅ ̅
̅𝑩̅
0 0 1
0 1 0
1 0 0
 1 1 1

The 'Exclusive-NOR' gate circuit does the opposite to the XOR gate. It will give a
high output if even numbers of inputs are high. The symbol is an XOR gate with a
small circle on the output. The small circle represents inversion.

Digital systems are said to be constructed by using logic gates. These gates are
AND, OR, NOT, NAND, NOR, XOR and XNOR. Logic gate ICs are available in
different packages and technologies. Two main classifications are as below:

i. 74 Series TTL Logic IC’s

ii. 4000 Series CMOS Logic IC’s

74 series is TTL (Transistor-Transistor Logic) based integrated circuits family.

Power rating for 74 series is 5 to 5.5Volts. This circuitry has fast speed but requires
more power than later families. The Pin configuration of basic gates 2-input ICs
for 74 Series is given in Figure below.

The 4000 series is CMOS (complementary metal oxide semiconductors) based

integrated circuits. Power ratings are 3V to 15 Volts. CMOS circuitry consumes
low power, but it is not fast as compared to TTL.
Quad 2-input gates
In-Lab:
The IC’s available in Lab to perform the Tasks are listed below:

Part 1: Basic Logic Gate Integrated Circuits (ICs)

Equipment Required:
 KL-31001 Digital Logic Lab
 Logic Gates IC’s
 4001 quad 2-input NOR
 4011 quad 2-input NAND
 4070 quad 2-input XOR
 4071 quad 2-input OR
 4077 quad 2-input XNOR
 4081 quad 2-input AND
 4069 Six Inverting Buffer NOT

Procedure:
1. Place the IC on the breadboard as shown in the Figure1.10;
2. Using the power supply available at KL-31001 Digital Logic Lab
trainer, connect pin7 (Ground) and pin14 (Vcc) to power upIC.’
 3. Select number of possible combinations of inputs using the slide
switches SW0-SW3 (as shown in Tables 1.8 & 1.9) and note down
the output with the help of LED for all gate ICs. (You can use LD0-
LD14 located on KL-31001 Digital LogicLab)
(Note: Please make sure the Trainer board is off during the setup of circuit)
In-lab Task 1:
Verify all gates using their ICs on KL-31001 Digital Logic Lab trainer.

INPUTS OUTPUTS

𝑨 𝑩 𝑨𝑵𝑫 𝑿𝑶𝑹 𝑵𝑨𝑵𝑫 𝑵𝑶𝑹 𝑿𝑵𝑶𝑹

𝑶𝑹
0 0 0 0 0 1 1 1

0 1 0 1 1 1 0 0

1 0 0 1 1 1 0 0

1 1 1 1 0 0 0 1
 Table 1.9: Observation Table for NOT gate

INPUT OUTPUT

𝑨 𝑩
0 1

1 0

Part 2 - Proteus (Simulation Software)

Proteus has many features to generate both analog and digital results over a virtual
environment. However, this lab will focus on tools that will be used in digital
schematic designs and verification of basic logic gates.

Procedure:
The Proteus software for simulation is installed in Digital Design Lab. Please
follow the details below to figure out the usage of Proteus tools and process of
simulation
Parts Browsing:
Proteus has many models of electronic equipment such as logic gates, many kinds
of switches and basic electronic devices. The equipment can be placed by clicking
on it and then a new window will pop-up as shown in the Figure 1.12

Finding Steps:
 Type information of device such as “OR gate” in “Keywords’ box.
 If some specific category is known, the device can narrow on focusing by
selecting catalogue in the “Category”box.
 After the information is entered, the list of related devices will appear in the
“Results” window, so that needed device can be chosen and then click “OK”
button to confirm selection in Figure1.13.
Power supply and input signal Generator:
All the electrical circuits require power supplies. The power supplies for logic
circuits are represented in digital system design on Proteus because the schematic
may be too complicated to understand for simulation section. Therefore, power
supplies will be needed as input power for a system. Moreover, all the input
generators, such as AC generator, DC and pulse, are contained in this category and
it will be shown when clicked. In addition, “Ground” will not be available in this
group. Because it is not an input signal it is just a terminal junction. Therefore, it
will be grouped in the terminal category as shown in Figures 1.14 &1.15.

Logic State:
In addition, there is another input that usually used in the digital circuit, but it does
not exist in the real world as an equipment it is called as “LOGIC STATE”. It can
be found in the picking part section (type logic state and pick it as shown in
Figure1.16).

Placing Equipment:
Selecting all devices needed to be placed on the circuit window (Gray window)
and make the required connections. It can be done by following steps:

I. Click on and select the first device that will be placed.

II. Place mouse wherever the device is preferred to place and then click the left
button of the mouse. The device will be placed, if it is needed to be moved,
click the right button of the mouse on the device symbol to select the mouse.
Then hold this device with the left mouse button and move it to any desired
place (Figure1.17).

To make the connections between the devices, click on the source pin of a device
and then move the cursor to destination pin of a device. In this step, the pink line
will appear, and it will be a wire of the circuit after clicking the mouse on the
destination pin of the circuit (as shown in Figure 1.18).

After wiring all devices and connect all inputs according to the circuit, the
simulation is ready to run by clicking on Play button and stop button is used to stop
the simulation.

III. Logic probe or LED can be used to observe the output state.

NOTE: The digital result on Proteus can be seen also in Small Square Box at the
pin of the equipment & state can be shown in four colors. (Red= Logic 1, Blue =
Logic 0, Gray= Unreadable and Yellow= Logic Congestion).

In-Lab Task 2:
Verify all the basic logic gates using the Proteus simulation tool and note down the
values in the Tables 1.10 & 1.11 with the corresponding logic symbol and Boolean
function. Then show the simulated logic circuit diagrams to your Lab Instructor.

Table 1.10: Observation table for different gates

 INPUTS OUTPUTS

𝑨 𝑩 𝑨𝑵𝑫 𝑿𝑶𝑹 𝑵𝑨𝑵𝑫 𝑵𝑶𝑹 𝑿𝑵𝑶𝑹

𝑶𝑹
0 0 0 0 0 1 1 1

0 1 0 1 1 1 0 0

1 0 0 1 1 1 0 0

1 1 1 1 0 0 0 1

Table 1.11: Observation table for NOT gate

INPUT OUTPUT

𝑨 𝑩
0 1

1 0

Implementation of the above mentioned logic gates:

Post-Lab Tasks:
I. Make a list of logic gate ICs of TTL family and CMOS family along with
the ICs names. (Note: at least each family should contain 15ICs)

7400 Series 4000 Series

1 7400 quad 2-input NAND 4001 quad 2-inputNOR

2 7403 quad 2-input NAND with open 4011 quad 2-inputNAND

collector outputs

3 7408 quad 2-input AND 4070 quad 2-inputXOR

4 74160 synchronous decade counter 4071 quad 2-inputOR

(standard reset)
 5 74161 synchronous 4-bit counter 4077 quad 2-inputXNOR
(standard reset)

6 74162 synchronous decade counter 4081 quad 2-inputAND

(synchronous reset)

7 74163 synchronous 4-bit counter 4069 Six Inverting Buffer NOT

(synchronous reset)

8 7410 triple 3-input NAND 4012 Dual 4-input NAND

9 7411 triple 3-input AND 4019 Quad AND/OR select

10 7412 triple 3-input NAND with open 4022 Octal counters with 8 decoded
collector outputs outputs (4-stage Johnson counter)
11 7427 triple 3-input NOR 4023 Triple 3-input NAND

12 7420 dual 4-input NAND 4027 Dual J-K master-slave flip-flop

13 7421 dual 4-input AND 40511 BCD 7-segment decoder,

hexadecimal, active high
14 7404 hex NOT 40244 Buffer/line driver; non-inverting
(tri-state)
15 7405 hex NOT with open collector outputs 40147 10-line to 4-line (BCD) priority
encoder

II. What is Fan-In and Fan-Out?

Fan-In:
The fan-in defined as the maximum number of inputs that a logic gate can
accept. If number of inputs exceeds, the output will be undefined or
incorrect. It is specified by manufacturer and is provided in the data sheet.
Fan-Out:
The fan-out is defined as the maximum number of inputs (load) that can be
connected to the output of a gate without degrading the normal operation.
Fan Out is calculated from the amount of current available in the output of a
gate and the amount of current needed in each input of the connecting gate.
It is specified by manufacturer and is provided in the data sheet. Exceeding
the specified maximum load may cause a malfunction because the circuit
will not be able supply the demanded power.