Lab Report 1
Lab Report 1
Objective
➢ Study the basic logic gates - AND, OR, NOT, NAND, NOR, XOR.
➢ Acquaint with the representation of Boolean functions using truth tables, logic diagrams and
Boolean algebra.
➢ Prove the extension of inputs of AND and OR gates using the associate law.
➢ Familiarize with combinational logic circuit.
2. Apparatus
➢ IC 7400 Quadruple 2-input NAND gates
➢ IC 7402 Quadruple 2-input NOR gates
➢ IC 7404 Hex Inverters (NOT gates)
➢ IC 7408 Quadruple 2-input AND gates
➢ IC 7432 Quadruple 2-input OR gates
➢ IC 7486 Quadruple 2-input XOR gates
➢ Trainer Board
➢ Wire
heory
3. T
➢ Logic Gates
Logic gates are the elementary building blocks of digital circuits. They perform logical operations
of one or more logical inputs to produce a single output. Digital logic gates operate at two
discrete voltage levels representing the binary values 0 (logical LOW) and 1 (logical HIGH).
➢ Truth Table
A truth table shows all output logic levels of a logic circuit for every possible combination of
inputs.
➢ Boolean Algebra
Boolean algebra is a branch of mathematical logic that formalizes the relation between variables
that take the truth values of true and false, denoted by 1 and 0 respectively. It is fundamental in
the development of digital electronics.Digital electronics networks are generally expressed as
Boolean functions. Discrete voltage levels are used to represent the truth values.
➢ Combinational Logic
Combination logic refers to digital networks where the output is solely dependent on the current
input(s) and is not affected by previous states. The analysis of combination logic requires writing
the Boolean functions for each element of the circuit, producing their truth tables, and
subsequently combining each function for the final output and truth table.
➢ Integrated Circuits
IC - Integrated Circuit
The basic rule for most ICs is that there is polarity mark, such as the half-moon notch. Another
common polarity mark is a small dot, triangle or tab by pin 1. The rule is to move
counter-clockwise around the chip from the polarity mark while numbering the pins starting at 1.
Sometimes no direct mark may be present, in which case the pin numbers can be inferred simply
from the orientation of the text inscribed on the IC.
➢ In the third procedure the boolean function is F=A’C+AB’+BC. The circuit diagram of the
function is given below:
00 0 0 1 0 1
01 0 1 1 1 0
10 0 1 1 1 0
11 1 1 0 1 0
Input NOT
A F= A
0 1
1 0
➢ For the 2nd procedure the data is shown on the table below:
000 0 0
001 0 1
010 0 1
011 0 1
100 0 1
101 0 1
110 0 1
111 1 1
➢ For the 3rd procedure, the table with input and output data is given below:
000 0 0 0 0
001 1 0 0 1
010 0 0 0 0
011 1 0 1 1
100 0 1 0 1
101 0 1 0 1
110 0 0 0 0
111 0 0 1 1
7. Simulation Result
➢ In the third procedure the boolean function is F=A’C+AB’+BC. Here we have simulated this
circuit for the input ABC=010
8. Discussion
In the first part we were given different types of gate. Then we applied all types of input for
AND,OR, NAND,XOR,NOR gates. We recorded the results in the truth table.
In the second experiment we used three input AND and OR gates. These take three input at a time
and gives one output. Then we tried these gates for all the inputs and fill up the truth table. Their table
is only for AND and OR gates.
In the second table it follows the associative law. The associative law allows to remove bracket from
an expression and reconstruct it.
In the third part we used three inputs A,B,C and then we built the equation F=A’C+AB’+BC. We
used AND, NOT and OR gates. For each different input we got different result. We tested them with
the help of LED light.